llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll

; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
; Note update_mir_test_checks does not support generating checks for
; the frame info, so some functions have manually added stack object
; checks.
; RUN: llc -mtriple=amdgcn -mcpu=fiji -O0 -stop-after=irtranslator -global-isel -o - %s | FileCheck %s
; FIXME: pre-VI should have same ABI without legal i16 operations.

define void @void_func_empty_arg({} %arg0, i32 %arg1) #0 {
  ; CHECK-LABEL: name: void_func_empty_arg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[COPY]](i32), [[DEF]](p1) :: (store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i32 %arg1, ptr addrspace(1) poison
  ret void
}

define void @void_func_empty_array([0 x i8] %arg0, i32 %arg1) #0 {
  ; CHECK-LABEL: name: void_func_empty_array
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[COPY]](i32), [[DEF]](p1) :: (store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i32 %arg1, ptr addrspace(1) poison
  ret void
}

define void @void_func_i1(i1 %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i1
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i1) = G_TRUNC [[COPY]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[TRUNC]](i1), [[DEF]](p1) :: (store (i1) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i1 %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_i1_zeroext(i1 zeroext %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i1_zeroext
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[ASSERT_ZEXT:%[0-9]+]]:_(i32) = G_ASSERT_ZEXT [[COPY]], 1
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i1) = G_TRUNC [[ASSERT_ZEXT]](i32)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 12
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[ZEXT:%[0-9]+]]:_(i32) = G_ZEXT [[TRUNC]](i1)
  ; CHECK-NEXT:   [[ADD:%[0-9]+]]:_(i32) = G_ADD [[ZEXT]], [[C]]
  ; CHECK-NEXT:   G_STORE [[ADD]](i32), [[DEF]](p1) :: (store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  %ext = zext i1 %arg0 to i32
  %add = add i32 %ext, 12
  store i32 %add, ptr addrspace(1) poison
  ret void
}

define void @void_func_i1_signext(i1 signext %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i1_signext
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[ASSERT_SEXT:%[0-9]+]]:_(i32) = G_ASSERT_SEXT [[COPY]], 1
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i1) = G_TRUNC [[ASSERT_SEXT]](i32)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 12
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[SEXT:%[0-9]+]]:_(i32) = G_SEXT [[TRUNC]](i1)
  ; CHECK-NEXT:   [[ADD:%[0-9]+]]:_(i32) = G_ADD [[SEXT]], [[C]]
  ; CHECK-NEXT:   G_STORE [[ADD]](i32), [[DEF]](p1) :: (store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  %ext = sext i1 %arg0 to i32
  %add = add i32 %ext, 12
  store i32 %add, ptr addrspace(1) poison
  ret void
}

define void @i1_arg_i1_use(i1 %arg) #0 {
  ; CHECK-LABEL: name: i1_arg_i1_use
  ; CHECK: bb.1.bb:
  ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i1) = G_TRUNC [[COPY]](i32)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i1) = G_CONSTANT i1 true
  ; CHECK-NEXT:   [[C1:%[0-9]+]]:_(i32) = G_CONSTANT i32 0
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[XOR:%[0-9]+]]:_(i1) = G_XOR [[TRUNC]], [[C]]
  ; CHECK-NEXT:   [[INT:%[0-9]+]]:_(i1), [[INT1:%[0-9]+]]:_(i64) = G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.if), [[XOR]](i1)
  ; CHECK-NEXT:   G_BRCOND [[INT]](i1), %bb.2
  ; CHECK-NEXT:   G_BR %bb.3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2.bb1:
  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   G_STORE [[C1]](i32), [[DEF]](p1) :: (volatile store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_BR %bb.3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.3.bb2:
  ; CHECK-NEXT:   G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.end.cf), [[INT1]](i64)
  ; CHECK-NEXT:   SI_RETURN
bb:
  br i1 %arg, label %bb2, label %bb1

bb1:
  store volatile i32 0, ptr addrspace(1) poison
  br label %bb2

bb2:
  ret void
}

define void @void_func_i8(i8 %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i8
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[COPY]](i32)
  ; CHECK-NEXT:   [[TRUNC1:%[0-9]+]]:_(i8) = G_TRUNC [[TRUNC]](i16)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[TRUNC1]](i8), [[DEF]](p1) :: (store (i8) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i8 %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_i8_zeroext(i8 zeroext %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i8_zeroext
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[ASSERT_ZEXT:%[0-9]+]]:_(i32) = G_ASSERT_ZEXT [[COPY]], 8
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i8) = G_TRUNC [[ASSERT_ZEXT]](i32)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 12
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[ZEXT:%[0-9]+]]:_(i32) = G_ZEXT [[TRUNC]](i8)
  ; CHECK-NEXT:   [[ADD:%[0-9]+]]:_(i32) = G_ADD [[ZEXT]], [[C]]
  ; CHECK-NEXT:   G_STORE [[ADD]](i32), [[DEF]](p1) :: (store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  %ext = zext i8 %arg0 to i32
  %add = add i32 %ext, 12
  store i32 %add, ptr addrspace(1) poison
  ret void
}

define void @void_func_i8_signext(i8 signext %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i8_signext
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[ASSERT_SEXT:%[0-9]+]]:_(i32) = G_ASSERT_SEXT [[COPY]], 8
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i8) = G_TRUNC [[ASSERT_SEXT]](i32)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 12
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[SEXT:%[0-9]+]]:_(i32) = G_SEXT [[TRUNC]](i8)
  ; CHECK-NEXT:   [[ADD:%[0-9]+]]:_(i32) = G_ADD [[SEXT]], [[C]]
  ; CHECK-NEXT:   G_STORE [[ADD]](i32), [[DEF]](p1) :: (store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  %ext = sext i8 %arg0 to i32
  %add = add i32 %ext, 12
  store i32 %add, ptr addrspace(1) poison
  ret void
}

define void @void_func_i16(i16 %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i16
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[COPY]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[TRUNC]](i16), [[DEF]](p1) :: (store (i16) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i16 %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_i16_zeroext(i16 zeroext %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i16_zeroext
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[ASSERT_ZEXT:%[0-9]+]]:_(i32) = G_ASSERT_ZEXT [[COPY]], 16
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[ASSERT_ZEXT]](i32)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 12
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[ZEXT:%[0-9]+]]:_(i32) = G_ZEXT [[TRUNC]](i16)
  ; CHECK-NEXT:   [[ADD:%[0-9]+]]:_(i32) = G_ADD [[ZEXT]], [[C]]
  ; CHECK-NEXT:   G_STORE [[ADD]](i32), [[DEF]](p1) :: (store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  %ext = zext i16 %arg0 to i32
  %add = add i32 %ext, 12
  store i32 %add, ptr addrspace(1) poison
  ret void
}

define void @void_func_i16_signext(i16 signext %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i16_signext
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[ASSERT_SEXT:%[0-9]+]]:_(i32) = G_ASSERT_SEXT [[COPY]], 16
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[ASSERT_SEXT]](i32)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 12
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[SEXT:%[0-9]+]]:_(i32) = G_SEXT [[TRUNC]](i16)
  ; CHECK-NEXT:   [[ADD:%[0-9]+]]:_(i32) = G_ADD [[SEXT]], [[C]]
  ; CHECK-NEXT:   G_STORE [[ADD]](i32), [[DEF]](p1) :: (store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  %ext = sext i16 %arg0 to i32
  %add = add i32 %ext, 12
  store i32 %add, ptr addrspace(1) poison
  ret void
}

define void @void_func_i24(i24 %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i24
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i24) = G_TRUNC [[COPY]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[TRUNC]](i24), [[DEF]](p1) :: (store (i24) into `ptr addrspace(1) poison`, align 4, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i24 %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_i24_zeroext(i24 zeroext %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i24_zeroext
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[ASSERT_ZEXT:%[0-9]+]]:_(i32) = G_ASSERT_ZEXT [[COPY]], 24
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i24) = G_TRUNC [[ASSERT_ZEXT]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[TRUNC]](i24), [[DEF]](p1) :: (store (i24) into `ptr addrspace(1) poison`, align 4, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i24 %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_i24_signext(i24 signext %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i24_signext
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[ASSERT_SEXT:%[0-9]+]]:_(i32) = G_ASSERT_SEXT [[COPY]], 24
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i24) = G_TRUNC [[ASSERT_SEXT]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[TRUNC]](i24), [[DEF]](p1) :: (store (i24) into `ptr addrspace(1) poison`, align 4, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i24 %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_i32(i32 %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i32
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[COPY]](i32), [[DEF]](p1) :: (store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i32 %arg0, ptr addrspace(1) poison
  ret void
}

; The signext is an no-op
define void @void_func_i32_signext(i32 signext %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i32_signext
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[COPY]](i32), [[DEF]](p1) :: (store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i32 %arg0, ptr addrspace(1) poison
  ret void
}

; The zeroext is an no-op
define void @void_func_i32_zeroext(i32 zeroext %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i32_zeroext
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[COPY]](i32), [[DEF]](p1) :: (store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i32 %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_p3i8(ptr addrspace(3) %arg0) #0 {
  ; CHECK-LABEL: name: void_func_p3i8
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[COPY]](p3), [[DEF]](p1) :: (store (p3) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store ptr addrspace(3) %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_i48(i48 %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i48
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i48) = G_TRUNC [[MV]](s64)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[TRUNC]](i48), [[DEF]](p1) :: (store (i48) into `ptr addrspace(1) poison`, align 8, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i48 %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_i48_zeroext(i48 zeroext %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i48_zeroext
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i48) = G_TRUNC [[MV]](s64)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 12
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[ZEXT:%[0-9]+]]:_(i64) = G_ZEXT [[TRUNC]](i48)
  ; CHECK-NEXT:   [[ADD:%[0-9]+]]:_(i64) = G_ADD [[ZEXT]], [[C]]
  ; CHECK-NEXT:   G_STORE [[ADD]](i64), [[DEF]](p1) :: (store (i64) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  %ext = zext i48 %arg0 to i64
  %add = add i64 %ext, 12
  store i64 %add, ptr addrspace(1) poison
  ret void
}

define void @void_func_i48_signext(i48 signext %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i48_signext
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i48) = G_TRUNC [[MV]](s64)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 12
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[SEXT:%[0-9]+]]:_(i64) = G_SEXT [[TRUNC]](i48)
  ; CHECK-NEXT:   [[ADD:%[0-9]+]]:_(i64) = G_ADD [[SEXT]], [[C]]
  ; CHECK-NEXT:   G_STORE [[ADD]](i64), [[DEF]](p1) :: (store (i64) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  %ext = sext i48 %arg0 to i64
  %add = add i64 %ext, 12
  store i64 %add, ptr addrspace(1) poison
  ret void
}

define void @void_func_i64(i64 %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i64
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[MV]](i64), [[DEF]](p1) :: (store (i64) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i64 %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_i95(i95 %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i95
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32)
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i95) = G_TRUNC [[MV]](s96)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[TRUNC]](i95), [[DEF]](p1) :: (store (i95) into `ptr addrspace(1) poison`, align 8, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i95 %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_i95_zeroext(i95 zeroext %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i95_zeroext
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32)
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i95) = G_TRUNC [[MV]](s96)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i96) = G_CONSTANT i96 12
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[ZEXT:%[0-9]+]]:_(i96) = G_ZEXT [[TRUNC]](i95)
  ; CHECK-NEXT:   [[ADD:%[0-9]+]]:_(i96) = G_ADD [[ZEXT]], [[C]]
  ; CHECK-NEXT:   G_STORE [[ADD]](i96), [[DEF]](p1) :: (store (i96) into `ptr addrspace(1) poison`, align 8, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  %ext = zext i95 %arg0 to i96
  %add = add i96 %ext, 12
  store i96 %add, ptr addrspace(1) poison
  ret void
}

define void @void_func_i95_signext(i95 signext %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i95_signext
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32)
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i95) = G_TRUNC [[MV]](s96)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i96) = G_CONSTANT i96 12
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[SEXT:%[0-9]+]]:_(i96) = G_SEXT [[TRUNC]](i95)
  ; CHECK-NEXT:   [[ADD:%[0-9]+]]:_(i96) = G_ADD [[SEXT]], [[C]]
  ; CHECK-NEXT:   G_STORE [[ADD]](i96), [[DEF]](p1) :: (store (i96) into `ptr addrspace(1) poison`, align 8, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  %ext = sext i95 %arg0 to i96
  %add = add i96 %ext, 12
  store i96 %add, ptr addrspace(1) poison
  ret void
}

define void @void_func_i96(i96 %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i96
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(i96) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[MV]](i96), [[DEF]](p1) :: (store (i96) into `ptr addrspace(1) poison`, align 8, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i96 %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_p0i8(ptr %arg0) #0 {
  ; CHECK-LABEL: name: void_func_p0i8
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[MV]](p0), [[DEF]](p1) :: (store (p0) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store ptr %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_p1i8(ptr addrspace(1) %arg0) #0 {
  ; CHECK-LABEL: name: void_func_p1i8
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[MV]](p1), [[DEF]](p1) :: (store (p1) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store ptr addrspace(1) %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_f16(half %arg0) #0 {
  ; CHECK-LABEL: name: void_func_f16
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[COPY]](i32)
  ; CHECK-NEXT:   [[BITCAST:%[0-9]+]]:_(f16) = G_BITCAST [[TRUNC]](i16)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BITCAST]](f16), [[DEF]](p1) :: (store (f16) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store half %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_f32(float %arg0) #0 {
  ; CHECK-LABEL: name: void_func_f32
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(f32) = COPY $vgpr0
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[COPY]](f32), [[DEF]](p1) :: (store (f32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store float %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_f64(double %arg0) #0 {
  ; CHECK-LABEL: name: void_func_f64
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[MV]](f64), [[DEF]](p1) :: (store (f64) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store double %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v2i32(<2 x i32> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v2i32
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<2 x i32>), [[DEF]](p1) :: (store (<2 x i32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <2 x i32> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v2i24(<2 x i24> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v2i24
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(<2 x i24>) = G_TRUNC [[BUILD_VECTOR]](<2 x i32>)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[TRUNC]](<2 x i24>), [[DEF]](p1) :: (store (<2 x i24>) into `ptr addrspace(1) poison`, align 8, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <2 x i24> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v3i24(<3 x i24> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v3i24
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<3 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32)
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(<3 x i24>) = G_TRUNC [[BUILD_VECTOR]](<3 x i32>)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[TRUNC]](<3 x i24>), [[DEF]](p1) :: (store (<3 x i24>) into `ptr addrspace(1) poison`, align 16, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <3 x i24> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v2i8(<2 x i8> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v2i8
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[COPY]](i32)
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[TRUNC1:%[0-9]+]]:_(i16) = G_TRUNC [[COPY1]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x i16>) = G_BUILD_VECTOR [[TRUNC]](i16), [[TRUNC1]](i16)
  ; CHECK-NEXT:   [[TRUNC2:%[0-9]+]]:_(<2 x i8>) = G_TRUNC [[BUILD_VECTOR]](<2 x i16>)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[TRUNC2]](<2 x i8>), [[DEF]](p1) :: (store (<2 x i8>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <2 x i8> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v3i8(<3 x i8> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v3i8
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[COPY]](i32)
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[TRUNC1:%[0-9]+]]:_(i16) = G_TRUNC [[COPY1]](i32)
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[TRUNC2:%[0-9]+]]:_(i16) = G_TRUNC [[COPY2]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<3 x i16>) = G_BUILD_VECTOR [[TRUNC]](i16), [[TRUNC1]](i16), [[TRUNC2]](i16)
  ; CHECK-NEXT:   [[TRUNC3:%[0-9]+]]:_(<3 x i8>) = G_TRUNC [[BUILD_VECTOR]](<3 x i16>)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[TRUNC3]](<3 x i8>), [[DEF]](p1) :: (store (<3 x i8>) into `ptr addrspace(1) poison`, align 4, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <3 x i8> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v4i8(<4 x i8> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v4i8
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[COPY]](i32)
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[TRUNC1:%[0-9]+]]:_(i16) = G_TRUNC [[COPY1]](i32)
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[TRUNC2:%[0-9]+]]:_(i16) = G_TRUNC [[COPY2]](i32)
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[TRUNC3:%[0-9]+]]:_(i16) = G_TRUNC [[COPY3]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<4 x i16>) = G_BUILD_VECTOR [[TRUNC]](i16), [[TRUNC1]](i16), [[TRUNC2]](i16), [[TRUNC3]](i16)
  ; CHECK-NEXT:   [[TRUNC4:%[0-9]+]]:_(<4 x i8>) = G_TRUNC [[BUILD_VECTOR]](<4 x i16>)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[TRUNC4]](<4 x i8>), [[DEF]](p1) :: (store (<4 x i8>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <4 x i8> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v2p3i8(<2 x ptr addrspace(3)> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v2p3i8
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(p3) = COPY $vgpr1
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p3>) = G_BUILD_VECTOR [[COPY]](p3), [[COPY1]](p3)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<2 x p3>), [[DEF]](p1) :: (store (<2 x p3>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <2 x ptr addrspace(3)> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v3i32(<3 x i32> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v3i32
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<3 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<3 x i32>), [[DEF]](p1) :: (store (<3 x i32>) into `ptr addrspace(1) poison`, align 16, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <3 x i32> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v4i32(<4 x i32> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v4i32
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<4 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<4 x i32>), [[DEF]](p1) :: (store (<4 x i32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <4 x i32> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v5i32(<5 x i32> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v5i32
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<5 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<5 x i32>), [[DEF]](p1) :: (store (<5 x i32>) into `ptr addrspace(1) poison`, align 32, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <5 x i32> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v8i32(<8 x i32> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v8i32
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $vgpr7
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<8 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32), [[COPY5]](i32), [[COPY6]](i32), [[COPY7]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<8 x i32>), [[DEF]](p1) :: (store (<8 x i32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <8 x i32> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v16i32(<16 x i32> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v16i32
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $vgpr7
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $vgpr8
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $vgpr9
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $vgpr10
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $vgpr11
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $vgpr12
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $vgpr13
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr14
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr15
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<16 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32), [[COPY5]](i32), [[COPY6]](i32), [[COPY7]](i32), [[COPY8]](i32), [[COPY9]](i32), [[COPY10]](i32), [[COPY11]](i32), [[COPY12]](i32), [[COPY13]](i32), [[COPY14]](i32), [[COPY15]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<16 x i32>), [[DEF]](p1) :: (store (<16 x i32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <16 x i32> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v32i32(<32 x i32> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v32i32
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $vgpr7
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $vgpr8
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $vgpr9
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $vgpr10
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $vgpr11
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $vgpr12
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $vgpr13
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr14
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr15
  ; CHECK-NEXT:   [[COPY16:%[0-9]+]]:_(i32) = COPY $vgpr16
  ; CHECK-NEXT:   [[COPY17:%[0-9]+]]:_(i32) = COPY $vgpr17
  ; CHECK-NEXT:   [[COPY18:%[0-9]+]]:_(i32) = COPY $vgpr18
  ; CHECK-NEXT:   [[COPY19:%[0-9]+]]:_(i32) = COPY $vgpr19
  ; CHECK-NEXT:   [[COPY20:%[0-9]+]]:_(i32) = COPY $vgpr20
  ; CHECK-NEXT:   [[COPY21:%[0-9]+]]:_(i32) = COPY $vgpr21
  ; CHECK-NEXT:   [[COPY22:%[0-9]+]]:_(i32) = COPY $vgpr22
  ; CHECK-NEXT:   [[COPY23:%[0-9]+]]:_(i32) = COPY $vgpr23
  ; CHECK-NEXT:   [[COPY24:%[0-9]+]]:_(i32) = COPY $vgpr24
  ; CHECK-NEXT:   [[COPY25:%[0-9]+]]:_(i32) = COPY $vgpr25
  ; CHECK-NEXT:   [[COPY26:%[0-9]+]]:_(i32) = COPY $vgpr26
  ; CHECK-NEXT:   [[COPY27:%[0-9]+]]:_(i32) = COPY $vgpr27
  ; CHECK-NEXT:   [[COPY28:%[0-9]+]]:_(i32) = COPY $vgpr28
  ; CHECK-NEXT:   [[COPY29:%[0-9]+]]:_(i32) = COPY $vgpr29
  ; CHECK-NEXT:   [[COPY30:%[0-9]+]]:_(i32) = COPY $vgpr30
  ; CHECK-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
  ; CHECK-NEXT:   [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load (i32) from %fixed-stack.0, align 16, addrspace 5)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<32 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32), [[COPY5]](i32), [[COPY6]](i32), [[COPY7]](i32), [[COPY8]](i32), [[COPY9]](i32), [[COPY10]](i32), [[COPY11]](i32), [[COPY12]](i32), [[COPY13]](i32), [[COPY14]](i32), [[COPY15]](i32), [[COPY16]](i32), [[COPY17]](i32), [[COPY18]](i32), [[COPY19]](i32), [[COPY20]](i32), [[COPY21]](i32), [[COPY22]](i32), [[COPY23]](i32), [[COPY24]](i32), [[COPY25]](i32), [[COPY26]](i32), [[COPY27]](i32), [[COPY28]](i32), [[COPY29]](i32), [[COPY30]](i32), [[LOAD]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<32 x i32>), [[DEF]](p1) :: (store (<32 x i32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <32 x i32> %arg0, ptr addrspace(1) poison
  ret void
}

; 1 over register limit
define void @void_func_v33i32(<33 x i32> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v33i32
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $vgpr7
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $vgpr8
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $vgpr9
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $vgpr10
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $vgpr11
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $vgpr12
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $vgpr13
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr14
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr15
  ; CHECK-NEXT:   [[COPY16:%[0-9]+]]:_(i32) = COPY $vgpr16
  ; CHECK-NEXT:   [[COPY17:%[0-9]+]]:_(i32) = COPY $vgpr17
  ; CHECK-NEXT:   [[COPY18:%[0-9]+]]:_(i32) = COPY $vgpr18
  ; CHECK-NEXT:   [[COPY19:%[0-9]+]]:_(i32) = COPY $vgpr19
  ; CHECK-NEXT:   [[COPY20:%[0-9]+]]:_(i32) = COPY $vgpr20
  ; CHECK-NEXT:   [[COPY21:%[0-9]+]]:_(i32) = COPY $vgpr21
  ; CHECK-NEXT:   [[COPY22:%[0-9]+]]:_(i32) = COPY $vgpr22
  ; CHECK-NEXT:   [[COPY23:%[0-9]+]]:_(i32) = COPY $vgpr23
  ; CHECK-NEXT:   [[COPY24:%[0-9]+]]:_(i32) = COPY $vgpr24
  ; CHECK-NEXT:   [[COPY25:%[0-9]+]]:_(i32) = COPY $vgpr25
  ; CHECK-NEXT:   [[COPY26:%[0-9]+]]:_(i32) = COPY $vgpr26
  ; CHECK-NEXT:   [[COPY27:%[0-9]+]]:_(i32) = COPY $vgpr27
  ; CHECK-NEXT:   [[COPY28:%[0-9]+]]:_(i32) = COPY $vgpr28
  ; CHECK-NEXT:   [[COPY29:%[0-9]+]]:_(i32) = COPY $vgpr29
  ; CHECK-NEXT:   [[COPY30:%[0-9]+]]:_(i32) = COPY $vgpr30
  ; CHECK-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
  ; CHECK-NEXT:   [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load (i32) from %fixed-stack.1, align 16, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
  ; CHECK-NEXT:   [[LOAD1:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load (i32) from %fixed-stack.0, addrspace 5)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<33 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32), [[COPY5]](i32), [[COPY6]](i32), [[COPY7]](i32), [[COPY8]](i32), [[COPY9]](i32), [[COPY10]](i32), [[COPY11]](i32), [[COPY12]](i32), [[COPY13]](i32), [[COPY14]](i32), [[COPY15]](i32), [[COPY16]](i32), [[COPY17]](i32), [[COPY18]](i32), [[COPY19]](i32), [[COPY20]](i32), [[COPY21]](i32), [[COPY22]](i32), [[COPY23]](i32), [[COPY24]](i32), [[COPY25]](i32), [[COPY26]](i32), [[COPY27]](i32), [[COPY28]](i32), [[COPY29]](i32), [[COPY30]](i32), [[LOAD]](i32), [[LOAD1]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<33 x i32>), [[DEF]](p1) :: (store (<33 x i32>) into `ptr addrspace(1) poison`, align 256, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <33 x i32> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v2i64(<2 x i64> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v2i64
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[MV1:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY2]](i32), [[COPY3]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x i64>) = G_BUILD_VECTOR [[MV]](i64), [[MV1]](i64)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<2 x i64>), [[DEF]](p1) :: (store (<2 x i64>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <2 x i64> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v2p0i8(<2 x ptr> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v2p0i8
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[MV1:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY2]](i32), [[COPY3]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p0>) = G_BUILD_VECTOR [[MV]](p0), [[MV1]](p0)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<2 x p0>), [[DEF]](p1) :: (store (<2 x p0>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <2 x ptr> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v2p1i8(<2 x ptr addrspace(1)> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v2p1i8
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[MV1:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY2]](i32), [[COPY3]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p1>) = G_BUILD_VECTOR [[MV]](p1), [[MV1]](p1)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<2 x p1>), [[DEF]](p1) :: (store (<2 x p1>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <2 x ptr addrspace(1)> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v3i64(<3 x i64> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v3i64
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[MV1:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY2]](i32), [[COPY3]](i32)
  ; CHECK-NEXT:   [[MV2:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY4]](i32), [[COPY5]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<3 x i64>) = G_BUILD_VECTOR [[MV]](i64), [[MV1]](i64), [[MV2]](i64)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<3 x i64>), [[DEF]](p1) :: (store (<3 x i64>) into `ptr addrspace(1) poison`, align 32, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <3 x i64> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v4i64(<4 x i64> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v4i64
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $vgpr7
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[MV1:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY2]](i32), [[COPY3]](i32)
  ; CHECK-NEXT:   [[MV2:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY4]](i32), [[COPY5]](i32)
  ; CHECK-NEXT:   [[MV3:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY6]](i32), [[COPY7]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<4 x i64>) = G_BUILD_VECTOR [[MV]](i64), [[MV1]](i64), [[MV2]](i64), [[MV3]](i64)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<4 x i64>), [[DEF]](p1) :: (store (<4 x i64>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <4 x i64> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v5i64(<5 x i64> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v5i64
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $vgpr7
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $vgpr8
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $vgpr9
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[MV1:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY2]](i32), [[COPY3]](i32)
  ; CHECK-NEXT:   [[MV2:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY4]](i32), [[COPY5]](i32)
  ; CHECK-NEXT:   [[MV3:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY6]](i32), [[COPY7]](i32)
  ; CHECK-NEXT:   [[MV4:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY8]](i32), [[COPY9]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<5 x i64>) = G_BUILD_VECTOR [[MV]](i64), [[MV1]](i64), [[MV2]](i64), [[MV3]](i64), [[MV4]](i64)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<5 x i64>), [[DEF]](p1) :: (store (<5 x i64>) into `ptr addrspace(1) poison`, align 64, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <5 x i64> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v8i64(<8 x i64> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v8i64
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $vgpr7
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $vgpr8
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $vgpr9
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $vgpr10
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $vgpr11
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $vgpr12
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $vgpr13
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr14
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr15
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[MV1:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY2]](i32), [[COPY3]](i32)
  ; CHECK-NEXT:   [[MV2:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY4]](i32), [[COPY5]](i32)
  ; CHECK-NEXT:   [[MV3:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY6]](i32), [[COPY7]](i32)
  ; CHECK-NEXT:   [[MV4:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY8]](i32), [[COPY9]](i32)
  ; CHECK-NEXT:   [[MV5:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY10]](i32), [[COPY11]](i32)
  ; CHECK-NEXT:   [[MV6:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY12]](i32), [[COPY13]](i32)
  ; CHECK-NEXT:   [[MV7:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY14]](i32), [[COPY15]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<8 x i64>) = G_BUILD_VECTOR [[MV]](i64), [[MV1]](i64), [[MV2]](i64), [[MV3]](i64), [[MV4]](i64), [[MV5]](i64), [[MV6]](i64), [[MV7]](i64)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<8 x i64>), [[DEF]](p1) :: (store (<8 x i64>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <8 x i64> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v16i64(<16 x i64> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v16i64
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $vgpr7
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $vgpr8
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $vgpr9
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $vgpr10
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $vgpr11
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $vgpr12
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $vgpr13
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr14
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr15
  ; CHECK-NEXT:   [[COPY16:%[0-9]+]]:_(i32) = COPY $vgpr16
  ; CHECK-NEXT:   [[COPY17:%[0-9]+]]:_(i32) = COPY $vgpr17
  ; CHECK-NEXT:   [[COPY18:%[0-9]+]]:_(i32) = COPY $vgpr18
  ; CHECK-NEXT:   [[COPY19:%[0-9]+]]:_(i32) = COPY $vgpr19
  ; CHECK-NEXT:   [[COPY20:%[0-9]+]]:_(i32) = COPY $vgpr20
  ; CHECK-NEXT:   [[COPY21:%[0-9]+]]:_(i32) = COPY $vgpr21
  ; CHECK-NEXT:   [[COPY22:%[0-9]+]]:_(i32) = COPY $vgpr22
  ; CHECK-NEXT:   [[COPY23:%[0-9]+]]:_(i32) = COPY $vgpr23
  ; CHECK-NEXT:   [[COPY24:%[0-9]+]]:_(i32) = COPY $vgpr24
  ; CHECK-NEXT:   [[COPY25:%[0-9]+]]:_(i32) = COPY $vgpr25
  ; CHECK-NEXT:   [[COPY26:%[0-9]+]]:_(i32) = COPY $vgpr26
  ; CHECK-NEXT:   [[COPY27:%[0-9]+]]:_(i32) = COPY $vgpr27
  ; CHECK-NEXT:   [[COPY28:%[0-9]+]]:_(i32) = COPY $vgpr28
  ; CHECK-NEXT:   [[COPY29:%[0-9]+]]:_(i32) = COPY $vgpr29
  ; CHECK-NEXT:   [[COPY30:%[0-9]+]]:_(i32) = COPY $vgpr30
  ; CHECK-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
  ; CHECK-NEXT:   [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load (i32) from %fixed-stack.0, align 16, addrspace 5)
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[MV1:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY2]](i32), [[COPY3]](i32)
  ; CHECK-NEXT:   [[MV2:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY4]](i32), [[COPY5]](i32)
  ; CHECK-NEXT:   [[MV3:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY6]](i32), [[COPY7]](i32)
  ; CHECK-NEXT:   [[MV4:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY8]](i32), [[COPY9]](i32)
  ; CHECK-NEXT:   [[MV5:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY10]](i32), [[COPY11]](i32)
  ; CHECK-NEXT:   [[MV6:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY12]](i32), [[COPY13]](i32)
  ; CHECK-NEXT:   [[MV7:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY14]](i32), [[COPY15]](i32)
  ; CHECK-NEXT:   [[MV8:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY16]](i32), [[COPY17]](i32)
  ; CHECK-NEXT:   [[MV9:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY18]](i32), [[COPY19]](i32)
  ; CHECK-NEXT:   [[MV10:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY20]](i32), [[COPY21]](i32)
  ; CHECK-NEXT:   [[MV11:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY22]](i32), [[COPY23]](i32)
  ; CHECK-NEXT:   [[MV12:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY24]](i32), [[COPY25]](i32)
  ; CHECK-NEXT:   [[MV13:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY26]](i32), [[COPY27]](i32)
  ; CHECK-NEXT:   [[MV14:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY28]](i32), [[COPY29]](i32)
  ; CHECK-NEXT:   [[MV15:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY30]](i32), [[LOAD]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<16 x i64>) = G_BUILD_VECTOR [[MV]](i64), [[MV1]](i64), [[MV2]](i64), [[MV3]](i64), [[MV4]](i64), [[MV5]](i64), [[MV6]](i64), [[MV7]](i64), [[MV8]](i64), [[MV9]](i64), [[MV10]](i64), [[MV11]](i64), [[MV12]](i64), [[MV13]](i64), [[MV14]](i64), [[MV15]](i64)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<16 x i64>), [[DEF]](p1) :: (store (<16 x i64>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <16 x i64> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v2i16(<2 x i16> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v2i16
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr0
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[COPY]](<2 x i16>), [[DEF]](p1) :: (store (<2 x i16>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <2 x i16> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v3i16(<3 x i16> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v3i16
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr1
  ; CHECK-NEXT:   [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x i16>) = G_CONCAT_VECTORS [[COPY]](<2 x i16>), [[COPY1]](<2 x i16>)
  ; CHECK-NEXT:   [[UV:%[0-9]+]]:_(i16), [[UV1:%[0-9]+]]:_(i16), [[UV2:%[0-9]+]]:_(i16), [[UV3:%[0-9]+]]:_(i16) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<4 x i16>)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<3 x i16>) = G_BUILD_VECTOR [[UV]](i16), [[UV1]](i16), [[UV2]](i16)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<3 x i16>), [[DEF]](p1) :: (store (<3 x i16>) into `ptr addrspace(1) poison`, align 8, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <3 x i16> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v4i16(<4 x i16> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v4i16
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr1
  ; CHECK-NEXT:   [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x i16>) = G_CONCAT_VECTORS [[COPY]](<2 x i16>), [[COPY1]](<2 x i16>)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[CONCAT_VECTORS]](<4 x i16>), [[DEF]](p1) :: (store (<4 x i16>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <4 x i16> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v5i16(<5 x i16> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v5i16
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr2
  ; CHECK-NEXT:   [[CONCAT_VECTORS:%[0-9]+]]:_(<6 x i16>) = G_CONCAT_VECTORS [[COPY]](<2 x i16>), [[COPY1]](<2 x i16>), [[COPY2]](<2 x i16>)
  ; CHECK-NEXT:   [[UV:%[0-9]+]]:_(i16), [[UV1:%[0-9]+]]:_(i16), [[UV2:%[0-9]+]]:_(i16), [[UV3:%[0-9]+]]:_(i16), [[UV4:%[0-9]+]]:_(i16), [[UV5:%[0-9]+]]:_(i16) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<6 x i16>)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<5 x i16>) = G_BUILD_VECTOR [[UV]](i16), [[UV1]](i16), [[UV2]](i16), [[UV3]](i16), [[UV4]](i16)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<5 x i16>), [[DEF]](p1) :: (store (<5 x i16>) into `ptr addrspace(1) poison`, align 16, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <5 x i16> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v8i16(<8 x i16> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v8i16
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr3
  ; CHECK-NEXT:   [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x i16>) = G_CONCAT_VECTORS [[COPY]](<2 x i16>), [[COPY1]](<2 x i16>), [[COPY2]](<2 x i16>), [[COPY3]](<2 x i16>)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[CONCAT_VECTORS]](<8 x i16>), [[DEF]](p1) :: (store (<8 x i16>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <8 x i16> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v16i16(<16 x i16> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v16i16
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr7
  ; CHECK-NEXT:   [[CONCAT_VECTORS:%[0-9]+]]:_(<16 x i16>) = G_CONCAT_VECTORS [[COPY]](<2 x i16>), [[COPY1]](<2 x i16>), [[COPY2]](<2 x i16>), [[COPY3]](<2 x i16>), [[COPY4]](<2 x i16>), [[COPY5]](<2 x i16>), [[COPY6]](<2 x i16>), [[COPY7]](<2 x i16>)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[CONCAT_VECTORS]](<16 x i16>), [[DEF]](p1) :: (store (<16 x i16>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <16 x i16> %arg0, ptr addrspace(1) poison
  ret void
}

; <2 x i16> pieces that start spilling to the stack.
; FIXME: load of 2 would be sufficient for last piece
define void @void_func_v65i16(<65 x i16> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v65i16
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr7
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr8
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr9
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr10
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr11
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr12
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr13
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr14
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr15
  ; CHECK-NEXT:   [[COPY16:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr16
  ; CHECK-NEXT:   [[COPY17:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr17
  ; CHECK-NEXT:   [[COPY18:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr18
  ; CHECK-NEXT:   [[COPY19:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr19
  ; CHECK-NEXT:   [[COPY20:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr20
  ; CHECK-NEXT:   [[COPY21:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr21
  ; CHECK-NEXT:   [[COPY22:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr22
  ; CHECK-NEXT:   [[COPY23:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr23
  ; CHECK-NEXT:   [[COPY24:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr24
  ; CHECK-NEXT:   [[COPY25:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr25
  ; CHECK-NEXT:   [[COPY26:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr26
  ; CHECK-NEXT:   [[COPY27:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr27
  ; CHECK-NEXT:   [[COPY28:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr28
  ; CHECK-NEXT:   [[COPY29:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr29
  ; CHECK-NEXT:   [[COPY30:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr30
  ; CHECK-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
  ; CHECK-NEXT:   [[LOAD:%[0-9]+]]:_(<2 x i16>) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load (<2 x i16>) from %fixed-stack.1, align 16, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
  ; CHECK-NEXT:   [[LOAD1:%[0-9]+]]:_(<2 x i16>) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load (<2 x i16>) from %fixed-stack.0, addrspace 5)
  ; CHECK-NEXT:   [[CONCAT_VECTORS:%[0-9]+]]:_(<66 x i16>) = G_CONCAT_VECTORS [[COPY]](<2 x i16>), [[COPY1]](<2 x i16>), [[COPY2]](<2 x i16>), [[COPY3]](<2 x i16>), [[COPY4]](<2 x i16>), [[COPY5]](<2 x i16>), [[COPY6]](<2 x i16>), [[COPY7]](<2 x i16>), [[COPY8]](<2 x i16>), [[COPY9]](<2 x i16>), [[COPY10]](<2 x i16>), [[COPY11]](<2 x i16>), [[COPY12]](<2 x i16>), [[COPY13]](<2 x i16>), [[COPY14]](<2 x i16>), [[COPY15]](<2 x i16>), [[COPY16]](<2 x i16>), [[COPY17]](<2 x i16>), [[COPY18]](<2 x i16>), [[COPY19]](<2 x i16>), [[COPY20]](<2 x i16>), [[COPY21]](<2 x i16>), [[COPY22]](<2 x i16>), [[COPY23]](<2 x i16>), [[COPY24]](<2 x i16>), [[COPY25]](<2 x i16>), [[COPY26]](<2 x i16>), [[COPY27]](<2 x i16>), [[COPY28]](<2 x i16>), [[COPY29]](<2 x i16>), [[COPY30]](<2 x i16>), [[LOAD]](<2 x i16>), [[LOAD1]](<2 x i16>)
  ; CHECK-NEXT:   [[UV:%[0-9]+]]:_(i16), [[UV1:%[0-9]+]]:_(i16), [[UV2:%[0-9]+]]:_(i16), [[UV3:%[0-9]+]]:_(i16), [[UV4:%[0-9]+]]:_(i16), [[UV5:%[0-9]+]]:_(i16), [[UV6:%[0-9]+]]:_(i16), [[UV7:%[0-9]+]]:_(i16), [[UV8:%[0-9]+]]:_(i16), [[UV9:%[0-9]+]]:_(i16), [[UV10:%[0-9]+]]:_(i16), [[UV11:%[0-9]+]]:_(i16), [[UV12:%[0-9]+]]:_(i16), [[UV13:%[0-9]+]]:_(i16), [[UV14:%[0-9]+]]:_(i16), [[UV15:%[0-9]+]]:_(i16), [[UV16:%[0-9]+]]:_(i16), [[UV17:%[0-9]+]]:_(i16), [[UV18:%[0-9]+]]:_(i16), [[UV19:%[0-9]+]]:_(i16), [[UV20:%[0-9]+]]:_(i16), [[UV21:%[0-9]+]]:_(i16), [[UV22:%[0-9]+]]:_(i16), [[UV23:%[0-9]+]]:_(i16), [[UV24:%[0-9]+]]:_(i16), [[UV25:%[0-9]+]]:_(i16), [[UV26:%[0-9]+]]:_(i16), [[UV27:%[0-9]+]]:_(i16), [[UV28:%[0-9]+]]:_(i16), [[UV29:%[0-9]+]]:_(i16), [[UV30:%[0-9]+]]:_(i16), [[UV31:%[0-9]+]]:_(i16), [[UV32:%[0-9]+]]:_(i16), [[UV33:%[0-9]+]]:_(i16), [[UV34:%[0-9]+]]:_(i16), [[UV35:%[0-9]+]]:_(i16), [[UV36:%[0-9]+]]:_(i16), [[UV37:%[0-9]+]]:_(i16), [[UV38:%[0-9]+]]:_(i16), [[UV39:%[0-9]+]]:_(i16), [[UV40:%[0-9]+]]:_(i16), [[UV41:%[0-9]+]]:_(i16), [[UV42:%[0-9]+]]:_(i16), [[UV43:%[0-9]+]]:_(i16), [[UV44:%[0-9]+]]:_(i16), [[UV45:%[0-9]+]]:_(i16), [[UV46:%[0-9]+]]:_(i16), [[UV47:%[0-9]+]]:_(i16), [[UV48:%[0-9]+]]:_(i16), [[UV49:%[0-9]+]]:_(i16), [[UV50:%[0-9]+]]:_(i16), [[UV51:%[0-9]+]]:_(i16), [[UV52:%[0-9]+]]:_(i16), [[UV53:%[0-9]+]]:_(i16), [[UV54:%[0-9]+]]:_(i16), [[UV55:%[0-9]+]]:_(i16), [[UV56:%[0-9]+]]:_(i16), [[UV57:%[0-9]+]]:_(i16), [[UV58:%[0-9]+]]:_(i16), [[UV59:%[0-9]+]]:_(i16), [[UV60:%[0-9]+]]:_(i16), [[UV61:%[0-9]+]]:_(i16), [[UV62:%[0-9]+]]:_(i16), [[UV63:%[0-9]+]]:_(i16), [[UV64:%[0-9]+]]:_(i16), [[UV65:%[0-9]+]]:_(i16) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<66 x i16>)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<65 x i16>) = G_BUILD_VECTOR [[UV]](i16), [[UV1]](i16), [[UV2]](i16), [[UV3]](i16), [[UV4]](i16), [[UV5]](i16), [[UV6]](i16), [[UV7]](i16), [[UV8]](i16), [[UV9]](i16), [[UV10]](i16), [[UV11]](i16), [[UV12]](i16), [[UV13]](i16), [[UV14]](i16), [[UV15]](i16), [[UV16]](i16), [[UV17]](i16), [[UV18]](i16), [[UV19]](i16), [[UV20]](i16), [[UV21]](i16), [[UV22]](i16), [[UV23]](i16), [[UV24]](i16), [[UV25]](i16), [[UV26]](i16), [[UV27]](i16), [[UV28]](i16), [[UV29]](i16), [[UV30]](i16), [[UV31]](i16), [[UV32]](i16), [[UV33]](i16), [[UV34]](i16), [[UV35]](i16), [[UV36]](i16), [[UV37]](i16), [[UV38]](i16), [[UV39]](i16), [[UV40]](i16), [[UV41]](i16), [[UV42]](i16), [[UV43]](i16), [[UV44]](i16), [[UV45]](i16), [[UV46]](i16), [[UV47]](i16), [[UV48]](i16), [[UV49]](i16), [[UV50]](i16), [[UV51]](i16), [[UV52]](i16), [[UV53]](i16), [[UV54]](i16), [[UV55]](i16), [[UV56]](i16), [[UV57]](i16), [[UV58]](i16), [[UV59]](i16), [[UV60]](i16), [[UV61]](i16), [[UV62]](i16), [[UV63]](i16), [[UV64]](i16)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<65 x i16>), [[DEF]](p1) :: (store (<65 x i16>) into `ptr addrspace(1) poison`, align 256, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <65 x i16> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v2f32(<2 x float> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v2f32
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(f32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(f32) = COPY $vgpr1
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x f32>) = G_BUILD_VECTOR [[COPY]](f32), [[COPY1]](f32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<2 x f32>), [[DEF]](p1) :: (store (<2 x f32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <2 x float> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v3f32(<3 x float> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v3f32
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(f32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(f32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(f32) = COPY $vgpr2
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<3 x f32>) = G_BUILD_VECTOR [[COPY]](f32), [[COPY1]](f32), [[COPY2]](f32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<3 x f32>), [[DEF]](p1) :: (store (<3 x f32>) into `ptr addrspace(1) poison`, align 16, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <3 x float> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v4f32(<4 x float> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v4f32
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(f32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(f32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(f32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(f32) = COPY $vgpr3
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<4 x f32>) = G_BUILD_VECTOR [[COPY]](f32), [[COPY1]](f32), [[COPY2]](f32), [[COPY3]](f32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<4 x f32>), [[DEF]](p1) :: (store (<4 x f32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <4 x float> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v8f32(<8 x float> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v8f32
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(f32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(f32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(f32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(f32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(f32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(f32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(f32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(f32) = COPY $vgpr7
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<8 x f32>) = G_BUILD_VECTOR [[COPY]](f32), [[COPY1]](f32), [[COPY2]](f32), [[COPY3]](f32), [[COPY4]](f32), [[COPY5]](f32), [[COPY6]](f32), [[COPY7]](f32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<8 x f32>), [[DEF]](p1) :: (store (<8 x f32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <8 x float> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v16f32(<16 x float> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v16f32
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(f32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(f32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(f32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(f32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(f32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(f32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(f32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(f32) = COPY $vgpr7
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(f32) = COPY $vgpr8
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(f32) = COPY $vgpr9
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(f32) = COPY $vgpr10
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(f32) = COPY $vgpr11
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(f32) = COPY $vgpr12
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(f32) = COPY $vgpr13
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(f32) = COPY $vgpr14
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(f32) = COPY $vgpr15
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<16 x f32>) = G_BUILD_VECTOR [[COPY]](f32), [[COPY1]](f32), [[COPY2]](f32), [[COPY3]](f32), [[COPY4]](f32), [[COPY5]](f32), [[COPY6]](f32), [[COPY7]](f32), [[COPY8]](f32), [[COPY9]](f32), [[COPY10]](f32), [[COPY11]](f32), [[COPY12]](f32), [[COPY13]](f32), [[COPY14]](f32), [[COPY15]](f32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<16 x f32>), [[DEF]](p1) :: (store (<16 x f32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <16 x float> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v2f64(<2 x double> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v2f64
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[MV1:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY2]](i32), [[COPY3]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x f64>) = G_BUILD_VECTOR [[MV]](f64), [[MV1]](f64)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<2 x f64>), [[DEF]](p1) :: (store (<2 x f64>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <2 x double> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v3f64(<3 x double> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v3f64
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[MV1:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY2]](i32), [[COPY3]](i32)
  ; CHECK-NEXT:   [[MV2:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY4]](i32), [[COPY5]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<3 x f64>) = G_BUILD_VECTOR [[MV]](f64), [[MV1]](f64), [[MV2]](f64)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<3 x f64>), [[DEF]](p1) :: (store (<3 x f64>) into `ptr addrspace(1) poison`, align 32, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <3 x double> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v4f64(<4 x double> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v4f64
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $vgpr7
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[MV1:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY2]](i32), [[COPY3]](i32)
  ; CHECK-NEXT:   [[MV2:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY4]](i32), [[COPY5]](i32)
  ; CHECK-NEXT:   [[MV3:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY6]](i32), [[COPY7]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<4 x f64>) = G_BUILD_VECTOR [[MV]](f64), [[MV1]](f64), [[MV2]](f64), [[MV3]](f64)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<4 x f64>), [[DEF]](p1) :: (store (<4 x f64>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <4 x double> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v8f64(<8 x double> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v8f64
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $vgpr7
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $vgpr8
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $vgpr9
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $vgpr10
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $vgpr11
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $vgpr12
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $vgpr13
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr14
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr15
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[MV1:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY2]](i32), [[COPY3]](i32)
  ; CHECK-NEXT:   [[MV2:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY4]](i32), [[COPY5]](i32)
  ; CHECK-NEXT:   [[MV3:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY6]](i32), [[COPY7]](i32)
  ; CHECK-NEXT:   [[MV4:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY8]](i32), [[COPY9]](i32)
  ; CHECK-NEXT:   [[MV5:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY10]](i32), [[COPY11]](i32)
  ; CHECK-NEXT:   [[MV6:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY12]](i32), [[COPY13]](i32)
  ; CHECK-NEXT:   [[MV7:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY14]](i32), [[COPY15]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<8 x f64>) = G_BUILD_VECTOR [[MV]](f64), [[MV1]](f64), [[MV2]](f64), [[MV3]](f64), [[MV4]](f64), [[MV5]](f64), [[MV6]](f64), [[MV7]](f64)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<8 x f64>), [[DEF]](p1) :: (store (<8 x f64>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <8 x double> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v16f64(<16 x double> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v16f64
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $vgpr7
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $vgpr8
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $vgpr9
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $vgpr10
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $vgpr11
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $vgpr12
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $vgpr13
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr14
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr15
  ; CHECK-NEXT:   [[COPY16:%[0-9]+]]:_(i32) = COPY $vgpr16
  ; CHECK-NEXT:   [[COPY17:%[0-9]+]]:_(i32) = COPY $vgpr17
  ; CHECK-NEXT:   [[COPY18:%[0-9]+]]:_(i32) = COPY $vgpr18
  ; CHECK-NEXT:   [[COPY19:%[0-9]+]]:_(i32) = COPY $vgpr19
  ; CHECK-NEXT:   [[COPY20:%[0-9]+]]:_(i32) = COPY $vgpr20
  ; CHECK-NEXT:   [[COPY21:%[0-9]+]]:_(i32) = COPY $vgpr21
  ; CHECK-NEXT:   [[COPY22:%[0-9]+]]:_(i32) = COPY $vgpr22
  ; CHECK-NEXT:   [[COPY23:%[0-9]+]]:_(i32) = COPY $vgpr23
  ; CHECK-NEXT:   [[COPY24:%[0-9]+]]:_(i32) = COPY $vgpr24
  ; CHECK-NEXT:   [[COPY25:%[0-9]+]]:_(i32) = COPY $vgpr25
  ; CHECK-NEXT:   [[COPY26:%[0-9]+]]:_(i32) = COPY $vgpr26
  ; CHECK-NEXT:   [[COPY27:%[0-9]+]]:_(i32) = COPY $vgpr27
  ; CHECK-NEXT:   [[COPY28:%[0-9]+]]:_(i32) = COPY $vgpr28
  ; CHECK-NEXT:   [[COPY29:%[0-9]+]]:_(i32) = COPY $vgpr29
  ; CHECK-NEXT:   [[COPY30:%[0-9]+]]:_(i32) = COPY $vgpr30
  ; CHECK-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
  ; CHECK-NEXT:   [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load (i32) from %fixed-stack.0, align 16, addrspace 5)
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[MV1:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY2]](i32), [[COPY3]](i32)
  ; CHECK-NEXT:   [[MV2:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY4]](i32), [[COPY5]](i32)
  ; CHECK-NEXT:   [[MV3:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY6]](i32), [[COPY7]](i32)
  ; CHECK-NEXT:   [[MV4:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY8]](i32), [[COPY9]](i32)
  ; CHECK-NEXT:   [[MV5:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY10]](i32), [[COPY11]](i32)
  ; CHECK-NEXT:   [[MV6:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY12]](i32), [[COPY13]](i32)
  ; CHECK-NEXT:   [[MV7:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY14]](i32), [[COPY15]](i32)
  ; CHECK-NEXT:   [[MV8:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY16]](i32), [[COPY17]](i32)
  ; CHECK-NEXT:   [[MV9:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY18]](i32), [[COPY19]](i32)
  ; CHECK-NEXT:   [[MV10:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY20]](i32), [[COPY21]](i32)
  ; CHECK-NEXT:   [[MV11:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY22]](i32), [[COPY23]](i32)
  ; CHECK-NEXT:   [[MV12:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY24]](i32), [[COPY25]](i32)
  ; CHECK-NEXT:   [[MV13:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY26]](i32), [[COPY27]](i32)
  ; CHECK-NEXT:   [[MV14:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY28]](i32), [[COPY29]](i32)
  ; CHECK-NEXT:   [[MV15:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY30]](i32), [[LOAD]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<16 x f64>) = G_BUILD_VECTOR [[MV]](f64), [[MV1]](f64), [[MV2]](f64), [[MV3]](f64), [[MV4]](f64), [[MV5]](f64), [[MV6]](f64), [[MV7]](f64), [[MV8]](f64), [[MV9]](f64), [[MV10]](f64), [[MV11]](f64), [[MV12]](f64), [[MV13]](f64), [[MV14]](f64), [[MV15]](f64)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<16 x f64>), [[DEF]](p1) :: (store (<16 x f64>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <16 x double> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v2f16(<2 x half> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v2f16
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<2 x f16>) = COPY $vgpr0
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[COPY]](<2 x f16>), [[DEF]](p1) :: (store (<2 x f16>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <2 x half> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v3f16(<3 x half> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v3f16
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<2 x f16>) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(<2 x f16>) = COPY $vgpr1
  ; CHECK-NEXT:   [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x f16>) = G_CONCAT_VECTORS [[COPY]](<2 x f16>), [[COPY1]](<2 x f16>)
  ; CHECK-NEXT:   [[UV:%[0-9]+]]:_(f16), [[UV1:%[0-9]+]]:_(f16), [[UV2:%[0-9]+]]:_(f16), [[UV3:%[0-9]+]]:_(f16) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<4 x f16>)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<3 x f16>) = G_BUILD_VECTOR [[UV]](f16), [[UV1]](f16), [[UV2]](f16)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<3 x f16>), [[DEF]](p1) :: (store (<3 x f16>) into `ptr addrspace(1) poison`, align 8, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <3 x half> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v4f16(<4 x half> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v4f16
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<2 x f16>) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(<2 x f16>) = COPY $vgpr1
  ; CHECK-NEXT:   [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x f16>) = G_CONCAT_VECTORS [[COPY]](<2 x f16>), [[COPY1]](<2 x f16>)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[CONCAT_VECTORS]](<4 x f16>), [[DEF]](p1) :: (store (<4 x f16>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <4 x half> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v8f16(<8 x half> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v8f16
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<2 x f16>) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(<2 x f16>) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(<2 x f16>) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(<2 x f16>) = COPY $vgpr3
  ; CHECK-NEXT:   [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x f16>) = G_CONCAT_VECTORS [[COPY]](<2 x f16>), [[COPY1]](<2 x f16>), [[COPY2]](<2 x f16>), [[COPY3]](<2 x f16>)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[CONCAT_VECTORS]](<8 x f16>), [[DEF]](p1) :: (store (<8 x f16>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <8 x half> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v16f16(<16 x half> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v16f16
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<2 x f16>) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(<2 x f16>) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(<2 x f16>) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(<2 x f16>) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(<2 x f16>) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(<2 x f16>) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(<2 x f16>) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(<2 x f16>) = COPY $vgpr7
  ; CHECK-NEXT:   [[CONCAT_VECTORS:%[0-9]+]]:_(<16 x f16>) = G_CONCAT_VECTORS [[COPY]](<2 x f16>), [[COPY1]](<2 x f16>), [[COPY2]](<2 x f16>), [[COPY3]](<2 x f16>), [[COPY4]](<2 x f16>), [[COPY5]](<2 x f16>), [[COPY6]](<2 x f16>), [[COPY7]](<2 x f16>)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[CONCAT_VECTORS]](<16 x f16>), [[DEF]](p1) :: (store (<16 x f16>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <16 x half> %arg0, ptr addrspace(1) poison
  ret void
}

; Make sure there is no alignment requirement for passed vgprs.
define void @void_func_i32_i64_i32(i32 %arg0, i64 %arg1, i32 %arg2) #0 {
  ; CHECK-LABEL: name: void_func_i32_i64_i32
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY1]](i32), [[COPY2]](i32)
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[COPY]](i32), [[DEF]](p1) :: (volatile store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[MV]](i64), [[DEF]](p1) :: (volatile store (i64) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[COPY3]](i32), [[DEF]](p1) :: (volatile store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store volatile i32 %arg0, ptr addrspace(1) poison
  store volatile i64 %arg1, ptr addrspace(1) poison
  store volatile i32 %arg2, ptr addrspace(1) poison
  ret void
}

define void @void_func_struct_i32({ i32 } %arg0) #0 {
  ; CHECK-LABEL: name: void_func_struct_i32
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[COPY]](i32), [[DEF]](p1) :: (store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store { i32 } %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_struct_i8_i32({ i8, i32 } %arg0) #0 {
  ; CHECK-LABEL: name: void_func_struct_i8_i32
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[COPY]](i32)
  ; CHECK-NEXT:   [[TRUNC1:%[0-9]+]]:_(i8) = G_TRUNC [[TRUNC]](i16)
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[TRUNC1]](i8), [[DEF]](p1) :: (store (i8) into `ptr addrspace(1) poison`, align 4, addrspace 1)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 4
  ; CHECK-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p1) = nuw inbounds G_PTR_ADD [[DEF]], [[C]](i64)
  ; CHECK-NEXT:   G_STORE [[COPY1]](i32), [[PTR_ADD]](p1) :: (store (i32) into `ptr addrspace(1) poison` + 4, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store { i8, i32 } %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_byval_struct_i8_i32(ptr addrspace(5) byval({ i8, i32 }) %arg0) #0 {
  ; CHECK-LABEL: name: void_func_byval_struct_i8_i32
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(p5) = COPY [[FRAME_INDEX]](p5)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[LOAD:%[0-9]+]]:_(i8) = G_LOAD [[COPY]](p5) :: (load (i8) from %ir.arg0, align 4, addrspace 5)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 4
  ; CHECK-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[COPY]], [[C]](i32)
  ; CHECK-NEXT:   [[LOAD1:%[0-9]+]]:_(i32) = G_LOAD [[PTR_ADD]](p5) :: (load (i32) from %ir.arg0 + 4, addrspace 5)
  ; CHECK-NEXT:   G_STORE [[LOAD]](i8), [[DEF]](p1) :: (store (i8) into `ptr addrspace(1) poison`, align 4, addrspace 1)
  ; CHECK-NEXT:   [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 4
  ; CHECK-NEXT:   [[PTR_ADD1:%[0-9]+]]:_(p1) = nuw inbounds G_PTR_ADD [[DEF]], [[C1]](i64)
  ; CHECK-NEXT:   G_STORE [[LOAD1]](i32), [[PTR_ADD1]](p1) :: (store (i32) into `ptr addrspace(1) poison` + 4, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  %arg0.load = load { i8, i32 }, ptr addrspace(5) %arg0
  store { i8, i32 } %arg0.load, ptr addrspace(1) poison
  ret void
}

define void @void_func_byval_struct_i8_i32_x2(ptr addrspace(5) byval({ i8, i32 }) %arg0, ptr addrspace(5) byval({ i8, i32 }) %arg1, i32 %arg2) #0 {
  ; CHECK-LABEL: name: void_func_byval_struct_i8_i32_x2
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(p5) = COPY [[FRAME_INDEX]](p5)
  ; CHECK-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(p5) = COPY [[FRAME_INDEX1]](p5)
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[DEF1:%[0-9]+]]:_(p3) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[LOAD:%[0-9]+]]:_(i8) = G_LOAD [[COPY]](p5) :: (volatile load (i8) from %ir.arg0, align 4, addrspace 5)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 4
  ; CHECK-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[COPY]], [[C]](i32)
  ; CHECK-NEXT:   [[LOAD1:%[0-9]+]]:_(i32) = G_LOAD [[PTR_ADD]](p5) :: (volatile load (i32) from %ir.arg0 + 4, addrspace 5)
  ; CHECK-NEXT:   [[LOAD2:%[0-9]+]]:_(i8) = G_LOAD [[COPY1]](p5) :: (volatile load (i8) from %ir.arg1, align 4, addrspace 5)
  ; CHECK-NEXT:   [[PTR_ADD1:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[COPY1]], [[C]](i32)
  ; CHECK-NEXT:   [[LOAD3:%[0-9]+]]:_(i32) = G_LOAD [[PTR_ADD1]](p5) :: (volatile load (i32) from %ir.arg1 + 4, addrspace 5)
  ; CHECK-NEXT:   G_STORE [[LOAD]](i8), [[DEF]](p1) :: (volatile store (i8) into `ptr addrspace(1) poison`, align 4, addrspace 1)
  ; CHECK-NEXT:   [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 4
  ; CHECK-NEXT:   [[PTR_ADD2:%[0-9]+]]:_(p1) = nuw inbounds G_PTR_ADD [[DEF]], [[C1]](i64)
  ; CHECK-NEXT:   G_STORE [[LOAD1]](i32), [[PTR_ADD2]](p1) :: (volatile store (i32) into `ptr addrspace(1) poison` + 4, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[LOAD2]](i8), [[DEF]](p1) :: (volatile store (i8) into `ptr addrspace(1) poison`, align 4, addrspace 1)
  ; CHECK-NEXT:   [[PTR_ADD3:%[0-9]+]]:_(p1) = nuw inbounds G_PTR_ADD [[DEF]], [[C1]](i64)
  ; CHECK-NEXT:   G_STORE [[LOAD3]](i32), [[PTR_ADD3]](p1) :: (volatile store (i32) into `ptr addrspace(1) poison` + 4, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[COPY2]](i32), [[DEF1]](p3) :: (volatile store (i32) into `ptr addrspace(3) poison`, addrspace 3)
  ; CHECK-NEXT:   SI_RETURN
  %arg0.load = load volatile { i8, i32 }, ptr addrspace(5) %arg0
  %arg1.load = load volatile { i8, i32 }, ptr addrspace(5) %arg1
  store volatile { i8, i32 } %arg0.load, ptr addrspace(1) poison
  store volatile { i8, i32 } %arg1.load, ptr addrspace(1) poison
  store volatile i32 %arg2, ptr addrspace(3) poison
  ret void
}

define void @void_func_byval_i32_byval_i64(ptr addrspace(5) byval(i32) %arg0, ptr addrspace(5) byval(i64) %arg1) #0 {
  ; CHECK-LABEL: name: void_func_byval_i32_byval_i64
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(p5) = COPY [[FRAME_INDEX]](p5)
  ; CHECK-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(p5) = COPY [[FRAME_INDEX1]](p5)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY]](p5) :: (load (i32) from %ir.arg0, addrspace 5)
  ; CHECK-NEXT:   [[LOAD1:%[0-9]+]]:_(i64) = G_LOAD [[COPY1]](p5) :: (load (i64) from %ir.arg1, addrspace 5)
  ; CHECK-NEXT:   G_STORE [[LOAD]](i32), [[DEF]](p1) :: (store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[LOAD1]](i64), [[DEF]](p1) :: (store (i64) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  %arg0.load = load i32, ptr addrspace(5) %arg0
  %arg1.load = load i64, ptr addrspace(5) %arg1
  store i32 %arg0.load, ptr addrspace(1) poison
  store i64 %arg1.load, ptr addrspace(1) poison
  ret void
}

define void @void_func_byval_i8_align32_i16_align64(ptr addrspace(5) byval(i8) %arg0, ptr addrspace(5) byval(i16) align 64 %arg1) #0 {
  ; CHECK-LABEL: name: void_func_byval_i8_align32_i16_align64
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(p5) = COPY [[FRAME_INDEX]](p5)
  ; CHECK-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(p5) = COPY [[FRAME_INDEX1]](p5)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(p1) = G_CONSTANT i64 0
  ; CHECK-NEXT:   [[LOAD:%[0-9]+]]:_(i8) = G_LOAD [[COPY]](p5) :: (load (i8) from %ir.arg0, addrspace 5)
  ; CHECK-NEXT:   [[LOAD1:%[0-9]+]]:_(i16) = G_LOAD [[COPY1]](p5) :: (load (i16) from %ir.arg1, addrspace 5)
  ; CHECK-NEXT:   G_STORE [[LOAD]](i8), [[C]](p1) :: (store (i8) into `ptr addrspace(1) null`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[LOAD1]](i16), [[C]](p1) :: (store (i16) into `ptr addrspace(1) null`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  %arg0.load = load i8, ptr addrspace(5) %arg0
  %arg1.load = load i16, ptr addrspace(5) %arg1
  store i8 %arg0.load, ptr addrspace(1) null
  store i16 %arg1.load, ptr addrspace(1) null
  ret void
}

; Make sure the alignment is taken from the correct parameter.
define void @byval_a3i32_align128_byval_i16_align64(ptr addrspace(5) byval([3 x i32]) align 128 %arg0, ptr addrspace(5) byval(i16) align 64 %arg1) #0 {
  ; CHECK-LABEL: name: byval_a3i32_align128_byval_i16_align64
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(p5) = COPY [[FRAME_INDEX]](p5)
  ; CHECK-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(p5) = COPY [[FRAME_INDEX1]](p5)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(p1) = G_CONSTANT i64 0
  ; CHECK-NEXT:   [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY]](p5) :: (load (i32) from %ir.arg0, addrspace 5)
  ; CHECK-NEXT:   [[C1:%[0-9]+]]:_(i32) = G_CONSTANT i32 4
  ; CHECK-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[COPY]], [[C1]](i32)
  ; CHECK-NEXT:   [[LOAD1:%[0-9]+]]:_(i32) = G_LOAD [[PTR_ADD]](p5) :: (load (i32) from %ir.arg0 + 4, addrspace 5)
  ; CHECK-NEXT:   [[C2:%[0-9]+]]:_(i32) = G_CONSTANT i32 8
  ; CHECK-NEXT:   [[PTR_ADD1:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[COPY]], [[C2]](i32)
  ; CHECK-NEXT:   [[LOAD2:%[0-9]+]]:_(i32) = G_LOAD [[PTR_ADD1]](p5) :: (load (i32) from %ir.arg0 + 8, addrspace 5)
  ; CHECK-NEXT:   [[LOAD3:%[0-9]+]]:_(i16) = G_LOAD [[COPY1]](p5) :: (load (i16) from %ir.arg1, addrspace 5)
  ; CHECK-NEXT:   G_STORE [[LOAD]](i32), [[C]](p1) :: (store (i32) into `ptr addrspace(1) null`, addrspace 1)
  ; CHECK-NEXT:   [[C3:%[0-9]+]]:_(i64) = G_CONSTANT i64 4
  ; CHECK-NEXT:   [[C4:%[0-9]+]]:_(p1) = G_CONSTANT i64 4
  ; CHECK-NEXT:   G_STORE [[LOAD1]](i32), [[C4]](p1) :: (store (i32) into `ptr addrspace(1) null` + 4, addrspace 1)
  ; CHECK-NEXT:   [[C5:%[0-9]+]]:_(i64) = G_CONSTANT i64 8
  ; CHECK-NEXT:   [[C6:%[0-9]+]]:_(p1) = G_CONSTANT i64 8
  ; CHECK-NEXT:   G_STORE [[LOAD2]](i32), [[C6]](p1) :: (store (i32) into `ptr addrspace(1) null` + 8, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[LOAD3]](i16), [[C]](p1) :: (store (i16) into `ptr addrspace(1) null`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  %arg0.load = load [3 x i32], ptr addrspace(5) %arg0
  %arg1.load = load i16, ptr addrspace(5) %arg1
  store [3 x i32] %arg0.load, ptr addrspace(1) null
  store i16 %arg1.load, ptr addrspace(1) null
  ret void
}

; byval argument after non-byval stack passed argument
define void @void_func_v32i32_i32_byval_i8(<32 x i32> %arg0, i32 %arg1, ptr addrspace(5) byval(i8) align 8 %arg2) #0 {
  ; CHECK-LABEL: name: void_func_v32i32_i32_byval_i8
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $vgpr7
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $vgpr8
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $vgpr9
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $vgpr10
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $vgpr11
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $vgpr12
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $vgpr13
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr14
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr15
  ; CHECK-NEXT:   [[COPY16:%[0-9]+]]:_(i32) = COPY $vgpr16
  ; CHECK-NEXT:   [[COPY17:%[0-9]+]]:_(i32) = COPY $vgpr17
  ; CHECK-NEXT:   [[COPY18:%[0-9]+]]:_(i32) = COPY $vgpr18
  ; CHECK-NEXT:   [[COPY19:%[0-9]+]]:_(i32) = COPY $vgpr19
  ; CHECK-NEXT:   [[COPY20:%[0-9]+]]:_(i32) = COPY $vgpr20
  ; CHECK-NEXT:   [[COPY21:%[0-9]+]]:_(i32) = COPY $vgpr21
  ; CHECK-NEXT:   [[COPY22:%[0-9]+]]:_(i32) = COPY $vgpr22
  ; CHECK-NEXT:   [[COPY23:%[0-9]+]]:_(i32) = COPY $vgpr23
  ; CHECK-NEXT:   [[COPY24:%[0-9]+]]:_(i32) = COPY $vgpr24
  ; CHECK-NEXT:   [[COPY25:%[0-9]+]]:_(i32) = COPY $vgpr25
  ; CHECK-NEXT:   [[COPY26:%[0-9]+]]:_(i32) = COPY $vgpr26
  ; CHECK-NEXT:   [[COPY27:%[0-9]+]]:_(i32) = COPY $vgpr27
  ; CHECK-NEXT:   [[COPY28:%[0-9]+]]:_(i32) = COPY $vgpr28
  ; CHECK-NEXT:   [[COPY29:%[0-9]+]]:_(i32) = COPY $vgpr29
  ; CHECK-NEXT:   [[COPY30:%[0-9]+]]:_(i32) = COPY $vgpr30
  ; CHECK-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.2
  ; CHECK-NEXT:   [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load (i32) from %fixed-stack.2, align 16, addrspace 5)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<32 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32), [[COPY5]](i32), [[COPY6]](i32), [[COPY7]](i32), [[COPY8]](i32), [[COPY9]](i32), [[COPY10]](i32), [[COPY11]](i32), [[COPY12]](i32), [[COPY13]](i32), [[COPY14]](i32), [[COPY15]](i32), [[COPY16]](i32), [[COPY17]](i32), [[COPY18]](i32), [[COPY19]](i32), [[COPY20]](i32), [[COPY21]](i32), [[COPY22]](i32), [[COPY23]](i32), [[COPY24]](i32), [[COPY25]](i32), [[COPY26]](i32), [[COPY27]](i32), [[COPY28]](i32), [[COPY29]](i32), [[COPY30]](i32), [[LOAD]](i32)
  ; CHECK-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
  ; CHECK-NEXT:   [[LOAD1:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load (i32) from %fixed-stack.1, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX2:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
  ; CHECK-NEXT:   [[COPY31:%[0-9]+]]:_(p5) = COPY [[FRAME_INDEX2]](p5)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(p1) = G_CONSTANT i64 0
  ; CHECK-NEXT:   G_STORE [[LOAD1]](i32), [[C]](p1) :: (store (i32) into `ptr addrspace(1) null`, addrspace 1)
  ; CHECK-NEXT:   [[LOAD2:%[0-9]+]]:_(i8) = G_LOAD [[COPY31]](p5) :: (load (i8) from %ir.arg2, addrspace 5)
  ; CHECK-NEXT:   G_STORE [[LOAD2]](i8), [[C]](p1) :: (store (i8) into `ptr addrspace(1) null`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i32 %arg1, ptr addrspace(1) null
  %arg2.load = load i8, ptr addrspace(5) %arg2
  store i8 %arg2.load, ptr addrspace(1) null
  ret void
}

; byval argument before non-byval stack passed argument
define void @void_func_v32i32_byval_i8_i32(<32 x i32> %arg0, ptr addrspace(5) byval(i8) %arg1, i32 %arg2) #0 {
  ; CHECK-LABEL: name: void_func_v32i32_byval_i8_i32
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $vgpr7
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $vgpr8
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $vgpr9
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $vgpr10
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $vgpr11
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $vgpr12
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $vgpr13
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr14
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr15
  ; CHECK-NEXT:   [[COPY16:%[0-9]+]]:_(i32) = COPY $vgpr16
  ; CHECK-NEXT:   [[COPY17:%[0-9]+]]:_(i32) = COPY $vgpr17
  ; CHECK-NEXT:   [[COPY18:%[0-9]+]]:_(i32) = COPY $vgpr18
  ; CHECK-NEXT:   [[COPY19:%[0-9]+]]:_(i32) = COPY $vgpr19
  ; CHECK-NEXT:   [[COPY20:%[0-9]+]]:_(i32) = COPY $vgpr20
  ; CHECK-NEXT:   [[COPY21:%[0-9]+]]:_(i32) = COPY $vgpr21
  ; CHECK-NEXT:   [[COPY22:%[0-9]+]]:_(i32) = COPY $vgpr22
  ; CHECK-NEXT:   [[COPY23:%[0-9]+]]:_(i32) = COPY $vgpr23
  ; CHECK-NEXT:   [[COPY24:%[0-9]+]]:_(i32) = COPY $vgpr24
  ; CHECK-NEXT:   [[COPY25:%[0-9]+]]:_(i32) = COPY $vgpr25
  ; CHECK-NEXT:   [[COPY26:%[0-9]+]]:_(i32) = COPY $vgpr26
  ; CHECK-NEXT:   [[COPY27:%[0-9]+]]:_(i32) = COPY $vgpr27
  ; CHECK-NEXT:   [[COPY28:%[0-9]+]]:_(i32) = COPY $vgpr28
  ; CHECK-NEXT:   [[COPY29:%[0-9]+]]:_(i32) = COPY $vgpr29
  ; CHECK-NEXT:   [[COPY30:%[0-9]+]]:_(i32) = COPY $vgpr30
  ; CHECK-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.2
  ; CHECK-NEXT:   [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load (i32) from %fixed-stack.2, align 16, addrspace 5)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<32 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32), [[COPY5]](i32), [[COPY6]](i32), [[COPY7]](i32), [[COPY8]](i32), [[COPY9]](i32), [[COPY10]](i32), [[COPY11]](i32), [[COPY12]](i32), [[COPY13]](i32), [[COPY14]](i32), [[COPY15]](i32), [[COPY16]](i32), [[COPY17]](i32), [[COPY18]](i32), [[COPY19]](i32), [[COPY20]](i32), [[COPY21]](i32), [[COPY22]](i32), [[COPY23]](i32), [[COPY24]](i32), [[COPY25]](i32), [[COPY26]](i32), [[COPY27]](i32), [[COPY28]](i32), [[COPY29]](i32), [[COPY30]](i32), [[LOAD]](i32)
  ; CHECK-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
  ; CHECK-NEXT:   [[COPY31:%[0-9]+]]:_(p5) = COPY [[FRAME_INDEX1]](p5)
  ; CHECK-NEXT:   [[FRAME_INDEX2:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
  ; CHECK-NEXT:   [[LOAD1:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX2]](p5) :: (invariant load (i32) from %fixed-stack.0, align 8, addrspace 5)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(p1) = G_CONSTANT i64 0
  ; CHECK-NEXT:   G_STORE [[LOAD1]](i32), [[C]](p1) :: (store (i32) into `ptr addrspace(1) null`, addrspace 1)
  ; CHECK-NEXT:   [[LOAD2:%[0-9]+]]:_(i8) = G_LOAD [[COPY31]](p5) :: (load (i8) from %ir.arg1, addrspace 5)
  ; CHECK-NEXT:   G_STORE [[LOAD2]](i8), [[C]](p1) :: (store (i8) into `ptr addrspace(1) null`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i32 %arg2, ptr addrspace(1) null
  %arg1.load = load i8, ptr addrspace(5) %arg1
  store i8 %arg1.load, ptr addrspace(1) null
  ret void
}

define void @void_func_v32i32_i32_i64(<32 x i32> %arg0, i32 %arg1, i64 %arg2) #0 {
  ; CHECK-LABEL: name: void_func_v32i32_i32_i64
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $vgpr7
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $vgpr8
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $vgpr9
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $vgpr10
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $vgpr11
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $vgpr12
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $vgpr13
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr14
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr15
  ; CHECK-NEXT:   [[COPY16:%[0-9]+]]:_(i32) = COPY $vgpr16
  ; CHECK-NEXT:   [[COPY17:%[0-9]+]]:_(i32) = COPY $vgpr17
  ; CHECK-NEXT:   [[COPY18:%[0-9]+]]:_(i32) = COPY $vgpr18
  ; CHECK-NEXT:   [[COPY19:%[0-9]+]]:_(i32) = COPY $vgpr19
  ; CHECK-NEXT:   [[COPY20:%[0-9]+]]:_(i32) = COPY $vgpr20
  ; CHECK-NEXT:   [[COPY21:%[0-9]+]]:_(i32) = COPY $vgpr21
  ; CHECK-NEXT:   [[COPY22:%[0-9]+]]:_(i32) = COPY $vgpr22
  ; CHECK-NEXT:   [[COPY23:%[0-9]+]]:_(i32) = COPY $vgpr23
  ; CHECK-NEXT:   [[COPY24:%[0-9]+]]:_(i32) = COPY $vgpr24
  ; CHECK-NEXT:   [[COPY25:%[0-9]+]]:_(i32) = COPY $vgpr25
  ; CHECK-NEXT:   [[COPY26:%[0-9]+]]:_(i32) = COPY $vgpr26
  ; CHECK-NEXT:   [[COPY27:%[0-9]+]]:_(i32) = COPY $vgpr27
  ; CHECK-NEXT:   [[COPY28:%[0-9]+]]:_(i32) = COPY $vgpr28
  ; CHECK-NEXT:   [[COPY29:%[0-9]+]]:_(i32) = COPY $vgpr29
  ; CHECK-NEXT:   [[COPY30:%[0-9]+]]:_(i32) = COPY $vgpr30
  ; CHECK-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.3
  ; CHECK-NEXT:   [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load (i32) from %fixed-stack.3, align 16, addrspace 5)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<32 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32), [[COPY5]](i32), [[COPY6]](i32), [[COPY7]](i32), [[COPY8]](i32), [[COPY9]](i32), [[COPY10]](i32), [[COPY11]](i32), [[COPY12]](i32), [[COPY13]](i32), [[COPY14]](i32), [[COPY15]](i32), [[COPY16]](i32), [[COPY17]](i32), [[COPY18]](i32), [[COPY19]](i32), [[COPY20]](i32), [[COPY21]](i32), [[COPY22]](i32), [[COPY23]](i32), [[COPY24]](i32), [[COPY25]](i32), [[COPY26]](i32), [[COPY27]](i32), [[COPY28]](i32), [[COPY29]](i32), [[COPY30]](i32), [[LOAD]](i32)
  ; CHECK-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.2
  ; CHECK-NEXT:   [[LOAD1:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load (i32) from %fixed-stack.2, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX2:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
  ; CHECK-NEXT:   [[LOAD2:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX2]](p5) :: (invariant load (i32) from %fixed-stack.1, align 8, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX3:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
  ; CHECK-NEXT:   [[LOAD3:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX3]](p5) :: (invariant load (i32) from %fixed-stack.0, addrspace 5)
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[LOAD2]](i32), [[LOAD3]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<32 x i32>), [[DEF]](p1) :: (volatile store (<32 x i32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[LOAD1]](i32), [[DEF]](p1) :: (volatile store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[MV]](i64), [[DEF]](p1) :: (volatile store (i64) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store volatile <32 x i32> %arg0, ptr addrspace(1) poison
  store volatile i32 %arg1, ptr addrspace(1) poison
  store volatile i64 %arg2, ptr addrspace(1) poison
  ret void
}

; FIXME: Different ext load types on CI vs. VI
define void @void_func_v32i32_i1_i8_i16(<32 x i32> %arg0, i1 %arg1, i8 %arg2, i16 %arg3, half %arg4) #0 {
  ; CHECK-LABEL: name: void_func_v32i32_i1_i8_i16
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $vgpr7
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $vgpr8
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $vgpr9
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $vgpr10
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $vgpr11
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $vgpr12
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $vgpr13
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr14
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr15
  ; CHECK-NEXT:   [[COPY16:%[0-9]+]]:_(i32) = COPY $vgpr16
  ; CHECK-NEXT:   [[COPY17:%[0-9]+]]:_(i32) = COPY $vgpr17
  ; CHECK-NEXT:   [[COPY18:%[0-9]+]]:_(i32) = COPY $vgpr18
  ; CHECK-NEXT:   [[COPY19:%[0-9]+]]:_(i32) = COPY $vgpr19
  ; CHECK-NEXT:   [[COPY20:%[0-9]+]]:_(i32) = COPY $vgpr20
  ; CHECK-NEXT:   [[COPY21:%[0-9]+]]:_(i32) = COPY $vgpr21
  ; CHECK-NEXT:   [[COPY22:%[0-9]+]]:_(i32) = COPY $vgpr22
  ; CHECK-NEXT:   [[COPY23:%[0-9]+]]:_(i32) = COPY $vgpr23
  ; CHECK-NEXT:   [[COPY24:%[0-9]+]]:_(i32) = COPY $vgpr24
  ; CHECK-NEXT:   [[COPY25:%[0-9]+]]:_(i32) = COPY $vgpr25
  ; CHECK-NEXT:   [[COPY26:%[0-9]+]]:_(i32) = COPY $vgpr26
  ; CHECK-NEXT:   [[COPY27:%[0-9]+]]:_(i32) = COPY $vgpr27
  ; CHECK-NEXT:   [[COPY28:%[0-9]+]]:_(i32) = COPY $vgpr28
  ; CHECK-NEXT:   [[COPY29:%[0-9]+]]:_(i32) = COPY $vgpr29
  ; CHECK-NEXT:   [[COPY30:%[0-9]+]]:_(i32) = COPY $vgpr30
  ; CHECK-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.4
  ; CHECK-NEXT:   [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load (i32) from %fixed-stack.4, align 16, addrspace 5)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<32 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32), [[COPY5]](i32), [[COPY6]](i32), [[COPY7]](i32), [[COPY8]](i32), [[COPY9]](i32), [[COPY10]](i32), [[COPY11]](i32), [[COPY12]](i32), [[COPY13]](i32), [[COPY14]](i32), [[COPY15]](i32), [[COPY16]](i32), [[COPY17]](i32), [[COPY18]](i32), [[COPY19]](i32), [[COPY20]](i32), [[COPY21]](i32), [[COPY22]](i32), [[COPY23]](i32), [[COPY24]](i32), [[COPY25]](i32), [[COPY26]](i32), [[COPY27]](i32), [[COPY28]](i32), [[COPY29]](i32), [[COPY30]](i32), [[LOAD]](i32)
  ; CHECK-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.3
  ; CHECK-NEXT:   [[LOAD1:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load (i1) from %fixed-stack.3, align 4, addrspace 5)
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i1) = G_TRUNC [[LOAD1]](i32)
  ; CHECK-NEXT:   [[FRAME_INDEX2:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.2
  ; CHECK-NEXT:   [[LOAD2:%[0-9]+]]:_(i16) = G_LOAD [[FRAME_INDEX2]](p5) :: (invariant load (i16) from %fixed-stack.2, align 8, addrspace 5)
  ; CHECK-NEXT:   [[TRUNC1:%[0-9]+]]:_(i8) = G_TRUNC [[LOAD2]](i16)
  ; CHECK-NEXT:   [[FRAME_INDEX3:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
  ; CHECK-NEXT:   [[LOAD3:%[0-9]+]]:_(i16) = G_LOAD [[FRAME_INDEX3]](p5) :: (invariant load (i16) from %fixed-stack.1, align 4, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX4:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
  ; CHECK-NEXT:   [[LOAD4:%[0-9]+]]:_(f16) = G_LOAD [[FRAME_INDEX4]](p5) :: (invariant load (f16) from %fixed-stack.0, align 16, addrspace 5)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<32 x i32>), [[DEF]](p1) :: (volatile store (<32 x i32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[TRUNC]](i1), [[DEF]](p1) :: (volatile store (i1) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[TRUNC1]](i8), [[DEF]](p1) :: (volatile store (i8) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[LOAD3]](i16), [[DEF]](p1) :: (volatile store (i16) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[LOAD4]](f16), [[DEF]](p1) :: (volatile store (f16) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store volatile <32 x i32> %arg0, ptr addrspace(1) poison
  store volatile i1 %arg1, ptr addrspace(1) poison
  store volatile i8 %arg2, ptr addrspace(1) poison
  store volatile i16 %arg3, ptr addrspace(1) poison
  store volatile half %arg4, ptr addrspace(1) poison
  ret void
}

define void @void_func_v32i32_p3_p5_i16(<32 x i32> %arg0, ptr addrspace(3) %arg1, ptr addrspace(5) %arg2) #0 {
  ; CHECK-LABEL: name: void_func_v32i32_p3_p5_i16
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $vgpr7
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $vgpr8
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $vgpr9
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $vgpr10
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $vgpr11
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $vgpr12
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $vgpr13
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr14
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr15
  ; CHECK-NEXT:   [[COPY16:%[0-9]+]]:_(i32) = COPY $vgpr16
  ; CHECK-NEXT:   [[COPY17:%[0-9]+]]:_(i32) = COPY $vgpr17
  ; CHECK-NEXT:   [[COPY18:%[0-9]+]]:_(i32) = COPY $vgpr18
  ; CHECK-NEXT:   [[COPY19:%[0-9]+]]:_(i32) = COPY $vgpr19
  ; CHECK-NEXT:   [[COPY20:%[0-9]+]]:_(i32) = COPY $vgpr20
  ; CHECK-NEXT:   [[COPY21:%[0-9]+]]:_(i32) = COPY $vgpr21
  ; CHECK-NEXT:   [[COPY22:%[0-9]+]]:_(i32) = COPY $vgpr22
  ; CHECK-NEXT:   [[COPY23:%[0-9]+]]:_(i32) = COPY $vgpr23
  ; CHECK-NEXT:   [[COPY24:%[0-9]+]]:_(i32) = COPY $vgpr24
  ; CHECK-NEXT:   [[COPY25:%[0-9]+]]:_(i32) = COPY $vgpr25
  ; CHECK-NEXT:   [[COPY26:%[0-9]+]]:_(i32) = COPY $vgpr26
  ; CHECK-NEXT:   [[COPY27:%[0-9]+]]:_(i32) = COPY $vgpr27
  ; CHECK-NEXT:   [[COPY28:%[0-9]+]]:_(i32) = COPY $vgpr28
  ; CHECK-NEXT:   [[COPY29:%[0-9]+]]:_(i32) = COPY $vgpr29
  ; CHECK-NEXT:   [[COPY30:%[0-9]+]]:_(i32) = COPY $vgpr30
  ; CHECK-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.2
  ; CHECK-NEXT:   [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load (i32) from %fixed-stack.2, align 16, addrspace 5)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<32 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32), [[COPY5]](i32), [[COPY6]](i32), [[COPY7]](i32), [[COPY8]](i32), [[COPY9]](i32), [[COPY10]](i32), [[COPY11]](i32), [[COPY12]](i32), [[COPY13]](i32), [[COPY14]](i32), [[COPY15]](i32), [[COPY16]](i32), [[COPY17]](i32), [[COPY18]](i32), [[COPY19]](i32), [[COPY20]](i32), [[COPY21]](i32), [[COPY22]](i32), [[COPY23]](i32), [[COPY24]](i32), [[COPY25]](i32), [[COPY26]](i32), [[COPY27]](i32), [[COPY28]](i32), [[COPY29]](i32), [[COPY30]](i32), [[LOAD]](i32)
  ; CHECK-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
  ; CHECK-NEXT:   [[LOAD1:%[0-9]+]]:_(p3) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load (p3) from %fixed-stack.1, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX2:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
  ; CHECK-NEXT:   [[LOAD2:%[0-9]+]]:_(p5) = G_LOAD [[FRAME_INDEX2]](p5) :: (invariant load (p5) from %fixed-stack.0, align 8, addrspace 5)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<32 x i32>), [[DEF]](p1) :: (volatile store (<32 x i32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[LOAD1]](p3), [[DEF]](p1) :: (volatile store (p3) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[LOAD2]](p5), [[DEF]](p1) :: (volatile store (p5) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store volatile <32 x i32> %arg0, ptr addrspace(1) poison
  store volatile ptr addrspace(3) %arg1, ptr addrspace(1) poison
  store volatile ptr addrspace(5) %arg2, ptr addrspace(1) poison
  ret void
}

define void @void_func_v32i32_v2i32_v2f32(<32 x i32> %arg0, <2 x i32> %arg1, <2 x float> %arg2) #0 {
  ; CHECK-LABEL: name: void_func_v32i32_v2i32_v2f32
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $vgpr7
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $vgpr8
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $vgpr9
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $vgpr10
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $vgpr11
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $vgpr12
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $vgpr13
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr14
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr15
  ; CHECK-NEXT:   [[COPY16:%[0-9]+]]:_(i32) = COPY $vgpr16
  ; CHECK-NEXT:   [[COPY17:%[0-9]+]]:_(i32) = COPY $vgpr17
  ; CHECK-NEXT:   [[COPY18:%[0-9]+]]:_(i32) = COPY $vgpr18
  ; CHECK-NEXT:   [[COPY19:%[0-9]+]]:_(i32) = COPY $vgpr19
  ; CHECK-NEXT:   [[COPY20:%[0-9]+]]:_(i32) = COPY $vgpr20
  ; CHECK-NEXT:   [[COPY21:%[0-9]+]]:_(i32) = COPY $vgpr21
  ; CHECK-NEXT:   [[COPY22:%[0-9]+]]:_(i32) = COPY $vgpr22
  ; CHECK-NEXT:   [[COPY23:%[0-9]+]]:_(i32) = COPY $vgpr23
  ; CHECK-NEXT:   [[COPY24:%[0-9]+]]:_(i32) = COPY $vgpr24
  ; CHECK-NEXT:   [[COPY25:%[0-9]+]]:_(i32) = COPY $vgpr25
  ; CHECK-NEXT:   [[COPY26:%[0-9]+]]:_(i32) = COPY $vgpr26
  ; CHECK-NEXT:   [[COPY27:%[0-9]+]]:_(i32) = COPY $vgpr27
  ; CHECK-NEXT:   [[COPY28:%[0-9]+]]:_(i32) = COPY $vgpr28
  ; CHECK-NEXT:   [[COPY29:%[0-9]+]]:_(i32) = COPY $vgpr29
  ; CHECK-NEXT:   [[COPY30:%[0-9]+]]:_(i32) = COPY $vgpr30
  ; CHECK-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.4
  ; CHECK-NEXT:   [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load (i32) from %fixed-stack.4, align 16, addrspace 5)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<32 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32), [[COPY5]](i32), [[COPY6]](i32), [[COPY7]](i32), [[COPY8]](i32), [[COPY9]](i32), [[COPY10]](i32), [[COPY11]](i32), [[COPY12]](i32), [[COPY13]](i32), [[COPY14]](i32), [[COPY15]](i32), [[COPY16]](i32), [[COPY17]](i32), [[COPY18]](i32), [[COPY19]](i32), [[COPY20]](i32), [[COPY21]](i32), [[COPY22]](i32), [[COPY23]](i32), [[COPY24]](i32), [[COPY25]](i32), [[COPY26]](i32), [[COPY27]](i32), [[COPY28]](i32), [[COPY29]](i32), [[COPY30]](i32), [[LOAD]](i32)
  ; CHECK-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.3
  ; CHECK-NEXT:   [[LOAD1:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load (i32) from %fixed-stack.3, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX2:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.2
  ; CHECK-NEXT:   [[LOAD2:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX2]](p5) :: (invariant load (i32) from %fixed-stack.2, align 8, addrspace 5)
  ; CHECK-NEXT:   [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x i32>) = G_BUILD_VECTOR [[LOAD1]](i32), [[LOAD2]](i32)
  ; CHECK-NEXT:   [[FRAME_INDEX3:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
  ; CHECK-NEXT:   [[LOAD3:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX3]](p5) :: (invariant load (f32) from %fixed-stack.1, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX4:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
  ; CHECK-NEXT:   [[LOAD4:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX4]](p5) :: (invariant load (f32) from %fixed-stack.0, align 16, addrspace 5)
  ; CHECK-NEXT:   [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x f32>) = G_BUILD_VECTOR [[LOAD3]](f32), [[LOAD4]](f32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<32 x i32>), [[DEF]](p1) :: (volatile store (<32 x i32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR1]](<2 x i32>), [[DEF]](p1) :: (volatile store (<2 x i32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR2]](<2 x f32>), [[DEF]](p1) :: (volatile store (<2 x f32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store volatile <32 x i32> %arg0, ptr addrspace(1) poison
  store volatile <2 x i32> %arg1, ptr addrspace(1) poison
  store volatile <2 x float> %arg2, ptr addrspace(1) poison
  ret void
}

define void @void_func_v32i32_v2i16_v2f16(<32 x i32> %arg0, <2 x i16> %arg1, <2 x half> %arg2) #0 {
  ; CHECK-LABEL: name: void_func_v32i32_v2i16_v2f16
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $vgpr7
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $vgpr8
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $vgpr9
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $vgpr10
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $vgpr11
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $vgpr12
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $vgpr13
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr14
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr15
  ; CHECK-NEXT:   [[COPY16:%[0-9]+]]:_(i32) = COPY $vgpr16
  ; CHECK-NEXT:   [[COPY17:%[0-9]+]]:_(i32) = COPY $vgpr17
  ; CHECK-NEXT:   [[COPY18:%[0-9]+]]:_(i32) = COPY $vgpr18
  ; CHECK-NEXT:   [[COPY19:%[0-9]+]]:_(i32) = COPY $vgpr19
  ; CHECK-NEXT:   [[COPY20:%[0-9]+]]:_(i32) = COPY $vgpr20
  ; CHECK-NEXT:   [[COPY21:%[0-9]+]]:_(i32) = COPY $vgpr21
  ; CHECK-NEXT:   [[COPY22:%[0-9]+]]:_(i32) = COPY $vgpr22
  ; CHECK-NEXT:   [[COPY23:%[0-9]+]]:_(i32) = COPY $vgpr23
  ; CHECK-NEXT:   [[COPY24:%[0-9]+]]:_(i32) = COPY $vgpr24
  ; CHECK-NEXT:   [[COPY25:%[0-9]+]]:_(i32) = COPY $vgpr25
  ; CHECK-NEXT:   [[COPY26:%[0-9]+]]:_(i32) = COPY $vgpr26
  ; CHECK-NEXT:   [[COPY27:%[0-9]+]]:_(i32) = COPY $vgpr27
  ; CHECK-NEXT:   [[COPY28:%[0-9]+]]:_(i32) = COPY $vgpr28
  ; CHECK-NEXT:   [[COPY29:%[0-9]+]]:_(i32) = COPY $vgpr29
  ; CHECK-NEXT:   [[COPY30:%[0-9]+]]:_(i32) = COPY $vgpr30
  ; CHECK-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.2
  ; CHECK-NEXT:   [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load (i32) from %fixed-stack.2, align 16, addrspace 5)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<32 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32), [[COPY5]](i32), [[COPY6]](i32), [[COPY7]](i32), [[COPY8]](i32), [[COPY9]](i32), [[COPY10]](i32), [[COPY11]](i32), [[COPY12]](i32), [[COPY13]](i32), [[COPY14]](i32), [[COPY15]](i32), [[COPY16]](i32), [[COPY17]](i32), [[COPY18]](i32), [[COPY19]](i32), [[COPY20]](i32), [[COPY21]](i32), [[COPY22]](i32), [[COPY23]](i32), [[COPY24]](i32), [[COPY25]](i32), [[COPY26]](i32), [[COPY27]](i32), [[COPY28]](i32), [[COPY29]](i32), [[COPY30]](i32), [[LOAD]](i32)
  ; CHECK-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
  ; CHECK-NEXT:   [[LOAD1:%[0-9]+]]:_(<2 x i16>) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load (<2 x i16>) from %fixed-stack.1, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX2:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
  ; CHECK-NEXT:   [[LOAD2:%[0-9]+]]:_(<2 x f16>) = G_LOAD [[FRAME_INDEX2]](p5) :: (invariant load (<2 x f16>) from %fixed-stack.0, align 8, addrspace 5)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<32 x i32>), [[DEF]](p1) :: (volatile store (<32 x i32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[LOAD1]](<2 x i16>), [[DEF]](p1) :: (volatile store (<2 x i16>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[LOAD2]](<2 x f16>), [[DEF]](p1) :: (volatile store (<2 x f16>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store volatile <32 x i32> %arg0, ptr addrspace(1) poison
  store volatile <2 x i16> %arg1, ptr addrspace(1) poison
  store volatile <2 x half> %arg2, ptr addrspace(1) poison
  ret void
}

define void @void_func_v32i32_v2i64_v2f64(<32 x i32> %arg0, <2 x i64> %arg1, <2 x double> %arg2) #0 {
  ; CHECK-LABEL: name: void_func_v32i32_v2i64_v2f64
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $vgpr7
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $vgpr8
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $vgpr9
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $vgpr10
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $vgpr11
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $vgpr12
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $vgpr13
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr14
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr15
  ; CHECK-NEXT:   [[COPY16:%[0-9]+]]:_(i32) = COPY $vgpr16
  ; CHECK-NEXT:   [[COPY17:%[0-9]+]]:_(i32) = COPY $vgpr17
  ; CHECK-NEXT:   [[COPY18:%[0-9]+]]:_(i32) = COPY $vgpr18
  ; CHECK-NEXT:   [[COPY19:%[0-9]+]]:_(i32) = COPY $vgpr19
  ; CHECK-NEXT:   [[COPY20:%[0-9]+]]:_(i32) = COPY $vgpr20
  ; CHECK-NEXT:   [[COPY21:%[0-9]+]]:_(i32) = COPY $vgpr21
  ; CHECK-NEXT:   [[COPY22:%[0-9]+]]:_(i32) = COPY $vgpr22
  ; CHECK-NEXT:   [[COPY23:%[0-9]+]]:_(i32) = COPY $vgpr23
  ; CHECK-NEXT:   [[COPY24:%[0-9]+]]:_(i32) = COPY $vgpr24
  ; CHECK-NEXT:   [[COPY25:%[0-9]+]]:_(i32) = COPY $vgpr25
  ; CHECK-NEXT:   [[COPY26:%[0-9]+]]:_(i32) = COPY $vgpr26
  ; CHECK-NEXT:   [[COPY27:%[0-9]+]]:_(i32) = COPY $vgpr27
  ; CHECK-NEXT:   [[COPY28:%[0-9]+]]:_(i32) = COPY $vgpr28
  ; CHECK-NEXT:   [[COPY29:%[0-9]+]]:_(i32) = COPY $vgpr29
  ; CHECK-NEXT:   [[COPY30:%[0-9]+]]:_(i32) = COPY $vgpr30
  ; CHECK-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.8
  ; CHECK-NEXT:   [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load (i32) from %fixed-stack.8, align 16, addrspace 5)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<32 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32), [[COPY5]](i32), [[COPY6]](i32), [[COPY7]](i32), [[COPY8]](i32), [[COPY9]](i32), [[COPY10]](i32), [[COPY11]](i32), [[COPY12]](i32), [[COPY13]](i32), [[COPY14]](i32), [[COPY15]](i32), [[COPY16]](i32), [[COPY17]](i32), [[COPY18]](i32), [[COPY19]](i32), [[COPY20]](i32), [[COPY21]](i32), [[COPY22]](i32), [[COPY23]](i32), [[COPY24]](i32), [[COPY25]](i32), [[COPY26]](i32), [[COPY27]](i32), [[COPY28]](i32), [[COPY29]](i32), [[COPY30]](i32), [[LOAD]](i32)
  ; CHECK-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.7
  ; CHECK-NEXT:   [[LOAD1:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load (i32) from %fixed-stack.7, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX2:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.6
  ; CHECK-NEXT:   [[LOAD2:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX2]](p5) :: (invariant load (i32) from %fixed-stack.6, align 8, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX3:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.5
  ; CHECK-NEXT:   [[LOAD3:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX3]](p5) :: (invariant load (i32) from %fixed-stack.5, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX4:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.4
  ; CHECK-NEXT:   [[LOAD4:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX4]](p5) :: (invariant load (i32) from %fixed-stack.4, align 16, addrspace 5)
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[LOAD1]](i32), [[LOAD2]](i32)
  ; CHECK-NEXT:   [[MV1:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[LOAD3]](i32), [[LOAD4]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x i64>) = G_BUILD_VECTOR [[MV]](i64), [[MV1]](i64)
  ; CHECK-NEXT:   [[FRAME_INDEX5:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.3
  ; CHECK-NEXT:   [[LOAD5:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX5]](p5) :: (invariant load (i32) from %fixed-stack.3, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX6:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.2
  ; CHECK-NEXT:   [[LOAD6:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX6]](p5) :: (invariant load (i32) from %fixed-stack.2, align 8, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX7:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
  ; CHECK-NEXT:   [[LOAD7:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX7]](p5) :: (invariant load (i32) from %fixed-stack.1, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX8:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
  ; CHECK-NEXT:   [[LOAD8:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX8]](p5) :: (invariant load (i32) from %fixed-stack.0, align 16, addrspace 5)
  ; CHECK-NEXT:   [[MV2:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[LOAD5]](i32), [[LOAD6]](i32)
  ; CHECK-NEXT:   [[MV3:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[LOAD7]](i32), [[LOAD8]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x f64>) = G_BUILD_VECTOR [[MV2]](f64), [[MV3]](f64)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<32 x i32>), [[DEF]](p1) :: (volatile store (<32 x i32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR1]](<2 x i64>), [[DEF]](p1) :: (volatile store (<2 x i64>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR2]](<2 x f64>), [[DEF]](p1) :: (volatile store (<2 x f64>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store volatile <32 x i32> %arg0, ptr addrspace(1) poison
  store volatile <2 x i64> %arg1, ptr addrspace(1) poison
  store volatile <2 x double> %arg2, ptr addrspace(1) poison
  ret void
}

define void @void_func_v32i32_v4i32_v4f32(<32 x i32> %arg0, <4 x i32> %arg1, <4 x float> %arg2) #0 {
  ; CHECK-LABEL: name: void_func_v32i32_v4i32_v4f32
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $vgpr7
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $vgpr8
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $vgpr9
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $vgpr10
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $vgpr11
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $vgpr12
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $vgpr13
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr14
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr15
  ; CHECK-NEXT:   [[COPY16:%[0-9]+]]:_(i32) = COPY $vgpr16
  ; CHECK-NEXT:   [[COPY17:%[0-9]+]]:_(i32) = COPY $vgpr17
  ; CHECK-NEXT:   [[COPY18:%[0-9]+]]:_(i32) = COPY $vgpr18
  ; CHECK-NEXT:   [[COPY19:%[0-9]+]]:_(i32) = COPY $vgpr19
  ; CHECK-NEXT:   [[COPY20:%[0-9]+]]:_(i32) = COPY $vgpr20
  ; CHECK-NEXT:   [[COPY21:%[0-9]+]]:_(i32) = COPY $vgpr21
  ; CHECK-NEXT:   [[COPY22:%[0-9]+]]:_(i32) = COPY $vgpr22
  ; CHECK-NEXT:   [[COPY23:%[0-9]+]]:_(i32) = COPY $vgpr23
  ; CHECK-NEXT:   [[COPY24:%[0-9]+]]:_(i32) = COPY $vgpr24
  ; CHECK-NEXT:   [[COPY25:%[0-9]+]]:_(i32) = COPY $vgpr25
  ; CHECK-NEXT:   [[COPY26:%[0-9]+]]:_(i32) = COPY $vgpr26
  ; CHECK-NEXT:   [[COPY27:%[0-9]+]]:_(i32) = COPY $vgpr27
  ; CHECK-NEXT:   [[COPY28:%[0-9]+]]:_(i32) = COPY $vgpr28
  ; CHECK-NEXT:   [[COPY29:%[0-9]+]]:_(i32) = COPY $vgpr29
  ; CHECK-NEXT:   [[COPY30:%[0-9]+]]:_(i32) = COPY $vgpr30
  ; CHECK-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.8
  ; CHECK-NEXT:   [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load (i32) from %fixed-stack.8, align 16, addrspace 5)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<32 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32), [[COPY5]](i32), [[COPY6]](i32), [[COPY7]](i32), [[COPY8]](i32), [[COPY9]](i32), [[COPY10]](i32), [[COPY11]](i32), [[COPY12]](i32), [[COPY13]](i32), [[COPY14]](i32), [[COPY15]](i32), [[COPY16]](i32), [[COPY17]](i32), [[COPY18]](i32), [[COPY19]](i32), [[COPY20]](i32), [[COPY21]](i32), [[COPY22]](i32), [[COPY23]](i32), [[COPY24]](i32), [[COPY25]](i32), [[COPY26]](i32), [[COPY27]](i32), [[COPY28]](i32), [[COPY29]](i32), [[COPY30]](i32), [[LOAD]](i32)
  ; CHECK-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.7
  ; CHECK-NEXT:   [[LOAD1:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load (i32) from %fixed-stack.7, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX2:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.6
  ; CHECK-NEXT:   [[LOAD2:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX2]](p5) :: (invariant load (i32) from %fixed-stack.6, align 8, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX3:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.5
  ; CHECK-NEXT:   [[LOAD3:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX3]](p5) :: (invariant load (i32) from %fixed-stack.5, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX4:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.4
  ; CHECK-NEXT:   [[LOAD4:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX4]](p5) :: (invariant load (i32) from %fixed-stack.4, align 16, addrspace 5)
  ; CHECK-NEXT:   [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x i32>) = G_BUILD_VECTOR [[LOAD1]](i32), [[LOAD2]](i32), [[LOAD3]](i32), [[LOAD4]](i32)
  ; CHECK-NEXT:   [[FRAME_INDEX5:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.3
  ; CHECK-NEXT:   [[LOAD5:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX5]](p5) :: (invariant load (f32) from %fixed-stack.3, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX6:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.2
  ; CHECK-NEXT:   [[LOAD6:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX6]](p5) :: (invariant load (f32) from %fixed-stack.2, align 8, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX7:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
  ; CHECK-NEXT:   [[LOAD7:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX7]](p5) :: (invariant load (f32) from %fixed-stack.1, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX8:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
  ; CHECK-NEXT:   [[LOAD8:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX8]](p5) :: (invariant load (f32) from %fixed-stack.0, align 16, addrspace 5)
  ; CHECK-NEXT:   [[BUILD_VECTOR2:%[0-9]+]]:_(<4 x f32>) = G_BUILD_VECTOR [[LOAD5]](f32), [[LOAD6]](f32), [[LOAD7]](f32), [[LOAD8]](f32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<32 x i32>), [[DEF]](p1) :: (volatile store (<32 x i32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR1]](<4 x i32>), [[DEF]](p1) :: (volatile store (<4 x i32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR2]](<4 x f32>), [[DEF]](p1) :: (volatile store (<4 x f32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store volatile <32 x i32> %arg0, ptr addrspace(1) poison
  store volatile <4 x i32> %arg1, ptr addrspace(1) poison
  store volatile <4 x float> %arg2, ptr addrspace(1) poison
  ret void
}

define void @void_func_v32i32_v8i32_v8f32(<32 x i32> %arg0, <8 x i32> %arg1, <8 x float> %arg2) #0 {
  ; CHECK-LABEL: name: void_func_v32i32_v8i32_v8f32
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $vgpr7
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $vgpr8
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $vgpr9
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $vgpr10
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $vgpr11
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $vgpr12
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $vgpr13
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr14
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr15
  ; CHECK-NEXT:   [[COPY16:%[0-9]+]]:_(i32) = COPY $vgpr16
  ; CHECK-NEXT:   [[COPY17:%[0-9]+]]:_(i32) = COPY $vgpr17
  ; CHECK-NEXT:   [[COPY18:%[0-9]+]]:_(i32) = COPY $vgpr18
  ; CHECK-NEXT:   [[COPY19:%[0-9]+]]:_(i32) = COPY $vgpr19
  ; CHECK-NEXT:   [[COPY20:%[0-9]+]]:_(i32) = COPY $vgpr20
  ; CHECK-NEXT:   [[COPY21:%[0-9]+]]:_(i32) = COPY $vgpr21
  ; CHECK-NEXT:   [[COPY22:%[0-9]+]]:_(i32) = COPY $vgpr22
  ; CHECK-NEXT:   [[COPY23:%[0-9]+]]:_(i32) = COPY $vgpr23
  ; CHECK-NEXT:   [[COPY24:%[0-9]+]]:_(i32) = COPY $vgpr24
  ; CHECK-NEXT:   [[COPY25:%[0-9]+]]:_(i32) = COPY $vgpr25
  ; CHECK-NEXT:   [[COPY26:%[0-9]+]]:_(i32) = COPY $vgpr26
  ; CHECK-NEXT:   [[COPY27:%[0-9]+]]:_(i32) = COPY $vgpr27
  ; CHECK-NEXT:   [[COPY28:%[0-9]+]]:_(i32) = COPY $vgpr28
  ; CHECK-NEXT:   [[COPY29:%[0-9]+]]:_(i32) = COPY $vgpr29
  ; CHECK-NEXT:   [[COPY30:%[0-9]+]]:_(i32) = COPY $vgpr30
  ; CHECK-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.16
  ; CHECK-NEXT:   [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load (i32) from %fixed-stack.16, align 16, addrspace 5)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<32 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32), [[COPY5]](i32), [[COPY6]](i32), [[COPY7]](i32), [[COPY8]](i32), [[COPY9]](i32), [[COPY10]](i32), [[COPY11]](i32), [[COPY12]](i32), [[COPY13]](i32), [[COPY14]](i32), [[COPY15]](i32), [[COPY16]](i32), [[COPY17]](i32), [[COPY18]](i32), [[COPY19]](i32), [[COPY20]](i32), [[COPY21]](i32), [[COPY22]](i32), [[COPY23]](i32), [[COPY24]](i32), [[COPY25]](i32), [[COPY26]](i32), [[COPY27]](i32), [[COPY28]](i32), [[COPY29]](i32), [[COPY30]](i32), [[LOAD]](i32)
  ; CHECK-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.15
  ; CHECK-NEXT:   [[LOAD1:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load (i32) from %fixed-stack.15, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX2:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.14
  ; CHECK-NEXT:   [[LOAD2:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX2]](p5) :: (invariant load (i32) from %fixed-stack.14, align 8, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX3:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.13
  ; CHECK-NEXT:   [[LOAD3:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX3]](p5) :: (invariant load (i32) from %fixed-stack.13, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX4:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.12
  ; CHECK-NEXT:   [[LOAD4:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX4]](p5) :: (invariant load (i32) from %fixed-stack.12, align 16, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX5:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.11
  ; CHECK-NEXT:   [[LOAD5:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX5]](p5) :: (invariant load (i32) from %fixed-stack.11, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX6:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.10
  ; CHECK-NEXT:   [[LOAD6:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX6]](p5) :: (invariant load (i32) from %fixed-stack.10, align 8, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX7:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.9
  ; CHECK-NEXT:   [[LOAD7:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX7]](p5) :: (invariant load (i32) from %fixed-stack.9, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX8:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.8
  ; CHECK-NEXT:   [[LOAD8:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX8]](p5) :: (invariant load (i32) from %fixed-stack.8, align 16, addrspace 5)
  ; CHECK-NEXT:   [[BUILD_VECTOR1:%[0-9]+]]:_(<8 x i32>) = G_BUILD_VECTOR [[LOAD1]](i32), [[LOAD2]](i32), [[LOAD3]](i32), [[LOAD4]](i32), [[LOAD5]](i32), [[LOAD6]](i32), [[LOAD7]](i32), [[LOAD8]](i32)
  ; CHECK-NEXT:   [[FRAME_INDEX9:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.7
  ; CHECK-NEXT:   [[LOAD9:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX9]](p5) :: (invariant load (f32) from %fixed-stack.7, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX10:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.6
  ; CHECK-NEXT:   [[LOAD10:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX10]](p5) :: (invariant load (f32) from %fixed-stack.6, align 8, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX11:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.5
  ; CHECK-NEXT:   [[LOAD11:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX11]](p5) :: (invariant load (f32) from %fixed-stack.5, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX12:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.4
  ; CHECK-NEXT:   [[LOAD12:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX12]](p5) :: (invariant load (f32) from %fixed-stack.4, align 16, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX13:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.3
  ; CHECK-NEXT:   [[LOAD13:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX13]](p5) :: (invariant load (f32) from %fixed-stack.3, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX14:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.2
  ; CHECK-NEXT:   [[LOAD14:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX14]](p5) :: (invariant load (f32) from %fixed-stack.2, align 8, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX15:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
  ; CHECK-NEXT:   [[LOAD15:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX15]](p5) :: (invariant load (f32) from %fixed-stack.1, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX16:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
  ; CHECK-NEXT:   [[LOAD16:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX16]](p5) :: (invariant load (f32) from %fixed-stack.0, align 16, addrspace 5)
  ; CHECK-NEXT:   [[BUILD_VECTOR2:%[0-9]+]]:_(<8 x f32>) = G_BUILD_VECTOR [[LOAD9]](f32), [[LOAD10]](f32), [[LOAD11]](f32), [[LOAD12]](f32), [[LOAD13]](f32), [[LOAD14]](f32), [[LOAD15]](f32), [[LOAD16]](f32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<32 x i32>), [[DEF]](p1) :: (volatile store (<32 x i32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR1]](<8 x i32>), [[DEF]](p1) :: (volatile store (<8 x i32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR2]](<8 x f32>), [[DEF]](p1) :: (volatile store (<8 x f32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store volatile <32 x i32> %arg0, ptr addrspace(1) poison
  store volatile <8 x i32> %arg1, ptr addrspace(1) poison
  store volatile <8 x float> %arg2, ptr addrspace(1) poison
  ret void
}

define void @void_func_v32i32_v16i32_v16f32(<32 x i32> %arg0, <16 x i32> %arg1, <16 x float> %arg2) #0 {
  ; CHECK-LABEL: name: void_func_v32i32_v16i32_v16f32
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $vgpr7
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $vgpr8
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $vgpr9
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $vgpr10
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $vgpr11
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $vgpr12
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $vgpr13
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr14
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr15
  ; CHECK-NEXT:   [[COPY16:%[0-9]+]]:_(i32) = COPY $vgpr16
  ; CHECK-NEXT:   [[COPY17:%[0-9]+]]:_(i32) = COPY $vgpr17
  ; CHECK-NEXT:   [[COPY18:%[0-9]+]]:_(i32) = COPY $vgpr18
  ; CHECK-NEXT:   [[COPY19:%[0-9]+]]:_(i32) = COPY $vgpr19
  ; CHECK-NEXT:   [[COPY20:%[0-9]+]]:_(i32) = COPY $vgpr20
  ; CHECK-NEXT:   [[COPY21:%[0-9]+]]:_(i32) = COPY $vgpr21
  ; CHECK-NEXT:   [[COPY22:%[0-9]+]]:_(i32) = COPY $vgpr22
  ; CHECK-NEXT:   [[COPY23:%[0-9]+]]:_(i32) = COPY $vgpr23
  ; CHECK-NEXT:   [[COPY24:%[0-9]+]]:_(i32) = COPY $vgpr24
  ; CHECK-NEXT:   [[COPY25:%[0-9]+]]:_(i32) = COPY $vgpr25
  ; CHECK-NEXT:   [[COPY26:%[0-9]+]]:_(i32) = COPY $vgpr26
  ; CHECK-NEXT:   [[COPY27:%[0-9]+]]:_(i32) = COPY $vgpr27
  ; CHECK-NEXT:   [[COPY28:%[0-9]+]]:_(i32) = COPY $vgpr28
  ; CHECK-NEXT:   [[COPY29:%[0-9]+]]:_(i32) = COPY $vgpr29
  ; CHECK-NEXT:   [[COPY30:%[0-9]+]]:_(i32) = COPY $vgpr30
  ; CHECK-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.32
  ; CHECK-NEXT:   [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load (i32) from %fixed-stack.32, align 16, addrspace 5)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<32 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32), [[COPY5]](i32), [[COPY6]](i32), [[COPY7]](i32), [[COPY8]](i32), [[COPY9]](i32), [[COPY10]](i32), [[COPY11]](i32), [[COPY12]](i32), [[COPY13]](i32), [[COPY14]](i32), [[COPY15]](i32), [[COPY16]](i32), [[COPY17]](i32), [[COPY18]](i32), [[COPY19]](i32), [[COPY20]](i32), [[COPY21]](i32), [[COPY22]](i32), [[COPY23]](i32), [[COPY24]](i32), [[COPY25]](i32), [[COPY26]](i32), [[COPY27]](i32), [[COPY28]](i32), [[COPY29]](i32), [[COPY30]](i32), [[LOAD]](i32)
  ; CHECK-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.31
  ; CHECK-NEXT:   [[LOAD1:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load (i32) from %fixed-stack.31, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX2:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.30
  ; CHECK-NEXT:   [[LOAD2:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX2]](p5) :: (invariant load (i32) from %fixed-stack.30, align 8, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX3:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.29
  ; CHECK-NEXT:   [[LOAD3:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX3]](p5) :: (invariant load (i32) from %fixed-stack.29, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX4:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.28
  ; CHECK-NEXT:   [[LOAD4:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX4]](p5) :: (invariant load (i32) from %fixed-stack.28, align 16, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX5:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.27
  ; CHECK-NEXT:   [[LOAD5:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX5]](p5) :: (invariant load (i32) from %fixed-stack.27, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX6:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.26
  ; CHECK-NEXT:   [[LOAD6:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX6]](p5) :: (invariant load (i32) from %fixed-stack.26, align 8, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX7:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.25
  ; CHECK-NEXT:   [[LOAD7:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX7]](p5) :: (invariant load (i32) from %fixed-stack.25, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX8:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.24
  ; CHECK-NEXT:   [[LOAD8:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX8]](p5) :: (invariant load (i32) from %fixed-stack.24, align 16, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX9:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.23
  ; CHECK-NEXT:   [[LOAD9:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX9]](p5) :: (invariant load (i32) from %fixed-stack.23, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX10:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.22
  ; CHECK-NEXT:   [[LOAD10:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX10]](p5) :: (invariant load (i32) from %fixed-stack.22, align 8, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX11:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.21
  ; CHECK-NEXT:   [[LOAD11:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX11]](p5) :: (invariant load (i32) from %fixed-stack.21, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX12:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.20
  ; CHECK-NEXT:   [[LOAD12:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX12]](p5) :: (invariant load (i32) from %fixed-stack.20, align 16, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX13:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.19
  ; CHECK-NEXT:   [[LOAD13:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX13]](p5) :: (invariant load (i32) from %fixed-stack.19, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX14:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.18
  ; CHECK-NEXT:   [[LOAD14:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX14]](p5) :: (invariant load (i32) from %fixed-stack.18, align 8, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX15:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.17
  ; CHECK-NEXT:   [[LOAD15:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX15]](p5) :: (invariant load (i32) from %fixed-stack.17, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX16:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.16
  ; CHECK-NEXT:   [[LOAD16:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX16]](p5) :: (invariant load (i32) from %fixed-stack.16, align 16, addrspace 5)
  ; CHECK-NEXT:   [[BUILD_VECTOR1:%[0-9]+]]:_(<16 x i32>) = G_BUILD_VECTOR [[LOAD1]](i32), [[LOAD2]](i32), [[LOAD3]](i32), [[LOAD4]](i32), [[LOAD5]](i32), [[LOAD6]](i32), [[LOAD7]](i32), [[LOAD8]](i32), [[LOAD9]](i32), [[LOAD10]](i32), [[LOAD11]](i32), [[LOAD12]](i32), [[LOAD13]](i32), [[LOAD14]](i32), [[LOAD15]](i32), [[LOAD16]](i32)
  ; CHECK-NEXT:   [[FRAME_INDEX17:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.15
  ; CHECK-NEXT:   [[LOAD17:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX17]](p5) :: (invariant load (f32) from %fixed-stack.15, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX18:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.14
  ; CHECK-NEXT:   [[LOAD18:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX18]](p5) :: (invariant load (f32) from %fixed-stack.14, align 8, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX19:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.13
  ; CHECK-NEXT:   [[LOAD19:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX19]](p5) :: (invariant load (f32) from %fixed-stack.13, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX20:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.12
  ; CHECK-NEXT:   [[LOAD20:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX20]](p5) :: (invariant load (f32) from %fixed-stack.12, align 16, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX21:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.11
  ; CHECK-NEXT:   [[LOAD21:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX21]](p5) :: (invariant load (f32) from %fixed-stack.11, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX22:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.10
  ; CHECK-NEXT:   [[LOAD22:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX22]](p5) :: (invariant load (f32) from %fixed-stack.10, align 8, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX23:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.9
  ; CHECK-NEXT:   [[LOAD23:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX23]](p5) :: (invariant load (f32) from %fixed-stack.9, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX24:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.8
  ; CHECK-NEXT:   [[LOAD24:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX24]](p5) :: (invariant load (f32) from %fixed-stack.8, align 16, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX25:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.7
  ; CHECK-NEXT:   [[LOAD25:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX25]](p5) :: (invariant load (f32) from %fixed-stack.7, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX26:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.6
  ; CHECK-NEXT:   [[LOAD26:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX26]](p5) :: (invariant load (f32) from %fixed-stack.6, align 8, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX27:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.5
  ; CHECK-NEXT:   [[LOAD27:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX27]](p5) :: (invariant load (f32) from %fixed-stack.5, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX28:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.4
  ; CHECK-NEXT:   [[LOAD28:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX28]](p5) :: (invariant load (f32) from %fixed-stack.4, align 16, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX29:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.3
  ; CHECK-NEXT:   [[LOAD29:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX29]](p5) :: (invariant load (f32) from %fixed-stack.3, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX30:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.2
  ; CHECK-NEXT:   [[LOAD30:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX30]](p5) :: (invariant load (f32) from %fixed-stack.2, align 8, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX31:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
  ; CHECK-NEXT:   [[LOAD31:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX31]](p5) :: (invariant load (f32) from %fixed-stack.1, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX32:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
  ; CHECK-NEXT:   [[LOAD32:%[0-9]+]]:_(f32) = G_LOAD [[FRAME_INDEX32]](p5) :: (invariant load (f32) from %fixed-stack.0, align 16, addrspace 5)
  ; CHECK-NEXT:   [[BUILD_VECTOR2:%[0-9]+]]:_(<16 x f32>) = G_BUILD_VECTOR [[LOAD17]](f32), [[LOAD18]](f32), [[LOAD19]](f32), [[LOAD20]](f32), [[LOAD21]](f32), [[LOAD22]](f32), [[LOAD23]](f32), [[LOAD24]](f32), [[LOAD25]](f32), [[LOAD26]](f32), [[LOAD27]](f32), [[LOAD28]](f32), [[LOAD29]](f32), [[LOAD30]](f32), [[LOAD31]](f32), [[LOAD32]](f32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<32 x i32>), [[DEF]](p1) :: (volatile store (<32 x i32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR1]](<16 x i32>), [[DEF]](p1) :: (volatile store (<16 x i32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR2]](<16 x f32>), [[DEF]](p1) :: (volatile store (<16 x f32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store volatile <32 x i32> %arg0, ptr addrspace(1) poison
  store volatile <16 x i32> %arg1, ptr addrspace(1) poison
  store volatile <16 x float> %arg2, ptr addrspace(1) poison
  ret void
}

; Make sure v3 isn't a wasted register because of v3 types being promoted to v4
define void @void_func_v3f32_wasted_reg(<3 x float> %arg0, i32 %arg1) #0 {
  ; CHECK-LABEL: name: void_func_v3f32_wasted_reg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(f32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(f32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(f32) = COPY $vgpr2
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<3 x f32>) = G_BUILD_VECTOR [[COPY]](f32), [[COPY1]](f32), [[COPY2]](f32)
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 0
  ; CHECK-NEXT:   [[C1:%[0-9]+]]:_(i32) = G_CONSTANT i32 1
  ; CHECK-NEXT:   [[C2:%[0-9]+]]:_(i32) = G_CONSTANT i32 2
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p3) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[EVEC:%[0-9]+]]:_(f32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR]](<3 x f32>), [[C]](i32)
  ; CHECK-NEXT:   [[EVEC1:%[0-9]+]]:_(f32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR]](<3 x f32>), [[C1]](i32)
  ; CHECK-NEXT:   [[EVEC2:%[0-9]+]]:_(f32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR]](<3 x f32>), [[C2]](i32)
  ; CHECK-NEXT:   G_STORE [[EVEC]](f32), [[DEF]](p3) :: (volatile store (f32) into `ptr addrspace(3) poison`, addrspace 3)
  ; CHECK-NEXT:   G_STORE [[EVEC1]](f32), [[DEF]](p3) :: (volatile store (f32) into `ptr addrspace(3) poison`, addrspace 3)
  ; CHECK-NEXT:   G_STORE [[EVEC2]](f32), [[DEF]](p3) :: (volatile store (f32) into `ptr addrspace(3) poison`, addrspace 3)
  ; CHECK-NEXT:   G_STORE [[COPY3]](i32), [[DEF]](p3) :: (volatile store (i32) into `ptr addrspace(3) poison`, addrspace 3)
  ; CHECK-NEXT:   SI_RETURN
  %arg0.0 = extractelement <3 x float> %arg0, i32 0
  %arg0.1 = extractelement <3 x float> %arg0, i32 1
  %arg0.2 = extractelement <3 x float> %arg0, i32 2
  store volatile float %arg0.0, ptr addrspace(3) poison
  store volatile float %arg0.1, ptr addrspace(3) poison
  store volatile float %arg0.2, ptr addrspace(3) poison
  store volatile i32 %arg1, ptr addrspace(3) poison
  ret void
}

define void @void_func_v3i32_wasted_reg(<3 x i32> %arg0, i32 %arg1) #0 {
  ; CHECK-LABEL: name: void_func_v3i32_wasted_reg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<3 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32)
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 0
  ; CHECK-NEXT:   [[C1:%[0-9]+]]:_(i32) = G_CONSTANT i32 1
  ; CHECK-NEXT:   [[C2:%[0-9]+]]:_(i32) = G_CONSTANT i32 2
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p3) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[EVEC:%[0-9]+]]:_(i32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR]](<3 x i32>), [[C]](i32)
  ; CHECK-NEXT:   [[EVEC1:%[0-9]+]]:_(i32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR]](<3 x i32>), [[C1]](i32)
  ; CHECK-NEXT:   [[EVEC2:%[0-9]+]]:_(i32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR]](<3 x i32>), [[C2]](i32)
  ; CHECK-NEXT:   G_STORE [[EVEC]](i32), [[DEF]](p3) :: (volatile store (i32) into `ptr addrspace(3) poison`, addrspace 3)
  ; CHECK-NEXT:   G_STORE [[EVEC1]](i32), [[DEF]](p3) :: (volatile store (i32) into `ptr addrspace(3) poison`, addrspace 3)
  ; CHECK-NEXT:   G_STORE [[EVEC2]](i32), [[DEF]](p3) :: (volatile store (i32) into `ptr addrspace(3) poison`, addrspace 3)
  ; CHECK-NEXT:   G_STORE [[COPY3]](i32), [[DEF]](p3) :: (volatile store (i32) into `ptr addrspace(3) poison`, addrspace 3)
  ; CHECK-NEXT:   SI_RETURN
  %arg0.0 = extractelement <3 x i32> %arg0, i32 0
  %arg0.1 = extractelement <3 x i32> %arg0, i32 1
  %arg0.2 = extractelement <3 x i32> %arg0, i32 2
  store volatile i32 %arg0.0, ptr addrspace(3) poison
  store volatile i32 %arg0.1, ptr addrspace(3) poison
  store volatile i32 %arg0.2, ptr addrspace(3) poison
  store volatile i32 %arg1, ptr addrspace(3) poison
  ret void
}

; Check there is no crash.
define void @void_func_v16i8(<16 x i8> %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v16i8
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[COPY]](i32)
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[TRUNC1:%[0-9]+]]:_(i16) = G_TRUNC [[COPY1]](i32)
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[TRUNC2:%[0-9]+]]:_(i16) = G_TRUNC [[COPY2]](i32)
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[TRUNC3:%[0-9]+]]:_(i16) = G_TRUNC [[COPY3]](i32)
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[TRUNC4:%[0-9]+]]:_(i16) = G_TRUNC [[COPY4]](i32)
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[TRUNC5:%[0-9]+]]:_(i16) = G_TRUNC [[COPY5]](i32)
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[TRUNC6:%[0-9]+]]:_(i16) = G_TRUNC [[COPY6]](i32)
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $vgpr7
  ; CHECK-NEXT:   [[TRUNC7:%[0-9]+]]:_(i16) = G_TRUNC [[COPY7]](i32)
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $vgpr8
  ; CHECK-NEXT:   [[TRUNC8:%[0-9]+]]:_(i16) = G_TRUNC [[COPY8]](i32)
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $vgpr9
  ; CHECK-NEXT:   [[TRUNC9:%[0-9]+]]:_(i16) = G_TRUNC [[COPY9]](i32)
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $vgpr10
  ; CHECK-NEXT:   [[TRUNC10:%[0-9]+]]:_(i16) = G_TRUNC [[COPY10]](i32)
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $vgpr11
  ; CHECK-NEXT:   [[TRUNC11:%[0-9]+]]:_(i16) = G_TRUNC [[COPY11]](i32)
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $vgpr12
  ; CHECK-NEXT:   [[TRUNC12:%[0-9]+]]:_(i16) = G_TRUNC [[COPY12]](i32)
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $vgpr13
  ; CHECK-NEXT:   [[TRUNC13:%[0-9]+]]:_(i16) = G_TRUNC [[COPY13]](i32)
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr14
  ; CHECK-NEXT:   [[TRUNC14:%[0-9]+]]:_(i16) = G_TRUNC [[COPY14]](i32)
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr15
  ; CHECK-NEXT:   [[TRUNC15:%[0-9]+]]:_(i16) = G_TRUNC [[COPY15]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<16 x i16>) = G_BUILD_VECTOR [[TRUNC]](i16), [[TRUNC1]](i16), [[TRUNC2]](i16), [[TRUNC3]](i16), [[TRUNC4]](i16), [[TRUNC5]](i16), [[TRUNC6]](i16), [[TRUNC7]](i16), [[TRUNC8]](i16), [[TRUNC9]](i16), [[TRUNC10]](i16), [[TRUNC11]](i16), [[TRUNC12]](i16), [[TRUNC13]](i16), [[TRUNC14]](i16), [[TRUNC15]](i16)
  ; CHECK-NEXT:   [[TRUNC16:%[0-9]+]]:_(<16 x i8>) = G_TRUNC [[BUILD_VECTOR]](<16 x i16>)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[TRUNC16]](<16 x i8>), [[DEF]](p1) :: (volatile store (<16 x i8>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store volatile <16 x i8> %arg0, ptr addrspace(1) poison
  ret void
}

; Check there is no crash.
define void @void_func_v32i32_v16i8(<32 x i32> %arg0, <16 x i8> %arg1) #0 {
  ; CHECK-LABEL: name: void_func_v32i32_v16i8
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $vgpr7
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $vgpr8
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $vgpr9
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $vgpr10
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $vgpr11
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $vgpr12
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $vgpr13
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr14
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr15
  ; CHECK-NEXT:   [[COPY16:%[0-9]+]]:_(i32) = COPY $vgpr16
  ; CHECK-NEXT:   [[COPY17:%[0-9]+]]:_(i32) = COPY $vgpr17
  ; CHECK-NEXT:   [[COPY18:%[0-9]+]]:_(i32) = COPY $vgpr18
  ; CHECK-NEXT:   [[COPY19:%[0-9]+]]:_(i32) = COPY $vgpr19
  ; CHECK-NEXT:   [[COPY20:%[0-9]+]]:_(i32) = COPY $vgpr20
  ; CHECK-NEXT:   [[COPY21:%[0-9]+]]:_(i32) = COPY $vgpr21
  ; CHECK-NEXT:   [[COPY22:%[0-9]+]]:_(i32) = COPY $vgpr22
  ; CHECK-NEXT:   [[COPY23:%[0-9]+]]:_(i32) = COPY $vgpr23
  ; CHECK-NEXT:   [[COPY24:%[0-9]+]]:_(i32) = COPY $vgpr24
  ; CHECK-NEXT:   [[COPY25:%[0-9]+]]:_(i32) = COPY $vgpr25
  ; CHECK-NEXT:   [[COPY26:%[0-9]+]]:_(i32) = COPY $vgpr26
  ; CHECK-NEXT:   [[COPY27:%[0-9]+]]:_(i32) = COPY $vgpr27
  ; CHECK-NEXT:   [[COPY28:%[0-9]+]]:_(i32) = COPY $vgpr28
  ; CHECK-NEXT:   [[COPY29:%[0-9]+]]:_(i32) = COPY $vgpr29
  ; CHECK-NEXT:   [[COPY30:%[0-9]+]]:_(i32) = COPY $vgpr30
  ; CHECK-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.16
  ; CHECK-NEXT:   [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load (i32) from %fixed-stack.16, align 16, addrspace 5)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<32 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32), [[COPY5]](i32), [[COPY6]](i32), [[COPY7]](i32), [[COPY8]](i32), [[COPY9]](i32), [[COPY10]](i32), [[COPY11]](i32), [[COPY12]](i32), [[COPY13]](i32), [[COPY14]](i32), [[COPY15]](i32), [[COPY16]](i32), [[COPY17]](i32), [[COPY18]](i32), [[COPY19]](i32), [[COPY20]](i32), [[COPY21]](i32), [[COPY22]](i32), [[COPY23]](i32), [[COPY24]](i32), [[COPY25]](i32), [[COPY26]](i32), [[COPY27]](i32), [[COPY28]](i32), [[COPY29]](i32), [[COPY30]](i32), [[LOAD]](i32)
  ; CHECK-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.15
  ; CHECK-NEXT:   [[LOAD1:%[0-9]+]]:_(i16) = G_LOAD [[FRAME_INDEX1]](p5) :: (invariant load (i16) from %fixed-stack.15, align 4, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX2:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.14
  ; CHECK-NEXT:   [[LOAD2:%[0-9]+]]:_(i16) = G_LOAD [[FRAME_INDEX2]](p5) :: (invariant load (i16) from %fixed-stack.14, align 8, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX3:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.13
  ; CHECK-NEXT:   [[LOAD3:%[0-9]+]]:_(i16) = G_LOAD [[FRAME_INDEX3]](p5) :: (invariant load (i16) from %fixed-stack.13, align 4, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX4:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.12
  ; CHECK-NEXT:   [[LOAD4:%[0-9]+]]:_(i16) = G_LOAD [[FRAME_INDEX4]](p5) :: (invariant load (i16) from %fixed-stack.12, align 16, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX5:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.11
  ; CHECK-NEXT:   [[LOAD5:%[0-9]+]]:_(i16) = G_LOAD [[FRAME_INDEX5]](p5) :: (invariant load (i16) from %fixed-stack.11, align 4, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX6:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.10
  ; CHECK-NEXT:   [[LOAD6:%[0-9]+]]:_(i16) = G_LOAD [[FRAME_INDEX6]](p5) :: (invariant load (i16) from %fixed-stack.10, align 8, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX7:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.9
  ; CHECK-NEXT:   [[LOAD7:%[0-9]+]]:_(i16) = G_LOAD [[FRAME_INDEX7]](p5) :: (invariant load (i16) from %fixed-stack.9, align 4, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX8:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.8
  ; CHECK-NEXT:   [[LOAD8:%[0-9]+]]:_(i16) = G_LOAD [[FRAME_INDEX8]](p5) :: (invariant load (i16) from %fixed-stack.8, align 16, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX9:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.7
  ; CHECK-NEXT:   [[LOAD9:%[0-9]+]]:_(i16) = G_LOAD [[FRAME_INDEX9]](p5) :: (invariant load (i16) from %fixed-stack.7, align 4, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX10:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.6
  ; CHECK-NEXT:   [[LOAD10:%[0-9]+]]:_(i16) = G_LOAD [[FRAME_INDEX10]](p5) :: (invariant load (i16) from %fixed-stack.6, align 8, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX11:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.5
  ; CHECK-NEXT:   [[LOAD11:%[0-9]+]]:_(i16) = G_LOAD [[FRAME_INDEX11]](p5) :: (invariant load (i16) from %fixed-stack.5, align 4, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX12:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.4
  ; CHECK-NEXT:   [[LOAD12:%[0-9]+]]:_(i16) = G_LOAD [[FRAME_INDEX12]](p5) :: (invariant load (i16) from %fixed-stack.4, align 16, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX13:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.3
  ; CHECK-NEXT:   [[LOAD13:%[0-9]+]]:_(i16) = G_LOAD [[FRAME_INDEX13]](p5) :: (invariant load (i16) from %fixed-stack.3, align 4, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX14:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.2
  ; CHECK-NEXT:   [[LOAD14:%[0-9]+]]:_(i16) = G_LOAD [[FRAME_INDEX14]](p5) :: (invariant load (i16) from %fixed-stack.2, align 8, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX15:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.1
  ; CHECK-NEXT:   [[LOAD15:%[0-9]+]]:_(i16) = G_LOAD [[FRAME_INDEX15]](p5) :: (invariant load (i16) from %fixed-stack.1, align 4, addrspace 5)
  ; CHECK-NEXT:   [[FRAME_INDEX16:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
  ; CHECK-NEXT:   [[LOAD16:%[0-9]+]]:_(i16) = G_LOAD [[FRAME_INDEX16]](p5) :: (invariant load (i16) from %fixed-stack.0, align 16, addrspace 5)
  ; CHECK-NEXT:   [[BUILD_VECTOR1:%[0-9]+]]:_(<16 x i16>) = G_BUILD_VECTOR [[LOAD1]](i16), [[LOAD2]](i16), [[LOAD3]](i16), [[LOAD4]](i16), [[LOAD5]](i16), [[LOAD6]](i16), [[LOAD7]](i16), [[LOAD8]](i16), [[LOAD9]](i16), [[LOAD10]](i16), [[LOAD11]](i16), [[LOAD12]](i16), [[LOAD13]](i16), [[LOAD14]](i16), [[LOAD15]](i16), [[LOAD16]](i16)
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(<16 x i8>) = G_TRUNC [[BUILD_VECTOR1]](<16 x i16>)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<32 x i32>), [[DEF]](p1) :: (volatile store (<32 x i32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[TRUNC]](<16 x i8>), [[DEF]](p1) :: (volatile store (<16 x i8>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store volatile <32 x i32> %arg0, ptr addrspace(1) poison
  store volatile <16 x i8> %arg1, ptr addrspace(1) poison
  ret void
}

define void @pointer_in_struct_argument({ptr addrspace(3), ptr addrspace(1)} %arg0, i8 %pad, {ptr addrspace(3), ptr addrspace(1234)} %arg1) {
  ; CHECK-LABEL: name: pointer_in_struct_argument
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY1]](i32), [[COPY2]](i32)
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[COPY3]](i32)
  ; CHECK-NEXT:   [[TRUNC1:%[0-9]+]]:_(i8) = G_TRUNC [[TRUNC]](i16)
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(p3) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $vgpr5
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $vgpr6
  ; CHECK-NEXT:   [[MV1:%[0-9]+]]:_(p1234) = G_MERGE_VALUES [[COPY5]](i32), [[COPY6]](i32)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(p1) = G_CONSTANT i64 0
  ; CHECK-NEXT:   G_STORE [[COPY]](p3), [[C]](p1) :: (volatile store (p3) into `ptr addrspace(1) null`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[MV]](p1), [[C]](p1) :: (volatile store (p1) into `ptr addrspace(1) null`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[TRUNC1]](i8), [[C]](p1) :: (volatile store (i8) into `ptr addrspace(1) null`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[COPY4]](p3), [[C]](p1) :: (volatile store (p3) into `ptr addrspace(1) null`, addrspace 1)
  ; CHECK-NEXT:   G_STORE [[MV1]](p1234), [[C]](p1) :: (volatile store (p1234) into `ptr addrspace(1) null`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  %val0 = extractvalue {ptr addrspace(3), ptr addrspace(1)} %arg0, 0
  %val1 = extractvalue {ptr addrspace(3), ptr addrspace(1)} %arg0, 1
  %val2 = extractvalue {ptr addrspace(3), ptr addrspace(1234)} %arg1, 0
  %val3 = extractvalue {ptr addrspace(3), ptr addrspace(1234)} %arg1, 1
  store volatile ptr addrspace(3) %val0, ptr addrspace(1) null
  store volatile ptr addrspace(1) %val1, ptr addrspace(1) null
  store volatile i8 %pad, ptr addrspace(1) null
  store volatile ptr addrspace(3) %val2, ptr addrspace(1) null
  store volatile ptr addrspace(1234) %val3, ptr addrspace(1) null
  ret void
}

define void @vector_ptr_in_struct_arg({ <2 x ptr addrspace(1)>, <2 x ptr addrspace(3)> } %arg) {
  ; CHECK-LABEL: name: vector_ptr_in_struct_arg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $vgpr2
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $vgpr3
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[MV1:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY2]](i32), [[COPY3]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p1>) = G_BUILD_VECTOR [[MV]](p1), [[MV1]](p1)
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(p3) = COPY $vgpr4
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(p3) = COPY $vgpr5
  ; CHECK-NEXT:   [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x p3>) = G_BUILD_VECTOR [[COPY4]](p3), [[COPY5]](p3)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<2 x p1>), [[DEF]](p1) :: (store (<2 x p1>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 16
  ; CHECK-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p1) = nuw inbounds G_PTR_ADD [[DEF]], [[C]](i64)
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR1]](<2 x p3>), [[PTR_ADD]](p1) :: (store (<2 x p3>) into `ptr addrspace(1) poison` + 16, align 16, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store { <2 x ptr addrspace(1)>, <2 x ptr addrspace(3)> } %arg, ptr addrspace(1) poison
  ret void
}

define void @void_func_i1_inreg(i1 inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i1_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i1) = G_TRUNC [[COPY]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[TRUNC]](i1), [[DEF]](p1) :: (store (i1) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i1 %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_i8_inreg(i8 inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i8_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[COPY]](i32)
  ; CHECK-NEXT:   [[TRUNC1:%[0-9]+]]:_(i8) = G_TRUNC [[TRUNC]](i16)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[TRUNC1]](i8), [[DEF]](p1) :: (store (i8) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i8 %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_i16_inreg(i16 inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i16_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[COPY]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[TRUNC]](i16), [[DEF]](p1) :: (store (i16) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i16 %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_i32_inreg(i32 inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i32_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[COPY]](i32), [[DEF]](p1) :: (store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i32 %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_i48_inreg(i48 inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i48_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $sgpr17
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i48) = G_TRUNC [[MV]](s64)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[TRUNC]](i48), [[DEF]](p1) :: (store (i48) into `ptr addrspace(1) poison`, align 8, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i48 %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_i64_inreg(i64 inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i64_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $sgpr17
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[MV]](i64), [[DEF]](p1) :: (store (i64) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i64 %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_i96_inreg(i96 inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i96_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17, $sgpr18
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $sgpr17
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $sgpr18
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(i96) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[MV]](i96), [[DEF]](p1) :: (store (i96) into `ptr addrspace(1) poison`, align 8, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i96 %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_i128_inreg(i128 inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_i128_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17, $sgpr18, $sgpr19
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $sgpr17
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $sgpr18
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $sgpr19
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(i128) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[MV]](i128), [[DEF]](p1) :: (store (i128) into `ptr addrspace(1) poison`, align 8, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store i128 %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_f16_inreg(half inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_f16_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[COPY]](i32)
  ; CHECK-NEXT:   [[BITCAST:%[0-9]+]]:_(f16) = G_BITCAST [[TRUNC]](i16)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BITCAST]](f16), [[DEF]](p1) :: (store (f16) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store half %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_bf16_inreg(bfloat inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_bf16_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[COPY]](i32)
  ; CHECK-NEXT:   [[BITCAST:%[0-9]+]]:_(bf16) = G_BITCAST [[TRUNC]](i16)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BITCAST]](bf16), [[DEF]](p1) :: (store (bf16) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store bfloat %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_f32_inreg(float inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_f32_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(f32) = COPY $sgpr16
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[COPY]](f32), [[DEF]](p1) :: (store (f32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store float %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_f64_inreg(double inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_f64_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $sgpr17
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[MV]](f64), [[DEF]](p1) :: (store (f64) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store double %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v2i1_inreg(<2 x i1> inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v2i1_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[COPY]](i32)
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $sgpr17
  ; CHECK-NEXT:   [[TRUNC1:%[0-9]+]]:_(i16) = G_TRUNC [[COPY1]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x i16>) = G_BUILD_VECTOR [[TRUNC]](i16), [[TRUNC1]](i16)
  ; CHECK-NEXT:   [[TRUNC2:%[0-9]+]]:_(<2 x i1>) = G_TRUNC [[BUILD_VECTOR]](<2 x i16>)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[TRUNC2]](<2 x i1>), [[DEF]](p1) :: (store (<2 x i1>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <2 x i1> %arg0, ptr addrspace(1) poison
  ret void
}


define void @void_func_v2i8_inreg(<2 x i8> inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v2i8_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[COPY]](i32)
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $sgpr17
  ; CHECK-NEXT:   [[TRUNC1:%[0-9]+]]:_(i16) = G_TRUNC [[COPY1]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x i16>) = G_BUILD_VECTOR [[TRUNC]](i16), [[TRUNC1]](i16)
  ; CHECK-NEXT:   [[TRUNC2:%[0-9]+]]:_(<2 x i8>) = G_TRUNC [[BUILD_VECTOR]](<2 x i16>)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[TRUNC2]](<2 x i8>), [[DEF]](p1) :: (store (<2 x i8>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <2 x i8> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v2i16_inreg(<2 x i16> inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v2i16_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<2 x i16>) = COPY $sgpr16
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[COPY]](<2 x i16>), [[DEF]](p1) :: (store (<2 x i16>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <2 x i16> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v2f16_inreg(<2 x half> inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v2f16_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<2 x f16>) = COPY $sgpr16
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[COPY]](<2 x f16>), [[DEF]](p1) :: (store (<2 x f16>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <2 x half> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v2bf16_inreg(<2 x bfloat> inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v2bf16_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<2 x bf16>) = COPY $sgpr16
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[COPY]](<2 x bf16>), [[DEF]](p1) :: (store (<2 x bf16>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <2 x bfloat> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v2i32_inreg(<2 x i32> inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v2i32_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $sgpr17
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<2 x i32>), [[DEF]](p1) :: (store (<2 x i32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <2 x i32> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v2f32_inreg(<2 x float> inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v2f32_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(f32) = COPY $sgpr16
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(f32) = COPY $sgpr17
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x f32>) = G_BUILD_VECTOR [[COPY]](f32), [[COPY1]](f32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<2 x f32>), [[DEF]](p1) :: (store (<2 x f32>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <2 x float> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v2i64_inreg(<2 x i64> inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v2i64_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17, $sgpr18, $sgpr19
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $sgpr17
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $sgpr18
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $sgpr19
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[MV1:%[0-9]+]]:_(i64) = G_MERGE_VALUES [[COPY2]](i32), [[COPY3]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x i64>) = G_BUILD_VECTOR [[MV]](i64), [[MV1]](i64)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<2 x i64>), [[DEF]](p1) :: (store (<2 x i64>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <2 x i64> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v2f64_inreg(<2 x double> inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v2f64_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17, $sgpr18, $sgpr19
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $sgpr17
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $sgpr18
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $sgpr19
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[MV1:%[0-9]+]]:_(f64) = G_MERGE_VALUES [[COPY2]](i32), [[COPY3]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x f64>) = G_BUILD_VECTOR [[MV]](f64), [[MV1]](f64)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<2 x f64>), [[DEF]](p1) :: (store (<2 x f64>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <2 x double> %arg0, ptr addrspace(1) poison
  ret void
}

; FIXME: Broken, see issue #78121
; define void @void_func_v2i128_inreg(<2 x i128> inreg %arg0) #0 {
;   store <2 x i128> %arg0, ptr addrspace(1) poison
;   ret void
; }

; define void @void_func_v2f128_inreg(<2 x fp128> inreg %arg0) #0 {
;   store <2 x fp128> %arg0, ptr addrspace(1) poison
;   ret void
; }

define void @void_func_p0_inreg(ptr inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_p0_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $sgpr17
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[MV]](p0), [[DEF]](p1) :: (store (p0) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store ptr %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_p1_inreg(ptr addrspace(1) inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_p1_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $sgpr17
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[MV]](p1), [[DEF]](p1) :: (store (p1) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store ptr addrspace(1) %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_p3_inreg(ptr addrspace(3) inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_p3_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(p3) = COPY $sgpr16
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[COPY]](p3), [[DEF]](p1) :: (store (p3) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store ptr addrspace(3) %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_p5_inreg(ptr addrspace(5) inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_p5_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(p5) = COPY $sgpr16
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[COPY]](p5), [[DEF]](p1) :: (store (p5) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store ptr addrspace(5) %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_p999_inreg(ptr addrspace(999) inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_p999_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $sgpr17
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(p999) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[MV]](p999), [[DEF]](p1) :: (store (p999) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store ptr addrspace(999) %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v2p0_inreg(<2 x ptr> inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v2p0_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17, $sgpr18, $sgpr19
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $sgpr17
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $sgpr18
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $sgpr19
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[MV1:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY2]](i32), [[COPY3]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p0>) = G_BUILD_VECTOR [[MV]](p0), [[MV1]](p0)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<2 x p0>), [[DEF]](p1) :: (store (<2 x p0>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <2 x ptr> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v2p1_inreg(<2 x ptr addrspace(1)> inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v2p1_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17, $sgpr18, $sgpr19
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $sgpr17
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $sgpr18
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $sgpr19
  ; CHECK-NEXT:   [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](i32), [[COPY1]](i32)
  ; CHECK-NEXT:   [[MV1:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY2]](i32), [[COPY3]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p1>) = G_BUILD_VECTOR [[MV]](p1), [[MV1]](p1)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<2 x p1>), [[DEF]](p1) :: (store (<2 x p1>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <2 x ptr addrspace(1)> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_func_v2p3_inreg(<2 x ptr addrspace(3)> inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_func_v2p3_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(p3) = COPY $sgpr16
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(p3) = COPY $sgpr17
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p3>) = G_BUILD_VECTOR [[COPY]](p3), [[COPY1]](p3)
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   G_STORE [[BUILD_VECTOR]](<2 x p3>), [[DEF]](p1) :: (store (<2 x p3>) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  store <2 x ptr addrspace(3)> %arg0, ptr addrspace(1) poison
  ret void
}

define void @void_readlane_i1_signext_inreg(<15 x i32> inreg %arg1, i1 inreg signext %arg0) #0 {
  ; CHECK-LABEL: name: void_readlane_i1_signext_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $sgpr17
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $sgpr18
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $sgpr19
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $sgpr20
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $sgpr21
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $sgpr22
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $sgpr23
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $sgpr24
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $sgpr25
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $sgpr26
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $sgpr27
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $sgpr28
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $sgpr29
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[INTRINSIC_CONVERGENT:%[0-9]+]]:_(i32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), [[COPY14]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<15 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32), [[COPY5]](i32), [[COPY6]](i32), [[COPY7]](i32), [[COPY8]](i32), [[COPY9]](i32), [[COPY10]](i32), [[COPY11]](i32), [[COPY12]](i32), [[COPY13]](i32), [[INTRINSIC_CONVERGENT]](i32)
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[INTRINSIC_CONVERGENT1:%[0-9]+]]:_(i32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), [[COPY15]](i32)
  ; CHECK-NEXT:   [[ASSERT_SEXT:%[0-9]+]]:_(i32) = G_ASSERT_SEXT [[INTRINSIC_CONVERGENT1]], 1
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i1) = G_TRUNC [[ASSERT_SEXT]](i32)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 12
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[SEXT:%[0-9]+]]:_(i32) = G_SEXT [[TRUNC]](i1)
  ; CHECK-NEXT:   [[ADD:%[0-9]+]]:_(i32) = G_ADD [[SEXT]], [[C]]
  ; CHECK-NEXT:   G_STORE [[ADD]](i32), [[DEF]](p1) :: (store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  %ext = sext i1 %arg0 to i32
  %add = add i32 %ext, 12
  store i32 %add, ptr addrspace(1) poison
  ret void
}

define void @void_readlane_i1_zeroext_inreg(<15 x i32> inreg %arg1, i1 inreg zeroext %arg0) #0 {
  ; CHECK-LABEL: name: void_readlane_i1_zeroext_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $sgpr17
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $sgpr18
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $sgpr19
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $sgpr20
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $sgpr21
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $sgpr22
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $sgpr23
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $sgpr24
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $sgpr25
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $sgpr26
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $sgpr27
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $sgpr28
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $sgpr29
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[INTRINSIC_CONVERGENT:%[0-9]+]]:_(i32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), [[COPY14]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<15 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32), [[COPY5]](i32), [[COPY6]](i32), [[COPY7]](i32), [[COPY8]](i32), [[COPY9]](i32), [[COPY10]](i32), [[COPY11]](i32), [[COPY12]](i32), [[COPY13]](i32), [[INTRINSIC_CONVERGENT]](i32)
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[INTRINSIC_CONVERGENT1:%[0-9]+]]:_(i32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), [[COPY15]](i32)
  ; CHECK-NEXT:   [[ASSERT_ZEXT:%[0-9]+]]:_(i32) = G_ASSERT_ZEXT [[INTRINSIC_CONVERGENT1]], 1
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i1) = G_TRUNC [[ASSERT_ZEXT]](i32)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 12
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[ZEXT:%[0-9]+]]:_(i32) = G_ZEXT [[TRUNC]](i1)
  ; CHECK-NEXT:   [[ADD:%[0-9]+]]:_(i32) = G_ADD [[ZEXT]], [[C]]
  ; CHECK-NEXT:   G_STORE [[ADD]](i32), [[DEF]](p1) :: (store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  %ext = zext i1 %arg0 to i32
  %add = add i32 %ext, 12
  store i32 %add, ptr addrspace(1) poison
  ret void
}


define void @void_readlane_i8_signext_inreg(<15 x i32> inreg %arg1, i8 inreg signext %arg0) #0 {
  ; CHECK-LABEL: name: void_readlane_i8_signext_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $sgpr17
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $sgpr18
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $sgpr19
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $sgpr20
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $sgpr21
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $sgpr22
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $sgpr23
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $sgpr24
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $sgpr25
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $sgpr26
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $sgpr27
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $sgpr28
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $sgpr29
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[INTRINSIC_CONVERGENT:%[0-9]+]]:_(i32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), [[COPY14]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<15 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32), [[COPY5]](i32), [[COPY6]](i32), [[COPY7]](i32), [[COPY8]](i32), [[COPY9]](i32), [[COPY10]](i32), [[COPY11]](i32), [[COPY12]](i32), [[COPY13]](i32), [[INTRINSIC_CONVERGENT]](i32)
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[INTRINSIC_CONVERGENT1:%[0-9]+]]:_(i32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), [[COPY15]](i32)
  ; CHECK-NEXT:   [[ASSERT_SEXT:%[0-9]+]]:_(i32) = G_ASSERT_SEXT [[INTRINSIC_CONVERGENT1]], 8
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i8) = G_TRUNC [[ASSERT_SEXT]](i32)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 12
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[SEXT:%[0-9]+]]:_(i32) = G_SEXT [[TRUNC]](i8)
  ; CHECK-NEXT:   [[ADD:%[0-9]+]]:_(i32) = G_ADD [[SEXT]], [[C]]
  ; CHECK-NEXT:   G_STORE [[ADD]](i32), [[DEF]](p1) :: (store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  %ext = sext i8 %arg0 to i32
  %add = add i32 %ext, 12
  store i32 %add, ptr addrspace(1) poison
  ret void
}

define void @void_readlane_i8_zeroext_inreg(<15 x i32> inreg %arg1, i8 inreg zeroext %arg0) #0 {
  ; CHECK-LABEL: name: void_readlane_i8_zeroext_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $sgpr17
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $sgpr18
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $sgpr19
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $sgpr20
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $sgpr21
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $sgpr22
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $sgpr23
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $sgpr24
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $sgpr25
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $sgpr26
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $sgpr27
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $sgpr28
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $sgpr29
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[INTRINSIC_CONVERGENT:%[0-9]+]]:_(i32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), [[COPY14]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<15 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32), [[COPY5]](i32), [[COPY6]](i32), [[COPY7]](i32), [[COPY8]](i32), [[COPY9]](i32), [[COPY10]](i32), [[COPY11]](i32), [[COPY12]](i32), [[COPY13]](i32), [[INTRINSIC_CONVERGENT]](i32)
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[INTRINSIC_CONVERGENT1:%[0-9]+]]:_(i32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), [[COPY15]](i32)
  ; CHECK-NEXT:   [[ASSERT_ZEXT:%[0-9]+]]:_(i32) = G_ASSERT_ZEXT [[INTRINSIC_CONVERGENT1]], 8
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i8) = G_TRUNC [[ASSERT_ZEXT]](i32)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 12
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[ZEXT:%[0-9]+]]:_(i32) = G_ZEXT [[TRUNC]](i8)
  ; CHECK-NEXT:   [[ADD:%[0-9]+]]:_(i32) = G_ADD [[ZEXT]], [[C]]
  ; CHECK-NEXT:   G_STORE [[ADD]](i32), [[DEF]](p1) :: (store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  %ext = zext i8 %arg0 to i32
  %add = add i32 %ext, 12
  store i32 %add, ptr addrspace(1) poison
  ret void
}


define void @void_readlane_i16_signext_inreg(<15 x i32> inreg %arg1, i16 inreg signext %arg0) #0 {
  ; CHECK-LABEL: name: void_readlane_i16_signext_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $sgpr17
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $sgpr18
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $sgpr19
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $sgpr20
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $sgpr21
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $sgpr22
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $sgpr23
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $sgpr24
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $sgpr25
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $sgpr26
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $sgpr27
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $sgpr28
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $sgpr29
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[INTRINSIC_CONVERGENT:%[0-9]+]]:_(i32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), [[COPY14]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<15 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32), [[COPY5]](i32), [[COPY6]](i32), [[COPY7]](i32), [[COPY8]](i32), [[COPY9]](i32), [[COPY10]](i32), [[COPY11]](i32), [[COPY12]](i32), [[COPY13]](i32), [[INTRINSIC_CONVERGENT]](i32)
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[INTRINSIC_CONVERGENT1:%[0-9]+]]:_(i32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), [[COPY15]](i32)
  ; CHECK-NEXT:   [[ASSERT_SEXT:%[0-9]+]]:_(i32) = G_ASSERT_SEXT [[INTRINSIC_CONVERGENT1]], 16
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[ASSERT_SEXT]](i32)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 12
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[SEXT:%[0-9]+]]:_(i32) = G_SEXT [[TRUNC]](i16)
  ; CHECK-NEXT:   [[ADD:%[0-9]+]]:_(i32) = G_ADD [[SEXT]], [[C]]
  ; CHECK-NEXT:   G_STORE [[ADD]](i32), [[DEF]](p1) :: (store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  %ext = sext i16 %arg0 to i32
  %add = add i32 %ext, 12
  store i32 %add, ptr addrspace(1) poison
  ret void
}

define void @void_readlane_i16_zeroext_inreg(<15 x i32> inreg %arg1, i16 inreg zeroext %arg0) #0 {
  ; CHECK-LABEL: name: void_readlane_i16_zeroext_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $sgpr17
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $sgpr18
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $sgpr19
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $sgpr20
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $sgpr21
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $sgpr22
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $sgpr23
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $sgpr24
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $sgpr25
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $sgpr26
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $sgpr27
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $sgpr28
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $sgpr29
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[INTRINSIC_CONVERGENT:%[0-9]+]]:_(i32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), [[COPY14]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<15 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32), [[COPY5]](i32), [[COPY6]](i32), [[COPY7]](i32), [[COPY8]](i32), [[COPY9]](i32), [[COPY10]](i32), [[COPY11]](i32), [[COPY12]](i32), [[COPY13]](i32), [[INTRINSIC_CONVERGENT]](i32)
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[INTRINSIC_CONVERGENT1:%[0-9]+]]:_(i32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), [[COPY15]](i32)
  ; CHECK-NEXT:   [[ASSERT_ZEXT:%[0-9]+]]:_(i32) = G_ASSERT_ZEXT [[INTRINSIC_CONVERGENT1]], 16
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[ASSERT_ZEXT]](i32)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 12
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[ZEXT:%[0-9]+]]:_(i32) = G_ZEXT [[TRUNC]](i16)
  ; CHECK-NEXT:   [[ADD:%[0-9]+]]:_(i32) = G_ADD [[ZEXT]], [[C]]
  ; CHECK-NEXT:   G_STORE [[ADD]](i32), [[DEF]](p1) :: (store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  %ext = zext i16 %arg0 to i32
  %add = add i32 %ext, 12
  store i32 %add, ptr addrspace(1) poison
  ret void
}

define void @void_readlane_halfinreg_bitcast_inreg(<15 x i32> inreg %arg1, half inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_readlane_halfinreg_bitcast_inreg
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $sgpr17
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $sgpr18
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $sgpr19
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $sgpr20
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $sgpr21
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $sgpr22
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $sgpr23
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $sgpr24
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $sgpr25
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $sgpr26
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $sgpr27
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $sgpr28
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $sgpr29
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[INTRINSIC_CONVERGENT:%[0-9]+]]:_(i32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), [[COPY14]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<15 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32), [[COPY5]](i32), [[COPY6]](i32), [[COPY7]](i32), [[COPY8]](i32), [[COPY9]](i32), [[COPY10]](i32), [[COPY11]](i32), [[COPY12]](i32), [[COPY13]](i32), [[INTRINSIC_CONVERGENT]](i32)
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[INTRINSIC_CONVERGENT1:%[0-9]+]]:_(i32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), [[COPY15]](i32)
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[INTRINSIC_CONVERGENT1]](i32)
  ; CHECK-NEXT:   [[BITCAST:%[0-9]+]]:_(f16) = G_BITCAST [[TRUNC]](i16)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 12
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[BITCAST1:%[0-9]+]]:_(i16) = G_BITCAST [[BITCAST]](f16)
  ; CHECK-NEXT:   [[ZEXT:%[0-9]+]]:_(i32) = G_ZEXT [[BITCAST1]](i16)
  ; CHECK-NEXT:   [[ADD:%[0-9]+]]:_(i32) = G_ADD [[ZEXT]], [[C]]
  ; CHECK-NEXT:   G_STORE [[ADD]](i32), [[DEF]](p1) :: (store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  %cast = bitcast half %arg0 to i16
  %ext = zext i16 %cast to i32
  %add = add i32 %ext, 12
  store i32 %add, ptr addrspace(1) poison
  ret void
}

define void @void_readlane_bfloat_inreg_bitcast_zext(<15 x i32> inreg %arg1, bfloat inreg %arg0) #0 {
  ; CHECK-LABEL: name: void_readlane_bfloat_inreg_bitcast_zext
  ; CHECK: bb.1 (%ir-block.0):
  ; CHECK-NEXT:   liveins: $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(i32) = COPY $sgpr16
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(i32) = COPY $sgpr17
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(i32) = COPY $sgpr18
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(i32) = COPY $sgpr19
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(i32) = COPY $sgpr20
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(i32) = COPY $sgpr21
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(i32) = COPY $sgpr22
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:_(i32) = COPY $sgpr23
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:_(i32) = COPY $sgpr24
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:_(i32) = COPY $sgpr25
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:_(i32) = COPY $sgpr26
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:_(i32) = COPY $sgpr27
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:_(i32) = COPY $sgpr28
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:_(i32) = COPY $sgpr29
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:_(i32) = COPY $vgpr0
  ; CHECK-NEXT:   [[INTRINSIC_CONVERGENT:%[0-9]+]]:_(i32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), [[COPY14]](i32)
  ; CHECK-NEXT:   [[BUILD_VECTOR:%[0-9]+]]:_(<15 x i32>) = G_BUILD_VECTOR [[COPY]](i32), [[COPY1]](i32), [[COPY2]](i32), [[COPY3]](i32), [[COPY4]](i32), [[COPY5]](i32), [[COPY6]](i32), [[COPY7]](i32), [[COPY8]](i32), [[COPY9]](i32), [[COPY10]](i32), [[COPY11]](i32), [[COPY12]](i32), [[COPY13]](i32), [[INTRINSIC_CONVERGENT]](i32)
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:_(i32) = COPY $vgpr1
  ; CHECK-NEXT:   [[INTRINSIC_CONVERGENT1:%[0-9]+]]:_(i32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), [[COPY15]](i32)
  ; CHECK-NEXT:   [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[INTRINSIC_CONVERGENT1]](i32)
  ; CHECK-NEXT:   [[BITCAST:%[0-9]+]]:_(bf16) = G_BITCAST [[TRUNC]](i16)
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 12
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
  ; CHECK-NEXT:   [[BITCAST1:%[0-9]+]]:_(i16) = G_BITCAST [[BITCAST]](bf16)
  ; CHECK-NEXT:   [[ZEXT:%[0-9]+]]:_(i32) = G_ZEXT [[BITCAST1]](i16)
  ; CHECK-NEXT:   [[ADD:%[0-9]+]]:_(i32) = G_ADD [[ZEXT]], [[C]]
  ; CHECK-NEXT:   G_STORE [[ADD]](i32), [[DEF]](p1) :: (store (i32) into `ptr addrspace(1) poison`, addrspace 1)
  ; CHECK-NEXT:   SI_RETURN
  %cast = bitcast bfloat %arg0 to i16
  %ext = zext i16 %cast to i32
  %add = add i32 %ext, 12
  store i32 %add, ptr addrspace(1) poison
  ret void
}

attributes #0 = { nounwind }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 400}