blob: 526ed7c72f73f57450d26aaa0f6aec172502add9 [file] [log] [blame]
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-X64
; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-X86
; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-MSVC64
; RUN: llc < %s -mtriple=i686-pc-windows-msvc -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-MSVC32
; RUN: llc < %s -mtriple=x86_64-pc-windows-gnu -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-MINGW
define fp128 @return(ptr %p) {
; CHECK-X64-LABEL: return:
; CHECK-X64: # %bb.0:
; CHECK-X64-NEXT: movaps (%rdi), %xmm0
; CHECK-X64-NEXT: retq
;
; CHECK-X86-LABEL: return:
; CHECK-X86: # %bb.0:
; CHECK-X86-NEXT: pushl %edi
; CHECK-X86-NEXT: .cfi_def_cfa_offset 8
; CHECK-X86-NEXT: pushl %esi
; CHECK-X86-NEXT: .cfi_def_cfa_offset 12
; CHECK-X86-NEXT: .cfi_offset %esi, -12
; CHECK-X86-NEXT: .cfi_offset %edi, -8
; CHECK-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-X86-NEXT: movl (%ecx), %edx
; CHECK-X86-NEXT: movl 4(%ecx), %esi
; CHECK-X86-NEXT: movl 8(%ecx), %edi
; CHECK-X86-NEXT: movl 12(%ecx), %ecx
; CHECK-X86-NEXT: movl %ecx, 12(%eax)
; CHECK-X86-NEXT: movl %edi, 8(%eax)
; CHECK-X86-NEXT: movl %esi, 4(%eax)
; CHECK-X86-NEXT: movl %edx, (%eax)
; CHECK-X86-NEXT: popl %esi
; CHECK-X86-NEXT: .cfi_def_cfa_offset 8
; CHECK-X86-NEXT: popl %edi
; CHECK-X86-NEXT: .cfi_def_cfa_offset 4
; CHECK-X86-NEXT: retl $4
;
; CHECK-MSVC64-LABEL: return:
; CHECK-MSVC64: # %bb.0:
; CHECK-MSVC64-NEXT: movaps (%rcx), %xmm0
; CHECK-MSVC64-NEXT: retq
;
; CHECK-MSVC32-LABEL: return:
; CHECK-MSVC32: # %bb.0:
; CHECK-MSVC32-NEXT: pushl %edi
; CHECK-MSVC32-NEXT: pushl %esi
; CHECK-MSVC32-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-MSVC32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-MSVC32-NEXT: movl (%ecx), %edx
; CHECK-MSVC32-NEXT: movl 4(%ecx), %esi
; CHECK-MSVC32-NEXT: movl 8(%ecx), %edi
; CHECK-MSVC32-NEXT: movl 12(%ecx), %ecx
; CHECK-MSVC32-NEXT: movl %ecx, 12(%eax)
; CHECK-MSVC32-NEXT: movl %edi, 8(%eax)
; CHECK-MSVC32-NEXT: movl %esi, 4(%eax)
; CHECK-MSVC32-NEXT: movl %edx, (%eax)
; CHECK-MSVC32-NEXT: popl %esi
; CHECK-MSVC32-NEXT: popl %edi
; CHECK-MSVC32-NEXT: retl
;
; CHECK-MINGW-LABEL: return:
; CHECK-MINGW: # %bb.0:
; CHECK-MINGW-NEXT: movaps (%rcx), %xmm0
; CHECK-MINGW-NEXT: retq
%r = load fp128, ptr %p, align 16
ret fp128 %r
}
define fp128 @first_arg(fp128 %x) {
; CHECK-X64-LABEL: first_arg:
; CHECK-X64: # %bb.0:
; CHECK-X64-NEXT: retq
;
; CHECK-X86-LABEL: first_arg:
; CHECK-X86: # %bb.0:
; CHECK-X86-NEXT: pushl %edi
; CHECK-X86-NEXT: .cfi_def_cfa_offset 8
; CHECK-X86-NEXT: pushl %esi
; CHECK-X86-NEXT: .cfi_def_cfa_offset 12
; CHECK-X86-NEXT: .cfi_offset %esi, -12
; CHECK-X86-NEXT: .cfi_offset %edi, -8
; CHECK-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; CHECK-X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; CHECK-X86-NEXT: movl %edi, 12(%eax)
; CHECK-X86-NEXT: movl %esi, 8(%eax)
; CHECK-X86-NEXT: movl %edx, 4(%eax)
; CHECK-X86-NEXT: movl %ecx, (%eax)
; CHECK-X86-NEXT: popl %esi
; CHECK-X86-NEXT: .cfi_def_cfa_offset 8
; CHECK-X86-NEXT: popl %edi
; CHECK-X86-NEXT: .cfi_def_cfa_offset 4
; CHECK-X86-NEXT: retl $4
;
; CHECK-MSVC64-LABEL: first_arg:
; CHECK-MSVC64: # %bb.0:
; CHECK-MSVC64-NEXT: movaps (%rcx), %xmm0
; CHECK-MSVC64-NEXT: retq
;
; CHECK-MSVC32-LABEL: first_arg:
; CHECK-MSVC32: # %bb.0:
; CHECK-MSVC32-NEXT: pushl %edi
; CHECK-MSVC32-NEXT: pushl %esi
; CHECK-MSVC32-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-MSVC32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-MSVC32-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-MSVC32-NEXT: movl {{[0-9]+}}(%esp), %esi
; CHECK-MSVC32-NEXT: movl {{[0-9]+}}(%esp), %edi
; CHECK-MSVC32-NEXT: movl %edi, 12(%eax)
; CHECK-MSVC32-NEXT: movl %esi, 8(%eax)
; CHECK-MSVC32-NEXT: movl %edx, 4(%eax)
; CHECK-MSVC32-NEXT: movl %ecx, (%eax)
; CHECK-MSVC32-NEXT: popl %esi
; CHECK-MSVC32-NEXT: popl %edi
; CHECK-MSVC32-NEXT: retl
;
; CHECK-MINGW-LABEL: first_arg:
; CHECK-MINGW: # %bb.0:
; CHECK-MINGW-NEXT: movaps (%rcx), %xmm0
; CHECK-MINGW-NEXT: retq
ret fp128 %x
}
define fp128 @leading_args(i64 %_0, i64 %_1, i64 %_2, i64 %_3, fp128 %x) {
; CHECK-X64-LABEL: leading_args:
; CHECK-X64: # %bb.0:
; CHECK-X64-NEXT: retq
;
; CHECK-X86-LABEL: leading_args:
; CHECK-X86: # %bb.0:
; CHECK-X86-NEXT: pushl %edi
; CHECK-X86-NEXT: .cfi_def_cfa_offset 8
; CHECK-X86-NEXT: pushl %esi
; CHECK-X86-NEXT: .cfi_def_cfa_offset 12
; CHECK-X86-NEXT: .cfi_offset %esi, -12
; CHECK-X86-NEXT: .cfi_offset %edi, -8
; CHECK-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; CHECK-X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; CHECK-X86-NEXT: movl %edi, 12(%eax)
; CHECK-X86-NEXT: movl %esi, 8(%eax)
; CHECK-X86-NEXT: movl %edx, 4(%eax)
; CHECK-X86-NEXT: movl %ecx, (%eax)
; CHECK-X86-NEXT: popl %esi
; CHECK-X86-NEXT: .cfi_def_cfa_offset 8
; CHECK-X86-NEXT: popl %edi
; CHECK-X86-NEXT: .cfi_def_cfa_offset 4
; CHECK-X86-NEXT: retl $4
;
; CHECK-MSVC64-LABEL: leading_args:
; CHECK-MSVC64: # %bb.0:
; CHECK-MSVC64-NEXT: movq {{[0-9]+}}(%rsp), %rax
; CHECK-MSVC64-NEXT: movaps (%rax), %xmm0
; CHECK-MSVC64-NEXT: retq
;
; CHECK-MSVC32-LABEL: leading_args:
; CHECK-MSVC32: # %bb.0:
; CHECK-MSVC32-NEXT: pushl %edi
; CHECK-MSVC32-NEXT: pushl %esi
; CHECK-MSVC32-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-MSVC32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-MSVC32-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-MSVC32-NEXT: movl {{[0-9]+}}(%esp), %esi
; CHECK-MSVC32-NEXT: movl {{[0-9]+}}(%esp), %edi
; CHECK-MSVC32-NEXT: movl %edi, 12(%eax)
; CHECK-MSVC32-NEXT: movl %esi, 8(%eax)
; CHECK-MSVC32-NEXT: movl %edx, 4(%eax)
; CHECK-MSVC32-NEXT: movl %ecx, (%eax)
; CHECK-MSVC32-NEXT: popl %esi
; CHECK-MSVC32-NEXT: popl %edi
; CHECK-MSVC32-NEXT: retl
;
; CHECK-MINGW-LABEL: leading_args:
; CHECK-MINGW: # %bb.0:
; CHECK-MINGW-NEXT: movq {{[0-9]+}}(%rsp), %rax
; CHECK-MINGW-NEXT: movaps (%rax), %xmm0
; CHECK-MINGW-NEXT: retq
ret fp128 %x
}
define fp128 @many_leading_args(i64 %_0, i64 %_1, i64 %_2, i64 %_3, i64 %_4, fp128 %_5, fp128 %x) {
; CHECK-X64-LABEL: many_leading_args:
; CHECK-X64: # %bb.0:
; CHECK-X64-NEXT: movaps %xmm1, %xmm0
; CHECK-X64-NEXT: retq
;
; CHECK-X86-LABEL: many_leading_args:
; CHECK-X86: # %bb.0:
; CHECK-X86-NEXT: pushl %edi
; CHECK-X86-NEXT: .cfi_def_cfa_offset 8
; CHECK-X86-NEXT: pushl %esi
; CHECK-X86-NEXT: .cfi_def_cfa_offset 12
; CHECK-X86-NEXT: .cfi_offset %esi, -12
; CHECK-X86-NEXT: .cfi_offset %edi, -8
; CHECK-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; CHECK-X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; CHECK-X86-NEXT: movl %edi, 12(%eax)
; CHECK-X86-NEXT: movl %esi, 8(%eax)
; CHECK-X86-NEXT: movl %edx, 4(%eax)
; CHECK-X86-NEXT: movl %ecx, (%eax)
; CHECK-X86-NEXT: popl %esi
; CHECK-X86-NEXT: .cfi_def_cfa_offset 8
; CHECK-X86-NEXT: popl %edi
; CHECK-X86-NEXT: .cfi_def_cfa_offset 4
; CHECK-X86-NEXT: retl $4
;
; CHECK-MSVC64-LABEL: many_leading_args:
; CHECK-MSVC64: # %bb.0:
; CHECK-MSVC64-NEXT: movq {{[0-9]+}}(%rsp), %rax
; CHECK-MSVC64-NEXT: movaps (%rax), %xmm0
; CHECK-MSVC64-NEXT: retq
;
; CHECK-MSVC32-LABEL: many_leading_args:
; CHECK-MSVC32: # %bb.0:
; CHECK-MSVC32-NEXT: pushl %edi
; CHECK-MSVC32-NEXT: pushl %esi
; CHECK-MSVC32-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-MSVC32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-MSVC32-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-MSVC32-NEXT: movl {{[0-9]+}}(%esp), %esi
; CHECK-MSVC32-NEXT: movl {{[0-9]+}}(%esp), %edi
; CHECK-MSVC32-NEXT: movl %edi, 12(%eax)
; CHECK-MSVC32-NEXT: movl %esi, 8(%eax)
; CHECK-MSVC32-NEXT: movl %edx, 4(%eax)
; CHECK-MSVC32-NEXT: movl %ecx, (%eax)
; CHECK-MSVC32-NEXT: popl %esi
; CHECK-MSVC32-NEXT: popl %edi
; CHECK-MSVC32-NEXT: retl
;
; CHECK-MINGW-LABEL: many_leading_args:
; CHECK-MINGW: # %bb.0:
; CHECK-MINGW-NEXT: movq {{[0-9]+}}(%rsp), %rax
; CHECK-MINGW-NEXT: movaps (%rax), %xmm0
; CHECK-MINGW-NEXT: retq
ret fp128 %x
}
define fp128 @trailing_arg(i64 %_0, i64 %_1, i64 %_2, i64 %_3, i64 %_4, fp128 %x, i64 %_5) {
; CHECK-X64-LABEL: trailing_arg:
; CHECK-X64: # %bb.0:
; CHECK-X64-NEXT: retq
;
; CHECK-X86-LABEL: trailing_arg:
; CHECK-X86: # %bb.0:
; CHECK-X86-NEXT: pushl %edi
; CHECK-X86-NEXT: .cfi_def_cfa_offset 8
; CHECK-X86-NEXT: pushl %esi
; CHECK-X86-NEXT: .cfi_def_cfa_offset 12
; CHECK-X86-NEXT: .cfi_offset %esi, -12
; CHECK-X86-NEXT: .cfi_offset %edi, -8
; CHECK-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; CHECK-X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; CHECK-X86-NEXT: movl %edi, 12(%eax)
; CHECK-X86-NEXT: movl %esi, 8(%eax)
; CHECK-X86-NEXT: movl %edx, 4(%eax)
; CHECK-X86-NEXT: movl %ecx, (%eax)
; CHECK-X86-NEXT: popl %esi
; CHECK-X86-NEXT: .cfi_def_cfa_offset 8
; CHECK-X86-NEXT: popl %edi
; CHECK-X86-NEXT: .cfi_def_cfa_offset 4
; CHECK-X86-NEXT: retl $4
;
; CHECK-MSVC64-LABEL: trailing_arg:
; CHECK-MSVC64: # %bb.0:
; CHECK-MSVC64-NEXT: movq {{[0-9]+}}(%rsp), %rax
; CHECK-MSVC64-NEXT: movaps (%rax), %xmm0
; CHECK-MSVC64-NEXT: retq
;
; CHECK-MSVC32-LABEL: trailing_arg:
; CHECK-MSVC32: # %bb.0:
; CHECK-MSVC32-NEXT: pushl %edi
; CHECK-MSVC32-NEXT: pushl %esi
; CHECK-MSVC32-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-MSVC32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-MSVC32-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-MSVC32-NEXT: movl {{[0-9]+}}(%esp), %esi
; CHECK-MSVC32-NEXT: movl {{[0-9]+}}(%esp), %edi
; CHECK-MSVC32-NEXT: movl %edi, 12(%eax)
; CHECK-MSVC32-NEXT: movl %esi, 8(%eax)
; CHECK-MSVC32-NEXT: movl %edx, 4(%eax)
; CHECK-MSVC32-NEXT: movl %ecx, (%eax)
; CHECK-MSVC32-NEXT: popl %esi
; CHECK-MSVC32-NEXT: popl %edi
; CHECK-MSVC32-NEXT: retl
;
; CHECK-MINGW-LABEL: trailing_arg:
; CHECK-MINGW: # %bb.0:
; CHECK-MINGW-NEXT: movq {{[0-9]+}}(%rsp), %rax
; CHECK-MINGW-NEXT: movaps (%rax), %xmm0
; CHECK-MINGW-NEXT: retq
ret fp128 %x
}
define void @call_first_arg(fp128 %x) nounwind {
; CHECK-X64-LABEL: call_first_arg:
; CHECK-X64: # %bb.0:
; CHECK-X64-NEXT: pushq %rax
; CHECK-X64-NEXT: callq first_arg@PLT
; CHECK-X64-NEXT: popq %rax
; CHECK-X64-NEXT: retq
;
; CHECK-X86-LABEL: call_first_arg:
; CHECK-X86: # %bb.0:
; CHECK-X86-NEXT: subl $40, %esp
; CHECK-X86-NEXT: leal {{[0-9]+}}(%esp), %eax
; CHECK-X86-NEXT: pushl {{[0-9]+}}(%esp)
; CHECK-X86-NEXT: pushl {{[0-9]+}}(%esp)
; CHECK-X86-NEXT: pushl {{[0-9]+}}(%esp)
; CHECK-X86-NEXT: pushl {{[0-9]+}}(%esp)
; CHECK-X86-NEXT: pushl %eax
; CHECK-X86-NEXT: calll first_arg@PLT
; CHECK-X86-NEXT: addl $56, %esp
; CHECK-X86-NEXT: retl
;
; CHECK-MSVC64-LABEL: call_first_arg:
; CHECK-MSVC64: # %bb.0:
; CHECK-MSVC64-NEXT: subq $56, %rsp
; CHECK-MSVC64-NEXT: movaps (%rcx), %xmm0
; CHECK-MSVC64-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp)
; CHECK-MSVC64-NEXT: leaq {{[0-9]+}}(%rsp), %rcx
; CHECK-MSVC64-NEXT: callq first_arg
; CHECK-MSVC64-NEXT: addq $56, %rsp
; CHECK-MSVC64-NEXT: retq
;
; CHECK-MSVC32-LABEL: call_first_arg:
; CHECK-MSVC32: # %bb.0:
; CHECK-MSVC32-NEXT: pushl %ebp
; CHECK-MSVC32-NEXT: movl %esp, %ebp
; CHECK-MSVC32-NEXT: andl $-16, %esp
; CHECK-MSVC32-NEXT: subl $32, %esp
; CHECK-MSVC32-NEXT: movl %esp, %eax
; CHECK-MSVC32-NEXT: pushl 20(%ebp)
; CHECK-MSVC32-NEXT: pushl 16(%ebp)
; CHECK-MSVC32-NEXT: pushl 12(%ebp)
; CHECK-MSVC32-NEXT: pushl 8(%ebp)
; CHECK-MSVC32-NEXT: pushl %eax
; CHECK-MSVC32-NEXT: calll _first_arg
; CHECK-MSVC32-NEXT: addl $20, %esp
; CHECK-MSVC32-NEXT: movl %ebp, %esp
; CHECK-MSVC32-NEXT: popl %ebp
; CHECK-MSVC32-NEXT: retl
;
; CHECK-MINGW-LABEL: call_first_arg:
; CHECK-MINGW: # %bb.0:
; CHECK-MINGW-NEXT: subq $56, %rsp
; CHECK-MINGW-NEXT: movaps (%rcx), %xmm0
; CHECK-MINGW-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp)
; CHECK-MINGW-NEXT: leaq {{[0-9]+}}(%rsp), %rcx
; CHECK-MINGW-NEXT: callq first_arg
; CHECK-MINGW-NEXT: addq $56, %rsp
; CHECK-MINGW-NEXT: retq
call i128 @first_arg(fp128 %x)
ret void
}
define void @call_leading_args(fp128 %x) nounwind {
; CHECK-X64-LABEL: call_leading_args:
; CHECK-X64: # %bb.0:
; CHECK-X64-NEXT: pushq %rax
; CHECK-X64-NEXT: xorl %edi, %edi
; CHECK-X64-NEXT: xorl %esi, %esi
; CHECK-X64-NEXT: xorl %edx, %edx
; CHECK-X64-NEXT: xorl %ecx, %ecx
; CHECK-X64-NEXT: callq leading_args@PLT
; CHECK-X64-NEXT: popq %rax
; CHECK-X64-NEXT: retq
;
; CHECK-X86-LABEL: call_leading_args:
; CHECK-X86: # %bb.0:
; CHECK-X86-NEXT: subl $40, %esp
; CHECK-X86-NEXT: leal {{[0-9]+}}(%esp), %eax
; CHECK-X86-NEXT: pushl {{[0-9]+}}(%esp)
; CHECK-X86-NEXT: pushl {{[0-9]+}}(%esp)
; CHECK-X86-NEXT: pushl {{[0-9]+}}(%esp)
; CHECK-X86-NEXT: pushl {{[0-9]+}}(%esp)
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl %eax
; CHECK-X86-NEXT: calll leading_args@PLT
; CHECK-X86-NEXT: addl $88, %esp
; CHECK-X86-NEXT: retl
;
; CHECK-MSVC64-LABEL: call_leading_args:
; CHECK-MSVC64: # %bb.0:
; CHECK-MSVC64-NEXT: subq $72, %rsp
; CHECK-MSVC64-NEXT: movaps (%rcx), %xmm0
; CHECK-MSVC64-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp)
; CHECK-MSVC64-NEXT: leaq {{[0-9]+}}(%rsp), %rax
; CHECK-MSVC64-NEXT: movq %rax, {{[0-9]+}}(%rsp)
; CHECK-MSVC64-NEXT: xorl %ecx, %ecx
; CHECK-MSVC64-NEXT: xorl %edx, %edx
; CHECK-MSVC64-NEXT: xorl %r8d, %r8d
; CHECK-MSVC64-NEXT: xorl %r9d, %r9d
; CHECK-MSVC64-NEXT: callq leading_args
; CHECK-MSVC64-NEXT: addq $72, %rsp
; CHECK-MSVC64-NEXT: retq
;
; CHECK-MSVC32-LABEL: call_leading_args:
; CHECK-MSVC32: # %bb.0:
; CHECK-MSVC32-NEXT: pushl %ebp
; CHECK-MSVC32-NEXT: movl %esp, %ebp
; CHECK-MSVC32-NEXT: andl $-16, %esp
; CHECK-MSVC32-NEXT: subl $32, %esp
; CHECK-MSVC32-NEXT: movl %esp, %eax
; CHECK-MSVC32-NEXT: pushl 20(%ebp)
; CHECK-MSVC32-NEXT: pushl 16(%ebp)
; CHECK-MSVC32-NEXT: pushl 12(%ebp)
; CHECK-MSVC32-NEXT: pushl 8(%ebp)
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl %eax
; CHECK-MSVC32-NEXT: calll _leading_args
; CHECK-MSVC32-NEXT: addl $52, %esp
; CHECK-MSVC32-NEXT: movl %ebp, %esp
; CHECK-MSVC32-NEXT: popl %ebp
; CHECK-MSVC32-NEXT: retl
;
; CHECK-MINGW-LABEL: call_leading_args:
; CHECK-MINGW: # %bb.0:
; CHECK-MINGW-NEXT: subq $72, %rsp
; CHECK-MINGW-NEXT: movaps (%rcx), %xmm0
; CHECK-MINGW-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp)
; CHECK-MINGW-NEXT: leaq {{[0-9]+}}(%rsp), %rax
; CHECK-MINGW-NEXT: movq %rax, {{[0-9]+}}(%rsp)
; CHECK-MINGW-NEXT: xorl %ecx, %ecx
; CHECK-MINGW-NEXT: xorl %edx, %edx
; CHECK-MINGW-NEXT: xorl %r8d, %r8d
; CHECK-MINGW-NEXT: xorl %r9d, %r9d
; CHECK-MINGW-NEXT: callq leading_args
; CHECK-MINGW-NEXT: addq $72, %rsp
; CHECK-MINGW-NEXT: retq
call i128 @leading_args(i64 0, i64 0, i64 0, i64 0, fp128 %x)
ret void
}
define void @call_many_leading_args(fp128 %x) nounwind {
; CHECK-X64-LABEL: call_many_leading_args:
; CHECK-X64: # %bb.0:
; CHECK-X64-NEXT: pushq %rax
; CHECK-X64-NEXT: movaps %xmm0, %xmm1
; CHECK-X64-NEXT: xorps %xmm0, %xmm0
; CHECK-X64-NEXT: xorl %edi, %edi
; CHECK-X64-NEXT: xorl %esi, %esi
; CHECK-X64-NEXT: xorl %edx, %edx
; CHECK-X64-NEXT: xorl %ecx, %ecx
; CHECK-X64-NEXT: callq many_leading_args@PLT
; CHECK-X64-NEXT: popq %rax
; CHECK-X64-NEXT: retq
;
; CHECK-X86-LABEL: call_many_leading_args:
; CHECK-X86: # %bb.0:
; CHECK-X86-NEXT: subl $40, %esp
; CHECK-X86-NEXT: leal {{[0-9]+}}(%esp), %eax
; CHECK-X86-NEXT: pushl {{[0-9]+}}(%esp)
; CHECK-X86-NEXT: pushl {{[0-9]+}}(%esp)
; CHECK-X86-NEXT: pushl {{[0-9]+}}(%esp)
; CHECK-X86-NEXT: pushl {{[0-9]+}}(%esp)
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl %eax
; CHECK-X86-NEXT: calll many_leading_args@PLT
; CHECK-X86-NEXT: addl $104, %esp
; CHECK-X86-NEXT: retl
;
; CHECK-MSVC64-LABEL: call_many_leading_args:
; CHECK-MSVC64: # %bb.0:
; CHECK-MSVC64-NEXT: subq $88, %rsp
; CHECK-MSVC64-NEXT: movaps (%rcx), %xmm0
; CHECK-MSVC64-NEXT: xorps %xmm1, %xmm1
; CHECK-MSVC64-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp)
; CHECK-MSVC64-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp)
; CHECK-MSVC64-NEXT: leaq {{[0-9]+}}(%rsp), %rax
; CHECK-MSVC64-NEXT: movq %rax, {{[0-9]+}}(%rsp)
; CHECK-MSVC64-NEXT: leaq {{[0-9]+}}(%rsp), %rax
; CHECK-MSVC64-NEXT: movq %rax, {{[0-9]+}}(%rsp)
; CHECK-MSVC64-NEXT: xorl %ecx, %ecx
; CHECK-MSVC64-NEXT: xorl %edx, %edx
; CHECK-MSVC64-NEXT: xorl %r8d, %r8d
; CHECK-MSVC64-NEXT: xorl %r9d, %r9d
; CHECK-MSVC64-NEXT: callq many_leading_args
; CHECK-MSVC64-NEXT: addq $88, %rsp
; CHECK-MSVC64-NEXT: retq
;
; CHECK-MSVC32-LABEL: call_many_leading_args:
; CHECK-MSVC32: # %bb.0:
; CHECK-MSVC32-NEXT: pushl %ebp
; CHECK-MSVC32-NEXT: movl %esp, %ebp
; CHECK-MSVC32-NEXT: andl $-16, %esp
; CHECK-MSVC32-NEXT: subl $32, %esp
; CHECK-MSVC32-NEXT: movl %esp, %eax
; CHECK-MSVC32-NEXT: pushl 20(%ebp)
; CHECK-MSVC32-NEXT: pushl 16(%ebp)
; CHECK-MSVC32-NEXT: pushl 12(%ebp)
; CHECK-MSVC32-NEXT: pushl 8(%ebp)
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl %eax
; CHECK-MSVC32-NEXT: calll _many_leading_args
; CHECK-MSVC32-NEXT: addl $68, %esp
; CHECK-MSVC32-NEXT: movl %ebp, %esp
; CHECK-MSVC32-NEXT: popl %ebp
; CHECK-MSVC32-NEXT: retl
;
; CHECK-MINGW-LABEL: call_many_leading_args:
; CHECK-MINGW: # %bb.0:
; CHECK-MINGW-NEXT: subq $88, %rsp
; CHECK-MINGW-NEXT: movaps (%rcx), %xmm0
; CHECK-MINGW-NEXT: xorps %xmm1, %xmm1
; CHECK-MINGW-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp)
; CHECK-MINGW-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp)
; CHECK-MINGW-NEXT: leaq {{[0-9]+}}(%rsp), %rax
; CHECK-MINGW-NEXT: movq %rax, {{[0-9]+}}(%rsp)
; CHECK-MINGW-NEXT: leaq {{[0-9]+}}(%rsp), %rax
; CHECK-MINGW-NEXT: movq %rax, {{[0-9]+}}(%rsp)
; CHECK-MINGW-NEXT: xorl %ecx, %ecx
; CHECK-MINGW-NEXT: xorl %edx, %edx
; CHECK-MINGW-NEXT: xorl %r8d, %r8d
; CHECK-MINGW-NEXT: xorl %r9d, %r9d
; CHECK-MINGW-NEXT: callq many_leading_args
; CHECK-MINGW-NEXT: addq $88, %rsp
; CHECK-MINGW-NEXT: retq
call i128 @many_leading_args(i64 0, i64 0, i64 0, i64 0, fp128 0xL0, fp128 %x)
ret void
}
define void @call_trailing_arg(fp128 %x) nounwind {
; CHECK-X64-LABEL: call_trailing_arg:
; CHECK-X64: # %bb.0:
; CHECK-X64-NEXT: pushq %rax
; CHECK-X64-NEXT: xorl %edi, %edi
; CHECK-X64-NEXT: xorl %esi, %esi
; CHECK-X64-NEXT: xorl %edx, %edx
; CHECK-X64-NEXT: xorl %ecx, %ecx
; CHECK-X64-NEXT: callq trailing_arg@PLT
; CHECK-X64-NEXT: popq %rax
; CHECK-X64-NEXT: retq
;
; CHECK-X86-LABEL: call_trailing_arg:
; CHECK-X86: # %bb.0:
; CHECK-X86-NEXT: subl $40, %esp
; CHECK-X86-NEXT: leal {{[0-9]+}}(%esp), %eax
; CHECK-X86-NEXT: pushl {{[0-9]+}}(%esp)
; CHECK-X86-NEXT: pushl {{[0-9]+}}(%esp)
; CHECK-X86-NEXT: pushl {{[0-9]+}}(%esp)
; CHECK-X86-NEXT: pushl {{[0-9]+}}(%esp)
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl $0
; CHECK-X86-NEXT: pushl %eax
; CHECK-X86-NEXT: calll trailing_arg@PLT
; CHECK-X86-NEXT: addl $88, %esp
; CHECK-X86-NEXT: retl
;
; CHECK-MSVC64-LABEL: call_trailing_arg:
; CHECK-MSVC64: # %bb.0:
; CHECK-MSVC64-NEXT: subq $72, %rsp
; CHECK-MSVC64-NEXT: movaps (%rcx), %xmm0
; CHECK-MSVC64-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp)
; CHECK-MSVC64-NEXT: leaq {{[0-9]+}}(%rsp), %rax
; CHECK-MSVC64-NEXT: movq %rax, {{[0-9]+}}(%rsp)
; CHECK-MSVC64-NEXT: xorl %ecx, %ecx
; CHECK-MSVC64-NEXT: xorl %edx, %edx
; CHECK-MSVC64-NEXT: xorl %r8d, %r8d
; CHECK-MSVC64-NEXT: xorl %r9d, %r9d
; CHECK-MSVC64-NEXT: callq trailing_arg
; CHECK-MSVC64-NEXT: addq $72, %rsp
; CHECK-MSVC64-NEXT: retq
;
; CHECK-MSVC32-LABEL: call_trailing_arg:
; CHECK-MSVC32: # %bb.0:
; CHECK-MSVC32-NEXT: pushl %ebp
; CHECK-MSVC32-NEXT: movl %esp, %ebp
; CHECK-MSVC32-NEXT: andl $-16, %esp
; CHECK-MSVC32-NEXT: subl $32, %esp
; CHECK-MSVC32-NEXT: movl %esp, %eax
; CHECK-MSVC32-NEXT: pushl 20(%ebp)
; CHECK-MSVC32-NEXT: pushl 16(%ebp)
; CHECK-MSVC32-NEXT: pushl 12(%ebp)
; CHECK-MSVC32-NEXT: pushl 8(%ebp)
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl $0
; CHECK-MSVC32-NEXT: pushl %eax
; CHECK-MSVC32-NEXT: calll _trailing_arg
; CHECK-MSVC32-NEXT: addl $52, %esp
; CHECK-MSVC32-NEXT: movl %ebp, %esp
; CHECK-MSVC32-NEXT: popl %ebp
; CHECK-MSVC32-NEXT: retl
;
; CHECK-MINGW-LABEL: call_trailing_arg:
; CHECK-MINGW: # %bb.0:
; CHECK-MINGW-NEXT: subq $72, %rsp
; CHECK-MINGW-NEXT: movaps (%rcx), %xmm0
; CHECK-MINGW-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp)
; CHECK-MINGW-NEXT: leaq {{[0-9]+}}(%rsp), %rax
; CHECK-MINGW-NEXT: movq %rax, {{[0-9]+}}(%rsp)
; CHECK-MINGW-NEXT: xorl %ecx, %ecx
; CHECK-MINGW-NEXT: xorl %edx, %edx
; CHECK-MINGW-NEXT: xorl %r8d, %r8d
; CHECK-MINGW-NEXT: xorl %r9d, %r9d
; CHECK-MINGW-NEXT: callq trailing_arg
; CHECK-MINGW-NEXT: addq $72, %rsp
; CHECK-MINGW-NEXT: retq
call i128 @trailing_arg(i64 0, i64 0, i64 0, i64 0, fp128 %x)
ret void
}