| //==-- AArch64TargetMachine.h - Define TargetMachine for AArch64 -*- C++ -*-==// |
| // |
| // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| // See https://llvm.org/LICENSE.txt for license information. |
| // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| // |
| //===----------------------------------------------------------------------===// |
| // |
| // This file declares the AArch64 specific subclass of TargetMachine. |
| // |
| //===----------------------------------------------------------------------===// |
| |
| #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64TARGETMACHINE_H |
| #define LLVM_LIB_TARGET_AARCH64_AARCH64TARGETMACHINE_H |
| |
| #include "AArch64InstrInfo.h" |
| #include "AArch64Subtarget.h" |
| #include "llvm/IR/DataLayout.h" |
| #include "llvm/Target/TargetMachine.h" |
| |
| namespace llvm { |
| |
| class AArch64RegisterBankInfo; |
| |
| class AArch64TargetMachine : public LLVMTargetMachine { |
| protected: |
| std::unique_ptr<TargetLoweringObjectFile> TLOF; |
| mutable StringMap<std::unique_ptr<AArch64Subtarget>> SubtargetMap; |
| |
| public: |
| AArch64TargetMachine(const Target &T, const Triple &TT, StringRef CPU, |
| StringRef FS, const TargetOptions &Options, |
| Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, |
| CodeGenOpt::Level OL, bool JIT, bool IsLittleEndian); |
| |
| ~AArch64TargetMachine() override; |
| const AArch64Subtarget *getSubtargetImpl(const Function &F) const override; |
| // DO NOT IMPLEMENT: There is no such thing as a valid default subtarget, |
| // subtargets are per-function entities based on the target-specific |
| // attributes of each function. |
| const AArch64Subtarget *getSubtargetImpl() const = delete; |
| |
| // Pass Pipeline Configuration |
| TargetPassConfig *createPassConfig(PassManagerBase &PM) override; |
| |
| TargetTransformInfo getTargetTransformInfo(const Function &F) override; |
| |
| TargetLoweringObjectFile* getObjFileLowering() const override { |
| return TLOF.get(); |
| } |
| |
| yaml::MachineFunctionInfo *createDefaultFuncInfoYAML() const override; |
| yaml::MachineFunctionInfo * |
| convertFuncInfoToYAML(const MachineFunction &MF) const override; |
| bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &, |
| PerFunctionMIParsingState &PFS, |
| SMDiagnostic &Error, |
| SMRange &SourceRange) const override; |
| |
| /// Returns true if a cast between SrcAS and DestAS is a noop. |
| bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override { |
| // Addrspacecasts are always noops. |
| return true; |
| } |
| |
| private: |
| bool isLittle; |
| }; |
| |
| // AArch64 little endian target machine. |
| // |
| class AArch64leTargetMachine : public AArch64TargetMachine { |
| virtual void anchor(); |
| public: |
| AArch64leTargetMachine(const Target &T, const Triple &TT, StringRef CPU, |
| StringRef FS, const TargetOptions &Options, |
| Optional<Reloc::Model> RM, |
| Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, |
| bool JIT); |
| }; |
| |
| // AArch64 big endian target machine. |
| // |
| class AArch64beTargetMachine : public AArch64TargetMachine { |
| virtual void anchor(); |
| public: |
| AArch64beTargetMachine(const Target &T, const Triple &TT, StringRef CPU, |
| StringRef FS, const TargetOptions &Options, |
| Optional<Reloc::Model> RM, |
| Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, |
| bool JIT); |
| }; |
| |
| } // end namespace llvm |
| |
| #endif |