llvm/test/CodeGen/AArch64/GlobalISel/regbank-assert-align.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64 -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s
#
# Verify register banks for G_ASSERT_ALIGN.
#

---
name:            gpr
alignment:       4
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $x0

    ; G_ASSERT_ALIGN should end up on a GPR.

    ; CHECK-LABEL: name: gpr
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %copy:gpr(p0) = COPY $x0
    ; CHECK-NEXT: %copy_assert_align:gpr(p0) = G_ASSERT_ALIGN %copy, 4
    ; CHECK-NEXT: $x1 = COPY %copy_assert_align(p0)
    ; CHECK-NEXT: RET_ReallyLR implicit $x1
    %copy:_(p0) = COPY $x0
    %copy_assert_align:_(p0) = G_ASSERT_ALIGN %copy(p0), 4
    $x1 = COPY %copy_assert_align
    RET_ReallyLR implicit $x1

...