llvm/test/Transforms/LoopVectorize/SystemZ/addressing.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S  -mtriple=s390x-unknown-linux -mcpu=z13 -passes=loop-vectorize -force-vector-width=2  < %s | FileCheck %s
;
; Test that loop vectorizer does not generate vector addresses that must then
; always be extracted.

; Check that the addresses for a scalarized memory access is not extracted
; from a vector register.
define void @foo(ptr nocapture %A) {
; CHECK-LABEL: @foo(
; CHECK-NEXT:  entry:
; CHECK-NEXT:    br label [[VECTOR_PH:%.*]]
; CHECK:       vector.ph:
; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
; CHECK:       vector.body:
; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[INDEX]], 1
; CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[INDEX]], 2
; CHECK-NEXT:    [[TMP31:%.*]] = add i64 [[INDEX]], 3
; CHECK-NEXT:    [[TMP33:%.*]] = add i64 [[INDEX]], 4
; CHECK-NEXT:    [[TMP34:%.*]] = add i64 [[INDEX]], 5
; CHECK-NEXT:    [[TMP5:%.*]] = add i64 [[INDEX]], 6
; CHECK-NEXT:    [[TMP35:%.*]] = add i64 [[INDEX]], 7
; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[INDEX]], 8
; CHECK-NEXT:    [[TMP36:%.*]] = add i64 [[INDEX]], 9
; CHECK-NEXT:    [[TMP9:%.*]] = add i64 [[INDEX]], 10
; CHECK-NEXT:    [[TMP37:%.*]] = add i64 [[INDEX]], 11
; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[INDEX]], 12
; CHECK-NEXT:    [[TMP38:%.*]] = add i64 [[INDEX]], 13
; CHECK-NEXT:    [[TMP13:%.*]] = add i64 [[INDEX]], 14
; CHECK-NEXT:    [[TMP39:%.*]] = add i64 [[INDEX]], 15
; CHECK-NEXT:    [[TMP15:%.*]] = shl nsw i64 [[INDEX]], 2
; CHECK-NEXT:    [[TMP40:%.*]] = shl nsw i64 [[TMP0]], 2
; CHECK-NEXT:    [[TMP17:%.*]] = shl nsw i64 [[TMP1]], 2
; CHECK-NEXT:    [[TMP41:%.*]] = shl nsw i64 [[TMP31]], 2
; CHECK-NEXT:    [[TMP19:%.*]] = shl nsw i64 [[TMP33]], 2
; CHECK-NEXT:    [[TMP42:%.*]] = shl nsw i64 [[TMP34]], 2
; CHECK-NEXT:    [[TMP21:%.*]] = shl nsw i64 [[TMP5]], 2
; CHECK-NEXT:    [[TMP43:%.*]] = shl nsw i64 [[TMP35]], 2
; CHECK-NEXT:    [[TMP23:%.*]] = shl nsw i64 [[TMP7]], 2
; CHECK-NEXT:    [[TMP44:%.*]] = shl nsw i64 [[TMP36]], 2
; CHECK-NEXT:    [[TMP25:%.*]] = shl nsw i64 [[TMP9]], 2
; CHECK-NEXT:    [[TMP45:%.*]] = shl nsw i64 [[TMP37]], 2
; CHECK-NEXT:    [[TMP27:%.*]] = shl nsw i64 [[TMP11]], 2
; CHECK-NEXT:    [[TMP46:%.*]] = shl nsw i64 [[TMP38]], 2
; CHECK-NEXT:    [[TMP29:%.*]] = shl nsw i64 [[TMP13]], 2
; CHECK-NEXT:    [[TMP47:%.*]] = shl nsw i64 [[TMP39]], 2
; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[TMP15]]
; CHECK-NEXT:    [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP40]]
; CHECK-NEXT:    [[TMP32:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP17]]
; CHECK-NEXT:    [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP41]]
; CHECK-NEXT:    [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP19]]
; CHECK-NEXT:    [[TMP10:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP42]]
; CHECK-NEXT:    [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP21]]
; CHECK-NEXT:    [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP43]]
; CHECK-NEXT:    [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP23]]
; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP44]]
; CHECK-NEXT:    [[TMP20:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP25]]
; CHECK-NEXT:    [[TMP22:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP45]]
; CHECK-NEXT:    [[TMP24:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP27]]
; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP46]]
; CHECK-NEXT:    [[TMP28:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP29]]
; CHECK-NEXT:    [[TMP30:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP47]]
; CHECK-NEXT:    store i32 4, ptr [[TMP2]], align 4
; CHECK-NEXT:    store i32 4, ptr [[TMP3]], align 4
; CHECK-NEXT:    store i32 4, ptr [[TMP32]], align 4
; CHECK-NEXT:    store i32 4, ptr [[TMP6]], align 4
; CHECK-NEXT:    store i32 4, ptr [[TMP8]], align 4
; CHECK-NEXT:    store i32 4, ptr [[TMP10]], align 4
; CHECK-NEXT:    store i32 4, ptr [[TMP12]], align 4
; CHECK-NEXT:    store i32 4, ptr [[TMP14]], align 4
; CHECK-NEXT:    store i32 4, ptr [[TMP16]], align 4
; CHECK-NEXT:    store i32 4, ptr [[TMP18]], align 4
; CHECK-NEXT:    store i32 4, ptr [[TMP20]], align 4
; CHECK-NEXT:    store i32 4, ptr [[TMP22]], align 4
; CHECK-NEXT:    store i32 4, ptr [[TMP24]], align 4
; CHECK-NEXT:    store i32 4, ptr [[TMP26]], align 4
; CHECK-NEXT:    store i32 4, ptr [[TMP28]], align 4
; CHECK-NEXT:    store i32 4, ptr [[TMP30]], align 4
; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 16
; CHECK-NEXT:    [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], 10000
; CHECK-NEXT:    br i1 [[TMP4]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
; CHECK:       middle.block:
; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
; CHECK:       for.end:
; CHECK-NEXT:    ret void
;

entry:
  br label %for.body

for.body:
  %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
  %0 = shl nsw i64 %indvars.iv, 2
  %arrayidx = getelementptr inbounds i32, ptr %A, i64 %0
  store i32 4, ptr %arrayidx, align 4
  %indvars.iv.next = add i64 %indvars.iv, 1
  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
  %exitcond = icmp eq i32 %lftr.wideiv, 10000
  br i1 %exitcond, label %for.end, label %for.body

for.end:
  ret void
}


; Check that a load of address is scalarized.
define void @foo1(ptr nocapture noalias %A, ptr nocapture %PtrPtr) {
; CHECK-LABEL: @foo1(
; CHECK-NEXT:  entry:
; CHECK-NEXT:    br label [[VECTOR_PH:%.*]]
; CHECK:       vector.ph:
; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
; CHECK:       vector.body:
; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[INDEX]], 1
; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[INDEX]], 2
; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[INDEX]], 3
; CHECK-NEXT:    [[TMP13:%.*]] = add i64 [[INDEX]], 4
; CHECK-NEXT:    [[TMP15:%.*]] = add i64 [[INDEX]], 5
; CHECK-NEXT:    [[TMP23:%.*]] = add i64 [[INDEX]], 6
; CHECK-NEXT:    [[TMP39:%.*]] = add i64 [[INDEX]], 7
; CHECK-NEXT:    [[TMP1:%.*]] = getelementptr inbounds ptr, ptr [[PTRPTR:%.*]], i64 [[INDEX]]
; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds ptr, ptr [[PTRPTR]], i64 [[TMP0]]
; CHECK-NEXT:    [[TMP16:%.*]] = getelementptr inbounds ptr, ptr [[PTRPTR]], i64 [[TMP7]]
; CHECK-NEXT:    [[TMP24:%.*]] = getelementptr inbounds ptr, ptr [[PTRPTR]], i64 [[TMP11]]
; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr inbounds ptr, ptr [[PTRPTR]], i64 [[TMP13]]
; CHECK-NEXT:    [[TMP43:%.*]] = getelementptr inbounds ptr, ptr [[PTRPTR]], i64 [[TMP15]]
; CHECK-NEXT:    [[TMP12:%.*]] = getelementptr inbounds ptr, ptr [[PTRPTR]], i64 [[TMP23]]
; CHECK-NEXT:    [[TMP14:%.*]] = getelementptr inbounds ptr, ptr [[PTRPTR]], i64 [[TMP39]]
; CHECK-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP1]], align 8
; CHECK-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP2]], align 8
; CHECK-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 8
; CHECK-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[TMP24]], align 8
; CHECK-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[TMP26]], align 8
; CHECK-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[TMP43]], align 8
; CHECK-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[TMP12]], align 8
; CHECK-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[TMP14]], align 8
; CHECK-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP3]], align 4
; CHECK-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP4]], align 4
; CHECK-NEXT:    [[TMP25:%.*]] = insertelement <2 x i32> poison, i32 [[TMP5]], i64 0
; CHECK-NEXT:    [[TMP8:%.*]] = insertelement <2 x i32> [[TMP25]], i32 [[TMP6]], i64 1
; CHECK-NEXT:    [[TMP27:%.*]] = load i32, ptr [[TMP17]], align 4
; CHECK-NEXT:    [[TMP28:%.*]] = load i32, ptr [[TMP18]], align 4
; CHECK-NEXT:    [[TMP29:%.*]] = insertelement <2 x i32> poison, i32 [[TMP27]], i64 0
; CHECK-NEXT:    [[TMP30:%.*]] = insertelement <2 x i32> [[TMP29]], i32 [[TMP28]], i64 1
; CHECK-NEXT:    [[TMP31:%.*]] = load i32, ptr [[TMP19]], align 4
; CHECK-NEXT:    [[TMP32:%.*]] = load i32, ptr [[TMP20]], align 4
; CHECK-NEXT:    [[TMP33:%.*]] = insertelement <2 x i32> poison, i32 [[TMP31]], i64 0
; CHECK-NEXT:    [[TMP34:%.*]] = insertelement <2 x i32> [[TMP33]], i32 [[TMP32]], i64 1
; CHECK-NEXT:    [[TMP35:%.*]] = load i32, ptr [[TMP21]], align 4
; CHECK-NEXT:    [[TMP36:%.*]] = load i32, ptr [[TMP22]], align 4
; CHECK-NEXT:    [[TMP37:%.*]] = insertelement <2 x i32> poison, i32 [[TMP35]], i64 0
; CHECK-NEXT:    [[TMP38:%.*]] = insertelement <2 x i32> [[TMP37]], i32 [[TMP36]], i64 1
; CHECK-NEXT:    [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDEX]]
; CHECK-NEXT:    [[TMP40:%.*]] = getelementptr inbounds i32, ptr [[TMP9]], i64 2
; CHECK-NEXT:    [[TMP41:%.*]] = getelementptr inbounds i32, ptr [[TMP9]], i64 4
; CHECK-NEXT:    [[TMP42:%.*]] = getelementptr inbounds i32, ptr [[TMP9]], i64 6
; CHECK-NEXT:    store <2 x i32> [[TMP8]], ptr [[TMP9]], align 4
; CHECK-NEXT:    store <2 x i32> [[TMP30]], ptr [[TMP40]], align 4
; CHECK-NEXT:    store <2 x i32> [[TMP34]], ptr [[TMP41]], align 4
; CHECK-NEXT:    store <2 x i32> [[TMP38]], ptr [[TMP42]], align 4
; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
; CHECK-NEXT:    [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], 10000
; CHECK-NEXT:    br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
; CHECK:       middle.block:
; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
; CHECK:       for.end:
; CHECK-NEXT:    ret void
;

entry:
  br label %for.body

for.body:
  %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
  %ptr = getelementptr inbounds ptr, ptr %PtrPtr, i64 %indvars.iv
  %el = load ptr, ptr %ptr
  %v = load i32, ptr %el
  %arrayidx = getelementptr inbounds i32, ptr %A, i64 %indvars.iv
  store i32 %v, ptr %arrayidx, align 4
  %indvars.iv.next = add i64 %indvars.iv, 1
  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
  %exitcond = icmp eq i32 %lftr.wideiv, 10000
  br i1 %exitcond, label %for.end, label %for.body

for.end:
  ret void
}