blob: 3f89019e9c23fbe008b151918e8a965ba89233ed [file]
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt < %s -passes=loop-interchange -cache-line-size=64 -S | FileCheck %s
; Check that interchanging the loops is legal for the bitwise-or reduction.
;
; int b_or = 0;
; for (int i = 0; i < 2; i++)
; for (int j = 0; j < 2; j++)
; b_or |= A[j][i];
define void @reduction_or(ptr %A) {
; CHECK-LABEL: define void @reduction_or(
; CHECK-SAME: ptr [[A:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: br label %[[FOR_J_PREHEADER:.*]]
; CHECK: [[FOR_I_HEADER_PREHEADER:.*]]:
; CHECK-NEXT: br label %[[FOR_I_HEADER:.*]]
; CHECK: [[FOR_I_HEADER]]:
; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_INC:%.*]], %[[FOR_I_LATCH:.*]] ], [ 0, %[[FOR_I_HEADER_PREHEADER]] ]
; CHECK-NEXT: [[OR_J:%.*]] = phi i32 [ [[OR_J_NEXT:%.*]], %[[FOR_I_LATCH]] ], [ [[OR_I:%.*]], %[[FOR_I_HEADER_PREHEADER]] ]
; CHECK-NEXT: br label %[[FOR_J_SPLIT1:.*]]
; CHECK: [[FOR_J_PREHEADER]]:
; CHECK-NEXT: br label %[[FOR_J:.*]]
; CHECK: [[FOR_J]]:
; CHECK-NEXT: [[J:%.*]] = phi i32 [ [[TMP0:%.*]], %[[FOR_J_SPLIT:.*]] ], [ 0, %[[FOR_J_PREHEADER]] ]
; CHECK-NEXT: [[OR_I]] = phi i32 [ [[OR_I_LCSSA:%.*]], %[[FOR_J_SPLIT]] ], [ 0, %[[FOR_J_PREHEADER]] ]
; CHECK-NEXT: br label %[[FOR_I_HEADER_PREHEADER]]
; CHECK: [[FOR_J_SPLIT1]]:
; CHECK-NEXT: [[IDX:%.*]] = getelementptr inbounds [2 x [2 x i32]], ptr [[A]], i32 0, i32 [[J]], i32 [[I]]
; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[IDX]], align 4
; CHECK-NEXT: [[OR_J_NEXT]] = or i32 [[OR_J]], [[A]]
; CHECK-NEXT: [[J_INC:%.*]] = add i32 [[J]], 1
; CHECK-NEXT: [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], 2
; CHECK-NEXT: br label %[[FOR_I_LATCH]]
; CHECK: [[FOR_J_SPLIT]]:
; CHECK-NEXT: [[OR_I_LCSSA]] = phi i32 [ [[OR_J_NEXT]], %[[FOR_I_LATCH]] ]
; CHECK-NEXT: [[TMP0]] = add i32 [[J]], 1
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[TMP0]], 2
; CHECK-NEXT: br i1 [[TMP1]], label %[[FOR_J]], label %[[EXIT:.*]]
; CHECK: [[FOR_I_LATCH]]:
; CHECK-NEXT: [[I_INC]] = add i32 [[I]], 1
; CHECK-NEXT: [[CMP_I:%.*]] = icmp slt i32 [[I_INC]], 2
; CHECK-NEXT: br i1 [[CMP_I]], label %[[FOR_I_HEADER]], label %[[FOR_J_SPLIT]]
; CHECK: [[EXIT]]:
; CHECK-NEXT: ret void
;
entry:
br label %for.i.header
for.i.header:
%i = phi i32 [ 0, %entry ], [ %i.inc, %for.i.latch ]
%or.i = phi i32 [ 0, %entry ], [ %or.i.lcssa, %for.i.latch ]
br label %for.j
for.j:
%j = phi i32 [ 0, %for.i.header ], [ %j.inc, %for.j ]
%or.j = phi i32 [ %or.i, %for.i.header ], [ %or.j.next, %for.j ]
%idx = getelementptr inbounds [2 x [2 x i32]], ptr %A, i32 0, i32 %j, i32 %i
%a = load i32, ptr %idx, align 4
%or.j.next = or i32 %or.j, %a
%j.inc = add i32 %j, 1
%cmp.j = icmp slt i32 %j.inc, 2
br i1 %cmp.j, label %for.j, label %for.i.latch
for.i.latch:
%or.i.lcssa = phi i32 [ %or.j.next, %for.j ]
%i.inc = add i32 %i, 1
%cmp.i = icmp slt i32 %i.inc, 2
br i1 %cmp.i, label %for.i.header, label %exit
exit:
ret void
}
; Check that interchanging the loops is legal for the bitwise-and reduction.
;
; int b_and = -1;
; for (int i = 0; i < 2; i++)
; for (int j = 0; j < 2; j++)
; b_and &= A[j][i];
define void @reduction_and(ptr %A) {
; CHECK-LABEL: define void @reduction_and(
; CHECK-SAME: ptr [[A:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: br label %[[FOR_J_PREHEADER:.*]]
; CHECK: [[FOR_I_HEADER_PREHEADER:.*]]:
; CHECK-NEXT: br label %[[FOR_I_HEADER:.*]]
; CHECK: [[FOR_I_HEADER]]:
; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_INC:%.*]], %[[FOR_I_LATCH:.*]] ], [ 0, %[[FOR_I_HEADER_PREHEADER]] ]
; CHECK-NEXT: [[AND_J:%.*]] = phi i32 [ [[AND_J_NEXT:%.*]], %[[FOR_I_LATCH]] ], [ [[AND_I:%.*]], %[[FOR_I_HEADER_PREHEADER]] ]
; CHECK-NEXT: br label %[[FOR_J_SPLIT1:.*]]
; CHECK: [[FOR_J_PREHEADER]]:
; CHECK-NEXT: br label %[[FOR_J:.*]]
; CHECK: [[FOR_J]]:
; CHECK-NEXT: [[J:%.*]] = phi i32 [ [[TMP0:%.*]], %[[FOR_J_SPLIT:.*]] ], [ 0, %[[FOR_J_PREHEADER]] ]
; CHECK-NEXT: [[AND_I]] = phi i32 [ [[AND_I_LCSSA:%.*]], %[[FOR_J_SPLIT]] ], [ -1, %[[FOR_J_PREHEADER]] ]
; CHECK-NEXT: br label %[[FOR_I_HEADER_PREHEADER]]
; CHECK: [[FOR_J_SPLIT1]]:
; CHECK-NEXT: [[IDX:%.*]] = getelementptr inbounds [2 x [2 x i32]], ptr [[A]], i32 0, i32 [[J]], i32 [[I]]
; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[IDX]], align 4
; CHECK-NEXT: [[AND_J_NEXT]] = and i32 [[AND_J]], [[A]]
; CHECK-NEXT: [[J_INC:%.*]] = add i32 [[J]], 1
; CHECK-NEXT: [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], 2
; CHECK-NEXT: br label %[[FOR_I_LATCH]]
; CHECK: [[FOR_J_SPLIT]]:
; CHECK-NEXT: [[AND_I_LCSSA]] = phi i32 [ [[AND_J_NEXT]], %[[FOR_I_LATCH]] ]
; CHECK-NEXT: [[TMP0]] = add i32 [[J]], 1
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[TMP0]], 2
; CHECK-NEXT: br i1 [[TMP1]], label %[[FOR_J]], label %[[EXIT:.*]]
; CHECK: [[FOR_I_LATCH]]:
; CHECK-NEXT: [[I_INC]] = add i32 [[I]], 1
; CHECK-NEXT: [[CMP_I:%.*]] = icmp slt i32 [[I_INC]], 2
; CHECK-NEXT: br i1 [[CMP_I]], label %[[FOR_I_HEADER]], label %[[FOR_J_SPLIT]]
; CHECK: [[EXIT]]:
; CHECK-NEXT: ret void
;
entry:
br label %for.i.header
for.i.header:
%i = phi i32 [ 0, %entry ], [ %i.inc, %for.i.latch ]
%and.i = phi i32 [ -1, %entry ], [ %and.i.lcssa, %for.i.latch ]
br label %for.j
for.j:
%j = phi i32 [ 0, %for.i.header ], [ %j.inc, %for.j ]
%and.j = phi i32 [ %and.i, %for.i.header ], [ %and.j.next, %for.j ]
%idx = getelementptr inbounds [2 x [2 x i32]], ptr %A, i32 0, i32 %j, i32 %i
%a = load i32, ptr %idx, align 4
%and.j.next = and i32 %and.j, %a
%j.inc = add i32 %j, 1
%cmp.j = icmp slt i32 %j.inc, 2
br i1 %cmp.j, label %for.j, label %for.i.latch
for.i.latch:
%and.i.lcssa = phi i32 [ %and.j.next, %for.j ]
%i.inc = add i32 %i, 1
%cmp.i = icmp slt i32 %i.inc, 2
br i1 %cmp.i, label %for.i.header, label %exit
exit:
ret void
}
; Check that interchanging the loops is legal for the bitwise-xor reduction.
;
; int b_xor = 0;
; for (int i = 0; i < 2; i++)
; for (int j = 0; j < 2; j++)
; b_xor ^= A[j][i];
define void @reduction_xor(ptr %A) {
; CHECK-LABEL: define void @reduction_xor(
; CHECK-SAME: ptr [[A:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: br label %[[FOR_J_PREHEADER:.*]]
; CHECK: [[FOR_I_HEADER_PREHEADER:.*]]:
; CHECK-NEXT: br label %[[FOR_I_HEADER:.*]]
; CHECK: [[FOR_I_HEADER]]:
; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_INC:%.*]], %[[FOR_I_LATCH:.*]] ], [ 0, %[[FOR_I_HEADER_PREHEADER]] ]
; CHECK-NEXT: [[XOR_J:%.*]] = phi i32 [ [[XOR_J_NEXT:%.*]], %[[FOR_I_LATCH]] ], [ [[XOR_I:%.*]], %[[FOR_I_HEADER_PREHEADER]] ]
; CHECK-NEXT: br label %[[FOR_J_SPLIT1:.*]]
; CHECK: [[FOR_J_PREHEADER]]:
; CHECK-NEXT: br label %[[FOR_J:.*]]
; CHECK: [[FOR_J]]:
; CHECK-NEXT: [[J:%.*]] = phi i32 [ [[TMP0:%.*]], %[[FOR_J_SPLIT:.*]] ], [ 0, %[[FOR_J_PREHEADER]] ]
; CHECK-NEXT: [[XOR_I]] = phi i32 [ [[XOR_I_LCSSA:%.*]], %[[FOR_J_SPLIT]] ], [ 0, %[[FOR_J_PREHEADER]] ]
; CHECK-NEXT: br label %[[FOR_I_HEADER_PREHEADER]]
; CHECK: [[FOR_J_SPLIT1]]:
; CHECK-NEXT: [[IDX:%.*]] = getelementptr inbounds [2 x [2 x i32]], ptr [[A]], i32 0, i32 [[J]], i32 [[I]]
; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[IDX]], align 4
; CHECK-NEXT: [[XOR_J_NEXT]] = xor i32 [[XOR_J]], [[A]]
; CHECK-NEXT: [[J_INC:%.*]] = add i32 [[J]], 1
; CHECK-NEXT: [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], 2
; CHECK-NEXT: br label %[[FOR_I_LATCH]]
; CHECK: [[FOR_J_SPLIT]]:
; CHECK-NEXT: [[XOR_I_LCSSA]] = phi i32 [ [[XOR_J_NEXT]], %[[FOR_I_LATCH]] ]
; CHECK-NEXT: [[TMP0]] = add i32 [[J]], 1
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[TMP0]], 2
; CHECK-NEXT: br i1 [[TMP1]], label %[[FOR_J]], label %[[EXIT:.*]]
; CHECK: [[FOR_I_LATCH]]:
; CHECK-NEXT: [[I_INC]] = add i32 [[I]], 1
; CHECK-NEXT: [[CMP_I:%.*]] = icmp slt i32 [[I_INC]], 2
; CHECK-NEXT: br i1 [[CMP_I]], label %[[FOR_I_HEADER]], label %[[FOR_J_SPLIT]]
; CHECK: [[EXIT]]:
; CHECK-NEXT: ret void
;
entry:
br label %for.i.header
for.i.header:
%i = phi i32 [ 0, %entry ], [ %i.inc, %for.i.latch ]
%xor.i = phi i32 [ 0, %entry ], [ %xor.i.lcssa, %for.i.latch ]
br label %for.j
for.j:
%j = phi i32 [ 0, %for.i.header ], [ %j.inc, %for.j ]
%xor.j = phi i32 [ %xor.i, %for.i.header ], [ %xor.j.next, %for.j ]
%idx = getelementptr inbounds [2 x [2 x i32]], ptr %A, i32 0, i32 %j, i32 %i
%a = load i32, ptr %idx, align 4
%xor.j.next = xor i32 %xor.j, %a
%j.inc = add i32 %j, 1
%cmp.j = icmp slt i32 %j.inc, 2
br i1 %cmp.j, label %for.j, label %for.i.latch
for.i.latch:
%xor.i.lcssa = phi i32 [ %xor.j.next, %for.j ]
%i.inc = add i32 %i, 1
%cmp.i = icmp slt i32 %i.inc, 2
br i1 %cmp.i, label %for.i.header, label %exit
exit:
ret void
}
; Check that interchanging the loops is legal for the signed-minimum reduction.
;
; int smin = init;
; for (int i = 0; i < 2; i++)
; for (int j = 0; j < 2; j++)
; smin = (A[j][i] < smin) ? A[j][i] : smin;
define void @reduction_smin(ptr %A, i32 %init) {
; CHECK-LABEL: define void @reduction_smin(
; CHECK-SAME: ptr [[A:%.*]], i32 [[INIT:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: br label %[[FOR_J_PREHEADER:.*]]
; CHECK: [[FOR_I_HEADER_PREHEADER:.*]]:
; CHECK-NEXT: br label %[[FOR_I_HEADER:.*]]
; CHECK: [[FOR_I_HEADER]]:
; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_INC:%.*]], %[[FOR_I_LATCH:.*]] ], [ 0, %[[FOR_I_HEADER_PREHEADER]] ]
; CHECK-NEXT: [[SMIN_J:%.*]] = phi i32 [ [[SMIN_J_NEXT:%.*]], %[[FOR_I_LATCH]] ], [ [[SMIN_I:%.*]], %[[FOR_I_HEADER_PREHEADER]] ]
; CHECK-NEXT: br label %[[FOR_J_SPLIT1:.*]]
; CHECK: [[FOR_J_PREHEADER]]:
; CHECK-NEXT: br label %[[FOR_J:.*]]
; CHECK: [[FOR_J]]:
; CHECK-NEXT: [[J:%.*]] = phi i32 [ [[TMP0:%.*]], %[[FOR_J_SPLIT:.*]] ], [ 0, %[[FOR_J_PREHEADER]] ]
; CHECK-NEXT: [[SMIN_I]] = phi i32 [ [[SMIN_I_LCSSA:%.*]], %[[FOR_J_SPLIT]] ], [ [[INIT]], %[[FOR_J_PREHEADER]] ]
; CHECK-NEXT: br label %[[FOR_I_HEADER_PREHEADER]]
; CHECK: [[FOR_J_SPLIT1]]:
; CHECK-NEXT: [[IDX:%.*]] = getelementptr inbounds [2 x [2 x i32]], ptr [[A]], i32 0, i32 [[J]], i32 [[I]]
; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[IDX]], align 4
; CHECK-NEXT: [[SMIN_J_NEXT]] = call i32 @llvm.smin.i32(i32 [[A]], i32 [[SMIN_J]])
; CHECK-NEXT: [[J_INC:%.*]] = add i32 [[J]], 1
; CHECK-NEXT: [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], 2
; CHECK-NEXT: br label %[[FOR_I_LATCH]]
; CHECK: [[FOR_J_SPLIT]]:
; CHECK-NEXT: [[SMIN_I_LCSSA]] = phi i32 [ [[SMIN_J_NEXT]], %[[FOR_I_LATCH]] ]
; CHECK-NEXT: [[TMP0]] = add i32 [[J]], 1
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[TMP0]], 2
; CHECK-NEXT: br i1 [[TMP1]], label %[[FOR_J]], label %[[EXIT:.*]]
; CHECK: [[FOR_I_LATCH]]:
; CHECK-NEXT: [[I_INC]] = add i32 [[I]], 1
; CHECK-NEXT: [[CMP_I:%.*]] = icmp slt i32 [[I_INC]], 2
; CHECK-NEXT: br i1 [[CMP_I]], label %[[FOR_I_HEADER]], label %[[FOR_J_SPLIT]]
; CHECK: [[EXIT]]:
; CHECK-NEXT: ret void
;
entry:
br label %for.i.header
for.i.header:
%i = phi i32 [ 0, %entry ], [ %i.inc, %for.i.latch ]
%smin.i = phi i32 [ %init, %entry ], [ %smin.i.lcssa, %for.i.latch ]
br label %for.j
for.j:
%j = phi i32 [ 0, %for.i.header ], [ %j.inc, %for.j ]
%smin.j = phi i32 [ %smin.i, %for.i.header ], [ %smin.j.next, %for.j ]
%idx = getelementptr inbounds [2 x [2 x i32]], ptr %A, i32 0, i32 %j, i32 %i
%a = load i32, ptr %idx, align 4
%smin.j.next = call i32 @llvm.smin(i32 %a, i32 %smin.j)
%j.inc = add i32 %j, 1
%cmp.j = icmp slt i32 %j.inc, 2
br i1 %cmp.j, label %for.j, label %for.i.latch
for.i.latch:
%smin.i.lcssa = phi i32 [ %smin.j.next, %for.j ]
%i.inc = add i32 %i, 1
%cmp.i = icmp slt i32 %i.inc, 2
br i1 %cmp.i, label %for.i.header, label %exit
exit:
ret void
}
; Check that interchanging the loops is legal for the signed-maximum reduction.
;
; int smax = init;
; for (int i = 0; i < 2; i++)
; for (int j = 0; j < 2; j++)
; smax = (A[j][i] > smax) ? A[j][i] : smax;
define void @reduction_smax(ptr %A, i32 %init) {
; CHECK-LABEL: define void @reduction_smax(
; CHECK-SAME: ptr [[A:%.*]], i32 [[INIT:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: br label %[[FOR_J_PREHEADER:.*]]
; CHECK: [[FOR_I_HEADER_PREHEADER:.*]]:
; CHECK-NEXT: br label %[[FOR_I_HEADER:.*]]
; CHECK: [[FOR_I_HEADER]]:
; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_INC:%.*]], %[[FOR_I_LATCH:.*]] ], [ 0, %[[FOR_I_HEADER_PREHEADER]] ]
; CHECK-NEXT: [[SMAX_J:%.*]] = phi i32 [ [[SMAX_J_NEXT:%.*]], %[[FOR_I_LATCH]] ], [ [[SMAX_I:%.*]], %[[FOR_I_HEADER_PREHEADER]] ]
; CHECK-NEXT: br label %[[FOR_J_SPLIT1:.*]]
; CHECK: [[FOR_J_PREHEADER]]:
; CHECK-NEXT: br label %[[FOR_J:.*]]
; CHECK: [[FOR_J]]:
; CHECK-NEXT: [[J:%.*]] = phi i32 [ [[TMP0:%.*]], %[[FOR_J_SPLIT:.*]] ], [ 0, %[[FOR_J_PREHEADER]] ]
; CHECK-NEXT: [[SMAX_I]] = phi i32 [ [[SMAX_I_LCSSA:%.*]], %[[FOR_J_SPLIT]] ], [ [[INIT]], %[[FOR_J_PREHEADER]] ]
; CHECK-NEXT: br label %[[FOR_I_HEADER_PREHEADER]]
; CHECK: [[FOR_J_SPLIT1]]:
; CHECK-NEXT: [[IDX:%.*]] = getelementptr inbounds [2 x [2 x i32]], ptr [[A]], i32 0, i32 [[J]], i32 [[I]]
; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[IDX]], align 4
; CHECK-NEXT: [[SMAX_J_NEXT]] = call i32 @llvm.smax.i32(i32 [[A]], i32 [[SMAX_J]])
; CHECK-NEXT: [[J_INC:%.*]] = add i32 [[J]], 1
; CHECK-NEXT: [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], 2
; CHECK-NEXT: br label %[[FOR_I_LATCH]]
; CHECK: [[FOR_J_SPLIT]]:
; CHECK-NEXT: [[SMAX_I_LCSSA]] = phi i32 [ [[SMAX_J_NEXT]], %[[FOR_I_LATCH]] ]
; CHECK-NEXT: [[TMP0]] = add i32 [[J]], 1
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[TMP0]], 2
; CHECK-NEXT: br i1 [[TMP1]], label %[[FOR_J]], label %[[EXIT:.*]]
; CHECK: [[FOR_I_LATCH]]:
; CHECK-NEXT: [[I_INC]] = add i32 [[I]], 1
; CHECK-NEXT: [[CMP_I:%.*]] = icmp slt i32 [[I_INC]], 2
; CHECK-NEXT: br i1 [[CMP_I]], label %[[FOR_I_HEADER]], label %[[FOR_J_SPLIT]]
; CHECK: [[EXIT]]:
; CHECK-NEXT: ret void
;
entry:
br label %for.i.header
for.i.header:
%i = phi i32 [ 0, %entry ], [ %i.inc, %for.i.latch ]
%smax.i = phi i32 [ %init, %entry ], [ %smax.i.lcssa, %for.i.latch ]
br label %for.j
for.j:
%j = phi i32 [ 0, %for.i.header ], [ %j.inc, %for.j ]
%smax.j = phi i32 [ %smax.i, %for.i.header ], [ %smax.j.next, %for.j ]
%idx = getelementptr inbounds [2 x [2 x i32]], ptr %A, i32 0, i32 %j, i32 %i
%a = load i32, ptr %idx, align 4
%smax.j.next = call i32 @llvm.smax(i32 %a, i32 %smax.j)
%j.inc = add i32 %j, 1
%cmp.j = icmp slt i32 %j.inc, 2
br i1 %cmp.j, label %for.j, label %for.i.latch
for.i.latch:
%smax.i.lcssa = phi i32 [ %smax.j.next, %for.j ]
%i.inc = add i32 %i, 1
%cmp.i = icmp slt i32 %i.inc, 2
br i1 %cmp.i, label %for.i.header, label %exit
exit:
ret void
}
; Check that interchanging the loops is legal for the unsigned-minimum reduction.
;
; unsigned umin = init;
; for (int i = 0; i < 2; i++)
; for (int j = 0; j < 2; j++)
; umin = (A[j][i] < umin) ? A[j][i] : umin;
define void @reduction_umin(ptr %A, i32 %init) {
; CHECK-LABEL: define void @reduction_umin(
; CHECK-SAME: ptr [[A:%.*]], i32 [[INIT:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: br label %[[FOR_J_PREHEADER:.*]]
; CHECK: [[FOR_I_HEADER_PREHEADER:.*]]:
; CHECK-NEXT: br label %[[FOR_I_HEADER:.*]]
; CHECK: [[FOR_I_HEADER]]:
; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_INC:%.*]], %[[FOR_I_LATCH:.*]] ], [ 0, %[[FOR_I_HEADER_PREHEADER]] ]
; CHECK-NEXT: [[UMIN_J:%.*]] = phi i32 [ [[UMIN_J_NEXT:%.*]], %[[FOR_I_LATCH]] ], [ [[UMIN_I:%.*]], %[[FOR_I_HEADER_PREHEADER]] ]
; CHECK-NEXT: br label %[[FOR_J_SPLIT1:.*]]
; CHECK: [[FOR_J_PREHEADER]]:
; CHECK-NEXT: br label %[[FOR_J:.*]]
; CHECK: [[FOR_J]]:
; CHECK-NEXT: [[J:%.*]] = phi i32 [ [[TMP0:%.*]], %[[FOR_J_SPLIT:.*]] ], [ 0, %[[FOR_J_PREHEADER]] ]
; CHECK-NEXT: [[UMIN_I]] = phi i32 [ [[UMIN_I_LCSSA:%.*]], %[[FOR_J_SPLIT]] ], [ [[INIT]], %[[FOR_J_PREHEADER]] ]
; CHECK-NEXT: br label %[[FOR_I_HEADER_PREHEADER]]
; CHECK: [[FOR_J_SPLIT1]]:
; CHECK-NEXT: [[IDX:%.*]] = getelementptr inbounds [2 x [2 x i32]], ptr [[A]], i32 0, i32 [[J]], i32 [[I]]
; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[IDX]], align 4
; CHECK-NEXT: [[UMIN_J_NEXT]] = call i32 @llvm.umin.i32(i32 [[A]], i32 [[UMIN_J]])
; CHECK-NEXT: [[J_INC:%.*]] = add i32 [[J]], 1
; CHECK-NEXT: [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], 2
; CHECK-NEXT: br label %[[FOR_I_LATCH]]
; CHECK: [[FOR_J_SPLIT]]:
; CHECK-NEXT: [[UMIN_I_LCSSA]] = phi i32 [ [[UMIN_J_NEXT]], %[[FOR_I_LATCH]] ]
; CHECK-NEXT: [[TMP0]] = add i32 [[J]], 1
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[TMP0]], 2
; CHECK-NEXT: br i1 [[TMP1]], label %[[FOR_J]], label %[[EXIT:.*]]
; CHECK: [[FOR_I_LATCH]]:
; CHECK-NEXT: [[I_INC]] = add i32 [[I]], 1
; CHECK-NEXT: [[CMP_I:%.*]] = icmp slt i32 [[I_INC]], 2
; CHECK-NEXT: br i1 [[CMP_I]], label %[[FOR_I_HEADER]], label %[[FOR_J_SPLIT]]
; CHECK: [[EXIT]]:
; CHECK-NEXT: ret void
;
entry:
br label %for.i.header
for.i.header:
%i = phi i32 [ 0, %entry ], [ %i.inc, %for.i.latch ]
%umin.i = phi i32 [ %init, %entry ], [ %umin.i.lcssa, %for.i.latch ]
br label %for.j
for.j:
%j = phi i32 [ 0, %for.i.header ], [ %j.inc, %for.j ]
%umin.j = phi i32 [ %umin.i, %for.i.header ], [ %umin.j.next, %for.j ]
%idx = getelementptr inbounds [2 x [2 x i32]], ptr %A, i32 0, i32 %j, i32 %i
%a = load i32, ptr %idx, align 4
%umin.j.next = call i32 @llvm.umin(i32 %a, i32 %umin.j)
%j.inc = add i32 %j, 1
%cmp.j = icmp slt i32 %j.inc, 2
br i1 %cmp.j, label %for.j, label %for.i.latch
for.i.latch:
%umin.i.lcssa = phi i32 [ %umin.j.next, %for.j ]
%i.inc = add i32 %i, 1
%cmp.i = icmp slt i32 %i.inc, 2
br i1 %cmp.i, label %for.i.header, label %exit
exit:
ret void
}
; Check that interchanging the loops is legal for the unsigned-maximum reduction.
;
; unsigned umax = 0;
; for (int i = 0; i < 2; i++)
; for (int j = 0; j < 2; j++)
; smax = (A[j][i] > smax) ? A[j][i] : smax;
define void @reduction_umax(ptr %A) {
; CHECK-LABEL: define void @reduction_umax(
; CHECK-SAME: ptr [[A:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: br label %[[FOR_J_PREHEADER:.*]]
; CHECK: [[FOR_I_HEADER_PREHEADER:.*]]:
; CHECK-NEXT: br label %[[FOR_I_HEADER:.*]]
; CHECK: [[FOR_I_HEADER]]:
; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_INC:%.*]], %[[FOR_I_LATCH:.*]] ], [ 0, %[[FOR_I_HEADER_PREHEADER]] ]
; CHECK-NEXT: [[UMAX_J:%.*]] = phi i32 [ [[UMAX_J_NEXT:%.*]], %[[FOR_I_LATCH]] ], [ [[UMAX_I:%.*]], %[[FOR_I_HEADER_PREHEADER]] ]
; CHECK-NEXT: br label %[[FOR_J_SPLIT1:.*]]
; CHECK: [[FOR_J_PREHEADER]]:
; CHECK-NEXT: br label %[[FOR_J:.*]]
; CHECK: [[FOR_J]]:
; CHECK-NEXT: [[J:%.*]] = phi i32 [ [[TMP0:%.*]], %[[FOR_J_SPLIT:.*]] ], [ 0, %[[FOR_J_PREHEADER]] ]
; CHECK-NEXT: [[UMAX_I]] = phi i32 [ [[UMAX_I_LCSSA:%.*]], %[[FOR_J_SPLIT]] ], [ 0, %[[FOR_J_PREHEADER]] ]
; CHECK-NEXT: br label %[[FOR_I_HEADER_PREHEADER]]
; CHECK: [[FOR_J_SPLIT1]]:
; CHECK-NEXT: [[IDX:%.*]] = getelementptr inbounds [2 x [2 x i32]], ptr [[A]], i32 0, i32 [[J]], i32 [[I]]
; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[IDX]], align 4
; CHECK-NEXT: [[UMAX_J_NEXT]] = call i32 @llvm.umax.i32(i32 [[A]], i32 [[UMAX_J]])
; CHECK-NEXT: [[J_INC:%.*]] = add i32 [[J]], 1
; CHECK-NEXT: [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], 2
; CHECK-NEXT: br label %[[FOR_I_LATCH]]
; CHECK: [[FOR_J_SPLIT]]:
; CHECK-NEXT: [[UMAX_I_LCSSA]] = phi i32 [ [[UMAX_J_NEXT]], %[[FOR_I_LATCH]] ]
; CHECK-NEXT: [[TMP0]] = add i32 [[J]], 1
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[TMP0]], 2
; CHECK-NEXT: br i1 [[TMP1]], label %[[FOR_J]], label %[[EXIT:.*]]
; CHECK: [[FOR_I_LATCH]]:
; CHECK-NEXT: [[I_INC]] = add i32 [[I]], 1
; CHECK-NEXT: [[CMP_I:%.*]] = icmp slt i32 [[I_INC]], 2
; CHECK-NEXT: br i1 [[CMP_I]], label %[[FOR_I_HEADER]], label %[[FOR_J_SPLIT]]
; CHECK: [[EXIT]]:
; CHECK-NEXT: ret void
;
entry:
br label %for.i.header
for.i.header:
%i = phi i32 [ 0, %entry ], [ %i.inc, %for.i.latch ]
%umax.i = phi i32 [ 0, %entry ], [ %umax.i.lcssa, %for.i.latch ]
br label %for.j
for.j:
%j = phi i32 [ 0, %for.i.header ], [ %j.inc, %for.j ]
%umax.j = phi i32 [ %umax.i, %for.i.header ], [ %umax.j.next, %for.j ]
%idx = getelementptr inbounds [2 x [2 x i32]], ptr %A, i32 0, i32 %j, i32 %i
%a = load i32, ptr %idx, align 4
%umax.j.next = call i32 @llvm.umax(i32 %a, i32 %umax.j)
%j.inc = add i32 %j, 1
%cmp.j = icmp slt i32 %j.inc, 2
br i1 %cmp.j, label %for.j, label %for.i.latch
for.i.latch:
%umax.i.lcssa = phi i32 [ %umax.j.next, %for.j ]
%i.inc = add i32 %i, 1
%cmp.i = icmp slt i32 %i.inc, 2
br i1 %cmp.i, label %for.i.header, label %exit
exit:
ret void
}
; Interchanging the loops with AnyOf reduction is not necessarily legal. In
; this case it should be legal, but we conservatively reject it at the moment.
;
; int any_of = 0;
; for (int i = 0; i < 2; i++)
; for (int j = 0; j < 2; j++)
; any_of = (A[j][i] == 42) ? 1 : any_of;
define void @reduction_anyof(ptr %A) {
; CHECK-LABEL: define void @reduction_anyof(
; CHECK-SAME: ptr [[A:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*]]:
; CHECK-NEXT: br label %[[FOR_I_HEADER:.*]]
; CHECK: [[FOR_I_HEADER]]:
; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[I_INC:%.*]], %[[FOR_I_LATCH:.*]] ]
; CHECK-NEXT: [[ANYOF_I:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[ANYOF_I_LCSSA:%.*]], %[[FOR_I_LATCH]] ]
; CHECK-NEXT: br label %[[FOR_J:.*]]
; CHECK: [[FOR_J]]:
; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, %[[FOR_I_HEADER]] ], [ [[J_INC:%.*]], %[[FOR_J]] ]
; CHECK-NEXT: [[ANYOF_J:%.*]] = phi i32 [ [[ANYOF_I]], %[[FOR_I_HEADER]] ], [ [[ANYOF_J_NEXT:%.*]], %[[FOR_J]] ]
; CHECK-NEXT: [[IDX:%.*]] = getelementptr inbounds [2 x [2 x i32]], ptr [[A]], i32 0, i32 [[J]], i32 [[I]]
; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[IDX]], align 4
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 42
; CHECK-NEXT: [[ANYOF_J_NEXT]] = select i1 [[CMP]], i32 1, i32 [[ANYOF_J]]
; CHECK-NEXT: [[J_INC]] = add i32 [[J]], 1
; CHECK-NEXT: [[CMP_J:%.*]] = icmp slt i32 [[J_INC]], 2
; CHECK-NEXT: br i1 [[CMP_J]], label %[[FOR_J]], label %[[FOR_I_LATCH]]
; CHECK: [[FOR_I_LATCH]]:
; CHECK-NEXT: [[ANYOF_I_LCSSA]] = phi i32 [ [[ANYOF_J_NEXT]], %[[FOR_J]] ]
; CHECK-NEXT: [[I_INC]] = add i32 [[I]], 1
; CHECK-NEXT: [[CMP_I:%.*]] = icmp slt i32 [[I_INC]], 2
; CHECK-NEXT: br i1 [[CMP_I]], label %[[FOR_I_HEADER]], label %[[EXIT:.*]]
; CHECK: [[EXIT]]:
; CHECK-NEXT: ret void
;
entry:
br label %for.i.header
for.i.header:
%i = phi i32 [ 0, %entry ], [ %i.inc, %for.i.latch ]
%anyof.i = phi i32 [ 0, %entry ], [ %anyof.i.lcssa, %for.i.latch ]
br label %for.j
for.j:
%j = phi i32 [ 0, %for.i.header ], [ %j.inc, %for.j ]
%anyof.j = phi i32 [ %anyof.i, %for.i.header ], [ %anyof.j.next, %for.j ]
%idx = getelementptr inbounds [2 x [2 x i32]], ptr %A, i32 0, i32 %j, i32 %i
%a = load i32, ptr %idx, align 4
%cmp = icmp eq i32 %a, 42
%anyof.j.next = select i1 %cmp, i32 1, i32 %anyof.j
%j.inc = add i32 %j, 1
%cmp.j = icmp slt i32 %j.inc, 2
br i1 %cmp.j, label %for.j, label %for.i.latch
for.i.latch:
%anyof.i.lcssa = phi i32 [ %anyof.j.next, %for.j ]
%i.inc = add i32 %i, 1
%cmp.i = icmp slt i32 %i.inc, 2
br i1 %cmp.i, label %for.i.header, label %exit
exit:
ret void
}