| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6 | |
| ; RUN: opt -S -mtriple=powerpc64le-unknown-linux-gnu -passes=slp-vectorizer < %s | FileCheck %s | |
| define { i64, i64 } @test(ptr %call39.i) { | |
| ; CHECK-LABEL: define { i64, i64 } @test( | |
| ; CHECK-SAME: ptr [[CALL39_I:%.*]]) { | |
| ; CHECK-NEXT: [[ENTRY:.*:]] | |
| ; CHECK-NEXT: [[VEC2STRUCT_SLOT:%.*]] = alloca { i64, i64 }, align 16 | |
| ; CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, ptr [[CALL39_I]], align 8 | |
| ; CHECK-NEXT: [[CALL_I_I:%.*]] = load volatile i1, ptr null, align 4294967296 | |
| ; CHECK-NEXT: br i1 [[CALL_I_I]], label %[[EXIT:.*]], label %[[IF_THEN_I_I:.*]] | |
| ; CHECK: [[IF_THEN_I_I]]: | |
| ; CHECK-NEXT: [[CALL2_I_I:%.*]] = load volatile ptr, ptr null, align 4294967296 | |
| ; CHECK-NEXT: br label %[[EXIT]] | |
| ; CHECK: [[EXIT]]: | |
| ; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i64> [[TMP0]], <i64 -1, i64 1> | |
| ; CHECK-NEXT: store <2 x i64> [[TMP1]], ptr [[VEC2STRUCT_SLOT]], align 16 | |
| ; CHECK-NEXT: [[VEC2STRUCT:%.*]] = load { i64, i64 }, ptr [[VEC2STRUCT_SLOT]], align 16 | |
| ; CHECK-NEXT: ret { i64, i64 } [[VEC2STRUCT]] | |
| ; | |
| entry: | |
| %retval.sroa.0.0.copyload.i = load i64, ptr %call39.i, align 8 | |
| %retval.sroa.2.0.call39.sroa_idx.i = getelementptr i8, ptr %call39.i, i64 8 | |
| %retval.sroa.2.0.copyload.i = load i64, ptr %retval.sroa.2.0.call39.sroa_idx.i, align 8 | |
| %call.i.i = load volatile i1, ptr null, align 4294967296 | |
| br i1 %call.i.i, label %exit, label %if.then.i.i | |
| if.then.i.i: | |
| %call2.i.i = load volatile ptr, ptr null, align 4294967296 | |
| br label %exit | |
| exit: | |
| %.fca.0.insert.i = insertvalue { i64, i64 } poison, i64 %retval.sroa.0.0.copyload.i, 0 | |
| %retval.sroa.2.8.insert.ext = and i64 %retval.sroa.2.0.copyload.i, 1 | |
| %.fca.1.insert = insertvalue { i64, i64 } %.fca.0.insert.i, i64 %retval.sroa.2.8.insert.ext, 1 | |
| ret { i64, i64 } %.fca.1.insert | |
| } |