llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-intrinsic.ll

; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --filter-out-after "^middle.block" --version 6
; RUN: opt -passes=loop-vectorize -force-vector-width="vscale x 4" \
; RUN:     -vplan-print-after=printFinalVPlan -disable-output %s 2>&1 \
; RUN:   | FileCheck --strict-whitespace %s

define void @scalar_intrinsic_print(i64 %x, ptr %p) {
; CHECK-LABEL: VPlan for loop in 'scalar_intrinsic_print'
; CHECK:  VPlan 'Final VPlan for VF={vscale x 4},UF={1}' {
; CHECK-NEXT:  Live-in ir<128> = original trip-count
; CHECK-EMPTY:
; CHECK-NEXT:  ir-bb<entry>:
; CHECK-NEXT:    EMIT-SCALAR vp<[[VP2:%[0-9]+]]> = call i64 @llvm.vscale(){{$}}
; CHECK-NEXT:    EMIT vp<[[VP3:%[0-9]+]]> = shl nuw vp<[[VP2]]>, ir<2>
; CHECK-NEXT:    EMIT vp<%min.iters.check> = icmp ult ir<128>, vp<[[VP3]]>
; CHECK-NEXT:    EMIT branch-on-cond vp<%min.iters.check>
; CHECK-NEXT:  Successor(s): ir-bb<scalar.ph>, vector.ph
; CHECK-EMPTY:
; CHECK-NEXT:  vector.ph:
; CHECK-NEXT:    EMIT vp<%n.mod.vf> = urem ir<128>, vp<[[VP3]]>
; CHECK-NEXT:    EMIT vp<%n.vec> = sub ir<128>, vp<%n.mod.vf>
; CHECK-NEXT:    EMIT vp<[[VP5:%[0-9]+]]> = broadcast ir<%x>
; CHECK-NEXT:    EMIT vp<[[VP6:%[0-9]+]]> = step-vector i64
; CHECK-NEXT:    EMIT vp<[[VP7:%[0-9]+]]> = broadcast vp<[[VP3]]>
; CHECK-NEXT:  Successor(s): vector.body
; CHECK-EMPTY:
; CHECK-NEXT:  vector.body:
; CHECK-NEXT:    EMIT-SCALAR vp<%index> = phi [ ir<0>, vector.ph ], [ vp<%index.next>, vector.body ]
; CHECK-NEXT:    WIDEN-PHI vp<[[VP8:%[0-9]+]]> = phi [ vp<[[VP6]]>, vector.ph ], [ vp<%vec.ind.next>, vector.body ]
; CHECK-NEXT:    EMIT vp<%index.next> = add nuw vp<%index>, vp<[[VP3]]>
; CHECK-NEXT:    EMIT vp<%vec.ind.next> = add nuw nsw vp<[[VP8]]>, vp<[[VP7]]>
; CHECK-NEXT:    EMIT vp<[[VP9:%[0-9]+]]> = icmp eq vp<%index.next>, vp<%n.vec>
; CHECK-NEXT:    EMIT branch-on-cond vp<[[VP9]]>
; CHECK-NEXT:  Successor(s): middle.block, vector.body
; CHECK-EMPTY:
; CHECK-NEXT:  middle.block:
;
entry:
  br label %loop

loop:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
  %smin = call i64 @llvm.smin.i64(i64 %x, i64 %iv)
  store i64 %smin, ptr %p
  %iv.next = add nuw nsw i64 %iv, 1
  %ec = icmp eq i64 %iv.next, 128
  br i1 %ec, label %exit, label %loop

exit:
  ret void
}