llvm/test/CodeGen/SystemZ/vec-args-01.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; Test the handling of named vector arguments.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s -check-prefix=CHECK-VEC
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s -check-prefix=CHECK-STACK

; This routine has 6 integer arguments, which fill up r2-r5 and
; the stack slot at offset 160, and 10 vector arguments, which
; fill up v24-v31 and the two double-wide stack slots at 168
; and 184.
declare void @bar(i64, i64, i64, i64, i64, i64,
                  <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>,
                  <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>,
                  <4 x i32>, <4 x i32>)

define void @foo() {
; CHECK-VEC-LABEL: foo:
; CHECK-VEC:       # %bb.0:
; CHECK-VEC-NEXT:    stmg %r6, %r15, 48(%r15)
; CHECK-VEC-NEXT:    .cfi_offset %r6, -112
; CHECK-VEC-NEXT:    .cfi_offset %r14, -48
; CHECK-VEC-NEXT:    .cfi_offset %r15, -40
; CHECK-VEC-NEXT:    aghi %r15, -200
; CHECK-VEC-NEXT:    .cfi_def_cfa_offset 360
; CHECK-VEC-NEXT:    vrepif %v0, 10
; CHECK-VEC-NEXT:    vst %v0, 184(%r15), 3
; CHECK-VEC-NEXT:    vrepif %v0, 9
; CHECK-VEC-NEXT:    vrepif %v24, 1
; CHECK-VEC-NEXT:    vrepif %v26, 2
; CHECK-VEC-NEXT:    vrepif %v28, 3
; CHECK-VEC-NEXT:    vrepif %v30, 4
; CHECK-VEC-NEXT:    vrepif %v25, 5
; CHECK-VEC-NEXT:    vrepif %v27, 6
; CHECK-VEC-NEXT:    vrepif %v29, 7
; CHECK-VEC-NEXT:    vrepif %v31, 8
; CHECK-VEC-NEXT:    lghi %r2, 1
; CHECK-VEC-NEXT:    lghi %r3, 2
; CHECK-VEC-NEXT:    lghi %r4, 3
; CHECK-VEC-NEXT:    lghi %r5, 4
; CHECK-VEC-NEXT:    lghi %r6, 5
; CHECK-VEC-NEXT:    vst %v0, 168(%r15), 3
; CHECK-VEC-NEXT:    mvghi 160(%r15), 6
; CHECK-VEC-NEXT:    brasl %r14, bar@PLT
; CHECK-VEC-NEXT:    lmg %r6, %r15, 248(%r15)
; CHECK-VEC-NEXT:    br %r14
;
; CHECK-STACK-LABEL: foo:
; CHECK-STACK:       # %bb.0:
; CHECK-STACK-NEXT:    stmg %r6, %r15, 48(%r15)
; CHECK-STACK-NEXT:    .cfi_offset %r6, -112
; CHECK-STACK-NEXT:    .cfi_offset %r14, -48
; CHECK-STACK-NEXT:    .cfi_offset %r15, -40
; CHECK-STACK-NEXT:    aghi %r15, -200
; CHECK-STACK-NEXT:    .cfi_def_cfa_offset 360
; CHECK-STACK-NEXT:    vrepif %v0, 10
; CHECK-STACK-NEXT:    vst %v0, 184(%r15), 3
; CHECK-STACK-NEXT:    vrepif %v0, 9
; CHECK-STACK-NEXT:    vrepif %v24, 1
; CHECK-STACK-NEXT:    vrepif %v26, 2
; CHECK-STACK-NEXT:    vrepif %v28, 3
; CHECK-STACK-NEXT:    vrepif %v30, 4
; CHECK-STACK-NEXT:    vrepif %v25, 5
; CHECK-STACK-NEXT:    vrepif %v27, 6
; CHECK-STACK-NEXT:    vrepif %v29, 7
; CHECK-STACK-NEXT:    vrepif %v31, 8
; CHECK-STACK-NEXT:    lghi %r2, 1
; CHECK-STACK-NEXT:    lghi %r3, 2
; CHECK-STACK-NEXT:    lghi %r4, 3
; CHECK-STACK-NEXT:    lghi %r5, 4
; CHECK-STACK-NEXT:    lghi %r6, 5
; CHECK-STACK-NEXT:    vst %v0, 168(%r15), 3
; CHECK-STACK-NEXT:    mvghi 160(%r15), 6
; CHECK-STACK-NEXT:    brasl %r14, bar@PLT
; CHECK-STACK-NEXT:    lmg %r6, %r15, 248(%r15)
; CHECK-STACK-NEXT:    br %r14

  call void @bar (i64 1, i64 2, i64 3, i64 4, i64 5, i64 6,
                  <4 x i32> <i32 1, i32 1, i32 1, i32 1>,
                  <4 x i32> <i32 2, i32 2, i32 2, i32 2>,
                  <4 x i32> <i32 3, i32 3, i32 3, i32 3>,
                  <4 x i32> <i32 4, i32 4, i32 4, i32 4>,
                  <4 x i32> <i32 5, i32 5, i32 5, i32 5>,
                  <4 x i32> <i32 6, i32 6, i32 6, i32 6>,
                  <4 x i32> <i32 7, i32 7, i32 7, i32 7>,
                  <4 x i32> <i32 8, i32 8, i32 8, i32 8>,
                  <4 x i32> <i32 9, i32 9, i32 9, i32 9>,
                  <4 x i32> <i32 10, i32 10, i32 10, i32 10>)
  ret void
}