| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 6 |
| ; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=1 -force-vector-interleave=2 -passes=loop-vectorize -verify-loop-info < %s | FileCheck %s --check-prefix=UNROLL |
| ; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=1 -force-vector-interleave=2 -passes=loop-vectorize -verify-loop-info < %s | FileCheck %s --check-prefix=UNROLL-NOSIMPLIFY |
| ; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=2 -force-vector-interleave=1 -passes=loop-vectorize -verify-loop-info < %s | FileCheck %s --check-prefix=VEC |
| |
| target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" |
| |
| ; Test predication of stores. |
| define i32 @test(ptr nocapture %f) #0 { |
| ; UNROLL-LABEL: define i32 @test( |
| ; UNROLL-SAME: ptr captures(none) [[F:%.*]]) { |
| ; UNROLL-NEXT: [[ENTRY:.*:]] |
| ; UNROLL-NEXT: br label %[[VECTOR_PH:.*]] |
| ; UNROLL: [[VECTOR_PH]]: |
| ; UNROLL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; UNROLL: [[VECTOR_BODY]]: |
| ; UNROLL-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE2:.*]] ] |
| ; UNROLL-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 1 |
| ; UNROLL-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[F]], i64 [[INDEX]] |
| ; UNROLL-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[F]], i64 [[TMP0]] |
| ; UNROLL-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP1]], align 4 |
| ; UNROLL-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP2]], align 4 |
| ; UNROLL-NEXT: [[TMP5:%.*]] = icmp sgt i32 [[TMP3]], 100 |
| ; UNROLL-NEXT: [[TMP6:%.*]] = icmp sgt i32 [[TMP4]], 100 |
| ; UNROLL-NEXT: br i1 [[TMP5]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] |
| ; UNROLL: [[PRED_STORE_IF]]: |
| ; UNROLL-NEXT: [[TMP7:%.*]] = add nsw i32 [[TMP3]], 20 |
| ; UNROLL-NEXT: store i32 [[TMP7]], ptr [[TMP1]], align 4 |
| ; UNROLL-NEXT: br label %[[PRED_STORE_CONTINUE]] |
| ; UNROLL: [[PRED_STORE_CONTINUE]]: |
| ; UNROLL-NEXT: br i1 [[TMP6]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2]] |
| ; UNROLL: [[PRED_STORE_IF1]]: |
| ; UNROLL-NEXT: [[TMP8:%.*]] = add nsw i32 [[TMP4]], 20 |
| ; UNROLL-NEXT: store i32 [[TMP8]], ptr [[TMP2]], align 4 |
| ; UNROLL-NEXT: br label %[[PRED_STORE_CONTINUE2]] |
| ; UNROLL: [[PRED_STORE_CONTINUE2]]: |
| ; UNROLL-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; UNROLL-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128 |
| ; UNROLL-NEXT: br i1 [[TMP9]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] |
| ; UNROLL: [[MIDDLE_BLOCK]]: |
| ; UNROLL-NEXT: br label %[[FOR_END:.*]] |
| ; UNROLL: [[FOR_END]]: |
| ; UNROLL-NEXT: ret i32 0 |
| ; |
| ; UNROLL-NOSIMPLIFY-LABEL: define i32 @test( |
| ; UNROLL-NOSIMPLIFY-SAME: ptr captures(none) [[F:%.*]]) { |
| ; UNROLL-NOSIMPLIFY-NEXT: [[ENTRY:.*:]] |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[VECTOR_PH:.*]] |
| ; UNROLL-NOSIMPLIFY: [[VECTOR_PH]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; UNROLL-NOSIMPLIFY: [[VECTOR_BODY]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE2:.*]] ] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[F]], i64 [[INDEX]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[F]], i64 [[TMP0]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP1]], align 4 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP2]], align 4 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP5:%.*]] = icmp sgt i32 [[TMP3]], 100 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP6:%.*]] = icmp sgt i32 [[TMP4]], 100 |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[TMP5]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] |
| ; UNROLL-NOSIMPLIFY: [[PRED_STORE_IF]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP7:%.*]] = add nsw i32 [[TMP3]], 20 |
| ; UNROLL-NOSIMPLIFY-NEXT: store i32 [[TMP7]], ptr [[TMP1]], align 4 |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[PRED_STORE_CONTINUE]] |
| ; UNROLL-NOSIMPLIFY: [[PRED_STORE_CONTINUE]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[TMP6]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2]] |
| ; UNROLL-NOSIMPLIFY: [[PRED_STORE_IF1]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP8:%.*]] = add nsw i32 [[TMP4]], 20 |
| ; UNROLL-NOSIMPLIFY-NEXT: store i32 [[TMP8]], ptr [[TMP2]], align 4 |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[PRED_STORE_CONTINUE2]] |
| ; UNROLL-NOSIMPLIFY: [[PRED_STORE_CONTINUE2]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128 |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[TMP9]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] |
| ; UNROLL-NOSIMPLIFY: [[MIDDLE_BLOCK]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[FOR_END:.*]] |
| ; UNROLL-NOSIMPLIFY: [[FOR_END]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: ret i32 0 |
| ; |
| ; VEC-LABEL: define i32 @test( |
| ; VEC-SAME: ptr captures(none) [[F:%.*]]) { |
| ; VEC-NEXT: [[ENTRY:.*:]] |
| ; VEC-NEXT: br label %[[VECTOR_PH:.*]] |
| ; VEC: [[VECTOR_PH]]: |
| ; VEC-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC: [[VECTOR_BODY]]: |
| ; VEC-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE2:.*]] ] |
| ; VEC-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[F]], i64 [[INDEX]] |
| ; VEC-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP0]], align 4 |
| ; VEC-NEXT: [[TMP1:%.*]] = icmp sgt <2 x i32> [[WIDE_LOAD]], splat (i32 100) |
| ; VEC-NEXT: [[TMP2:%.*]] = extractelement <2 x i1> [[TMP1]], i64 0 |
| ; VEC-NEXT: br i1 [[TMP2]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] |
| ; VEC: [[PRED_STORE_IF]]: |
| ; VEC-NEXT: [[TMP3:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i64 0 |
| ; VEC-NEXT: [[TMP4:%.*]] = add nsw i32 [[TMP3]], 20 |
| ; VEC-NEXT: store i32 [[TMP4]], ptr [[TMP0]], align 4 |
| ; VEC-NEXT: br label %[[PRED_STORE_CONTINUE]] |
| ; VEC: [[PRED_STORE_CONTINUE]]: |
| ; VEC-NEXT: [[TMP5:%.*]] = extractelement <2 x i1> [[TMP1]], i64 1 |
| ; VEC-NEXT: br i1 [[TMP5]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2]] |
| ; VEC: [[PRED_STORE_IF1]]: |
| ; VEC-NEXT: [[TMP6:%.*]] = add i64 [[INDEX]], 1 |
| ; VEC-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[F]], i64 [[TMP6]] |
| ; VEC-NEXT: [[TMP8:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i64 1 |
| ; VEC-NEXT: [[TMP9:%.*]] = add nsw i32 [[TMP8]], 20 |
| ; VEC-NEXT: store i32 [[TMP9]], ptr [[TMP7]], align 4 |
| ; VEC-NEXT: br label %[[PRED_STORE_CONTINUE2]] |
| ; VEC: [[PRED_STORE_CONTINUE2]]: |
| ; VEC-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; VEC-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128 |
| ; VEC-NEXT: br i1 [[TMP10]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] |
| ; VEC: [[MIDDLE_BLOCK]]: |
| ; VEC-NEXT: br label %[[FOR_END:.*]] |
| ; VEC: [[FOR_END]]: |
| ; VEC-NEXT: ret i32 0 |
| ; |
| entry: |
| br label %for.body |
| |
| |
| |
| for.body: |
| %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.inc ] |
| %arrayidx = getelementptr inbounds i32, ptr %f, i64 %indvars.iv |
| %0 = load i32, ptr %arrayidx, align 4 |
| %cmp1 = icmp sgt i32 %0, 100 |
| br i1 %cmp1, label %if.then, label %for.inc |
| |
| if.then: |
| %add = add nsw i32 %0, 20 |
| store i32 %add, ptr %arrayidx, align 4 |
| br label %for.inc |
| |
| for.inc: |
| %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 |
| %exitcond = icmp eq i64 %indvars.iv.next, 128 |
| br i1 %exitcond, label %for.end, label %for.body |
| |
| for.end: |
| ret i32 0 |
| } |
| |
| ; Track basic blocks when unrolling conditional blocks. This code used to assert |
| ; because we did not update the phi nodes with the proper predecessor in the |
| ; vectorized loop body. |
| ; PR18724 |
| |
| define void @bug18724(i1 %cond, ptr %ptr, i1 %cond.2, i64 %v.1, i32 %v.2) { |
| ; UNROLL-LABEL: define void @bug18724( |
| ; UNROLL-SAME: i1 [[COND:%.*]], ptr [[PTR:%.*]], i1 [[COND_2:%.*]], i64 [[V_1:%.*]], i32 [[V_2:%.*]]) { |
| ; UNROLL-NEXT: [[ENTRY:.*:]] |
| ; UNROLL-NEXT: br label %[[FOR_BODY9:.*]] |
| ; UNROLL: [[FOR_BODY9]]: |
| ; UNROLL-NEXT: br i1 [[COND]], label %[[FOR_INC26:.*]], label %[[FOR_BODY14_PREHEADER:.*]] |
| ; UNROLL: [[FOR_BODY14_PREHEADER]]: |
| ; UNROLL-NEXT: [[TMP0:%.*]] = trunc i64 [[V_1]] to i32 |
| ; UNROLL-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP0]], i32 0) |
| ; UNROLL-NEXT: [[TMP2:%.*]] = sub i32 [[TMP1]], [[TMP0]] |
| ; UNROLL-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 |
| ; UNROLL-NEXT: [[TMP4:%.*]] = add nuw nsw i64 [[TMP3]], 1 |
| ; UNROLL-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP4]], 2 |
| ; UNROLL-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; UNROLL: [[VECTOR_PH]]: |
| ; UNROLL-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP4]], 1 |
| ; UNROLL-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP4]], [[N_MOD_VF]] |
| ; UNROLL-NEXT: [[TMP5:%.*]] = add i64 [[V_1]], [[N_VEC]] |
| ; UNROLL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; UNROLL: [[VECTOR_BODY]]: |
| ; UNROLL-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE3:.*]] ] |
| ; UNROLL-NEXT: [[VEC_PHI:%.*]] = phi i32 [ [[V_2]], %[[VECTOR_PH]] ], [ [[PREDPHI:%.*]], %[[PRED_STORE_CONTINUE3]] ] |
| ; UNROLL-NEXT: [[VEC_PHI1:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[PREDPHI4:%.*]], %[[PRED_STORE_CONTINUE3]] ] |
| ; UNROLL-NEXT: [[TMP6:%.*]] = add i64 [[V_1]], [[INDEX]] |
| ; UNROLL-NEXT: [[TMP7:%.*]] = add i64 [[TMP6]], 1 |
| ; UNROLL-NEXT: [[TMP8:%.*]] = getelementptr inbounds [768 x i32], ptr [[PTR]], i64 0, i64 [[TMP6]] |
| ; UNROLL-NEXT: [[TMP9:%.*]] = getelementptr inbounds [768 x i32], ptr [[PTR]], i64 0, i64 [[TMP7]] |
| ; UNROLL-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP8]], align 4 |
| ; UNROLL-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP9]], align 4 |
| ; UNROLL-NEXT: br i1 [[COND_2]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] |
| ; UNROLL: [[PRED_STORE_IF]]: |
| ; UNROLL-NEXT: store i32 [[TMP10]], ptr [[TMP8]], align 4 |
| ; UNROLL-NEXT: br label %[[PRED_STORE_CONTINUE]] |
| ; UNROLL: [[PRED_STORE_CONTINUE]]: |
| ; UNROLL-NEXT: br i1 [[COND_2]], label %[[PRED_STORE_IF2:.*]], label %[[PRED_STORE_CONTINUE3]] |
| ; UNROLL: [[PRED_STORE_IF2]]: |
| ; UNROLL-NEXT: store i32 [[TMP11]], ptr [[TMP9]], align 4 |
| ; UNROLL-NEXT: br label %[[PRED_STORE_CONTINUE3]] |
| ; UNROLL: [[PRED_STORE_CONTINUE3]]: |
| ; UNROLL-NEXT: [[TMP12:%.*]] = add i32 [[VEC_PHI]], 1 |
| ; UNROLL-NEXT: [[TMP13:%.*]] = add i32 [[VEC_PHI1]], 1 |
| ; UNROLL-NEXT: [[PREDPHI]] = select i1 [[COND_2]], i32 [[TMP12]], i32 [[VEC_PHI]] |
| ; UNROLL-NEXT: [[PREDPHI4]] = select i1 [[COND_2]], i32 [[TMP13]], i32 [[VEC_PHI1]] |
| ; UNROLL-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; UNROLL-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; UNROLL-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]] |
| ; UNROLL: [[MIDDLE_BLOCK]]: |
| ; UNROLL-NEXT: [[BIN_RDX:%.*]] = add i32 [[PREDPHI4]], [[PREDPHI]] |
| ; UNROLL-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP4]], [[N_VEC]] |
| ; UNROLL-NEXT: br i1 [[CMP_N]], label %[[FOR_INC26_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; UNROLL: [[SCALAR_PH]]: |
| ; UNROLL-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[TMP5]], %[[MIDDLE_BLOCK]] ], [ [[V_1]], %[[FOR_BODY14_PREHEADER]] ] |
| ; UNROLL-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[BIN_RDX]], %[[MIDDLE_BLOCK]] ], [ [[V_2]], %[[FOR_BODY14_PREHEADER]] ] |
| ; UNROLL-NEXT: br label %[[FOR_BODY14:.*]] |
| ; UNROLL: [[FOR_BODY14]]: |
| ; UNROLL-NEXT: [[INDVARS_IV3:%.*]] = phi i64 [ [[INDVARS_IV_NEXT4:%.*]], %[[FOR_INC23:.*]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; UNROLL-NEXT: [[INEWCHUNKS_120:%.*]] = phi i32 [ [[INEWCHUNKS_2:%.*]], %[[FOR_INC23]] ], [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ] |
| ; UNROLL-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds [768 x i32], ptr [[PTR]], i64 0, i64 [[INDVARS_IV3]] |
| ; UNROLL-NEXT: [[TMP:%.*]] = load i32, ptr [[ARRAYIDX16]], align 4 |
| ; UNROLL-NEXT: br i1 [[COND_2]], label %[[IF_THEN18:.*]], label %[[FOR_INC23]] |
| ; UNROLL: [[IF_THEN18]]: |
| ; UNROLL-NEXT: store i32 [[TMP]], ptr [[ARRAYIDX16]], align 4 |
| ; UNROLL-NEXT: [[INC21:%.*]] = add nsw i32 [[INEWCHUNKS_120]], 1 |
| ; UNROLL-NEXT: br label %[[FOR_INC23]] |
| ; UNROLL: [[FOR_INC23]]: |
| ; UNROLL-NEXT: [[INEWCHUNKS_2]] = phi i32 [ [[INC21]], %[[IF_THEN18]] ], [ [[INEWCHUNKS_120]], %[[FOR_BODY14]] ] |
| ; UNROLL-NEXT: [[INDVARS_IV_NEXT4]] = add nsw i64 [[INDVARS_IV3]], 1 |
| ; UNROLL-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV3]] to i32 |
| ; UNROLL-NEXT: [[CMP13:%.*]] = icmp slt i32 [[TMP1]], 0 |
| ; UNROLL-NEXT: br i1 [[CMP13]], label %[[FOR_BODY14]], label %[[FOR_INC26_LOOPEXIT]], !llvm.loop [[LOOP4:![0-9]+]] |
| ; UNROLL: [[FOR_INC26_LOOPEXIT]]: |
| ; UNROLL-NEXT: [[INEWCHUNKS_2_LCSSA:%.*]] = phi i32 [ [[INEWCHUNKS_2]], %[[FOR_INC23]] ], [ [[BIN_RDX]], %[[MIDDLE_BLOCK]] ] |
| ; UNROLL-NEXT: br label %[[FOR_INC26]] |
| ; UNROLL: [[FOR_INC26]]: |
| ; UNROLL-NEXT: [[INEWCHUNKS_1_LCSSA:%.*]] = phi i32 [ 0, %[[FOR_BODY9]] ], [ [[INEWCHUNKS_2_LCSSA]], %[[FOR_INC26_LOOPEXIT]] ] |
| ; UNROLL-NEXT: unreachable |
| ; |
| ; UNROLL-NOSIMPLIFY-LABEL: define void @bug18724( |
| ; UNROLL-NOSIMPLIFY-SAME: i1 [[COND:%.*]], ptr [[PTR:%.*]], i1 [[COND_2:%.*]], i64 [[V_1:%.*]], i32 [[V_2:%.*]]) { |
| ; UNROLL-NOSIMPLIFY-NEXT: [[ENTRY:.*:]] |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[FOR_BODY9:.*]] |
| ; UNROLL-NOSIMPLIFY: [[FOR_BODY9]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[COND]], label %[[FOR_INC26:.*]], label %[[FOR_BODY14_PREHEADER:.*]] |
| ; UNROLL-NOSIMPLIFY: [[FOR_BODY14_PREHEADER]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP0:%.*]] = trunc i64 [[V_1]] to i32 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP0]], i32 0) |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP2:%.*]] = sub i32 [[TMP1]], [[TMP0]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP4:%.*]] = add nuw nsw i64 [[TMP3]], 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP4]], 2 |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; UNROLL-NOSIMPLIFY: [[VECTOR_PH]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP4]], 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP4]], [[N_MOD_VF]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP5:%.*]] = add i64 [[V_1]], [[N_VEC]] |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; UNROLL-NOSIMPLIFY: [[VECTOR_BODY]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE3:.*]] ] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[VEC_PHI:%.*]] = phi i32 [ [[V_2]], %[[VECTOR_PH]] ], [ [[PREDPHI:%.*]], %[[PRED_STORE_CONTINUE3]] ] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[VEC_PHI1:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[PREDPHI4:%.*]], %[[PRED_STORE_CONTINUE3]] ] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP6:%.*]] = add i64 [[V_1]], [[INDEX]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP7:%.*]] = add i64 [[TMP6]], 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP8:%.*]] = getelementptr inbounds [768 x i32], ptr [[PTR]], i64 0, i64 [[TMP6]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP9:%.*]] = getelementptr inbounds [768 x i32], ptr [[PTR]], i64 0, i64 [[TMP7]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP8]], align 4 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP9]], align 4 |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[COND_2]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] |
| ; UNROLL-NOSIMPLIFY: [[PRED_STORE_IF]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: store i32 [[TMP10]], ptr [[TMP8]], align 4 |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[PRED_STORE_CONTINUE]] |
| ; UNROLL-NOSIMPLIFY: [[PRED_STORE_CONTINUE]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[COND_2]], label %[[PRED_STORE_IF2:.*]], label %[[PRED_STORE_CONTINUE3]] |
| ; UNROLL-NOSIMPLIFY: [[PRED_STORE_IF2]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: store i32 [[TMP11]], ptr [[TMP9]], align 4 |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[PRED_STORE_CONTINUE3]] |
| ; UNROLL-NOSIMPLIFY: [[PRED_STORE_CONTINUE3]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP12:%.*]] = add i32 [[VEC_PHI]], 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP13:%.*]] = add i32 [[VEC_PHI1]], 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[PREDPHI]] = select i1 [[COND_2]], i32 [[TMP12]], i32 [[VEC_PHI]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[PREDPHI4]] = select i1 [[COND_2]], i32 [[TMP13]], i32 [[VEC_PHI1]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]] |
| ; UNROLL-NOSIMPLIFY: [[MIDDLE_BLOCK]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[BIN_RDX:%.*]] = add i32 [[PREDPHI4]], [[PREDPHI]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP4]], [[N_VEC]] |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[CMP_N]], label %[[FOR_INC26_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; UNROLL-NOSIMPLIFY: [[SCALAR_PH]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[TMP5]], %[[MIDDLE_BLOCK]] ], [ [[V_1]], %[[FOR_BODY14_PREHEADER]] ] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[BIN_RDX]], %[[MIDDLE_BLOCK]] ], [ [[V_2]], %[[FOR_BODY14_PREHEADER]] ] |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[FOR_BODY14:.*]] |
| ; UNROLL-NOSIMPLIFY: [[FOR_BODY14]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[INDVARS_IV3:%.*]] = phi i64 [ [[INDVARS_IV_NEXT4:%.*]], %[[FOR_INC23:.*]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[INEWCHUNKS_120:%.*]] = phi i32 [ [[INEWCHUNKS_2:%.*]], %[[FOR_INC23]] ], [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds [768 x i32], ptr [[PTR]], i64 0, i64 [[INDVARS_IV3]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP:%.*]] = load i32, ptr [[ARRAYIDX16]], align 4 |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[COND_2]], label %[[IF_THEN18:.*]], label %[[FOR_INC23]] |
| ; UNROLL-NOSIMPLIFY: [[IF_THEN18]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: store i32 [[TMP]], ptr [[ARRAYIDX16]], align 4 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[INC21:%.*]] = add nsw i32 [[INEWCHUNKS_120]], 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[FOR_INC23]] |
| ; UNROLL-NOSIMPLIFY: [[FOR_INC23]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[INEWCHUNKS_2]] = phi i32 [ [[INC21]], %[[IF_THEN18]] ], [ [[INEWCHUNKS_120]], %[[FOR_BODY14]] ] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[INDVARS_IV_NEXT4]] = add nsw i64 [[INDVARS_IV3]], 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV3]] to i32 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[CMP13:%.*]] = icmp slt i32 [[TMP1]], 0 |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[CMP13]], label %[[FOR_BODY14]], label %[[FOR_INC26_LOOPEXIT]], !llvm.loop [[LOOP4:![0-9]+]] |
| ; UNROLL-NOSIMPLIFY: [[FOR_INC26_LOOPEXIT]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[INEWCHUNKS_2_LCSSA:%.*]] = phi i32 [ [[INEWCHUNKS_2]], %[[FOR_INC23]] ], [ [[BIN_RDX]], %[[MIDDLE_BLOCK]] ] |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[FOR_INC26]] |
| ; UNROLL-NOSIMPLIFY: [[FOR_INC26]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[INEWCHUNKS_1_LCSSA:%.*]] = phi i32 [ 0, %[[FOR_BODY9]] ], [ [[INEWCHUNKS_2_LCSSA]], %[[FOR_INC26_LOOPEXIT]] ] |
| ; UNROLL-NOSIMPLIFY-NEXT: unreachable |
| ; |
| ; VEC-LABEL: define void @bug18724( |
| ; VEC-SAME: i1 [[COND:%.*]], ptr [[PTR:%.*]], i1 [[COND_2:%.*]], i64 [[V_1:%.*]], i32 [[V_2:%.*]]) { |
| ; VEC-NEXT: [[ENTRY:.*:]] |
| ; VEC-NEXT: br label %[[FOR_BODY9:.*]] |
| ; VEC: [[FOR_BODY9]]: |
| ; VEC-NEXT: br i1 [[COND]], label %[[FOR_INC26:.*]], label %[[FOR_BODY14_PREHEADER:.*]] |
| ; VEC: [[FOR_BODY14_PREHEADER]]: |
| ; VEC-NEXT: [[TMP0:%.*]] = trunc i64 [[V_1]] to i32 |
| ; VEC-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP0]], i32 0) |
| ; VEC-NEXT: [[TMP2:%.*]] = sub i32 [[TMP1]], [[TMP0]] |
| ; VEC-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 |
| ; VEC-NEXT: [[TMP4:%.*]] = add nuw nsw i64 [[TMP3]], 1 |
| ; VEC-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP4]], 2 |
| ; VEC-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC: [[VECTOR_PH]]: |
| ; VEC-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP4]], 1 |
| ; VEC-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP4]], [[N_MOD_VF]] |
| ; VEC-NEXT: [[TMP5:%.*]] = add i64 [[V_1]], [[N_VEC]] |
| ; VEC-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> zeroinitializer, i32 [[V_2]], i64 0 |
| ; VEC-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC: [[VECTOR_BODY]]: |
| ; VEC-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE2:.*]] ] |
| ; VEC-NEXT: [[VEC_PHI:%.*]] = phi <2 x i32> [ [[TMP6]], %[[VECTOR_PH]] ], [ [[PREDPHI:%.*]], %[[PRED_STORE_CONTINUE2]] ] |
| ; VEC-NEXT: [[TMP7:%.*]] = add i64 [[V_1]], [[INDEX]] |
| ; VEC-NEXT: [[TMP8:%.*]] = getelementptr inbounds [768 x i32], ptr [[PTR]], i64 0, i64 [[TMP7]] |
| ; VEC-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP8]], align 4 |
| ; VEC-NEXT: br i1 [[COND_2]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] |
| ; VEC: [[PRED_STORE_IF]]: |
| ; VEC-NEXT: [[TMP9:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i64 0 |
| ; VEC-NEXT: store i32 [[TMP9]], ptr [[TMP8]], align 4 |
| ; VEC-NEXT: br label %[[PRED_STORE_CONTINUE]] |
| ; VEC: [[PRED_STORE_CONTINUE]]: |
| ; VEC-NEXT: br i1 [[COND_2]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2]] |
| ; VEC: [[PRED_STORE_IF1]]: |
| ; VEC-NEXT: [[TMP10:%.*]] = add i64 [[TMP7]], 1 |
| ; VEC-NEXT: [[TMP11:%.*]] = getelementptr inbounds [768 x i32], ptr [[PTR]], i64 0, i64 [[TMP10]] |
| ; VEC-NEXT: [[TMP12:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i64 1 |
| ; VEC-NEXT: store i32 [[TMP12]], ptr [[TMP11]], align 4 |
| ; VEC-NEXT: br label %[[PRED_STORE_CONTINUE2]] |
| ; VEC: [[PRED_STORE_CONTINUE2]]: |
| ; VEC-NEXT: [[TMP13:%.*]] = add <2 x i32> [[VEC_PHI]], splat (i32 1) |
| ; VEC-NEXT: [[PREDPHI]] = select i1 [[COND_2]], <2 x i32> [[TMP13]], <2 x i32> [[VEC_PHI]] |
| ; VEC-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; VEC-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]] |
| ; VEC: [[MIDDLE_BLOCK]]: |
| ; VEC-NEXT: [[TMP15:%.*]] = call i32 @llvm.vector.reduce.add.v2i32(<2 x i32> [[PREDPHI]]) |
| ; VEC-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP4]], [[N_VEC]] |
| ; VEC-NEXT: br i1 [[CMP_N]], label %[[FOR_INC26_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC: [[SCALAR_PH]]: |
| ; VEC-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[TMP5]], %[[MIDDLE_BLOCK]] ], [ [[V_1]], %[[FOR_BODY14_PREHEADER]] ] |
| ; VEC-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP15]], %[[MIDDLE_BLOCK]] ], [ [[V_2]], %[[FOR_BODY14_PREHEADER]] ] |
| ; VEC-NEXT: br label %[[FOR_BODY14:.*]] |
| ; VEC: [[FOR_BODY14]]: |
| ; VEC-NEXT: [[INDVARS_IV3:%.*]] = phi i64 [ [[INDVARS_IV_NEXT4:%.*]], %[[FOR_INC23:.*]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; VEC-NEXT: [[INEWCHUNKS_120:%.*]] = phi i32 [ [[INEWCHUNKS_2:%.*]], %[[FOR_INC23]] ], [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ] |
| ; VEC-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds [768 x i32], ptr [[PTR]], i64 0, i64 [[INDVARS_IV3]] |
| ; VEC-NEXT: [[TMP:%.*]] = load i32, ptr [[ARRAYIDX16]], align 4 |
| ; VEC-NEXT: br i1 [[COND_2]], label %[[IF_THEN18:.*]], label %[[FOR_INC23]] |
| ; VEC: [[IF_THEN18]]: |
| ; VEC-NEXT: store i32 [[TMP]], ptr [[ARRAYIDX16]], align 4 |
| ; VEC-NEXT: [[INC21:%.*]] = add nsw i32 [[INEWCHUNKS_120]], 1 |
| ; VEC-NEXT: br label %[[FOR_INC23]] |
| ; VEC: [[FOR_INC23]]: |
| ; VEC-NEXT: [[INEWCHUNKS_2]] = phi i32 [ [[INC21]], %[[IF_THEN18]] ], [ [[INEWCHUNKS_120]], %[[FOR_BODY14]] ] |
| ; VEC-NEXT: [[INDVARS_IV_NEXT4]] = add nsw i64 [[INDVARS_IV3]], 1 |
| ; VEC-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV3]] to i32 |
| ; VEC-NEXT: [[CMP13:%.*]] = icmp slt i32 [[TMP1]], 0 |
| ; VEC-NEXT: br i1 [[CMP13]], label %[[FOR_BODY14]], label %[[FOR_INC26_LOOPEXIT]], !llvm.loop [[LOOP4:![0-9]+]] |
| ; VEC: [[FOR_INC26_LOOPEXIT]]: |
| ; VEC-NEXT: [[INEWCHUNKS_2_LCSSA:%.*]] = phi i32 [ [[INEWCHUNKS_2]], %[[FOR_INC23]] ], [ [[TMP15]], %[[MIDDLE_BLOCK]] ] |
| ; VEC-NEXT: br label %[[FOR_INC26]] |
| ; VEC: [[FOR_INC26]]: |
| ; VEC-NEXT: [[INEWCHUNKS_1_LCSSA:%.*]] = phi i32 [ 0, %[[FOR_BODY9]] ], [ [[INEWCHUNKS_2_LCSSA]], %[[FOR_INC26_LOOPEXIT]] ] |
| ; VEC-NEXT: unreachable |
| ; |
| entry: |
| br label %for.body9 |
| |
| for.body9: |
| br i1 %cond, label %for.inc26, label %for.body14 |
| |
| for.body14: |
| %indvars.iv3 = phi i64 [ %indvars.iv.next4, %for.inc23 ], [ %v.1, %for.body9 ] |
| %iNewChunks.120 = phi i32 [ %iNewChunks.2, %for.inc23 ], [ %v.2, %for.body9 ] |
| %arrayidx16 = getelementptr inbounds [768 x i32], ptr %ptr, i64 0, i64 %indvars.iv3 |
| %tmp = load i32, ptr %arrayidx16, align 4 |
| br i1 %cond.2, label %if.then18, label %for.inc23 |
| |
| if.then18: |
| store i32 %tmp, ptr %arrayidx16, align 4 |
| %inc21 = add nsw i32 %iNewChunks.120, 1 |
| br label %for.inc23 |
| |
| for.inc23: |
| %iNewChunks.2 = phi i32 [ %inc21, %if.then18 ], [ %iNewChunks.120, %for.body14 ] |
| %indvars.iv.next4 = add nsw i64 %indvars.iv3, 1 |
| %tmp1 = trunc i64 %indvars.iv3 to i32 |
| %cmp13 = icmp slt i32 %tmp1, 0 |
| br i1 %cmp13, label %for.body14, label %for.inc26 |
| |
| for.inc26: |
| %iNewChunks.1.lcssa = phi i32 [ 0, %for.body9 ], [ %iNewChunks.2, %for.inc23 ] |
| unreachable |
| } |
| |
| ; In the test below, it's more profitable for the expression feeding the |
| ; conditional store to remain scalar. Since we can only type-shrink vector |
| ; types, we shouldn't try to represent the expression in a smaller type. |
| ; |
| define void @minimal_bit_widths(ptr %p, i1 %c) { |
| ; UNROLL-LABEL: define void @minimal_bit_widths( |
| ; UNROLL-SAME: ptr [[P:%.*]], i1 [[C:%.*]]) { |
| ; UNROLL-NEXT: [[ENTRY:.*:]] |
| ; UNROLL-NEXT: br label %[[VECTOR_PH:.*]] |
| ; UNROLL: [[VECTOR_PH]]: |
| ; UNROLL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; UNROLL: [[VECTOR_BODY]]: |
| ; UNROLL-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE2:.*]] ] |
| ; UNROLL-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 1 |
| ; UNROLL-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[P]], i64 [[INDEX]] |
| ; UNROLL-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[P]], i64 [[TMP0]] |
| ; UNROLL-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP1]], align 1 |
| ; UNROLL-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP2]], align 1 |
| ; UNROLL-NEXT: br i1 [[C]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] |
| ; UNROLL: [[PRED_STORE_IF]]: |
| ; UNROLL-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1 |
| ; UNROLL-NEXT: br label %[[PRED_STORE_CONTINUE]] |
| ; UNROLL: [[PRED_STORE_CONTINUE]]: |
| ; UNROLL-NEXT: br i1 [[C]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2]] |
| ; UNROLL: [[PRED_STORE_IF1]]: |
| ; UNROLL-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 1 |
| ; UNROLL-NEXT: br label %[[PRED_STORE_CONTINUE2]] |
| ; UNROLL: [[PRED_STORE_CONTINUE2]]: |
| ; UNROLL-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; UNROLL-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000 |
| ; UNROLL-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] |
| ; UNROLL: [[MIDDLE_BLOCK]]: |
| ; UNROLL-NEXT: br label %[[FOR_END:.*]] |
| ; UNROLL: [[FOR_END]]: |
| ; UNROLL-NEXT: ret void |
| ; |
| ; UNROLL-NOSIMPLIFY-LABEL: define void @minimal_bit_widths( |
| ; UNROLL-NOSIMPLIFY-SAME: ptr [[P:%.*]], i1 [[C:%.*]]) { |
| ; UNROLL-NOSIMPLIFY-NEXT: [[ENTRY:.*:]] |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[VECTOR_PH:.*]] |
| ; UNROLL-NOSIMPLIFY: [[VECTOR_PH]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; UNROLL-NOSIMPLIFY: [[VECTOR_BODY]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE2:.*]] ] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[P]], i64 [[INDEX]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[P]], i64 [[TMP0]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP1]], align 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP2]], align 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[C]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] |
| ; UNROLL-NOSIMPLIFY: [[PRED_STORE_IF]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[PRED_STORE_CONTINUE]] |
| ; UNROLL-NOSIMPLIFY: [[PRED_STORE_CONTINUE]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[C]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2]] |
| ; UNROLL-NOSIMPLIFY: [[PRED_STORE_IF1]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[PRED_STORE_CONTINUE2]] |
| ; UNROLL-NOSIMPLIFY: [[PRED_STORE_CONTINUE2]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000 |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] |
| ; UNROLL-NOSIMPLIFY: [[MIDDLE_BLOCK]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[FOR_END:.*]] |
| ; UNROLL-NOSIMPLIFY: [[FOR_END]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: ret void |
| ; |
| ; VEC-LABEL: define void @minimal_bit_widths( |
| ; VEC-SAME: ptr [[P:%.*]], i1 [[C:%.*]]) { |
| ; VEC-NEXT: [[ENTRY:.*:]] |
| ; VEC-NEXT: br label %[[VECTOR_PH:.*]] |
| ; VEC: [[VECTOR_PH]]: |
| ; VEC-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC: [[VECTOR_BODY]]: |
| ; VEC-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE2:.*]] ] |
| ; VEC-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[P]], i64 [[INDEX]] |
| ; VEC-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i8>, ptr [[TMP0]], align 1 |
| ; VEC-NEXT: br i1 [[C]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] |
| ; VEC: [[PRED_STORE_IF]]: |
| ; VEC-NEXT: [[TMP1:%.*]] = extractelement <2 x i8> [[WIDE_LOAD]], i64 0 |
| ; VEC-NEXT: store i8 [[TMP1]], ptr [[TMP0]], align 1 |
| ; VEC-NEXT: br label %[[PRED_STORE_CONTINUE]] |
| ; VEC: [[PRED_STORE_CONTINUE]]: |
| ; VEC-NEXT: br i1 [[C]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2]] |
| ; VEC: [[PRED_STORE_IF1]]: |
| ; VEC-NEXT: [[TMP2:%.*]] = add i64 [[INDEX]], 1 |
| ; VEC-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[P]], i64 [[TMP2]] |
| ; VEC-NEXT: [[TMP4:%.*]] = extractelement <2 x i8> [[WIDE_LOAD]], i64 1 |
| ; VEC-NEXT: store i8 [[TMP4]], ptr [[TMP3]], align 1 |
| ; VEC-NEXT: br label %[[PRED_STORE_CONTINUE2]] |
| ; VEC: [[PRED_STORE_CONTINUE2]]: |
| ; VEC-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; VEC-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000 |
| ; VEC-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] |
| ; VEC: [[MIDDLE_BLOCK]]: |
| ; VEC-NEXT: br label %[[FOR_END:.*]] |
| ; VEC: [[FOR_END]]: |
| ; VEC-NEXT: ret void |
| ; |
| entry: |
| br label %for.body |
| |
| for.body: |
| %tmp0 = phi i64 [ %tmp6, %for.inc ], [ 0, %entry ] |
| %tmp1 = phi i64 [ %tmp7, %for.inc ], [ 1000, %entry ] |
| %tmp2 = getelementptr i8, ptr %p, i64 %tmp0 |
| %tmp3 = load i8, ptr %tmp2, align 1 |
| br i1 %c, label %if.then, label %for.inc |
| |
| if.then: |
| %tmp4 = zext i8 %tmp3 to i32 |
| %tmp5 = trunc i32 %tmp4 to i8 |
| store i8 %tmp5, ptr %tmp2, align 1 |
| br label %for.inc |
| |
| for.inc: |
| %tmp6 = add nuw nsw i64 %tmp0, 1 |
| %tmp7 = add i64 %tmp1, -1 |
| %tmp8 = icmp eq i64 %tmp7, 0 |
| br i1 %tmp8, label %for.end, label %for.body |
| |
| for.end: |
| ret void |
| } |
| |
| define void @minimal_bit_widths_with_aliasing_store(i1 %c, ptr %ptr) { |
| ; UNROLL-LABEL: define void @minimal_bit_widths_with_aliasing_store( |
| ; UNROLL-SAME: i1 [[C:%.*]], ptr [[PTR:%.*]]) { |
| ; UNROLL-NEXT: [[ENTRY:.*:]] |
| ; UNROLL-NEXT: br label %[[VECTOR_PH:.*]] |
| ; UNROLL: [[VECTOR_PH]]: |
| ; UNROLL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; UNROLL: [[VECTOR_BODY]]: |
| ; UNROLL-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE2:.*]] ] |
| ; UNROLL-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 1 |
| ; UNROLL-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[INDEX]] |
| ; UNROLL-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[TMP0]] |
| ; UNROLL-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP1]], align 1 |
| ; UNROLL-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP2]], align 1 |
| ; UNROLL-NEXT: store i8 0, ptr [[TMP1]], align 1 |
| ; UNROLL-NEXT: store i8 0, ptr [[TMP2]], align 1 |
| ; UNROLL-NEXT: br i1 [[C]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] |
| ; UNROLL: [[PRED_STORE_IF]]: |
| ; UNROLL-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1 |
| ; UNROLL-NEXT: br label %[[PRED_STORE_CONTINUE]] |
| ; UNROLL: [[PRED_STORE_CONTINUE]]: |
| ; UNROLL-NEXT: br i1 [[C]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2]] |
| ; UNROLL: [[PRED_STORE_IF1]]: |
| ; UNROLL-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 1 |
| ; UNROLL-NEXT: br label %[[PRED_STORE_CONTINUE2]] |
| ; UNROLL: [[PRED_STORE_CONTINUE2]]: |
| ; UNROLL-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; UNROLL-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000 |
| ; UNROLL-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] |
| ; UNROLL: [[MIDDLE_BLOCK]]: |
| ; UNROLL-NEXT: br label %[[FOR_END:.*]] |
| ; UNROLL: [[FOR_END]]: |
| ; UNROLL-NEXT: ret void |
| ; |
| ; UNROLL-NOSIMPLIFY-LABEL: define void @minimal_bit_widths_with_aliasing_store( |
| ; UNROLL-NOSIMPLIFY-SAME: i1 [[C:%.*]], ptr [[PTR:%.*]]) { |
| ; UNROLL-NOSIMPLIFY-NEXT: [[ENTRY:.*:]] |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[VECTOR_PH:.*]] |
| ; UNROLL-NOSIMPLIFY: [[VECTOR_PH]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; UNROLL-NOSIMPLIFY: [[VECTOR_BODY]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE2:.*]] ] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[INDEX]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[TMP0]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP3:%.*]] = load i8, ptr [[TMP1]], align 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP2]], align 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: store i8 0, ptr [[TMP1]], align 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: store i8 0, ptr [[TMP2]], align 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[C]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] |
| ; UNROLL-NOSIMPLIFY: [[PRED_STORE_IF]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: store i8 [[TMP3]], ptr [[TMP1]], align 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[PRED_STORE_CONTINUE]] |
| ; UNROLL-NOSIMPLIFY: [[PRED_STORE_CONTINUE]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[C]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2]] |
| ; UNROLL-NOSIMPLIFY: [[PRED_STORE_IF1]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: store i8 [[TMP4]], ptr [[TMP2]], align 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[PRED_STORE_CONTINUE2]] |
| ; UNROLL-NOSIMPLIFY: [[PRED_STORE_CONTINUE2]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000 |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] |
| ; UNROLL-NOSIMPLIFY: [[MIDDLE_BLOCK]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[FOR_END:.*]] |
| ; UNROLL-NOSIMPLIFY: [[FOR_END]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: ret void |
| ; |
| ; VEC-LABEL: define void @minimal_bit_widths_with_aliasing_store( |
| ; VEC-SAME: i1 [[C:%.*]], ptr [[PTR:%.*]]) { |
| ; VEC-NEXT: [[ENTRY:.*:]] |
| ; VEC-NEXT: br label %[[VECTOR_PH:.*]] |
| ; VEC: [[VECTOR_PH]]: |
| ; VEC-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC: [[VECTOR_BODY]]: |
| ; VEC-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE2:.*]] ] |
| ; VEC-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[INDEX]] |
| ; VEC-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i8>, ptr [[TMP0]], align 1 |
| ; VEC-NEXT: store <2 x i8> zeroinitializer, ptr [[TMP0]], align 1 |
| ; VEC-NEXT: br i1 [[C]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] |
| ; VEC: [[PRED_STORE_IF]]: |
| ; VEC-NEXT: [[TMP1:%.*]] = extractelement <2 x i8> [[WIDE_LOAD]], i64 0 |
| ; VEC-NEXT: store i8 [[TMP1]], ptr [[TMP0]], align 1 |
| ; VEC-NEXT: br label %[[PRED_STORE_CONTINUE]] |
| ; VEC: [[PRED_STORE_CONTINUE]]: |
| ; VEC-NEXT: br i1 [[C]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2]] |
| ; VEC: [[PRED_STORE_IF1]]: |
| ; VEC-NEXT: [[TMP2:%.*]] = add i64 [[INDEX]], 1 |
| ; VEC-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[TMP2]] |
| ; VEC-NEXT: [[TMP4:%.*]] = extractelement <2 x i8> [[WIDE_LOAD]], i64 1 |
| ; VEC-NEXT: store i8 [[TMP4]], ptr [[TMP3]], align 1 |
| ; VEC-NEXT: br label %[[PRED_STORE_CONTINUE2]] |
| ; VEC: [[PRED_STORE_CONTINUE2]]: |
| ; VEC-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; VEC-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000 |
| ; VEC-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] |
| ; VEC: [[MIDDLE_BLOCK]]: |
| ; VEC-NEXT: br label %[[FOR_END:.*]] |
| ; VEC: [[FOR_END]]: |
| ; VEC-NEXT: ret void |
| ; |
| entry: |
| br label %for.body |
| |
| for.body: |
| %tmp0 = phi i64 [ %tmp6, %for.inc ], [ 0, %entry ] |
| %tmp1 = phi i64 [ %tmp7, %for.inc ], [ 1000, %entry ] |
| %tmp2 = getelementptr i8, ptr %ptr, i64 %tmp0 |
| %tmp3 = load i8, ptr %tmp2, align 1 |
| store i8 0, ptr %tmp2 |
| br i1 %c, label %if.then, label %for.inc |
| |
| if.then: |
| %tmp4 = zext i8 %tmp3 to i32 |
| %tmp5 = trunc i32 %tmp4 to i8 |
| store i8 %tmp5, ptr %tmp2, align 1 |
| br label %for.inc |
| |
| for.inc: |
| %tmp6 = add nuw nsw i64 %tmp0, 1 |
| %tmp7 = add i64 %tmp1, -1 |
| %tmp8 = icmp eq i64 %tmp7, 0 |
| br i1 %tmp8, label %for.end, label %for.body |
| |
| for.end: |
| ret void |
| } |
| |
| define void @sdiv_with_uniform_ops(i16 %0, i1 %c, ptr %dst) { |
| ; UNROLL-LABEL: define void @sdiv_with_uniform_ops( |
| ; UNROLL-SAME: i16 [[TMP0:%.*]], i1 [[C:%.*]], ptr [[DST:%.*]]) { |
| ; UNROLL-NEXT: [[ENTRY:.*:]] |
| ; UNROLL-NEXT: br label %[[VECTOR_PH:.*]] |
| ; UNROLL: [[VECTOR_PH]]: |
| ; UNROLL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; UNROLL: [[VECTOR_BODY]]: |
| ; UNROLL-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE2:.*]] ] |
| ; UNROLL-NEXT: br i1 [[C]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] |
| ; UNROLL: [[PRED_STORE_IF]]: |
| ; UNROLL-NEXT: [[TMP1:%.*]] = sdiv i16 10, [[TMP0]] |
| ; UNROLL-NEXT: store i16 [[TMP1]], ptr [[DST]], align 1 |
| ; UNROLL-NEXT: br label %[[PRED_STORE_CONTINUE]] |
| ; UNROLL: [[PRED_STORE_CONTINUE]]: |
| ; UNROLL-NEXT: br i1 [[C]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2]] |
| ; UNROLL: [[PRED_STORE_IF1]]: |
| ; UNROLL-NEXT: [[TMP2:%.*]] = sdiv i16 10, [[TMP0]] |
| ; UNROLL-NEXT: store i16 [[TMP2]], ptr [[DST]], align 1 |
| ; UNROLL-NEXT: br label %[[PRED_STORE_CONTINUE2]] |
| ; UNROLL: [[PRED_STORE_CONTINUE2]]: |
| ; UNROLL-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2 |
| ; UNROLL-NEXT: [[TMP3:%.*]] = icmp eq i32 [[INDEX_NEXT]], 98 |
| ; UNROLL-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]] |
| ; UNROLL: [[MIDDLE_BLOCK]]: |
| ; UNROLL-NEXT: br label %[[SCALAR_PH:.*]] |
| ; UNROLL: [[SCALAR_PH]]: |
| ; UNROLL-NEXT: br label %[[LOOP_HEADER:.*]] |
| ; UNROLL: [[LOOP_HEADER]]: |
| ; UNROLL-NEXT: [[IV:%.*]] = phi i16 [ 99, %[[SCALAR_PH]] ], [ [[INC:%.*]], %[[LOOP_LATCH:.*]] ] |
| ; UNROLL-NEXT: br i1 [[C]], label %[[THEN:.*]], label %[[LOOP_LATCH]] |
| ; UNROLL: [[THEN]]: |
| ; UNROLL-NEXT: [[DIV:%.*]] = sdiv i16 10, [[TMP0]] |
| ; UNROLL-NEXT: store i16 [[DIV]], ptr [[DST]], align 1 |
| ; UNROLL-NEXT: br label %[[LOOP_LATCH]] |
| ; UNROLL: [[LOOP_LATCH]]: |
| ; UNROLL-NEXT: [[INC]] = add i16 [[IV]], 1 |
| ; UNROLL-NEXT: [[EC:%.*]] = icmp eq i16 [[INC]], 100 |
| ; UNROLL-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP_HEADER]], !llvm.loop [[LOOP8:![0-9]+]] |
| ; UNROLL: [[EXIT]]: |
| ; UNROLL-NEXT: ret void |
| ; |
| ; UNROLL-NOSIMPLIFY-LABEL: define void @sdiv_with_uniform_ops( |
| ; UNROLL-NOSIMPLIFY-SAME: i16 [[TMP0:%.*]], i1 [[C:%.*]], ptr [[DST:%.*]]) { |
| ; UNROLL-NOSIMPLIFY-NEXT: [[ENTRY:.*:]] |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[VECTOR_PH:.*]] |
| ; UNROLL-NOSIMPLIFY: [[VECTOR_PH]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; UNROLL-NOSIMPLIFY: [[VECTOR_BODY]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE2:.*]] ] |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[C]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] |
| ; UNROLL-NOSIMPLIFY: [[PRED_STORE_IF]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP1:%.*]] = sdiv i16 10, [[TMP0]] |
| ; UNROLL-NOSIMPLIFY-NEXT: store i16 [[TMP1]], ptr [[DST]], align 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[PRED_STORE_CONTINUE]] |
| ; UNROLL-NOSIMPLIFY: [[PRED_STORE_CONTINUE]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[C]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2]] |
| ; UNROLL-NOSIMPLIFY: [[PRED_STORE_IF1]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP2:%.*]] = sdiv i16 10, [[TMP0]] |
| ; UNROLL-NOSIMPLIFY-NEXT: store i16 [[TMP2]], ptr [[DST]], align 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[PRED_STORE_CONTINUE2]] |
| ; UNROLL-NOSIMPLIFY: [[PRED_STORE_CONTINUE2]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP3:%.*]] = icmp eq i32 [[INDEX_NEXT]], 98 |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]] |
| ; UNROLL-NOSIMPLIFY: [[MIDDLE_BLOCK]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[SCALAR_PH:.*]] |
| ; UNROLL-NOSIMPLIFY: [[SCALAR_PH]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[LOOP_HEADER:.*]] |
| ; UNROLL-NOSIMPLIFY: [[LOOP_HEADER]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[IV:%.*]] = phi i16 [ 99, %[[SCALAR_PH]] ], [ [[INC:%.*]], %[[LOOP_LATCH:.*]] ] |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[C]], label %[[THEN:.*]], label %[[LOOP_LATCH]] |
| ; UNROLL-NOSIMPLIFY: [[THEN]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[DIV:%.*]] = sdiv i16 10, [[TMP0]] |
| ; UNROLL-NOSIMPLIFY-NEXT: store i16 [[DIV]], ptr [[DST]], align 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[LOOP_LATCH]] |
| ; UNROLL-NOSIMPLIFY: [[LOOP_LATCH]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[INC]] = add i16 [[IV]], 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[EC:%.*]] = icmp eq i16 [[INC]], 100 |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP_HEADER]], !llvm.loop [[LOOP8:![0-9]+]] |
| ; UNROLL-NOSIMPLIFY: [[EXIT]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: ret void |
| ; |
| ; VEC-LABEL: define void @sdiv_with_uniform_ops( |
| ; VEC-SAME: i16 [[TMP0:%.*]], i1 [[C:%.*]], ptr [[DST:%.*]]) { |
| ; VEC-NEXT: [[ENTRY:.*:]] |
| ; VEC-NEXT: br label %[[VECTOR_PH:.*]] |
| ; VEC: [[VECTOR_PH]]: |
| ; VEC-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i16> poison, i16 [[TMP0]], i64 0 |
| ; VEC-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i16> [[BROADCAST_SPLATINSERT]], <2 x i16> poison, <2 x i32> zeroinitializer |
| ; VEC-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <2 x i1> poison, i1 [[C]], i64 0 |
| ; VEC-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <2 x i1> [[BROADCAST_SPLATINSERT1]], <2 x i1> poison, <2 x i32> zeroinitializer |
| ; VEC-NEXT: [[TMP1:%.*]] = call <2 x i16> @llvm.masked.sdiv.v2i16(<2 x i16> splat (i16 10), <2 x i16> [[BROADCAST_SPLAT]], <2 x i1> [[BROADCAST_SPLAT2]]) |
| ; VEC-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC: [[VECTOR_BODY]]: |
| ; VEC-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE4:.*]] ] |
| ; VEC-NEXT: br i1 [[C]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] |
| ; VEC: [[PRED_STORE_IF]]: |
| ; VEC-NEXT: [[TMP2:%.*]] = extractelement <2 x i16> [[TMP1]], i64 0 |
| ; VEC-NEXT: store i16 [[TMP2]], ptr [[DST]], align 1 |
| ; VEC-NEXT: br label %[[PRED_STORE_CONTINUE]] |
| ; VEC: [[PRED_STORE_CONTINUE]]: |
| ; VEC-NEXT: br i1 [[C]], label %[[PRED_STORE_IF3:.*]], label %[[PRED_STORE_CONTINUE4]] |
| ; VEC: [[PRED_STORE_IF3]]: |
| ; VEC-NEXT: [[TMP3:%.*]] = extractelement <2 x i16> [[TMP1]], i64 1 |
| ; VEC-NEXT: store i16 [[TMP3]], ptr [[DST]], align 1 |
| ; VEC-NEXT: br label %[[PRED_STORE_CONTINUE4]] |
| ; VEC: [[PRED_STORE_CONTINUE4]]: |
| ; VEC-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2 |
| ; VEC-NEXT: [[TMP4:%.*]] = icmp eq i32 [[INDEX_NEXT]], 98 |
| ; VEC-NEXT: br i1 [[TMP4]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]] |
| ; VEC: [[MIDDLE_BLOCK]]: |
| ; VEC-NEXT: br label %[[SCALAR_PH:.*]] |
| ; VEC: [[SCALAR_PH]]: |
| ; VEC-NEXT: br label %[[LOOP_HEADER:.*]] |
| ; VEC: [[LOOP_HEADER]]: |
| ; VEC-NEXT: [[IV:%.*]] = phi i16 [ 99, %[[SCALAR_PH]] ], [ [[INC:%.*]], %[[LOOP_LATCH:.*]] ] |
| ; VEC-NEXT: br i1 [[C]], label %[[THEN:.*]], label %[[LOOP_LATCH]] |
| ; VEC: [[THEN]]: |
| ; VEC-NEXT: [[DIV:%.*]] = sdiv i16 10, [[TMP0]] |
| ; VEC-NEXT: store i16 [[DIV]], ptr [[DST]], align 1 |
| ; VEC-NEXT: br label %[[LOOP_LATCH]] |
| ; VEC: [[LOOP_LATCH]]: |
| ; VEC-NEXT: [[INC]] = add i16 [[IV]], 1 |
| ; VEC-NEXT: [[EC:%.*]] = icmp eq i16 [[INC]], 100 |
| ; VEC-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP_HEADER]], !llvm.loop [[LOOP8:![0-9]+]] |
| ; VEC: [[EXIT]]: |
| ; VEC-NEXT: ret void |
| ; |
| entry: |
| br label %loop.header |
| |
| loop.header: |
| %iv = phi i16 [ 1, %entry ], [ %inc, %loop.latch ] |
| br i1 %c, label %then, label %loop.latch |
| |
| then: |
| %div = sdiv i16 10, %0 |
| store i16 %div, ptr %dst, align 1 |
| br label %loop.latch |
| |
| loop.latch: |
| %inc = add i16 %iv, 1 |
| %ec = icmp eq i16 %inc, 100 |
| br i1 %ec, label %exit, label %loop.header |
| |
| exit: |
| ret void |
| } |
| |
| define void @sinkable_predicated_store(ptr %A, ptr %B) { |
| ; UNROLL-LABEL: define void @sinkable_predicated_store( |
| ; UNROLL-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) { |
| ; UNROLL-NEXT: [[ENTRY:.*:]] |
| ; UNROLL-NEXT: br label %[[VECTOR_MEMCHECK:.*]] |
| ; UNROLL: [[VECTOR_MEMCHECK]]: |
| ; UNROLL-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A]], i64 404 |
| ; UNROLL-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[B]], i64 404 |
| ; UNROLL-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[A]], [[SCEVGEP1]] |
| ; UNROLL-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[B]], [[SCEVGEP]] |
| ; UNROLL-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] |
| ; UNROLL-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; UNROLL: [[VECTOR_PH]]: |
| ; UNROLL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; UNROLL: [[VECTOR_BODY]]: |
| ; UNROLL-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; UNROLL-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 1 |
| ; UNROLL-NEXT: [[TMP1:%.*]] = getelementptr i32, ptr [[A]], i64 [[INDEX]] |
| ; UNROLL-NEXT: [[TMP2:%.*]] = getelementptr i32, ptr [[A]], i64 [[TMP0]] |
| ; UNROLL-NEXT: [[TMP3:%.*]] = getelementptr i32, ptr [[B]], i64 [[INDEX]] |
| ; UNROLL-NEXT: [[TMP4:%.*]] = getelementptr i32, ptr [[B]], i64 [[TMP0]] |
| ; UNROLL-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP3]], align 4, !alias.scope [[META9:![0-9]+]] |
| ; UNROLL-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP4]], align 4, !alias.scope [[META9]] |
| ; UNROLL-NEXT: [[TMP7:%.*]] = icmp ne i32 [[TMP5]], 0 |
| ; UNROLL-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP6]], 0 |
| ; UNROLL-NEXT: [[TMP9:%.*]] = select i1 [[TMP7]], i32 1, i32 0 |
| ; UNROLL-NEXT: [[TMP10:%.*]] = select i1 [[TMP8]], i32 1, i32 0 |
| ; UNROLL-NEXT: store i32 [[TMP9]], ptr [[TMP1]], align 4, !alias.scope [[META12:![0-9]+]], !noalias [[META9]] |
| ; UNROLL-NEXT: store i32 [[TMP10]], ptr [[TMP2]], align 4, !alias.scope [[META12]], !noalias [[META9]] |
| ; UNROLL-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; UNROLL-NEXT: [[TMP11:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100 |
| ; UNROLL-NEXT: br i1 [[TMP11]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]] |
| ; UNROLL: [[MIDDLE_BLOCK]]: |
| ; UNROLL-NEXT: br label %[[SCALAR_PH]] |
| ; UNROLL: [[SCALAR_PH]]: |
| ; UNROLL-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 100, %[[MIDDLE_BLOCK]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; UNROLL-NEXT: br label %[[LOOP:.*]] |
| ; UNROLL: [[LOOP]]: |
| ; UNROLL-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ] |
| ; UNROLL-NEXT: [[GEP_A:%.*]] = getelementptr i32, ptr [[A]], i64 [[IV]] |
| ; UNROLL-NEXT: [[GEP_B:%.*]] = getelementptr i32, ptr [[B]], i64 [[IV]] |
| ; UNROLL-NEXT: [[L:%.*]] = load i32, ptr [[GEP_B]], align 4 |
| ; UNROLL-NEXT: [[C:%.*]] = icmp eq i32 [[L]], 0 |
| ; UNROLL-NEXT: br i1 [[C]], label %[[IF_THEN:.*]], label %[[IF_ELSE:.*]] |
| ; UNROLL: [[IF_THEN]]: |
| ; UNROLL-NEXT: store i32 0, ptr [[GEP_A]], align 4 |
| ; UNROLL-NEXT: br label %[[LOOP_LATCH]] |
| ; UNROLL: [[IF_ELSE]]: |
| ; UNROLL-NEXT: store i32 1, ptr [[GEP_A]], align 4 |
| ; UNROLL-NEXT: br label %[[LOOP_LATCH]] |
| ; UNROLL: [[LOOP_LATCH]]: |
| ; UNROLL-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 |
| ; UNROLL-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], 100 |
| ; UNROLL-NEXT: br i1 [[EC]], label %[[FOR_END:.*]], label %[[LOOP]], !llvm.loop [[LOOP15:![0-9]+]] |
| ; UNROLL: [[FOR_END]]: |
| ; UNROLL-NEXT: ret void |
| ; |
| ; UNROLL-NOSIMPLIFY-LABEL: define void @sinkable_predicated_store( |
| ; UNROLL-NOSIMPLIFY-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) { |
| ; UNROLL-NOSIMPLIFY-NEXT: [[ENTRY:.*:]] |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[VECTOR_MEMCHECK:.*]] |
| ; UNROLL-NOSIMPLIFY: [[VECTOR_MEMCHECK]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A]], i64 404 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[B]], i64 404 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[A]], [[SCEVGEP1]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[B]], [[SCEVGEP]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; UNROLL-NOSIMPLIFY: [[VECTOR_PH]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; UNROLL-NOSIMPLIFY: [[VECTOR_BODY]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP1:%.*]] = getelementptr i32, ptr [[A]], i64 [[INDEX]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP2:%.*]] = getelementptr i32, ptr [[A]], i64 [[TMP0]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP3:%.*]] = getelementptr i32, ptr [[B]], i64 [[INDEX]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP4:%.*]] = getelementptr i32, ptr [[B]], i64 [[TMP0]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP3]], align 4, !alias.scope [[META9:![0-9]+]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP4]], align 4, !alias.scope [[META9]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP7:%.*]] = icmp ne i32 [[TMP5]], 0 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP6]], 0 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP9:%.*]] = select i1 [[TMP7]], i32 1, i32 0 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP10:%.*]] = select i1 [[TMP8]], i32 1, i32 0 |
| ; UNROLL-NOSIMPLIFY-NEXT: store i32 [[TMP9]], ptr [[TMP1]], align 4, !alias.scope [[META12:![0-9]+]], !noalias [[META9]] |
| ; UNROLL-NOSIMPLIFY-NEXT: store i32 [[TMP10]], ptr [[TMP2]], align 4, !alias.scope [[META12]], !noalias [[META9]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP11:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100 |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[TMP11]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]] |
| ; UNROLL-NOSIMPLIFY: [[MIDDLE_BLOCK]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[SCALAR_PH]] |
| ; UNROLL-NOSIMPLIFY: [[SCALAR_PH]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 100, %[[MIDDLE_BLOCK]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[LOOP:.*]] |
| ; UNROLL-NOSIMPLIFY: [[LOOP]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[GEP_A:%.*]] = getelementptr i32, ptr [[A]], i64 [[IV]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[GEP_B:%.*]] = getelementptr i32, ptr [[B]], i64 [[IV]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[L:%.*]] = load i32, ptr [[GEP_B]], align 4 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[C:%.*]] = icmp eq i32 [[L]], 0 |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[C]], label %[[IF_THEN:.*]], label %[[IF_ELSE:.*]] |
| ; UNROLL-NOSIMPLIFY: [[IF_THEN]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: store i32 0, ptr [[GEP_A]], align 4 |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[LOOP_LATCH]] |
| ; UNROLL-NOSIMPLIFY: [[IF_ELSE]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: store i32 1, ptr [[GEP_A]], align 4 |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[LOOP_LATCH]] |
| ; UNROLL-NOSIMPLIFY: [[LOOP_LATCH]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], 100 |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[EC]], label %[[FOR_END:.*]], label %[[LOOP]], !llvm.loop [[LOOP15:![0-9]+]] |
| ; UNROLL-NOSIMPLIFY: [[FOR_END]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: ret void |
| ; |
| ; VEC-LABEL: define void @sinkable_predicated_store( |
| ; VEC-SAME: ptr [[A:%.*]], ptr [[B:%.*]]) { |
| ; VEC-NEXT: [[ENTRY:.*:]] |
| ; VEC-NEXT: br label %[[VECTOR_MEMCHECK:.*]] |
| ; VEC: [[VECTOR_MEMCHECK]]: |
| ; VEC-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A]], i64 404 |
| ; VEC-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[B]], i64 404 |
| ; VEC-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[A]], [[SCEVGEP1]] |
| ; VEC-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[B]], [[SCEVGEP]] |
| ; VEC-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] |
| ; VEC-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC: [[VECTOR_PH]]: |
| ; VEC-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC: [[VECTOR_BODY]]: |
| ; VEC-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 1 |
| ; VEC-NEXT: [[TMP1:%.*]] = getelementptr i32, ptr [[A]], i64 [[INDEX]] |
| ; VEC-NEXT: [[TMP2:%.*]] = getelementptr i32, ptr [[A]], i64 [[TMP0]] |
| ; VEC-NEXT: [[TMP3:%.*]] = getelementptr i32, ptr [[B]], i64 [[INDEX]] |
| ; VEC-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP3]], align 4, !alias.scope [[META9:![0-9]+]] |
| ; VEC-NEXT: [[TMP4:%.*]] = icmp ne <2 x i32> [[WIDE_LOAD]], zeroinitializer |
| ; VEC-NEXT: [[TMP5:%.*]] = select <2 x i1> [[TMP4]], <2 x i32> splat (i32 1), <2 x i32> zeroinitializer |
| ; VEC-NEXT: [[TMP6:%.*]] = extractelement <2 x i32> [[TMP5]], i64 0 |
| ; VEC-NEXT: store i32 [[TMP6]], ptr [[TMP1]], align 4, !alias.scope [[META12:![0-9]+]], !noalias [[META9]] |
| ; VEC-NEXT: [[TMP7:%.*]] = extractelement <2 x i32> [[TMP5]], i64 1 |
| ; VEC-NEXT: store i32 [[TMP7]], ptr [[TMP2]], align 4, !alias.scope [[META12]], !noalias [[META9]] |
| ; VEC-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; VEC-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100 |
| ; VEC-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]] |
| ; VEC: [[MIDDLE_BLOCK]]: |
| ; VEC-NEXT: br label %[[SCALAR_PH]] |
| ; VEC: [[SCALAR_PH]]: |
| ; VEC-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 100, %[[MIDDLE_BLOCK]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; VEC-NEXT: br label %[[LOOP:.*]] |
| ; VEC: [[LOOP]]: |
| ; VEC-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ] |
| ; VEC-NEXT: [[GEP_A:%.*]] = getelementptr i32, ptr [[A]], i64 [[IV]] |
| ; VEC-NEXT: [[GEP_B:%.*]] = getelementptr i32, ptr [[B]], i64 [[IV]] |
| ; VEC-NEXT: [[L:%.*]] = load i32, ptr [[GEP_B]], align 4 |
| ; VEC-NEXT: [[C:%.*]] = icmp eq i32 [[L]], 0 |
| ; VEC-NEXT: br i1 [[C]], label %[[IF_THEN:.*]], label %[[IF_ELSE:.*]] |
| ; VEC: [[IF_THEN]]: |
| ; VEC-NEXT: store i32 0, ptr [[GEP_A]], align 4 |
| ; VEC-NEXT: br label %[[LOOP_LATCH]] |
| ; VEC: [[IF_ELSE]]: |
| ; VEC-NEXT: store i32 1, ptr [[GEP_A]], align 4 |
| ; VEC-NEXT: br label %[[LOOP_LATCH]] |
| ; VEC: [[LOOP_LATCH]]: |
| ; VEC-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 |
| ; VEC-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], 100 |
| ; VEC-NEXT: br i1 [[EC]], label %[[FOR_END:.*]], label %[[LOOP]], !llvm.loop [[LOOP15:![0-9]+]] |
| ; VEC: [[FOR_END]]: |
| ; VEC-NEXT: ret void |
| ; |
| entry: |
| br label %loop |
| |
| loop: |
| %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ] |
| %gep.A = getelementptr i32, ptr %A, i64 %iv |
| %gep.B = getelementptr i32, ptr %B, i64 %iv |
| %l = load i32, ptr %gep.B |
| %c = icmp eq i32 %l, 0 |
| br i1 %c, label %if.then, label %if.else |
| |
| if.then: |
| store i32 0, ptr %gep.A, align 4 |
| br label %loop.latch |
| |
| if.else: |
| store i32 1, ptr %gep.A, align 4 |
| br label %loop.latch |
| |
| loop.latch: |
| %iv.next = add i64 %iv, 1 |
| %ec = icmp eq i64 %iv, 100 |
| br i1 %ec, label %for.end, label %loop |
| |
| for.end: |
| ret void |
| } |
| |
| define void @hoistable_predicated_store(ptr %A, ptr %B, ptr %C, ptr %D) { |
| ; UNROLL-LABEL: define void @hoistable_predicated_store( |
| ; UNROLL-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]], ptr [[D:%.*]]) { |
| ; UNROLL-NEXT: [[ENTRY:.*:]] |
| ; UNROLL-NEXT: br label %[[VECTOR_MEMCHECK:.*]] |
| ; UNROLL: [[VECTOR_MEMCHECK]]: |
| ; UNROLL-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[C]], i64 4 |
| ; UNROLL-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[B]], i64 4 |
| ; UNROLL-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[D]], i64 404 |
| ; UNROLL-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr [[A]], i64 4 |
| ; UNROLL-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[C]], [[SCEVGEP1]] |
| ; UNROLL-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[B]], [[SCEVGEP]] |
| ; UNROLL-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] |
| ; UNROLL-NEXT: [[BOUND04:%.*]] = icmp ult ptr [[C]], [[SCEVGEP2]] |
| ; UNROLL-NEXT: [[BOUND15:%.*]] = icmp ult ptr [[D]], [[SCEVGEP]] |
| ; UNROLL-NEXT: [[FOUND_CONFLICT6:%.*]] = and i1 [[BOUND04]], [[BOUND15]] |
| ; UNROLL-NEXT: [[CONFLICT_RDX:%.*]] = or i1 [[FOUND_CONFLICT]], [[FOUND_CONFLICT6]] |
| ; UNROLL-NEXT: [[BOUND07:%.*]] = icmp ult ptr [[C]], [[SCEVGEP3]] |
| ; UNROLL-NEXT: [[BOUND18:%.*]] = icmp ult ptr [[A]], [[SCEVGEP]] |
| ; UNROLL-NEXT: [[FOUND_CONFLICT9:%.*]] = and i1 [[BOUND07]], [[BOUND18]] |
| ; UNROLL-NEXT: [[CONFLICT_RDX10:%.*]] = or i1 [[CONFLICT_RDX]], [[FOUND_CONFLICT9]] |
| ; UNROLL-NEXT: [[BOUND011:%.*]] = icmp ult ptr [[B]], [[SCEVGEP2]] |
| ; UNROLL-NEXT: [[BOUND112:%.*]] = icmp ult ptr [[D]], [[SCEVGEP1]] |
| ; UNROLL-NEXT: [[FOUND_CONFLICT13:%.*]] = and i1 [[BOUND011]], [[BOUND112]] |
| ; UNROLL-NEXT: [[CONFLICT_RDX14:%.*]] = or i1 [[CONFLICT_RDX10]], [[FOUND_CONFLICT13]] |
| ; UNROLL-NEXT: [[BOUND015:%.*]] = icmp ult ptr [[B]], [[SCEVGEP3]] |
| ; UNROLL-NEXT: [[BOUND116:%.*]] = icmp ult ptr [[A]], [[SCEVGEP1]] |
| ; UNROLL-NEXT: [[FOUND_CONFLICT17:%.*]] = and i1 [[BOUND015]], [[BOUND116]] |
| ; UNROLL-NEXT: [[CONFLICT_RDX18:%.*]] = or i1 [[CONFLICT_RDX14]], [[FOUND_CONFLICT17]] |
| ; UNROLL-NEXT: br i1 [[CONFLICT_RDX18]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; UNROLL: [[VECTOR_PH]]: |
| ; UNROLL-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 8, !alias.scope [[META16:![0-9]+]] |
| ; UNROLL-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; UNROLL: [[VECTOR_BODY]]: |
| ; UNROLL-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; UNROLL-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; UNROLL-NEXT: [[TMP1:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100 |
| ; UNROLL-NEXT: br i1 [[TMP1]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP19:![0-9]+]] |
| ; UNROLL: [[MIDDLE_BLOCK]]: |
| ; UNROLL-NEXT: store i32 0, ptr [[C]], align 4, !alias.scope [[META20:![0-9]+]], !noalias [[META22:![0-9]+]] |
| ; UNROLL-NEXT: store i32 [[TMP0]], ptr [[B]], align 4, !alias.scope [[META25:![0-9]+]], !noalias [[META26:![0-9]+]] |
| ; UNROLL-NEXT: br label %[[SCALAR_PH]] |
| ; UNROLL: [[SCALAR_PH]]: |
| ; UNROLL-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 100, %[[MIDDLE_BLOCK]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; UNROLL-NEXT: br label %[[LOOP:.*]] |
| ; UNROLL: [[LOOP]]: |
| ; UNROLL-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ] |
| ; UNROLL-NEXT: store i32 0, ptr [[C]], align 4 |
| ; UNROLL-NEXT: [[GEP_D:%.*]] = getelementptr i32, ptr [[D]], i64 [[IV]] |
| ; UNROLL-NEXT: [[L:%.*]] = load i32, ptr [[GEP_D]], align 4 |
| ; UNROLL-NEXT: [[C:%.*]] = icmp eq i32 [[L]], 0 |
| ; UNROLL-NEXT: br i1 [[C]], label %[[IF_THEN4:.*]], label %[[IF_ELSE:.*]] |
| ; UNROLL: [[IF_THEN4]]: |
| ; UNROLL-NEXT: [[L_0:%.*]] = load i32, ptr [[A]], align 8 |
| ; UNROLL-NEXT: br label %[[LOOP_LATCH]] |
| ; UNROLL: [[IF_ELSE]]: |
| ; UNROLL-NEXT: [[L_1:%.*]] = load i32, ptr [[A]], align 8 |
| ; UNROLL-NEXT: br label %[[LOOP_LATCH]] |
| ; UNROLL: [[LOOP_LATCH]]: |
| ; UNROLL-NEXT: [[P:%.*]] = phi i32 [ [[L_0]], %[[IF_THEN4]] ], [ [[L_1]], %[[IF_ELSE]] ] |
| ; UNROLL-NEXT: store i32 [[P]], ptr [[B]], align 4 |
| ; UNROLL-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 |
| ; UNROLL-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], 100 |
| ; UNROLL-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]], !llvm.loop [[LOOP27:![0-9]+]] |
| ; UNROLL: [[EXIT]]: |
| ; UNROLL-NEXT: ret void |
| ; |
| ; UNROLL-NOSIMPLIFY-LABEL: define void @hoistable_predicated_store( |
| ; UNROLL-NOSIMPLIFY-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]], ptr [[D:%.*]]) { |
| ; UNROLL-NOSIMPLIFY-NEXT: [[ENTRY:.*:]] |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[VECTOR_MEMCHECK:.*]] |
| ; UNROLL-NOSIMPLIFY: [[VECTOR_MEMCHECK]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[C]], i64 4 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[B]], i64 4 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[D]], i64 404 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr [[A]], i64 4 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[C]], [[SCEVGEP1]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[B]], [[SCEVGEP]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[BOUND04:%.*]] = icmp ult ptr [[C]], [[SCEVGEP2]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[BOUND15:%.*]] = icmp ult ptr [[D]], [[SCEVGEP]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[FOUND_CONFLICT6:%.*]] = and i1 [[BOUND04]], [[BOUND15]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[CONFLICT_RDX:%.*]] = or i1 [[FOUND_CONFLICT]], [[FOUND_CONFLICT6]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[BOUND07:%.*]] = icmp ult ptr [[C]], [[SCEVGEP3]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[BOUND18:%.*]] = icmp ult ptr [[A]], [[SCEVGEP]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[FOUND_CONFLICT9:%.*]] = and i1 [[BOUND07]], [[BOUND18]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[CONFLICT_RDX10:%.*]] = or i1 [[CONFLICT_RDX]], [[FOUND_CONFLICT9]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[BOUND011:%.*]] = icmp ult ptr [[B]], [[SCEVGEP2]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[BOUND112:%.*]] = icmp ult ptr [[D]], [[SCEVGEP1]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[FOUND_CONFLICT13:%.*]] = and i1 [[BOUND011]], [[BOUND112]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[CONFLICT_RDX14:%.*]] = or i1 [[CONFLICT_RDX10]], [[FOUND_CONFLICT13]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[BOUND015:%.*]] = icmp ult ptr [[B]], [[SCEVGEP3]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[BOUND116:%.*]] = icmp ult ptr [[A]], [[SCEVGEP1]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[FOUND_CONFLICT17:%.*]] = and i1 [[BOUND015]], [[BOUND116]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[CONFLICT_RDX18:%.*]] = or i1 [[CONFLICT_RDX14]], [[FOUND_CONFLICT17]] |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[CONFLICT_RDX18]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; UNROLL-NOSIMPLIFY: [[VECTOR_PH]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 8, !alias.scope [[META16:![0-9]+]] |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; UNROLL-NOSIMPLIFY: [[VECTOR_BODY]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[TMP1:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100 |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[TMP1]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP19:![0-9]+]] |
| ; UNROLL-NOSIMPLIFY: [[MIDDLE_BLOCK]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: store i32 0, ptr [[C]], align 4, !alias.scope [[META20:![0-9]+]], !noalias [[META22:![0-9]+]] |
| ; UNROLL-NOSIMPLIFY-NEXT: store i32 [[TMP0]], ptr [[B]], align 4, !alias.scope [[META25:![0-9]+]], !noalias [[META26:![0-9]+]] |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[SCALAR_PH]] |
| ; UNROLL-NOSIMPLIFY: [[SCALAR_PH]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 100, %[[MIDDLE_BLOCK]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[LOOP:.*]] |
| ; UNROLL-NOSIMPLIFY: [[LOOP]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ] |
| ; UNROLL-NOSIMPLIFY-NEXT: store i32 0, ptr [[C]], align 4 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[GEP_D:%.*]] = getelementptr i32, ptr [[D]], i64 [[IV]] |
| ; UNROLL-NOSIMPLIFY-NEXT: [[L:%.*]] = load i32, ptr [[GEP_D]], align 4 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[C:%.*]] = icmp eq i32 [[L]], 0 |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[C]], label %[[IF_THEN4:.*]], label %[[IF_ELSE:.*]] |
| ; UNROLL-NOSIMPLIFY: [[IF_THEN4]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[L_0:%.*]] = load i32, ptr [[A]], align 8 |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[LOOP_LATCH]] |
| ; UNROLL-NOSIMPLIFY: [[IF_ELSE]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[L_1:%.*]] = load i32, ptr [[A]], align 8 |
| ; UNROLL-NOSIMPLIFY-NEXT: br label %[[LOOP_LATCH]] |
| ; UNROLL-NOSIMPLIFY: [[LOOP_LATCH]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: [[P:%.*]] = phi i32 [ [[L_0]], %[[IF_THEN4]] ], [ [[L_1]], %[[IF_ELSE]] ] |
| ; UNROLL-NOSIMPLIFY-NEXT: store i32 [[P]], ptr [[B]], align 4 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 |
| ; UNROLL-NOSIMPLIFY-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], 100 |
| ; UNROLL-NOSIMPLIFY-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]], !llvm.loop [[LOOP27:![0-9]+]] |
| ; UNROLL-NOSIMPLIFY: [[EXIT]]: |
| ; UNROLL-NOSIMPLIFY-NEXT: ret void |
| ; |
| ; VEC-LABEL: define void @hoistable_predicated_store( |
| ; VEC-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]], ptr [[D:%.*]]) { |
| ; VEC-NEXT: [[ENTRY:.*:]] |
| ; VEC-NEXT: br label %[[VECTOR_MEMCHECK:.*]] |
| ; VEC: [[VECTOR_MEMCHECK]]: |
| ; VEC-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[C]], i64 4 |
| ; VEC-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[B]], i64 4 |
| ; VEC-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[D]], i64 404 |
| ; VEC-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr [[A]], i64 4 |
| ; VEC-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[C]], [[SCEVGEP1]] |
| ; VEC-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[B]], [[SCEVGEP]] |
| ; VEC-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] |
| ; VEC-NEXT: [[BOUND04:%.*]] = icmp ult ptr [[C]], [[SCEVGEP2]] |
| ; VEC-NEXT: [[BOUND15:%.*]] = icmp ult ptr [[D]], [[SCEVGEP]] |
| ; VEC-NEXT: [[FOUND_CONFLICT6:%.*]] = and i1 [[BOUND04]], [[BOUND15]] |
| ; VEC-NEXT: [[CONFLICT_RDX:%.*]] = or i1 [[FOUND_CONFLICT]], [[FOUND_CONFLICT6]] |
| ; VEC-NEXT: [[BOUND07:%.*]] = icmp ult ptr [[C]], [[SCEVGEP3]] |
| ; VEC-NEXT: [[BOUND18:%.*]] = icmp ult ptr [[A]], [[SCEVGEP]] |
| ; VEC-NEXT: [[FOUND_CONFLICT9:%.*]] = and i1 [[BOUND07]], [[BOUND18]] |
| ; VEC-NEXT: [[CONFLICT_RDX10:%.*]] = or i1 [[CONFLICT_RDX]], [[FOUND_CONFLICT9]] |
| ; VEC-NEXT: [[BOUND011:%.*]] = icmp ult ptr [[B]], [[SCEVGEP2]] |
| ; VEC-NEXT: [[BOUND112:%.*]] = icmp ult ptr [[D]], [[SCEVGEP1]] |
| ; VEC-NEXT: [[FOUND_CONFLICT13:%.*]] = and i1 [[BOUND011]], [[BOUND112]] |
| ; VEC-NEXT: [[CONFLICT_RDX14:%.*]] = or i1 [[CONFLICT_RDX10]], [[FOUND_CONFLICT13]] |
| ; VEC-NEXT: [[BOUND015:%.*]] = icmp ult ptr [[B]], [[SCEVGEP3]] |
| ; VEC-NEXT: [[BOUND116:%.*]] = icmp ult ptr [[A]], [[SCEVGEP1]] |
| ; VEC-NEXT: [[FOUND_CONFLICT17:%.*]] = and i1 [[BOUND015]], [[BOUND116]] |
| ; VEC-NEXT: [[CONFLICT_RDX18:%.*]] = or i1 [[CONFLICT_RDX14]], [[FOUND_CONFLICT17]] |
| ; VEC-NEXT: br i1 [[CONFLICT_RDX18]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC: [[VECTOR_PH]]: |
| ; VEC-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 8, !alias.scope [[META16:![0-9]+]] |
| ; VEC-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC: [[VECTOR_BODY]]: |
| ; VEC-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; VEC-NEXT: [[TMP1:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100 |
| ; VEC-NEXT: br i1 [[TMP1]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP19:![0-9]+]] |
| ; VEC: [[MIDDLE_BLOCK]]: |
| ; VEC-NEXT: store i32 0, ptr [[C]], align 4, !alias.scope [[META20:![0-9]+]], !noalias [[META22:![0-9]+]] |
| ; VEC-NEXT: store i32 [[TMP0]], ptr [[B]], align 4, !alias.scope [[META25:![0-9]+]], !noalias [[META26:![0-9]+]] |
| ; VEC-NEXT: br label %[[SCALAR_PH]] |
| ; VEC: [[SCALAR_PH]]: |
| ; VEC-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 100, %[[MIDDLE_BLOCK]] ], [ 0, %[[VECTOR_MEMCHECK]] ] |
| ; VEC-NEXT: br label %[[LOOP:.*]] |
| ; VEC: [[LOOP]]: |
| ; VEC-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ] |
| ; VEC-NEXT: store i32 0, ptr [[C]], align 4 |
| ; VEC-NEXT: [[GEP_D:%.*]] = getelementptr i32, ptr [[D]], i64 [[IV]] |
| ; VEC-NEXT: [[L:%.*]] = load i32, ptr [[GEP_D]], align 4 |
| ; VEC-NEXT: [[C:%.*]] = icmp eq i32 [[L]], 0 |
| ; VEC-NEXT: br i1 [[C]], label %[[IF_THEN4:.*]], label %[[IF_ELSE:.*]] |
| ; VEC: [[IF_THEN4]]: |
| ; VEC-NEXT: [[L_0:%.*]] = load i32, ptr [[A]], align 8 |
| ; VEC-NEXT: br label %[[LOOP_LATCH]] |
| ; VEC: [[IF_ELSE]]: |
| ; VEC-NEXT: [[L_1:%.*]] = load i32, ptr [[A]], align 8 |
| ; VEC-NEXT: br label %[[LOOP_LATCH]] |
| ; VEC: [[LOOP_LATCH]]: |
| ; VEC-NEXT: [[P:%.*]] = phi i32 [ [[L_0]], %[[IF_THEN4]] ], [ [[L_1]], %[[IF_ELSE]] ] |
| ; VEC-NEXT: store i32 [[P]], ptr [[B]], align 4 |
| ; VEC-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 |
| ; VEC-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], 100 |
| ; VEC-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]], !llvm.loop [[LOOP27:![0-9]+]] |
| ; VEC: [[EXIT]]: |
| ; VEC-NEXT: ret void |
| ; |
| entry: |
| br label %loop |
| |
| loop: |
| %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ] |
| store i32 0, ptr %C, align 4 |
| %gep.D = getelementptr i32, ptr %D, i64 %iv |
| %l = load i32, ptr %gep.D |
| %c = icmp eq i32 %l, 0 |
| br i1 %c, label %if.then4, label %if.else |
| |
| if.then4: |
| %l.0 = load i32, ptr %A, align 8 |
| br label %loop.latch |
| |
| if.else: |
| %l.1 = load i32, ptr %A, align 8 |
| br label %loop.latch |
| |
| loop.latch: |
| %p = phi i32 [ %l.0, %if.then4 ], [ %l.1, %if.else ] |
| store i32 %p, ptr %B, align 4 |
| %iv.next = add i64 %iv, 1 |
| %ec = icmp eq i64 %iv, 100 |
| br i1 %ec, label %exit, label %loop |
| |
| exit: |
| ret void |
| } |
