| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 6 |
| ; RUN: opt < %s -passes=loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -S | FileCheck --check-prefix VEC4_INTERL1 %s |
| ; RUN: opt < %s -passes=loop-vectorize -force-vector-interleave=2 -force-vector-width=4 -S | FileCheck --check-prefix VEC4_INTERL2 %s |
| ; RUN: opt < %s -passes=loop-vectorize -force-vector-interleave=2 -force-vector-width=1 -S | FileCheck --check-prefix VEC1_INTERL2 %s |
| ; RUN: opt < %s -passes=loop-vectorize -force-vector-interleave=1 -force-vector-width=2 -keep-loops=false -S | FileCheck --check-prefix VEC2_INTERL1_PRED_STORE %s |
| |
| @fp_inc = common global float 0.000000e+00, align 4 |
| |
| ;void fp_iv_loop1(float init, ptr __restrict__ A, int N) { |
| ; float x = init; |
| ; for (int i=0; i < N; ++i) { |
| ; A[i] = x; |
| ; x -= fp_inc; |
| ; } |
| ;} |
| |
| |
| |
| |
| define void @fp_iv_loop1_fast_FMF(float %init, ptr noalias nocapture %A, i32 %N) { |
| ; VEC4_INTERL1-LABEL: define void @fp_iv_loop1_fast_FMF( |
| ; VEC4_INTERL1-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], i32 [[N:%.*]]) { |
| ; VEC4_INTERL1-NEXT: [[ENTRY:.*:]] |
| ; VEC4_INTERL1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[N]], 0 |
| ; VEC4_INTERL1-NEXT: br i1 [[CMP4]], label %[[FOR_BODY_LR_PH:.*]], label %[[FOR_END:.*]] |
| ; VEC4_INTERL1: [[FOR_BODY_LR_PH]]: |
| ; VEC4_INTERL1-NEXT: [[FPINC:%.*]] = load float, ptr @fp_inc, align 4 |
| ; VEC4_INTERL1-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64 |
| ; VEC4_INTERL1-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 4 |
| ; VEC4_INTERL1-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC4_INTERL1: [[VECTOR_PH]]: |
| ; VEC4_INTERL1-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP0]], 3 |
| ; VEC4_INTERL1-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]] |
| ; VEC4_INTERL1-NEXT: [[DOTCAST:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC4_INTERL1-NEXT: [[TMP1:%.*]] = fmul fast float [[FPINC]], [[DOTCAST]] |
| ; VEC4_INTERL1-NEXT: [[TMP2:%.*]] = fsub fast float [[INIT]], [[TMP1]] |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[INIT]], i64 0 |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x float> poison, float [[FPINC]], i64 0 |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT1]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL1-NEXT: [[TMP3:%.*]] = fmul fast <4 x float> <float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, [[BROADCAST_SPLAT2]] |
| ; VEC4_INTERL1-NEXT: [[INDUCTION:%.*]] = fsub fast <4 x float> [[BROADCAST_SPLAT]], [[TMP3]] |
| ; VEC4_INTERL1-NEXT: [[TMP4:%.*]] = fmul fast float [[FPINC]], 4.000000e+00 |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <4 x float> poison, float [[TMP4]], i64 0 |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLAT4:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT3]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL1-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC4_INTERL1: [[VECTOR_BODY]]: |
| ; VEC4_INTERL1-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[VEC_IND:%.*]] = phi <4 x float> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[TMP5:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; VEC4_INTERL1-NEXT: store <4 x float> [[VEC_IND]], ptr [[TMP5]], align 4 |
| ; VEC4_INTERL1-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 |
| ; VEC4_INTERL1-NEXT: [[VEC_IND_NEXT]] = fsub fast <4 x float> [[VEC_IND]], [[BROADCAST_SPLAT4]] |
| ; VEC4_INTERL1-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC4_INTERL1-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP1:![0-9]+]] |
| ; VEC4_INTERL1: [[MIDDLE_BLOCK]]: |
| ; VEC4_INTERL1-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] |
| ; VEC4_INTERL1-NEXT: br i1 [[CMP_N]], label %[[FOR_END_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC4_INTERL1: [[SCALAR_PH]]: |
| ; VEC4_INTERL1-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[FOR_BODY_LR_PH]] ] |
| ; VEC4_INTERL1-NEXT: [[BC_RESUME_VAL5:%.*]] = phi float [ [[TMP2]], %[[MIDDLE_BLOCK]] ], [ [[INIT]], %[[FOR_BODY_LR_PH]] ] |
| ; VEC4_INTERL1-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC4_INTERL1: [[FOR_BODY]]: |
| ; VEC4_INTERL1-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[X_05:%.*]] = phi float [ [[BC_RESUME_VAL5]], %[[SCALAR_PH]] ], [ [[ADD:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV]] |
| ; VEC4_INTERL1-NEXT: store float [[X_05]], ptr [[ARRAYIDX]], align 4 |
| ; VEC4_INTERL1-NEXT: [[ADD]] = fsub fast float [[X_05]], [[FPINC]] |
| ; VEC4_INTERL1-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC4_INTERL1-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC4_INTERL1-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC4_INTERL1-NEXT: br i1 [[EXITCOND]], label %[[FOR_END_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] |
| ; VEC4_INTERL1: [[FOR_END_LOOPEXIT]]: |
| ; VEC4_INTERL1-NEXT: br label %[[FOR_END]] |
| ; VEC4_INTERL1: [[FOR_END]]: |
| ; VEC4_INTERL1-NEXT: ret void |
| ; |
| ; VEC4_INTERL2-LABEL: define void @fp_iv_loop1_fast_FMF( |
| ; VEC4_INTERL2-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], i32 [[N:%.*]]) { |
| ; VEC4_INTERL2-NEXT: [[ENTRY:.*:]] |
| ; VEC4_INTERL2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[N]], 0 |
| ; VEC4_INTERL2-NEXT: br i1 [[CMP4]], label %[[FOR_BODY_LR_PH:.*]], label %[[FOR_END:.*]] |
| ; VEC4_INTERL2: [[FOR_BODY_LR_PH]]: |
| ; VEC4_INTERL2-NEXT: [[FPINC:%.*]] = load float, ptr @fp_inc, align 4 |
| ; VEC4_INTERL2-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64 |
| ; VEC4_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 8 |
| ; VEC4_INTERL2-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC4_INTERL2: [[VECTOR_PH]]: |
| ; VEC4_INTERL2-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP0]], 7 |
| ; VEC4_INTERL2-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]] |
| ; VEC4_INTERL2-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[FPINC]], i64 0 |
| ; VEC4_INTERL2-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL2-NEXT: [[DOTCAST:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC4_INTERL2-NEXT: [[TMP1:%.*]] = fmul fast float [[FPINC]], [[DOTCAST]] |
| ; VEC4_INTERL2-NEXT: [[TMP2:%.*]] = fsub fast float [[INIT]], [[TMP1]] |
| ; VEC4_INTERL2-NEXT: [[TMP3:%.*]] = fmul fast <4 x float> splat (float 4.000000e+00), [[BROADCAST_SPLAT]] |
| ; VEC4_INTERL2-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x float> poison, float [[INIT]], i64 0 |
| ; VEC4_INTERL2-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT1]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL2-NEXT: [[TMP4:%.*]] = fmul fast <4 x float> <float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, [[BROADCAST_SPLAT]] |
| ; VEC4_INTERL2-NEXT: [[INDUCTION:%.*]] = fsub fast <4 x float> [[BROADCAST_SPLAT2]], [[TMP4]] |
| ; VEC4_INTERL2-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC4_INTERL2: [[VECTOR_BODY]]: |
| ; VEC4_INTERL2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[VEC_IND:%.*]] = phi <4 x float> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[STEP_ADD:%.*]] = fsub fast <4 x float> [[VEC_IND]], [[TMP3]] |
| ; VEC4_INTERL2-NEXT: [[TMP5:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; VEC4_INTERL2-NEXT: [[TMP6:%.*]] = getelementptr inbounds float, ptr [[TMP5]], i64 4 |
| ; VEC4_INTERL2-NEXT: store <4 x float> [[VEC_IND]], ptr [[TMP5]], align 4 |
| ; VEC4_INTERL2-NEXT: store <4 x float> [[STEP_ADD]], ptr [[TMP6]], align 4 |
| ; VEC4_INTERL2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 |
| ; VEC4_INTERL2-NEXT: [[VEC_IND_NEXT]] = fsub fast <4 x float> [[STEP_ADD]], [[TMP3]] |
| ; VEC4_INTERL2-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC4_INTERL2-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP1:![0-9]+]] |
| ; VEC4_INTERL2: [[MIDDLE_BLOCK]]: |
| ; VEC4_INTERL2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] |
| ; VEC4_INTERL2-NEXT: br i1 [[CMP_N]], label %[[FOR_END_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC4_INTERL2: [[SCALAR_PH]]: |
| ; VEC4_INTERL2-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[FOR_BODY_LR_PH]] ] |
| ; VEC4_INTERL2-NEXT: [[BC_RESUME_VAL3:%.*]] = phi float [ [[TMP2]], %[[MIDDLE_BLOCK]] ], [ [[INIT]], %[[FOR_BODY_LR_PH]] ] |
| ; VEC4_INTERL2-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC4_INTERL2: [[FOR_BODY]]: |
| ; VEC4_INTERL2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[X_05:%.*]] = phi float [ [[BC_RESUME_VAL3]], %[[SCALAR_PH]] ], [ [[ADD:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV]] |
| ; VEC4_INTERL2-NEXT: store float [[X_05]], ptr [[ARRAYIDX]], align 4 |
| ; VEC4_INTERL2-NEXT: [[ADD]] = fsub fast float [[X_05]], [[FPINC]] |
| ; VEC4_INTERL2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC4_INTERL2-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC4_INTERL2-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC4_INTERL2-NEXT: br i1 [[EXITCOND]], label %[[FOR_END_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] |
| ; VEC4_INTERL2: [[FOR_END_LOOPEXIT]]: |
| ; VEC4_INTERL2-NEXT: br label %[[FOR_END]] |
| ; VEC4_INTERL2: [[FOR_END]]: |
| ; VEC4_INTERL2-NEXT: ret void |
| ; |
| ; VEC1_INTERL2-LABEL: define void @fp_iv_loop1_fast_FMF( |
| ; VEC1_INTERL2-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], i32 [[N:%.*]]) { |
| ; VEC1_INTERL2-NEXT: [[ENTRY:.*:]] |
| ; VEC1_INTERL2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[N]], 0 |
| ; VEC1_INTERL2-NEXT: br i1 [[CMP4]], label %[[FOR_BODY_LR_PH:.*]], label %[[FOR_END:.*]] |
| ; VEC1_INTERL2: [[FOR_BODY_LR_PH]]: |
| ; VEC1_INTERL2-NEXT: [[FPINC:%.*]] = load float, ptr @fp_inc, align 4 |
| ; VEC1_INTERL2-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64 |
| ; VEC1_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 2 |
| ; VEC1_INTERL2-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC1_INTERL2: [[VECTOR_PH]]: |
| ; VEC1_INTERL2-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP0]], 1 |
| ; VEC1_INTERL2-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]] |
| ; VEC1_INTERL2-NEXT: [[DOTCAST:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC1_INTERL2-NEXT: [[TMP1:%.*]] = fmul fast float [[FPINC]], [[DOTCAST]] |
| ; VEC1_INTERL2-NEXT: [[TMP2:%.*]] = fsub fast float [[INIT]], [[TMP1]] |
| ; VEC1_INTERL2-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC1_INTERL2: [[VECTOR_BODY]]: |
| ; VEC1_INTERL2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC1_INTERL2-NEXT: [[TMP6:%.*]] = add i64 [[INDEX]], 1 |
| ; VEC1_INTERL2-NEXT: [[DOTCAST1:%.*]] = sitofp i64 [[INDEX]] to float |
| ; VEC1_INTERL2-NEXT: [[TMP3:%.*]] = fmul fast float [[FPINC]], [[DOTCAST1]] |
| ; VEC1_INTERL2-NEXT: [[OFFSET_IDX:%.*]] = fsub fast float [[INIT]], [[TMP3]] |
| ; VEC1_INTERL2-NEXT: [[TMP9:%.*]] = fmul fast float 1.000000e+00, [[FPINC]] |
| ; VEC1_INTERL2-NEXT: [[TMP4:%.*]] = fsub fast float [[OFFSET_IDX]], [[TMP9]] |
| ; VEC1_INTERL2-NEXT: [[TMP5:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; VEC1_INTERL2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP6]] |
| ; VEC1_INTERL2-NEXT: store float [[OFFSET_IDX]], ptr [[TMP5]], align 4 |
| ; VEC1_INTERL2-NEXT: store float [[TMP4]], ptr [[TMP7]], align 4 |
| ; VEC1_INTERL2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; VEC1_INTERL2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC1_INTERL2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP1:![0-9]+]] |
| ; VEC1_INTERL2: [[MIDDLE_BLOCK]]: |
| ; VEC1_INTERL2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] |
| ; VEC1_INTERL2-NEXT: br i1 [[CMP_N]], label %[[FOR_END_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC1_INTERL2: [[SCALAR_PH]]: |
| ; VEC1_INTERL2-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[FOR_BODY_LR_PH]] ] |
| ; VEC1_INTERL2-NEXT: [[BC_RESUME_VAL1:%.*]] = phi float [ [[TMP2]], %[[MIDDLE_BLOCK]] ], [ [[INIT]], %[[FOR_BODY_LR_PH]] ] |
| ; VEC1_INTERL2-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC1_INTERL2: [[FOR_BODY]]: |
| ; VEC1_INTERL2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ] |
| ; VEC1_INTERL2-NEXT: [[X_05:%.*]] = phi float [ [[BC_RESUME_VAL1]], %[[SCALAR_PH]] ], [ [[ADD:%.*]], %[[FOR_BODY]] ] |
| ; VEC1_INTERL2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV]] |
| ; VEC1_INTERL2-NEXT: store float [[X_05]], ptr [[ARRAYIDX]], align 4 |
| ; VEC1_INTERL2-NEXT: [[ADD]] = fsub fast float [[X_05]], [[FPINC]] |
| ; VEC1_INTERL2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC1_INTERL2-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC1_INTERL2-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC1_INTERL2-NEXT: br i1 [[EXITCOND]], label %[[FOR_END_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] |
| ; VEC1_INTERL2: [[FOR_END_LOOPEXIT]]: |
| ; VEC1_INTERL2-NEXT: br label %[[FOR_END]] |
| ; VEC1_INTERL2: [[FOR_END]]: |
| ; VEC1_INTERL2-NEXT: ret void |
| ; |
| ; VEC2_INTERL1_PRED_STORE-LABEL: define void @fp_iv_loop1_fast_FMF( |
| ; VEC2_INTERL1_PRED_STORE-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], i32 [[N:%.*]]) { |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ENTRY:.*:]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[N]], 0 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[CMP4]], label %[[FOR_BODY_LR_PH:.*]], label %[[FOR_END:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_BODY_LR_PH]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[FPINC:%.*]] = load float, ptr @fp_inc, align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 2 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[VECTOR_PH]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP0]], 1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTCAST:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP1:%.*]] = fmul fast float [[FPINC]], [[DOTCAST]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP2:%.*]] = fsub fast float [[INIT]], [[TMP1]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x float> poison, float [[INIT]], i64 0 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x float> [[BROADCAST_SPLATINSERT]], <2 x float> poison, <2 x i32> zeroinitializer |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <2 x float> poison, float [[FPINC]], i64 0 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <2 x float> [[BROADCAST_SPLATINSERT1]], <2 x float> poison, <2 x i32> zeroinitializer |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP3:%.*]] = fmul fast <2 x float> <float 0.000000e+00, float 1.000000e+00>, [[BROADCAST_SPLAT2]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDUCTION:%.*]] = fsub fast <2 x float> [[BROADCAST_SPLAT]], [[TMP3]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP4:%.*]] = fmul fast float [[FPINC]], 2.000000e+00 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <2 x float> poison, float [[TMP4]], i64 0 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLAT4:%.*]] = shufflevector <2 x float> [[BROADCAST_SPLATINSERT3]], <2 x float> poison, <2 x i32> zeroinitializer |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[VECTOR_BODY]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[VEC_IND:%.*]] = phi <2 x float> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP5:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store <2 x float> [[VEC_IND]], ptr [[TMP5]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[VEC_IND_NEXT]] = fsub fast <2 x float> [[VEC_IND]], [[BROADCAST_SPLAT4]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP1:![0-9]+]] |
| ; VEC2_INTERL1_PRED_STORE: [[MIDDLE_BLOCK]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[CMP_N]], label %[[FOR_END_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC2_INTERL1_PRED_STORE: [[SCALAR_PH]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[FOR_BODY_LR_PH]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BC_RESUME_VAL5:%.*]] = phi float [ [[TMP2]], %[[MIDDLE_BLOCK]] ], [ [[INIT]], %[[FOR_BODY_LR_PH]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_BODY]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[X_05:%.*]] = phi float [ [[BC_RESUME_VAL5]], %[[SCALAR_PH]] ], [ [[ADD:%.*]], %[[FOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store float [[X_05]], ptr [[ARRAYIDX]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ADD]] = fsub fast float [[X_05]], [[FPINC]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[EXITCOND]], label %[[FOR_END_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_END_LOOPEXIT]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[FOR_END]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_END]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: ret void |
| ; |
| entry: |
| %cmp4 = icmp sgt i32 %N, 0 |
| br i1 %cmp4, label %for.body.lr.ph, label %for.end |
| |
| for.body.lr.ph: |
| %fpinc = load float, ptr @fp_inc, align 4 |
| br label %for.body |
| |
| for.body: |
| %indvars.iv = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body ] |
| %x.05 = phi float [ %init, %for.body.lr.ph ], [ %add, %for.body ] |
| %arrayidx = getelementptr inbounds float, ptr %A, i64 %indvars.iv |
| store float %x.05, ptr %arrayidx, align 4 |
| %add = fsub fast float %x.05, %fpinc |
| %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 |
| %lftr.wideiv = trunc i64 %indvars.iv.next to i32 |
| %exitcond = icmp eq i32 %lftr.wideiv, %N |
| br i1 %exitcond, label %for.end.loopexit, label %for.body |
| |
| for.end.loopexit: |
| br label %for.end |
| |
| for.end: |
| ret void |
| } |
| |
| ; We do not need the full 'fast' FMF to vectorize the loop, but the code can't become |
| ; 'fast' spontaneously - FMF should propagate from the original IR. |
| |
| define void @fp_iv_loop1_reassoc_FMF(float %init, ptr noalias nocapture %A, i32 %N) { |
| ; |
| ; |
| ; |
| ; |
| ; VEC4_INTERL1-LABEL: define void @fp_iv_loop1_reassoc_FMF( |
| ; VEC4_INTERL1-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], i32 [[N:%.*]]) { |
| ; VEC4_INTERL1-NEXT: [[ENTRY:.*:]] |
| ; VEC4_INTERL1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[N]], 0 |
| ; VEC4_INTERL1-NEXT: br i1 [[CMP4]], label %[[FOR_BODY_LR_PH:.*]], label %[[FOR_END:.*]] |
| ; VEC4_INTERL1: [[FOR_BODY_LR_PH]]: |
| ; VEC4_INTERL1-NEXT: [[FPINC:%.*]] = load float, ptr @fp_inc, align 4 |
| ; VEC4_INTERL1-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64 |
| ; VEC4_INTERL1-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 4 |
| ; VEC4_INTERL1-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC4_INTERL1: [[VECTOR_PH]]: |
| ; VEC4_INTERL1-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP0]], 3 |
| ; VEC4_INTERL1-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]] |
| ; VEC4_INTERL1-NEXT: [[DOTCAST:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC4_INTERL1-NEXT: [[TMP1:%.*]] = fmul reassoc float [[FPINC]], [[DOTCAST]] |
| ; VEC4_INTERL1-NEXT: [[TMP2:%.*]] = fsub reassoc float [[INIT]], [[TMP1]] |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[INIT]], i64 0 |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x float> poison, float [[FPINC]], i64 0 |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT1]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL1-NEXT: [[TMP3:%.*]] = fmul reassoc <4 x float> <float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, [[BROADCAST_SPLAT2]] |
| ; VEC4_INTERL1-NEXT: [[INDUCTION:%.*]] = fsub reassoc <4 x float> [[BROADCAST_SPLAT]], [[TMP3]] |
| ; VEC4_INTERL1-NEXT: [[TMP4:%.*]] = fmul reassoc float [[FPINC]], 4.000000e+00 |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <4 x float> poison, float [[TMP4]], i64 0 |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLAT4:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT3]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL1-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC4_INTERL1: [[VECTOR_BODY]]: |
| ; VEC4_INTERL1-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[VEC_IND:%.*]] = phi <4 x float> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[TMP5:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; VEC4_INTERL1-NEXT: store <4 x float> [[VEC_IND]], ptr [[TMP5]], align 4 |
| ; VEC4_INTERL1-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 |
| ; VEC4_INTERL1-NEXT: [[VEC_IND_NEXT]] = fsub reassoc <4 x float> [[VEC_IND]], [[BROADCAST_SPLAT4]] |
| ; VEC4_INTERL1-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC4_INTERL1-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] |
| ; VEC4_INTERL1: [[MIDDLE_BLOCK]]: |
| ; VEC4_INTERL1-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] |
| ; VEC4_INTERL1-NEXT: br i1 [[CMP_N]], label %[[FOR_END_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC4_INTERL1: [[SCALAR_PH]]: |
| ; VEC4_INTERL1-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[FOR_BODY_LR_PH]] ] |
| ; VEC4_INTERL1-NEXT: [[BC_RESUME_VAL5:%.*]] = phi float [ [[TMP2]], %[[MIDDLE_BLOCK]] ], [ [[INIT]], %[[FOR_BODY_LR_PH]] ] |
| ; VEC4_INTERL1-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC4_INTERL1: [[FOR_BODY]]: |
| ; VEC4_INTERL1-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[X_05:%.*]] = phi float [ [[BC_RESUME_VAL5]], %[[SCALAR_PH]] ], [ [[ADD:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV]] |
| ; VEC4_INTERL1-NEXT: store float [[X_05]], ptr [[ARRAYIDX]], align 4 |
| ; VEC4_INTERL1-NEXT: [[ADD]] = fsub reassoc float [[X_05]], [[FPINC]] |
| ; VEC4_INTERL1-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC4_INTERL1-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC4_INTERL1-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC4_INTERL1-NEXT: br i1 [[EXITCOND]], label %[[FOR_END_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] |
| ; VEC4_INTERL1: [[FOR_END_LOOPEXIT]]: |
| ; VEC4_INTERL1-NEXT: br label %[[FOR_END]] |
| ; VEC4_INTERL1: [[FOR_END]]: |
| ; VEC4_INTERL1-NEXT: ret void |
| ; |
| ; VEC4_INTERL2-LABEL: define void @fp_iv_loop1_reassoc_FMF( |
| ; VEC4_INTERL2-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], i32 [[N:%.*]]) { |
| ; VEC4_INTERL2-NEXT: [[ENTRY:.*:]] |
| ; VEC4_INTERL2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[N]], 0 |
| ; VEC4_INTERL2-NEXT: br i1 [[CMP4]], label %[[FOR_BODY_LR_PH:.*]], label %[[FOR_END:.*]] |
| ; VEC4_INTERL2: [[FOR_BODY_LR_PH]]: |
| ; VEC4_INTERL2-NEXT: [[FPINC:%.*]] = load float, ptr @fp_inc, align 4 |
| ; VEC4_INTERL2-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64 |
| ; VEC4_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 8 |
| ; VEC4_INTERL2-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC4_INTERL2: [[VECTOR_PH]]: |
| ; VEC4_INTERL2-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP0]], 7 |
| ; VEC4_INTERL2-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]] |
| ; VEC4_INTERL2-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[FPINC]], i64 0 |
| ; VEC4_INTERL2-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL2-NEXT: [[DOTCAST:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC4_INTERL2-NEXT: [[TMP1:%.*]] = fmul reassoc float [[FPINC]], [[DOTCAST]] |
| ; VEC4_INTERL2-NEXT: [[TMP2:%.*]] = fsub reassoc float [[INIT]], [[TMP1]] |
| ; VEC4_INTERL2-NEXT: [[TMP3:%.*]] = fmul reassoc <4 x float> splat (float 4.000000e+00), [[BROADCAST_SPLAT]] |
| ; VEC4_INTERL2-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x float> poison, float [[INIT]], i64 0 |
| ; VEC4_INTERL2-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT1]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL2-NEXT: [[TMP4:%.*]] = fmul reassoc <4 x float> <float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, [[BROADCAST_SPLAT]] |
| ; VEC4_INTERL2-NEXT: [[INDUCTION:%.*]] = fsub reassoc <4 x float> [[BROADCAST_SPLAT2]], [[TMP4]] |
| ; VEC4_INTERL2-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC4_INTERL2: [[VECTOR_BODY]]: |
| ; VEC4_INTERL2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[VEC_IND:%.*]] = phi <4 x float> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[STEP_ADD:%.*]] = fsub reassoc <4 x float> [[VEC_IND]], [[TMP3]] |
| ; VEC4_INTERL2-NEXT: [[TMP5:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; VEC4_INTERL2-NEXT: [[TMP6:%.*]] = getelementptr inbounds float, ptr [[TMP5]], i64 4 |
| ; VEC4_INTERL2-NEXT: store <4 x float> [[VEC_IND]], ptr [[TMP5]], align 4 |
| ; VEC4_INTERL2-NEXT: store <4 x float> [[STEP_ADD]], ptr [[TMP6]], align 4 |
| ; VEC4_INTERL2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 |
| ; VEC4_INTERL2-NEXT: [[VEC_IND_NEXT]] = fsub reassoc <4 x float> [[STEP_ADD]], [[TMP3]] |
| ; VEC4_INTERL2-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC4_INTERL2-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] |
| ; VEC4_INTERL2: [[MIDDLE_BLOCK]]: |
| ; VEC4_INTERL2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] |
| ; VEC4_INTERL2-NEXT: br i1 [[CMP_N]], label %[[FOR_END_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC4_INTERL2: [[SCALAR_PH]]: |
| ; VEC4_INTERL2-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[FOR_BODY_LR_PH]] ] |
| ; VEC4_INTERL2-NEXT: [[BC_RESUME_VAL3:%.*]] = phi float [ [[TMP2]], %[[MIDDLE_BLOCK]] ], [ [[INIT]], %[[FOR_BODY_LR_PH]] ] |
| ; VEC4_INTERL2-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC4_INTERL2: [[FOR_BODY]]: |
| ; VEC4_INTERL2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[X_05:%.*]] = phi float [ [[BC_RESUME_VAL3]], %[[SCALAR_PH]] ], [ [[ADD:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV]] |
| ; VEC4_INTERL2-NEXT: store float [[X_05]], ptr [[ARRAYIDX]], align 4 |
| ; VEC4_INTERL2-NEXT: [[ADD]] = fsub reassoc float [[X_05]], [[FPINC]] |
| ; VEC4_INTERL2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC4_INTERL2-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC4_INTERL2-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC4_INTERL2-NEXT: br i1 [[EXITCOND]], label %[[FOR_END_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] |
| ; VEC4_INTERL2: [[FOR_END_LOOPEXIT]]: |
| ; VEC4_INTERL2-NEXT: br label %[[FOR_END]] |
| ; VEC4_INTERL2: [[FOR_END]]: |
| ; VEC4_INTERL2-NEXT: ret void |
| ; |
| ; VEC1_INTERL2-LABEL: define void @fp_iv_loop1_reassoc_FMF( |
| ; VEC1_INTERL2-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], i32 [[N:%.*]]) { |
| ; VEC1_INTERL2-NEXT: [[ENTRY:.*:]] |
| ; VEC1_INTERL2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[N]], 0 |
| ; VEC1_INTERL2-NEXT: br i1 [[CMP4]], label %[[FOR_BODY_LR_PH:.*]], label %[[FOR_END:.*]] |
| ; VEC1_INTERL2: [[FOR_BODY_LR_PH]]: |
| ; VEC1_INTERL2-NEXT: [[FPINC:%.*]] = load float, ptr @fp_inc, align 4 |
| ; VEC1_INTERL2-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64 |
| ; VEC1_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 2 |
| ; VEC1_INTERL2-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC1_INTERL2: [[VECTOR_PH]]: |
| ; VEC1_INTERL2-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP0]], 1 |
| ; VEC1_INTERL2-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]] |
| ; VEC1_INTERL2-NEXT: [[DOTCAST:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC1_INTERL2-NEXT: [[TMP1:%.*]] = fmul reassoc float [[FPINC]], [[DOTCAST]] |
| ; VEC1_INTERL2-NEXT: [[TMP2:%.*]] = fsub reassoc float [[INIT]], [[TMP1]] |
| ; VEC1_INTERL2-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC1_INTERL2: [[VECTOR_BODY]]: |
| ; VEC1_INTERL2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC1_INTERL2-NEXT: [[TMP6:%.*]] = add i64 [[INDEX]], 1 |
| ; VEC1_INTERL2-NEXT: [[DOTCAST1:%.*]] = sitofp i64 [[INDEX]] to float |
| ; VEC1_INTERL2-NEXT: [[TMP3:%.*]] = fmul reassoc float [[FPINC]], [[DOTCAST1]] |
| ; VEC1_INTERL2-NEXT: [[OFFSET_IDX:%.*]] = fsub reassoc float [[INIT]], [[TMP3]] |
| ; VEC1_INTERL2-NEXT: [[TMP9:%.*]] = fmul reassoc float 1.000000e+00, [[FPINC]] |
| ; VEC1_INTERL2-NEXT: [[TMP4:%.*]] = fsub reassoc float [[OFFSET_IDX]], [[TMP9]] |
| ; VEC1_INTERL2-NEXT: [[TMP5:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; VEC1_INTERL2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP6]] |
| ; VEC1_INTERL2-NEXT: store float [[OFFSET_IDX]], ptr [[TMP5]], align 4 |
| ; VEC1_INTERL2-NEXT: store float [[TMP4]], ptr [[TMP7]], align 4 |
| ; VEC1_INTERL2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; VEC1_INTERL2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC1_INTERL2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] |
| ; VEC1_INTERL2: [[MIDDLE_BLOCK]]: |
| ; VEC1_INTERL2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] |
| ; VEC1_INTERL2-NEXT: br i1 [[CMP_N]], label %[[FOR_END_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC1_INTERL2: [[SCALAR_PH]]: |
| ; VEC1_INTERL2-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[FOR_BODY_LR_PH]] ] |
| ; VEC1_INTERL2-NEXT: [[BC_RESUME_VAL1:%.*]] = phi float [ [[TMP2]], %[[MIDDLE_BLOCK]] ], [ [[INIT]], %[[FOR_BODY_LR_PH]] ] |
| ; VEC1_INTERL2-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC1_INTERL2: [[FOR_BODY]]: |
| ; VEC1_INTERL2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ] |
| ; VEC1_INTERL2-NEXT: [[X_05:%.*]] = phi float [ [[BC_RESUME_VAL1]], %[[SCALAR_PH]] ], [ [[ADD:%.*]], %[[FOR_BODY]] ] |
| ; VEC1_INTERL2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV]] |
| ; VEC1_INTERL2-NEXT: store float [[X_05]], ptr [[ARRAYIDX]], align 4 |
| ; VEC1_INTERL2-NEXT: [[ADD]] = fsub reassoc float [[X_05]], [[FPINC]] |
| ; VEC1_INTERL2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC1_INTERL2-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC1_INTERL2-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC1_INTERL2-NEXT: br i1 [[EXITCOND]], label %[[FOR_END_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] |
| ; VEC1_INTERL2: [[FOR_END_LOOPEXIT]]: |
| ; VEC1_INTERL2-NEXT: br label %[[FOR_END]] |
| ; VEC1_INTERL2: [[FOR_END]]: |
| ; VEC1_INTERL2-NEXT: ret void |
| ; |
| ; VEC2_INTERL1_PRED_STORE-LABEL: define void @fp_iv_loop1_reassoc_FMF( |
| ; VEC2_INTERL1_PRED_STORE-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], i32 [[N:%.*]]) { |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ENTRY:.*:]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[N]], 0 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[CMP4]], label %[[FOR_BODY_LR_PH:.*]], label %[[FOR_END:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_BODY_LR_PH]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[FPINC:%.*]] = load float, ptr @fp_inc, align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 2 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[VECTOR_PH]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP0]], 1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTCAST:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP1:%.*]] = fmul reassoc float [[FPINC]], [[DOTCAST]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP2:%.*]] = fsub reassoc float [[INIT]], [[TMP1]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x float> poison, float [[INIT]], i64 0 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x float> [[BROADCAST_SPLATINSERT]], <2 x float> poison, <2 x i32> zeroinitializer |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <2 x float> poison, float [[FPINC]], i64 0 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <2 x float> [[BROADCAST_SPLATINSERT1]], <2 x float> poison, <2 x i32> zeroinitializer |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP3:%.*]] = fmul reassoc <2 x float> <float 0.000000e+00, float 1.000000e+00>, [[BROADCAST_SPLAT2]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDUCTION:%.*]] = fsub reassoc <2 x float> [[BROADCAST_SPLAT]], [[TMP3]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP4:%.*]] = fmul reassoc float [[FPINC]], 2.000000e+00 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <2 x float> poison, float [[TMP4]], i64 0 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLAT4:%.*]] = shufflevector <2 x float> [[BROADCAST_SPLATINSERT3]], <2 x float> poison, <2 x i32> zeroinitializer |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[VECTOR_BODY]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[VEC_IND:%.*]] = phi <2 x float> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP5:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store <2 x float> [[VEC_IND]], ptr [[TMP5]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[VEC_IND_NEXT]] = fsub reassoc <2 x float> [[VEC_IND]], [[BROADCAST_SPLAT4]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] |
| ; VEC2_INTERL1_PRED_STORE: [[MIDDLE_BLOCK]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[CMP_N]], label %[[FOR_END_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC2_INTERL1_PRED_STORE: [[SCALAR_PH]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[FOR_BODY_LR_PH]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BC_RESUME_VAL5:%.*]] = phi float [ [[TMP2]], %[[MIDDLE_BLOCK]] ], [ [[INIT]], %[[FOR_BODY_LR_PH]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_BODY]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[X_05:%.*]] = phi float [ [[BC_RESUME_VAL5]], %[[SCALAR_PH]] ], [ [[ADD:%.*]], %[[FOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store float [[X_05]], ptr [[ARRAYIDX]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ADD]] = fsub reassoc float [[X_05]], [[FPINC]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[EXITCOND]], label %[[FOR_END_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_END_LOOPEXIT]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[FOR_END]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_END]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: ret void |
| ; |
| entry: |
| %cmp4 = icmp sgt i32 %N, 0 |
| br i1 %cmp4, label %for.body.lr.ph, label %for.end |
| |
| for.body.lr.ph: |
| %fpinc = load float, ptr @fp_inc, align 4 |
| br label %for.body |
| |
| for.body: |
| %indvars.iv = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body ] |
| %x.05 = phi float [ %init, %for.body.lr.ph ], [ %add, %for.body ] |
| %arrayidx = getelementptr inbounds float, ptr %A, i64 %indvars.iv |
| store float %x.05, ptr %arrayidx, align 4 |
| %add = fsub reassoc float %x.05, %fpinc |
| %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 |
| %lftr.wideiv = trunc i64 %indvars.iv.next to i32 |
| %exitcond = icmp eq i32 %lftr.wideiv, %N |
| br i1 %exitcond, label %for.end.loopexit, label %for.body |
| |
| for.end.loopexit: |
| br label %for.end |
| |
| for.end: |
| ret void |
| } |
| |
| ;void fp_iv_loop2(float init, ptr __restrict__ A, int N) { |
| ; float x = init; |
| ; for (int i=0; i < N; ++i) { |
| ; A[i] = x; |
| ; x += 0.5; |
| ; } |
| ;} |
| |
| |
| define void @fp_iv_loop2(float %init, ptr noalias nocapture %A, i32 %N) #0 { |
| ; VEC4_INTERL1-LABEL: define void @fp_iv_loop2( |
| ; VEC4_INTERL1-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], i32 [[N:%.*]]) { |
| ; VEC4_INTERL1-NEXT: [[ENTRY:.*:]] |
| ; VEC4_INTERL1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[N]], 0 |
| ; VEC4_INTERL1-NEXT: br i1 [[CMP4]], label %[[FOR_BODY_PREHEADER:.*]], label %[[FOR_END:.*]] |
| ; VEC4_INTERL1: [[FOR_BODY_PREHEADER]]: |
| ; VEC4_INTERL1-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64 |
| ; VEC4_INTERL1-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 4 |
| ; VEC4_INTERL1-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC4_INTERL1: [[VECTOR_PH]]: |
| ; VEC4_INTERL1-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP0]], 3 |
| ; VEC4_INTERL1-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]] |
| ; VEC4_INTERL1-NEXT: [[TMP5:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC4_INTERL1-NEXT: [[TMP1:%.*]] = fmul fast float 5.000000e-01, [[TMP5]] |
| ; VEC4_INTERL1-NEXT: [[TMP2:%.*]] = fadd fast float [[INIT]], [[TMP1]] |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[INIT]], i64 0 |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL1-NEXT: [[INDUCTION:%.*]] = fadd fast <4 x float> [[BROADCAST_SPLAT]], <float 0.000000e+00, float 5.000000e-01, float 1.000000e+00, float 1.500000e+00> |
| ; VEC4_INTERL1-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC4_INTERL1: [[VECTOR_BODY]]: |
| ; VEC4_INTERL1-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[VEC_IND:%.*]] = phi <4 x float> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[TMP3:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; VEC4_INTERL1-NEXT: store <4 x float> [[VEC_IND]], ptr [[TMP3]], align 4 |
| ; VEC4_INTERL1-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 |
| ; VEC4_INTERL1-NEXT: [[VEC_IND_NEXT]] = fadd fast <4 x float> [[VEC_IND]], splat (float 2.000000e+00) |
| ; VEC4_INTERL1-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC4_INTERL1-NEXT: br i1 [[TMP4]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]] |
| ; VEC4_INTERL1: [[MIDDLE_BLOCK]]: |
| ; VEC4_INTERL1-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] |
| ; VEC4_INTERL1-NEXT: br i1 [[CMP_N]], label %[[FOR_END_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC4_INTERL1: [[SCALAR_PH]]: |
| ; VEC4_INTERL1-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[FOR_BODY_PREHEADER]] ] |
| ; VEC4_INTERL1-NEXT: [[BC_RESUME_VAL1:%.*]] = phi float [ [[TMP2]], %[[MIDDLE_BLOCK]] ], [ [[INIT]], %[[FOR_BODY_PREHEADER]] ] |
| ; VEC4_INTERL1-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC4_INTERL1: [[FOR_BODY]]: |
| ; VEC4_INTERL1-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; VEC4_INTERL1-NEXT: [[X_06:%.*]] = phi float [ [[CONV1:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL1]], %[[SCALAR_PH]] ] |
| ; VEC4_INTERL1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV]] |
| ; VEC4_INTERL1-NEXT: store float [[X_06]], ptr [[ARRAYIDX]], align 4 |
| ; VEC4_INTERL1-NEXT: [[CONV1]] = fadd fast float [[X_06]], 5.000000e-01 |
| ; VEC4_INTERL1-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC4_INTERL1-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC4_INTERL1-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC4_INTERL1-NEXT: br i1 [[EXITCOND]], label %[[FOR_END_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]] |
| ; VEC4_INTERL1: [[FOR_END_LOOPEXIT]]: |
| ; VEC4_INTERL1-NEXT: br label %[[FOR_END]] |
| ; VEC4_INTERL1: [[FOR_END]]: |
| ; VEC4_INTERL1-NEXT: ret void |
| ; |
| ; VEC4_INTERL2-LABEL: define void @fp_iv_loop2( |
| ; VEC4_INTERL2-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], i32 [[N:%.*]]) { |
| ; VEC4_INTERL2-NEXT: [[ENTRY:.*:]] |
| ; VEC4_INTERL2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[N]], 0 |
| ; VEC4_INTERL2-NEXT: br i1 [[CMP4]], label %[[FOR_BODY_PREHEADER:.*]], label %[[FOR_END:.*]] |
| ; VEC4_INTERL2: [[FOR_BODY_PREHEADER]]: |
| ; VEC4_INTERL2-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64 |
| ; VEC4_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 8 |
| ; VEC4_INTERL2-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC4_INTERL2: [[VECTOR_PH]]: |
| ; VEC4_INTERL2-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP0]], 7 |
| ; VEC4_INTERL2-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]] |
| ; VEC4_INTERL2-NEXT: [[TMP6:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC4_INTERL2-NEXT: [[TMP1:%.*]] = fmul fast float 5.000000e-01, [[TMP6]] |
| ; VEC4_INTERL2-NEXT: [[TMP2:%.*]] = fadd fast float [[INIT]], [[TMP1]] |
| ; VEC4_INTERL2-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[INIT]], i64 0 |
| ; VEC4_INTERL2-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL2-NEXT: [[INDUCTION:%.*]] = fadd fast <4 x float> [[BROADCAST_SPLAT]], <float 0.000000e+00, float 5.000000e-01, float 1.000000e+00, float 1.500000e+00> |
| ; VEC4_INTERL2-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC4_INTERL2: [[VECTOR_BODY]]: |
| ; VEC4_INTERL2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[VEC_IND:%.*]] = phi <4 x float> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[STEP_ADD:%.*]] = fadd fast <4 x float> [[VEC_IND]], splat (float 2.000000e+00) |
| ; VEC4_INTERL2-NEXT: [[TMP3:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; VEC4_INTERL2-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[TMP3]], i64 4 |
| ; VEC4_INTERL2-NEXT: store <4 x float> [[VEC_IND]], ptr [[TMP3]], align 4 |
| ; VEC4_INTERL2-NEXT: store <4 x float> [[STEP_ADD]], ptr [[TMP4]], align 4 |
| ; VEC4_INTERL2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 |
| ; VEC4_INTERL2-NEXT: [[VEC_IND_NEXT]] = fadd fast <4 x float> [[STEP_ADD]], splat (float 2.000000e+00) |
| ; VEC4_INTERL2-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC4_INTERL2-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]] |
| ; VEC4_INTERL2: [[MIDDLE_BLOCK]]: |
| ; VEC4_INTERL2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] |
| ; VEC4_INTERL2-NEXT: br i1 [[CMP_N]], label %[[FOR_END_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC4_INTERL2: [[SCALAR_PH]]: |
| ; VEC4_INTERL2-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[FOR_BODY_PREHEADER]] ] |
| ; VEC4_INTERL2-NEXT: [[BC_RESUME_VAL1:%.*]] = phi float [ [[TMP2]], %[[MIDDLE_BLOCK]] ], [ [[INIT]], %[[FOR_BODY_PREHEADER]] ] |
| ; VEC4_INTERL2-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC4_INTERL2: [[FOR_BODY]]: |
| ; VEC4_INTERL2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; VEC4_INTERL2-NEXT: [[X_06:%.*]] = phi float [ [[CONV1:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL1]], %[[SCALAR_PH]] ] |
| ; VEC4_INTERL2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV]] |
| ; VEC4_INTERL2-NEXT: store float [[X_06]], ptr [[ARRAYIDX]], align 4 |
| ; VEC4_INTERL2-NEXT: [[CONV1]] = fadd fast float [[X_06]], 5.000000e-01 |
| ; VEC4_INTERL2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC4_INTERL2-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC4_INTERL2-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC4_INTERL2-NEXT: br i1 [[EXITCOND]], label %[[FOR_END_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]] |
| ; VEC4_INTERL2: [[FOR_END_LOOPEXIT]]: |
| ; VEC4_INTERL2-NEXT: br label %[[FOR_END]] |
| ; VEC4_INTERL2: [[FOR_END]]: |
| ; VEC4_INTERL2-NEXT: ret void |
| ; |
| ; VEC1_INTERL2-LABEL: define void @fp_iv_loop2( |
| ; VEC1_INTERL2-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], i32 [[N:%.*]]) { |
| ; VEC1_INTERL2-NEXT: [[ENTRY:.*:]] |
| ; VEC1_INTERL2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[N]], 0 |
| ; VEC1_INTERL2-NEXT: br i1 [[CMP4]], label %[[FOR_BODY_PREHEADER:.*]], label %[[FOR_END:.*]] |
| ; VEC1_INTERL2: [[FOR_BODY_PREHEADER]]: |
| ; VEC1_INTERL2-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64 |
| ; VEC1_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 2 |
| ; VEC1_INTERL2-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC1_INTERL2: [[VECTOR_PH]]: |
| ; VEC1_INTERL2-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP0]], 1 |
| ; VEC1_INTERL2-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]] |
| ; VEC1_INTERL2-NEXT: [[TMP6:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC1_INTERL2-NEXT: [[TMP1:%.*]] = fmul fast float 5.000000e-01, [[TMP6]] |
| ; VEC1_INTERL2-NEXT: [[TMP2:%.*]] = fadd fast float [[INIT]], [[TMP1]] |
| ; VEC1_INTERL2-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC1_INTERL2: [[VECTOR_BODY]]: |
| ; VEC1_INTERL2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC1_INTERL2-NEXT: [[TMP9:%.*]] = add i64 [[INDEX]], 1 |
| ; VEC1_INTERL2-NEXT: [[DOTCAST1:%.*]] = sitofp i64 [[INDEX]] to float |
| ; VEC1_INTERL2-NEXT: [[TMP3:%.*]] = fmul fast float 5.000000e-01, [[DOTCAST1]] |
| ; VEC1_INTERL2-NEXT: [[OFFSET_IDX:%.*]] = fadd fast float [[INIT]], [[TMP3]] |
| ; VEC1_INTERL2-NEXT: [[TMP4:%.*]] = fadd fast float [[OFFSET_IDX]], 5.000000e-01 |
| ; VEC1_INTERL2-NEXT: [[TMP5:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; VEC1_INTERL2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP9]] |
| ; VEC1_INTERL2-NEXT: store float [[OFFSET_IDX]], ptr [[TMP5]], align 4 |
| ; VEC1_INTERL2-NEXT: store float [[TMP4]], ptr [[TMP7]], align 4 |
| ; VEC1_INTERL2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; VEC1_INTERL2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC1_INTERL2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]] |
| ; VEC1_INTERL2: [[MIDDLE_BLOCK]]: |
| ; VEC1_INTERL2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] |
| ; VEC1_INTERL2-NEXT: br i1 [[CMP_N]], label %[[FOR_END_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC1_INTERL2: [[SCALAR_PH]]: |
| ; VEC1_INTERL2-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[FOR_BODY_PREHEADER]] ] |
| ; VEC1_INTERL2-NEXT: [[BC_RESUME_VAL1:%.*]] = phi float [ [[TMP2]], %[[MIDDLE_BLOCK]] ], [ [[INIT]], %[[FOR_BODY_PREHEADER]] ] |
| ; VEC1_INTERL2-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC1_INTERL2: [[FOR_BODY]]: |
| ; VEC1_INTERL2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; VEC1_INTERL2-NEXT: [[X_06:%.*]] = phi float [ [[CONV1:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL1]], %[[SCALAR_PH]] ] |
| ; VEC1_INTERL2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV]] |
| ; VEC1_INTERL2-NEXT: store float [[X_06]], ptr [[ARRAYIDX]], align 4 |
| ; VEC1_INTERL2-NEXT: [[CONV1]] = fadd fast float [[X_06]], 5.000000e-01 |
| ; VEC1_INTERL2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC1_INTERL2-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC1_INTERL2-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC1_INTERL2-NEXT: br i1 [[EXITCOND]], label %[[FOR_END_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]] |
| ; VEC1_INTERL2: [[FOR_END_LOOPEXIT]]: |
| ; VEC1_INTERL2-NEXT: br label %[[FOR_END]] |
| ; VEC1_INTERL2: [[FOR_END]]: |
| ; VEC1_INTERL2-NEXT: ret void |
| ; |
| ; VEC2_INTERL1_PRED_STORE-LABEL: define void @fp_iv_loop2( |
| ; VEC2_INTERL1_PRED_STORE-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], i32 [[N:%.*]]) { |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ENTRY:.*:]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[N]], 0 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[CMP4]], label %[[FOR_BODY_PREHEADER:.*]], label %[[FOR_END:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_BODY_PREHEADER]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 2 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[VECTOR_PH]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP0]], 1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP5:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP1:%.*]] = fmul fast float 5.000000e-01, [[TMP5]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP2:%.*]] = fadd fast float [[INIT]], [[TMP1]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x float> poison, float [[INIT]], i64 0 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x float> [[BROADCAST_SPLATINSERT]], <2 x float> poison, <2 x i32> zeroinitializer |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDUCTION:%.*]] = fadd fast <2 x float> [[BROADCAST_SPLAT]], <float 0.000000e+00, float 5.000000e-01> |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[VECTOR_BODY]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[VEC_IND:%.*]] = phi <2 x float> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP3:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store <2 x float> [[VEC_IND]], ptr [[TMP3]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[VEC_IND_NEXT]] = fadd fast <2 x float> [[VEC_IND]], splat (float 1.000000e+00) |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[TMP4]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]] |
| ; VEC2_INTERL1_PRED_STORE: [[MIDDLE_BLOCK]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[CMP_N]], label %[[FOR_END_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC2_INTERL1_PRED_STORE: [[SCALAR_PH]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[FOR_BODY_PREHEADER]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BC_RESUME_VAL1:%.*]] = phi float [ [[TMP2]], %[[MIDDLE_BLOCK]] ], [ [[INIT]], %[[FOR_BODY_PREHEADER]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_BODY]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[X_06:%.*]] = phi float [ [[CONV1:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL1]], %[[SCALAR_PH]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store float [[X_06]], ptr [[ARRAYIDX]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[CONV1]] = fadd fast float [[X_06]], 5.000000e-01 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[EXITCOND]], label %[[FOR_END_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_END_LOOPEXIT]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[FOR_END]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_END]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: ret void |
| ; |
| entry: |
| %cmp4 = icmp sgt i32 %N, 0 |
| br i1 %cmp4, label %for.body.preheader, label %for.end |
| |
| for.body.preheader: |
| br label %for.body |
| |
| for.body: |
| %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %for.body.preheader ] |
| %x.06 = phi float [ %conv1, %for.body ], [ %init, %for.body.preheader ] |
| %arrayidx = getelementptr inbounds float, ptr %A, i64 %indvars.iv |
| store float %x.06, ptr %arrayidx, align 4 |
| %conv1 = fadd fast float %x.06, 5.000000e-01 |
| %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 |
| %lftr.wideiv = trunc i64 %indvars.iv.next to i32 |
| %exitcond = icmp eq i32 %lftr.wideiv, %N |
| br i1 %exitcond, label %for.end.loopexit, label %for.body |
| |
| for.end.loopexit: |
| br label %for.end |
| |
| for.end: |
| ret void |
| } |
| |
| ;void fp_iv_loop3(float init, ptr __restrict__ A, ptr __restrict__ B, ptr __restrict__ C, int N) { |
| ; int i = 0; |
| ; float x = init; |
| ; float y = 0.1; |
| ; for (; i < N; ++i) { |
| ; A[i] = x; |
| ; x += fp_inc; |
| ; y -= 0.5; |
| ; B[i] = x + y; |
| ; C[i] = y; |
| ; } |
| ;} |
| |
| |
| define void @fp_iv_loop3(float %init, ptr noalias nocapture %A, ptr noalias nocapture %B, ptr noalias nocapture %C, i32 %N) { |
| ; VEC4_INTERL1-LABEL: define void @fp_iv_loop3( |
| ; VEC4_INTERL1-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], ptr noalias captures(none) [[B:%.*]], ptr noalias captures(none) [[C:%.*]], i32 [[N:%.*]]) { |
| ; VEC4_INTERL1-NEXT: [[ENTRY:.*:]] |
| ; VEC4_INTERL1-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[N]], 0 |
| ; VEC4_INTERL1-NEXT: br i1 [[CMP9]], label %[[FOR_BODY_LR_PH:.*]], label %[[FOR_END:.*]] |
| ; VEC4_INTERL1: [[FOR_BODY_LR_PH]]: |
| ; VEC4_INTERL1-NEXT: [[TMP0:%.*]] = load float, ptr @fp_inc, align 4 |
| ; VEC4_INTERL1-NEXT: [[TMP1:%.*]] = zext i32 [[N]] to i64 |
| ; VEC4_INTERL1-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP1]], 4 |
| ; VEC4_INTERL1-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC4_INTERL1: [[VECTOR_PH]]: |
| ; VEC4_INTERL1-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP1]], 3 |
| ; VEC4_INTERL1-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP1]], [[N_MOD_VF]] |
| ; VEC4_INTERL1-NEXT: [[DOTCAST:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC4_INTERL1-NEXT: [[TMP3:%.*]] = fmul fast float -5.000000e-01, [[DOTCAST]] |
| ; VEC4_INTERL1-NEXT: [[TMP15:%.*]] = fadd fast float 1.000000e-01, [[TMP3]] |
| ; VEC4_INTERL1-NEXT: [[TMP4:%.*]] = fmul fast float [[TMP0]], [[DOTCAST]] |
| ; VEC4_INTERL1-NEXT: [[TMP5:%.*]] = fadd fast float [[INIT]], [[TMP4]] |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[TMP0]], i64 0 |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLATINSERT2:%.*]] = insertelement <4 x float> poison, float [[INIT]], i64 0 |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLAT3:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT2]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL1-NEXT: [[TMP6:%.*]] = fmul fast <4 x float> <float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, [[BROADCAST_SPLAT]] |
| ; VEC4_INTERL1-NEXT: [[INDUCTION:%.*]] = fadd fast <4 x float> [[BROADCAST_SPLAT3]], [[TMP6]] |
| ; VEC4_INTERL1-NEXT: [[TMP7:%.*]] = fmul fast float [[TMP0]], 4.000000e+00 |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLATINSERT6:%.*]] = insertelement <4 x float> poison, float [[TMP7]], i64 0 |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLAT7:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT6]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL1-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC4_INTERL1: [[VECTOR_BODY]]: |
| ; VEC4_INTERL1-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[VEC_IND:%.*]] = phi <4 x float> [ <float 1.000000e-01, float -4.000000e-01, float f0xBF666666, float -1.400000e+00>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[VEC_IND8:%.*]] = phi <4 x float> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT9:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[TMP8:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; VEC4_INTERL1-NEXT: store <4 x float> [[VEC_IND8]], ptr [[TMP8]], align 4 |
| ; VEC4_INTERL1-NEXT: [[TMP9:%.*]] = fadd fast <4 x float> [[VEC_IND8]], [[BROADCAST_SPLAT]] |
| ; VEC4_INTERL1-NEXT: [[TMP10:%.*]] = fadd fast <4 x float> [[VEC_IND]], splat (float -5.000000e-01) |
| ; VEC4_INTERL1-NEXT: [[TMP11:%.*]] = fadd fast <4 x float> [[TMP10]], [[TMP9]] |
| ; VEC4_INTERL1-NEXT: [[TMP12:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[INDEX]] |
| ; VEC4_INTERL1-NEXT: store <4 x float> [[TMP11]], ptr [[TMP12]], align 4 |
| ; VEC4_INTERL1-NEXT: [[TMP13:%.*]] = getelementptr inbounds float, ptr [[C]], i64 [[INDEX]] |
| ; VEC4_INTERL1-NEXT: store <4 x float> [[TMP10]], ptr [[TMP13]], align 4 |
| ; VEC4_INTERL1-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 |
| ; VEC4_INTERL1-NEXT: [[VEC_IND_NEXT]] = fadd fast <4 x float> [[VEC_IND]], splat (float -2.000000e+00) |
| ; VEC4_INTERL1-NEXT: [[VEC_IND_NEXT9]] = fadd fast <4 x float> [[VEC_IND8]], [[BROADCAST_SPLAT7]] |
| ; VEC4_INTERL1-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC4_INTERL1-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]] |
| ; VEC4_INTERL1: [[MIDDLE_BLOCK]]: |
| ; VEC4_INTERL1-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP1]], [[N_VEC]] |
| ; VEC4_INTERL1-NEXT: br i1 [[CMP_N]], label %[[FOR_END_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC4_INTERL1: [[SCALAR_PH]]: |
| ; VEC4_INTERL1-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[FOR_BODY_LR_PH]] ] |
| ; VEC4_INTERL1-NEXT: [[BC_RESUME_VAL7:%.*]] = phi float [ [[TMP15]], %[[MIDDLE_BLOCK]] ], [ 1.000000e-01, %[[FOR_BODY_LR_PH]] ] |
| ; VEC4_INTERL1-NEXT: [[BC_RESUME_VAL8:%.*]] = phi float [ [[TMP5]], %[[MIDDLE_BLOCK]] ], [ [[INIT]], %[[FOR_BODY_LR_PH]] ] |
| ; VEC4_INTERL1-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC4_INTERL1: [[FOR_BODY]]: |
| ; VEC4_INTERL1-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[Y_012:%.*]] = phi float [ [[BC_RESUME_VAL7]], %[[SCALAR_PH]] ], [ [[CONV1:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[X_011:%.*]] = phi float [ [[BC_RESUME_VAL8]], %[[SCALAR_PH]] ], [ [[ADD:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV]] |
| ; VEC4_INTERL1-NEXT: store float [[X_011]], ptr [[ARRAYIDX]], align 4 |
| ; VEC4_INTERL1-NEXT: [[ADD]] = fadd fast float [[X_011]], [[TMP0]] |
| ; VEC4_INTERL1-NEXT: [[CONV1]] = fadd fast float [[Y_012]], -5.000000e-01 |
| ; VEC4_INTERL1-NEXT: [[ADD2:%.*]] = fadd fast float [[CONV1]], [[ADD]] |
| ; VEC4_INTERL1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[INDVARS_IV]] |
| ; VEC4_INTERL1-NEXT: store float [[ADD2]], ptr [[ARRAYIDX4]], align 4 |
| ; VEC4_INTERL1-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[C]], i64 [[INDVARS_IV]] |
| ; VEC4_INTERL1-NEXT: store float [[CONV1]], ptr [[ARRAYIDX6]], align 4 |
| ; VEC4_INTERL1-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC4_INTERL1-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC4_INTERL1-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC4_INTERL1-NEXT: br i1 [[EXITCOND]], label %[[FOR_END_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]] |
| ; VEC4_INTERL1: [[FOR_END_LOOPEXIT]]: |
| ; VEC4_INTERL1-NEXT: br label %[[FOR_END]] |
| ; VEC4_INTERL1: [[FOR_END]]: |
| ; VEC4_INTERL1-NEXT: ret void |
| ; |
| ; VEC4_INTERL2-LABEL: define void @fp_iv_loop3( |
| ; VEC4_INTERL2-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], ptr noalias captures(none) [[B:%.*]], ptr noalias captures(none) [[C:%.*]], i32 [[N:%.*]]) { |
| ; VEC4_INTERL2-NEXT: [[ENTRY:.*:]] |
| ; VEC4_INTERL2-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[N]], 0 |
| ; VEC4_INTERL2-NEXT: br i1 [[CMP9]], label %[[FOR_BODY_LR_PH:.*]], label %[[FOR_END:.*]] |
| ; VEC4_INTERL2: [[FOR_BODY_LR_PH]]: |
| ; VEC4_INTERL2-NEXT: [[TMP0:%.*]] = load float, ptr @fp_inc, align 4 |
| ; VEC4_INTERL2-NEXT: [[TMP1:%.*]] = zext i32 [[N]] to i64 |
| ; VEC4_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP1]], 8 |
| ; VEC4_INTERL2-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC4_INTERL2: [[VECTOR_PH]]: |
| ; VEC4_INTERL2-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP1]], 7 |
| ; VEC4_INTERL2-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP1]], [[N_MOD_VF]] |
| ; VEC4_INTERL2-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[TMP0]], i64 0 |
| ; VEC4_INTERL2-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL2-NEXT: [[DOTCAST:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC4_INTERL2-NEXT: [[TMP3:%.*]] = fmul fast float -5.000000e-01, [[DOTCAST]] |
| ; VEC4_INTERL2-NEXT: [[TMP21:%.*]] = fadd fast float 1.000000e-01, [[TMP3]] |
| ; VEC4_INTERL2-NEXT: [[TMP4:%.*]] = fmul fast float [[TMP0]], [[DOTCAST]] |
| ; VEC4_INTERL2-NEXT: [[TMP5:%.*]] = fadd fast float [[INIT]], [[TMP4]] |
| ; VEC4_INTERL2-NEXT: [[TMP6:%.*]] = fmul fast <4 x float> splat (float 4.000000e+00), [[BROADCAST_SPLAT]] |
| ; VEC4_INTERL2-NEXT: [[BROADCAST_SPLATINSERT4:%.*]] = insertelement <4 x float> poison, float [[INIT]], i64 0 |
| ; VEC4_INTERL2-NEXT: [[BROADCAST_SPLAT5:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT4]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL2-NEXT: [[TMP7:%.*]] = fmul fast <4 x float> <float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, [[BROADCAST_SPLAT]] |
| ; VEC4_INTERL2-NEXT: [[INDUCTION:%.*]] = fadd fast <4 x float> [[BROADCAST_SPLAT5]], [[TMP7]] |
| ; VEC4_INTERL2-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC4_INTERL2: [[VECTOR_BODY]]: |
| ; VEC4_INTERL2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[VEC_IND:%.*]] = phi <4 x float> [ <float 1.000000e-01, float -4.000000e-01, float f0xBF666666, float -1.400000e+00>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[VEC_IND6:%.*]] = phi <4 x float> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT8:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[STEP_ADD:%.*]] = fadd fast <4 x float> [[VEC_IND]], splat (float -2.000000e+00) |
| ; VEC4_INTERL2-NEXT: [[STEP_ADD7:%.*]] = fadd fast <4 x float> [[VEC_IND6]], [[TMP6]] |
| ; VEC4_INTERL2-NEXT: [[TMP8:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; VEC4_INTERL2-NEXT: [[TMP9:%.*]] = getelementptr inbounds float, ptr [[TMP8]], i64 4 |
| ; VEC4_INTERL2-NEXT: store <4 x float> [[VEC_IND6]], ptr [[TMP8]], align 4 |
| ; VEC4_INTERL2-NEXT: store <4 x float> [[STEP_ADD7]], ptr [[TMP9]], align 4 |
| ; VEC4_INTERL2-NEXT: [[TMP10:%.*]] = fadd fast <4 x float> [[VEC_IND6]], [[BROADCAST_SPLAT]] |
| ; VEC4_INTERL2-NEXT: [[TMP11:%.*]] = fadd fast <4 x float> [[STEP_ADD7]], [[BROADCAST_SPLAT]] |
| ; VEC4_INTERL2-NEXT: [[TMP12:%.*]] = fadd fast <4 x float> [[VEC_IND]], splat (float -5.000000e-01) |
| ; VEC4_INTERL2-NEXT: [[TMP13:%.*]] = fadd fast <4 x float> [[STEP_ADD]], splat (float -5.000000e-01) |
| ; VEC4_INTERL2-NEXT: [[TMP14:%.*]] = fadd fast <4 x float> [[TMP12]], [[TMP10]] |
| ; VEC4_INTERL2-NEXT: [[TMP15:%.*]] = fadd fast <4 x float> [[TMP13]], [[TMP11]] |
| ; VEC4_INTERL2-NEXT: [[TMP16:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[INDEX]] |
| ; VEC4_INTERL2-NEXT: [[TMP17:%.*]] = getelementptr inbounds float, ptr [[TMP16]], i64 4 |
| ; VEC4_INTERL2-NEXT: store <4 x float> [[TMP14]], ptr [[TMP16]], align 4 |
| ; VEC4_INTERL2-NEXT: store <4 x float> [[TMP15]], ptr [[TMP17]], align 4 |
| ; VEC4_INTERL2-NEXT: [[TMP18:%.*]] = getelementptr inbounds float, ptr [[C]], i64 [[INDEX]] |
| ; VEC4_INTERL2-NEXT: [[TMP19:%.*]] = getelementptr inbounds float, ptr [[TMP18]], i64 4 |
| ; VEC4_INTERL2-NEXT: store <4 x float> [[TMP12]], ptr [[TMP18]], align 4 |
| ; VEC4_INTERL2-NEXT: store <4 x float> [[TMP13]], ptr [[TMP19]], align 4 |
| ; VEC4_INTERL2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 |
| ; VEC4_INTERL2-NEXT: [[VEC_IND_NEXT]] = fadd fast <4 x float> [[STEP_ADD]], splat (float -2.000000e+00) |
| ; VEC4_INTERL2-NEXT: [[VEC_IND_NEXT8]] = fadd fast <4 x float> [[STEP_ADD7]], [[TMP6]] |
| ; VEC4_INTERL2-NEXT: [[TMP20:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC4_INTERL2-NEXT: br i1 [[TMP20]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]] |
| ; VEC4_INTERL2: [[MIDDLE_BLOCK]]: |
| ; VEC4_INTERL2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP1]], [[N_VEC]] |
| ; VEC4_INTERL2-NEXT: br i1 [[CMP_N]], label %[[FOR_END_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC4_INTERL2: [[SCALAR_PH]]: |
| ; VEC4_INTERL2-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[FOR_BODY_LR_PH]] ] |
| ; VEC4_INTERL2-NEXT: [[BC_RESUME_VAL6:%.*]] = phi float [ [[TMP21]], %[[MIDDLE_BLOCK]] ], [ 1.000000e-01, %[[FOR_BODY_LR_PH]] ] |
| ; VEC4_INTERL2-NEXT: [[BC_RESUME_VAL7:%.*]] = phi float [ [[TMP5]], %[[MIDDLE_BLOCK]] ], [ [[INIT]], %[[FOR_BODY_LR_PH]] ] |
| ; VEC4_INTERL2-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC4_INTERL2: [[FOR_BODY]]: |
| ; VEC4_INTERL2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[Y_012:%.*]] = phi float [ [[BC_RESUME_VAL6]], %[[SCALAR_PH]] ], [ [[CONV1:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[X_011:%.*]] = phi float [ [[BC_RESUME_VAL7]], %[[SCALAR_PH]] ], [ [[ADD:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV]] |
| ; VEC4_INTERL2-NEXT: store float [[X_011]], ptr [[ARRAYIDX]], align 4 |
| ; VEC4_INTERL2-NEXT: [[ADD]] = fadd fast float [[X_011]], [[TMP0]] |
| ; VEC4_INTERL2-NEXT: [[CONV1]] = fadd fast float [[Y_012]], -5.000000e-01 |
| ; VEC4_INTERL2-NEXT: [[ADD2:%.*]] = fadd fast float [[CONV1]], [[ADD]] |
| ; VEC4_INTERL2-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[INDVARS_IV]] |
| ; VEC4_INTERL2-NEXT: store float [[ADD2]], ptr [[ARRAYIDX4]], align 4 |
| ; VEC4_INTERL2-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[C]], i64 [[INDVARS_IV]] |
| ; VEC4_INTERL2-NEXT: store float [[CONV1]], ptr [[ARRAYIDX6]], align 4 |
| ; VEC4_INTERL2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC4_INTERL2-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC4_INTERL2-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC4_INTERL2-NEXT: br i1 [[EXITCOND]], label %[[FOR_END_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]] |
| ; VEC4_INTERL2: [[FOR_END_LOOPEXIT]]: |
| ; VEC4_INTERL2-NEXT: br label %[[FOR_END]] |
| ; VEC4_INTERL2: [[FOR_END]]: |
| ; VEC4_INTERL2-NEXT: ret void |
| ; |
| ; VEC1_INTERL2-LABEL: define void @fp_iv_loop3( |
| ; VEC1_INTERL2-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], ptr noalias captures(none) [[B:%.*]], ptr noalias captures(none) [[C:%.*]], i32 [[N:%.*]]) { |
| ; VEC1_INTERL2-NEXT: [[ENTRY:.*:]] |
| ; VEC1_INTERL2-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[N]], 0 |
| ; VEC1_INTERL2-NEXT: br i1 [[CMP9]], label %[[FOR_BODY_LR_PH:.*]], label %[[FOR_END:.*]] |
| ; VEC1_INTERL2: [[FOR_BODY_LR_PH]]: |
| ; VEC1_INTERL2-NEXT: [[TMP0:%.*]] = load float, ptr @fp_inc, align 4 |
| ; VEC1_INTERL2-NEXT: [[TMP1:%.*]] = zext i32 [[N]] to i64 |
| ; VEC1_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP1]], 2 |
| ; VEC1_INTERL2-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC1_INTERL2: [[VECTOR_PH]]: |
| ; VEC1_INTERL2-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP1]], 1 |
| ; VEC1_INTERL2-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP1]], [[N_MOD_VF]] |
| ; VEC1_INTERL2-NEXT: [[DOTCAST:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC1_INTERL2-NEXT: [[TMP3:%.*]] = fmul fast float -5.000000e-01, [[DOTCAST]] |
| ; VEC1_INTERL2-NEXT: [[TMP6:%.*]] = fadd fast float 1.000000e-01, [[TMP3]] |
| ; VEC1_INTERL2-NEXT: [[TMP4:%.*]] = fmul fast float [[TMP0]], [[DOTCAST]] |
| ; VEC1_INTERL2-NEXT: [[TMP5:%.*]] = fadd fast float [[INIT]], [[TMP4]] |
| ; VEC1_INTERL2-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC1_INTERL2: [[VECTOR_BODY]]: |
| ; VEC1_INTERL2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC1_INTERL2-NEXT: [[TMP7:%.*]] = add i64 [[INDEX]], 1 |
| ; VEC1_INTERL2-NEXT: [[DOTCAST2:%.*]] = sitofp i64 [[INDEX]] to float |
| ; VEC1_INTERL2-NEXT: [[TMP23:%.*]] = fmul fast float -5.000000e-01, [[DOTCAST2]] |
| ; VEC1_INTERL2-NEXT: [[TMP24:%.*]] = fadd fast float 1.000000e-01, [[TMP23]] |
| ; VEC1_INTERL2-NEXT: [[TMP25:%.*]] = fadd fast float [[TMP24]], -5.000000e-01 |
| ; VEC1_INTERL2-NEXT: [[TMP8:%.*]] = fmul fast float [[TMP0]], [[DOTCAST2]] |
| ; VEC1_INTERL2-NEXT: [[OFFSET_IDX4:%.*]] = fadd fast float [[INIT]], [[TMP8]] |
| ; VEC1_INTERL2-NEXT: [[TMP26:%.*]] = fmul fast float 1.000000e+00, [[TMP0]] |
| ; VEC1_INTERL2-NEXT: [[TMP9:%.*]] = fadd fast float [[OFFSET_IDX4]], [[TMP26]] |
| ; VEC1_INTERL2-NEXT: [[TMP10:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; VEC1_INTERL2-NEXT: [[TMP11:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP7]] |
| ; VEC1_INTERL2-NEXT: store float [[OFFSET_IDX4]], ptr [[TMP10]], align 4 |
| ; VEC1_INTERL2-NEXT: store float [[TMP9]], ptr [[TMP11]], align 4 |
| ; VEC1_INTERL2-NEXT: [[TMP12:%.*]] = fadd fast float [[OFFSET_IDX4]], [[TMP0]] |
| ; VEC1_INTERL2-NEXT: [[TMP13:%.*]] = fadd fast float [[TMP9]], [[TMP0]] |
| ; VEC1_INTERL2-NEXT: [[TMP14:%.*]] = fadd fast float [[TMP24]], -5.000000e-01 |
| ; VEC1_INTERL2-NEXT: [[TMP15:%.*]] = fadd fast float [[TMP25]], -5.000000e-01 |
| ; VEC1_INTERL2-NEXT: [[TMP16:%.*]] = fadd fast float [[TMP14]], [[TMP12]] |
| ; VEC1_INTERL2-NEXT: [[TMP17:%.*]] = fadd fast float [[TMP15]], [[TMP13]] |
| ; VEC1_INTERL2-NEXT: [[TMP18:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[INDEX]] |
| ; VEC1_INTERL2-NEXT: [[TMP19:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[TMP7]] |
| ; VEC1_INTERL2-NEXT: store float [[TMP16]], ptr [[TMP18]], align 4 |
| ; VEC1_INTERL2-NEXT: store float [[TMP17]], ptr [[TMP19]], align 4 |
| ; VEC1_INTERL2-NEXT: [[TMP20:%.*]] = getelementptr inbounds float, ptr [[C]], i64 [[INDEX]] |
| ; VEC1_INTERL2-NEXT: [[TMP21:%.*]] = getelementptr inbounds float, ptr [[C]], i64 [[TMP7]] |
| ; VEC1_INTERL2-NEXT: store float [[TMP14]], ptr [[TMP20]], align 4 |
| ; VEC1_INTERL2-NEXT: store float [[TMP15]], ptr [[TMP21]], align 4 |
| ; VEC1_INTERL2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; VEC1_INTERL2-NEXT: [[TMP22:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC1_INTERL2-NEXT: br i1 [[TMP22]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]] |
| ; VEC1_INTERL2: [[MIDDLE_BLOCK]]: |
| ; VEC1_INTERL2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP1]], [[N_VEC]] |
| ; VEC1_INTERL2-NEXT: br i1 [[CMP_N]], label %[[FOR_END_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC1_INTERL2: [[SCALAR_PH]]: |
| ; VEC1_INTERL2-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[FOR_BODY_LR_PH]] ] |
| ; VEC1_INTERL2-NEXT: [[BC_RESUME_VAL1:%.*]] = phi float [ [[TMP6]], %[[MIDDLE_BLOCK]] ], [ 1.000000e-01, %[[FOR_BODY_LR_PH]] ] |
| ; VEC1_INTERL2-NEXT: [[BC_RESUME_VAL2:%.*]] = phi float [ [[TMP5]], %[[MIDDLE_BLOCK]] ], [ [[INIT]], %[[FOR_BODY_LR_PH]] ] |
| ; VEC1_INTERL2-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC1_INTERL2: [[FOR_BODY]]: |
| ; VEC1_INTERL2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ] |
| ; VEC1_INTERL2-NEXT: [[Y_012:%.*]] = phi float [ [[BC_RESUME_VAL1]], %[[SCALAR_PH]] ], [ [[CONV1:%.*]], %[[FOR_BODY]] ] |
| ; VEC1_INTERL2-NEXT: [[X_011:%.*]] = phi float [ [[BC_RESUME_VAL2]], %[[SCALAR_PH]] ], [ [[ADD:%.*]], %[[FOR_BODY]] ] |
| ; VEC1_INTERL2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV]] |
| ; VEC1_INTERL2-NEXT: store float [[X_011]], ptr [[ARRAYIDX]], align 4 |
| ; VEC1_INTERL2-NEXT: [[ADD]] = fadd fast float [[X_011]], [[TMP0]] |
| ; VEC1_INTERL2-NEXT: [[CONV1]] = fadd fast float [[Y_012]], -5.000000e-01 |
| ; VEC1_INTERL2-NEXT: [[ADD2:%.*]] = fadd fast float [[CONV1]], [[ADD]] |
| ; VEC1_INTERL2-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[INDVARS_IV]] |
| ; VEC1_INTERL2-NEXT: store float [[ADD2]], ptr [[ARRAYIDX4]], align 4 |
| ; VEC1_INTERL2-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[C]], i64 [[INDVARS_IV]] |
| ; VEC1_INTERL2-NEXT: store float [[CONV1]], ptr [[ARRAYIDX6]], align 4 |
| ; VEC1_INTERL2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC1_INTERL2-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC1_INTERL2-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC1_INTERL2-NEXT: br i1 [[EXITCOND]], label %[[FOR_END_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]] |
| ; VEC1_INTERL2: [[FOR_END_LOOPEXIT]]: |
| ; VEC1_INTERL2-NEXT: br label %[[FOR_END]] |
| ; VEC1_INTERL2: [[FOR_END]]: |
| ; VEC1_INTERL2-NEXT: ret void |
| ; |
| ; VEC2_INTERL1_PRED_STORE-LABEL: define void @fp_iv_loop3( |
| ; VEC2_INTERL1_PRED_STORE-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], ptr noalias captures(none) [[B:%.*]], ptr noalias captures(none) [[C:%.*]], i32 [[N:%.*]]) { |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ENTRY:.*:]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[N]], 0 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[CMP9]], label %[[FOR_BODY_LR_PH:.*]], label %[[FOR_END:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_BODY_LR_PH]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP0:%.*]] = load float, ptr @fp_inc, align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP1:%.*]] = zext i32 [[N]] to i64 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP1]], 2 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[VECTOR_PH]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP1]], 1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP1]], [[N_MOD_VF]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTCAST:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP3:%.*]] = fmul fast float -5.000000e-01, [[DOTCAST]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP15:%.*]] = fadd fast float 1.000000e-01, [[TMP3]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP4:%.*]] = fmul fast float [[TMP0]], [[DOTCAST]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP5:%.*]] = fadd fast float [[INIT]], [[TMP4]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x float> poison, float [[TMP0]], i64 0 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x float> [[BROADCAST_SPLATINSERT]], <2 x float> poison, <2 x i32> zeroinitializer |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLATINSERT2:%.*]] = insertelement <2 x float> poison, float [[INIT]], i64 0 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLAT3:%.*]] = shufflevector <2 x float> [[BROADCAST_SPLATINSERT2]], <2 x float> poison, <2 x i32> zeroinitializer |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP6:%.*]] = fmul fast <2 x float> <float 0.000000e+00, float 1.000000e+00>, [[BROADCAST_SPLAT]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDUCTION:%.*]] = fadd fast <2 x float> [[BROADCAST_SPLAT3]], [[TMP6]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP7:%.*]] = fmul fast float [[TMP0]], 2.000000e+00 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLATINSERT6:%.*]] = insertelement <2 x float> poison, float [[TMP7]], i64 0 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLAT7:%.*]] = shufflevector <2 x float> [[BROADCAST_SPLATINSERT6]], <2 x float> poison, <2 x i32> zeroinitializer |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[VECTOR_BODY]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[VEC_IND:%.*]] = phi <2 x float> [ <float 1.000000e-01, float -4.000000e-01>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[VEC_IND8:%.*]] = phi <2 x float> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT9:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP8:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store <2 x float> [[VEC_IND8]], ptr [[TMP8]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP9:%.*]] = fadd fast <2 x float> [[VEC_IND8]], [[BROADCAST_SPLAT]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP10:%.*]] = fadd fast <2 x float> [[VEC_IND]], splat (float -5.000000e-01) |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP11:%.*]] = fadd fast <2 x float> [[TMP10]], [[TMP9]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP12:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[INDEX]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store <2 x float> [[TMP11]], ptr [[TMP12]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP13:%.*]] = getelementptr inbounds float, ptr [[C]], i64 [[INDEX]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store <2 x float> [[TMP10]], ptr [[TMP13]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[VEC_IND_NEXT]] = fadd fast <2 x float> [[VEC_IND]], splat (float -1.000000e+00) |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[VEC_IND_NEXT9]] = fadd fast <2 x float> [[VEC_IND8]], [[BROADCAST_SPLAT7]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]] |
| ; VEC2_INTERL1_PRED_STORE: [[MIDDLE_BLOCK]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP1]], [[N_VEC]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[CMP_N]], label %[[FOR_END_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC2_INTERL1_PRED_STORE: [[SCALAR_PH]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[FOR_BODY_LR_PH]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BC_RESUME_VAL7:%.*]] = phi float [ [[TMP15]], %[[MIDDLE_BLOCK]] ], [ 1.000000e-01, %[[FOR_BODY_LR_PH]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BC_RESUME_VAL8:%.*]] = phi float [ [[TMP5]], %[[MIDDLE_BLOCK]] ], [ [[INIT]], %[[FOR_BODY_LR_PH]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_BODY]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[Y_012:%.*]] = phi float [ [[BC_RESUME_VAL7]], %[[SCALAR_PH]] ], [ [[CONV1:%.*]], %[[FOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[X_011:%.*]] = phi float [ [[BC_RESUME_VAL8]], %[[SCALAR_PH]] ], [ [[ADD:%.*]], %[[FOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store float [[X_011]], ptr [[ARRAYIDX]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ADD]] = fadd fast float [[X_011]], [[TMP0]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[CONV1]] = fadd fast float [[Y_012]], -5.000000e-01 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ADD2:%.*]] = fadd fast float [[CONV1]], [[ADD]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[INDVARS_IV]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store float [[ADD2]], ptr [[ARRAYIDX4]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[C]], i64 [[INDVARS_IV]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store float [[CONV1]], ptr [[ARRAYIDX6]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[EXITCOND]], label %[[FOR_END_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_END_LOOPEXIT]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[FOR_END]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_END]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: ret void |
| ; |
| entry: |
| %cmp9 = icmp sgt i32 %N, 0 |
| br i1 %cmp9, label %for.body.lr.ph, label %for.end |
| |
| for.body.lr.ph: |
| %0 = load float, ptr @fp_inc, align 4 |
| br label %for.body |
| |
| for.body: |
| %indvars.iv = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body ] |
| %y.012 = phi float [ 0x3FB99999A0000000, %for.body.lr.ph ], [ %conv1, %for.body ] |
| %x.011 = phi float [ %init, %for.body.lr.ph ], [ %add, %for.body ] |
| %arrayidx = getelementptr inbounds float, ptr %A, i64 %indvars.iv |
| store float %x.011, ptr %arrayidx, align 4 |
| %add = fadd fast float %x.011, %0 |
| %conv1 = fadd fast float %y.012, -5.000000e-01 |
| %add2 = fadd fast float %conv1, %add |
| %arrayidx4 = getelementptr inbounds float, ptr %B, i64 %indvars.iv |
| store float %add2, ptr %arrayidx4, align 4 |
| %arrayidx6 = getelementptr inbounds float, ptr %C, i64 %indvars.iv |
| store float %conv1, ptr %arrayidx6, align 4 |
| %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 |
| %lftr.wideiv = trunc i64 %indvars.iv.next to i32 |
| %exitcond = icmp eq i32 %lftr.wideiv, %N |
| br i1 %exitcond, label %for.end.loopexit, label %for.body |
| |
| for.end.loopexit: |
| br label %for.end |
| |
| for.end: |
| ret void |
| } |
| |
| ; Start and step values are constants. There is no 'fmul' operation in this case |
| ;void fp_iv_loop4(ptr __restrict__ A, int N) { |
| ; float x = 1.0; |
| ; for (int i=0; i < N; ++i) { |
| ; A[i] = x; |
| ; x += 0.5; |
| ; } |
| ;} |
| |
| |
| define void @fp_iv_loop4(ptr noalias nocapture %A, i32 %N) { |
| ; VEC4_INTERL1-LABEL: define void @fp_iv_loop4( |
| ; VEC4_INTERL1-SAME: ptr noalias captures(none) [[A:%.*]], i32 [[N:%.*]]) { |
| ; VEC4_INTERL1-NEXT: [[ENTRY:.*:]] |
| ; VEC4_INTERL1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[N]], 0 |
| ; VEC4_INTERL1-NEXT: br i1 [[CMP4]], label %[[FOR_BODY_PREHEADER:.*]], label %[[FOR_END:.*]] |
| ; VEC4_INTERL1: [[FOR_BODY_PREHEADER]]: |
| ; VEC4_INTERL1-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64 |
| ; VEC4_INTERL1-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 4 |
| ; VEC4_INTERL1-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC4_INTERL1: [[VECTOR_PH]]: |
| ; VEC4_INTERL1-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP0]], 3 |
| ; VEC4_INTERL1-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]] |
| ; VEC4_INTERL1-NEXT: [[TMP1:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC4_INTERL1-NEXT: [[TMP2:%.*]] = fmul fast float 5.000000e-01, [[TMP1]] |
| ; VEC4_INTERL1-NEXT: [[TMP5:%.*]] = fadd fast float 1.000000e+00, [[TMP2]] |
| ; VEC4_INTERL1-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC4_INTERL1: [[VECTOR_BODY]]: |
| ; VEC4_INTERL1-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[VEC_IND:%.*]] = phi <4 x float> [ <float 1.000000e+00, float 1.500000e+00, float 2.000000e+00, float 2.500000e+00>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[TMP3:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; VEC4_INTERL1-NEXT: store <4 x float> [[VEC_IND]], ptr [[TMP3]], align 4 |
| ; VEC4_INTERL1-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 |
| ; VEC4_INTERL1-NEXT: [[VEC_IND_NEXT]] = fadd fast <4 x float> [[VEC_IND]], splat (float 2.000000e+00) |
| ; VEC4_INTERL1-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC4_INTERL1-NEXT: br i1 [[TMP4]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]] |
| ; VEC4_INTERL1: [[MIDDLE_BLOCK]]: |
| ; VEC4_INTERL1-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] |
| ; VEC4_INTERL1-NEXT: br i1 [[CMP_N]], label %[[FOR_END_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC4_INTERL1: [[SCALAR_PH]]: |
| ; VEC4_INTERL1-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[FOR_BODY_PREHEADER]] ] |
| ; VEC4_INTERL1-NEXT: [[BC_RESUME_VAL1:%.*]] = phi float [ [[TMP5]], %[[MIDDLE_BLOCK]] ], [ 1.000000e+00, %[[FOR_BODY_PREHEADER]] ] |
| ; VEC4_INTERL1-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC4_INTERL1: [[FOR_BODY]]: |
| ; VEC4_INTERL1-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; VEC4_INTERL1-NEXT: [[X_06:%.*]] = phi float [ [[CONV1:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL1]], %[[SCALAR_PH]] ] |
| ; VEC4_INTERL1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV]] |
| ; VEC4_INTERL1-NEXT: store float [[X_06]], ptr [[ARRAYIDX]], align 4 |
| ; VEC4_INTERL1-NEXT: [[CONV1]] = fadd fast float [[X_06]], 5.000000e-01 |
| ; VEC4_INTERL1-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC4_INTERL1-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC4_INTERL1-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC4_INTERL1-NEXT: br i1 [[EXITCOND]], label %[[FOR_END_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]] |
| ; VEC4_INTERL1: [[FOR_END_LOOPEXIT]]: |
| ; VEC4_INTERL1-NEXT: br label %[[FOR_END]] |
| ; VEC4_INTERL1: [[FOR_END]]: |
| ; VEC4_INTERL1-NEXT: ret void |
| ; |
| ; VEC4_INTERL2-LABEL: define void @fp_iv_loop4( |
| ; VEC4_INTERL2-SAME: ptr noalias captures(none) [[A:%.*]], i32 [[N:%.*]]) { |
| ; VEC4_INTERL2-NEXT: [[ENTRY:.*:]] |
| ; VEC4_INTERL2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[N]], 0 |
| ; VEC4_INTERL2-NEXT: br i1 [[CMP4]], label %[[FOR_BODY_PREHEADER:.*]], label %[[FOR_END:.*]] |
| ; VEC4_INTERL2: [[FOR_BODY_PREHEADER]]: |
| ; VEC4_INTERL2-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64 |
| ; VEC4_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 8 |
| ; VEC4_INTERL2-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC4_INTERL2: [[VECTOR_PH]]: |
| ; VEC4_INTERL2-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP0]], 7 |
| ; VEC4_INTERL2-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]] |
| ; VEC4_INTERL2-NEXT: [[TMP1:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC4_INTERL2-NEXT: [[TMP2:%.*]] = fmul fast float 5.000000e-01, [[TMP1]] |
| ; VEC4_INTERL2-NEXT: [[TMP6:%.*]] = fadd fast float 1.000000e+00, [[TMP2]] |
| ; VEC4_INTERL2-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC4_INTERL2: [[VECTOR_BODY]]: |
| ; VEC4_INTERL2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[VEC_IND:%.*]] = phi <4 x float> [ <float 1.000000e+00, float 1.500000e+00, float 2.000000e+00, float 2.500000e+00>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[STEP_ADD:%.*]] = fadd fast <4 x float> [[VEC_IND]], splat (float 2.000000e+00) |
| ; VEC4_INTERL2-NEXT: [[TMP3:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; VEC4_INTERL2-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[TMP3]], i64 4 |
| ; VEC4_INTERL2-NEXT: store <4 x float> [[VEC_IND]], ptr [[TMP3]], align 4 |
| ; VEC4_INTERL2-NEXT: store <4 x float> [[STEP_ADD]], ptr [[TMP4]], align 4 |
| ; VEC4_INTERL2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 |
| ; VEC4_INTERL2-NEXT: [[VEC_IND_NEXT]] = fadd fast <4 x float> [[STEP_ADD]], splat (float 2.000000e+00) |
| ; VEC4_INTERL2-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC4_INTERL2-NEXT: br i1 [[TMP5]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]] |
| ; VEC4_INTERL2: [[MIDDLE_BLOCK]]: |
| ; VEC4_INTERL2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] |
| ; VEC4_INTERL2-NEXT: br i1 [[CMP_N]], label %[[FOR_END_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC4_INTERL2: [[SCALAR_PH]]: |
| ; VEC4_INTERL2-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[FOR_BODY_PREHEADER]] ] |
| ; VEC4_INTERL2-NEXT: [[BC_RESUME_VAL1:%.*]] = phi float [ [[TMP6]], %[[MIDDLE_BLOCK]] ], [ 1.000000e+00, %[[FOR_BODY_PREHEADER]] ] |
| ; VEC4_INTERL2-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC4_INTERL2: [[FOR_BODY]]: |
| ; VEC4_INTERL2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; VEC4_INTERL2-NEXT: [[X_06:%.*]] = phi float [ [[CONV1:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL1]], %[[SCALAR_PH]] ] |
| ; VEC4_INTERL2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV]] |
| ; VEC4_INTERL2-NEXT: store float [[X_06]], ptr [[ARRAYIDX]], align 4 |
| ; VEC4_INTERL2-NEXT: [[CONV1]] = fadd fast float [[X_06]], 5.000000e-01 |
| ; VEC4_INTERL2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC4_INTERL2-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC4_INTERL2-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC4_INTERL2-NEXT: br i1 [[EXITCOND]], label %[[FOR_END_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]] |
| ; VEC4_INTERL2: [[FOR_END_LOOPEXIT]]: |
| ; VEC4_INTERL2-NEXT: br label %[[FOR_END]] |
| ; VEC4_INTERL2: [[FOR_END]]: |
| ; VEC4_INTERL2-NEXT: ret void |
| ; |
| ; VEC1_INTERL2-LABEL: define void @fp_iv_loop4( |
| ; VEC1_INTERL2-SAME: ptr noalias captures(none) [[A:%.*]], i32 [[N:%.*]]) { |
| ; VEC1_INTERL2-NEXT: [[ENTRY:.*:]] |
| ; VEC1_INTERL2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[N]], 0 |
| ; VEC1_INTERL2-NEXT: br i1 [[CMP4]], label %[[FOR_BODY_PREHEADER:.*]], label %[[FOR_END:.*]] |
| ; VEC1_INTERL2: [[FOR_BODY_PREHEADER]]: |
| ; VEC1_INTERL2-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64 |
| ; VEC1_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 2 |
| ; VEC1_INTERL2-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC1_INTERL2: [[VECTOR_PH]]: |
| ; VEC1_INTERL2-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP0]], 1 |
| ; VEC1_INTERL2-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]] |
| ; VEC1_INTERL2-NEXT: [[TMP1:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC1_INTERL2-NEXT: [[TMP2:%.*]] = fmul fast float 5.000000e-01, [[TMP1]] |
| ; VEC1_INTERL2-NEXT: [[TMP3:%.*]] = fadd fast float 1.000000e+00, [[TMP2]] |
| ; VEC1_INTERL2-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC1_INTERL2: [[VECTOR_BODY]]: |
| ; VEC1_INTERL2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC1_INTERL2-NEXT: [[TMP9:%.*]] = add i64 [[INDEX]], 1 |
| ; VEC1_INTERL2-NEXT: [[DOTCAST1:%.*]] = sitofp i64 [[INDEX]] to float |
| ; VEC1_INTERL2-NEXT: [[TMP6:%.*]] = fmul fast float 5.000000e-01, [[DOTCAST1]] |
| ; VEC1_INTERL2-NEXT: [[OFFSET_IDX:%.*]] = fadd fast float 1.000000e+00, [[TMP6]] |
| ; VEC1_INTERL2-NEXT: [[TMP4:%.*]] = fadd fast float [[OFFSET_IDX]], 5.000000e-01 |
| ; VEC1_INTERL2-NEXT: [[TMP5:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; VEC1_INTERL2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP9]] |
| ; VEC1_INTERL2-NEXT: store float [[OFFSET_IDX]], ptr [[TMP5]], align 4 |
| ; VEC1_INTERL2-NEXT: store float [[TMP4]], ptr [[TMP7]], align 4 |
| ; VEC1_INTERL2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; VEC1_INTERL2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC1_INTERL2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]] |
| ; VEC1_INTERL2: [[MIDDLE_BLOCK]]: |
| ; VEC1_INTERL2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] |
| ; VEC1_INTERL2-NEXT: br i1 [[CMP_N]], label %[[FOR_END_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC1_INTERL2: [[SCALAR_PH]]: |
| ; VEC1_INTERL2-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[FOR_BODY_PREHEADER]] ] |
| ; VEC1_INTERL2-NEXT: [[BC_RESUME_VAL1:%.*]] = phi float [ [[TMP3]], %[[MIDDLE_BLOCK]] ], [ 1.000000e+00, %[[FOR_BODY_PREHEADER]] ] |
| ; VEC1_INTERL2-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC1_INTERL2: [[FOR_BODY]]: |
| ; VEC1_INTERL2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; VEC1_INTERL2-NEXT: [[X_06:%.*]] = phi float [ [[CONV1:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL1]], %[[SCALAR_PH]] ] |
| ; VEC1_INTERL2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV]] |
| ; VEC1_INTERL2-NEXT: store float [[X_06]], ptr [[ARRAYIDX]], align 4 |
| ; VEC1_INTERL2-NEXT: [[CONV1]] = fadd fast float [[X_06]], 5.000000e-01 |
| ; VEC1_INTERL2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC1_INTERL2-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC1_INTERL2-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC1_INTERL2-NEXT: br i1 [[EXITCOND]], label %[[FOR_END_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]] |
| ; VEC1_INTERL2: [[FOR_END_LOOPEXIT]]: |
| ; VEC1_INTERL2-NEXT: br label %[[FOR_END]] |
| ; VEC1_INTERL2: [[FOR_END]]: |
| ; VEC1_INTERL2-NEXT: ret void |
| ; |
| ; VEC2_INTERL1_PRED_STORE-LABEL: define void @fp_iv_loop4( |
| ; VEC2_INTERL1_PRED_STORE-SAME: ptr noalias captures(none) [[A:%.*]], i32 [[N:%.*]]) { |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ENTRY:.*:]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[N]], 0 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[CMP4]], label %[[FOR_BODY_PREHEADER:.*]], label %[[FOR_END:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_BODY_PREHEADER]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 2 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[VECTOR_PH]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP0]], 1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP1:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP2:%.*]] = fmul fast float 5.000000e-01, [[TMP1]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP5:%.*]] = fadd fast float 1.000000e+00, [[TMP2]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[VECTOR_BODY]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[VEC_IND:%.*]] = phi <2 x float> [ <float 1.000000e+00, float 1.500000e+00>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP3:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store <2 x float> [[VEC_IND]], ptr [[TMP3]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[VEC_IND_NEXT]] = fadd fast <2 x float> [[VEC_IND]], splat (float 1.000000e+00) |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[TMP4]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]] |
| ; VEC2_INTERL1_PRED_STORE: [[MIDDLE_BLOCK]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[CMP_N]], label %[[FOR_END_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC2_INTERL1_PRED_STORE: [[SCALAR_PH]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[FOR_BODY_PREHEADER]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BC_RESUME_VAL1:%.*]] = phi float [ [[TMP5]], %[[MIDDLE_BLOCK]] ], [ 1.000000e+00, %[[FOR_BODY_PREHEADER]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_BODY]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[X_06:%.*]] = phi float [ [[CONV1:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL1]], %[[SCALAR_PH]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDVARS_IV]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store float [[X_06]], ptr [[ARRAYIDX]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[CONV1]] = fadd fast float [[X_06]], 5.000000e-01 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[EXITCOND]], label %[[FOR_END_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_END_LOOPEXIT]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[FOR_END]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_END]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: ret void |
| ; |
| entry: |
| %cmp4 = icmp sgt i32 %N, 0 |
| br i1 %cmp4, label %for.body.preheader, label %for.end |
| |
| for.body.preheader: |
| br label %for.body |
| |
| for.body: |
| %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %for.body.preheader ] |
| %x.06 = phi float [ %conv1, %for.body ], [ 1.000000e+00, %for.body.preheader ] |
| %arrayidx = getelementptr inbounds float, ptr %A, i64 %indvars.iv |
| store float %x.06, ptr %arrayidx, align 4 |
| %conv1 = fadd fast float %x.06, 5.000000e-01 |
| %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 |
| %lftr.wideiv = trunc i64 %indvars.iv.next to i32 |
| %exitcond = icmp eq i32 %lftr.wideiv, %N |
| br i1 %exitcond, label %for.end.loopexit, label %for.body |
| |
| for.end.loopexit: |
| br label %for.end |
| |
| for.end: |
| ret void |
| } |
| |
| |
| define void @non_primary_iv_float_scalar(ptr %A, i64 %N) { |
| ; VEC4_INTERL1-LABEL: define void @non_primary_iv_float_scalar( |
| ; VEC4_INTERL1-SAME: ptr [[A:%.*]], i64 [[N:%.*]]) { |
| ; VEC4_INTERL1-NEXT: [[ENTRY:.*]]: |
| ; VEC4_INTERL1-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1) |
| ; VEC4_INTERL1-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 4 |
| ; VEC4_INTERL1-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC4_INTERL1: [[VECTOR_PH]]: |
| ; VEC4_INTERL1-NEXT: [[N_MOD_VF:%.*]] = and i64 [[SMAX]], 3 |
| ; VEC4_INTERL1-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX]], [[N_MOD_VF]] |
| ; VEC4_INTERL1-NEXT: [[TMP4:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC4_INTERL1-NEXT: [[TMP8:%.*]] = fmul fast float 1.000000e+00, [[TMP4]] |
| ; VEC4_INTERL1-NEXT: [[TMP12:%.*]] = fadd fast float 0.000000e+00, [[TMP8]] |
| ; VEC4_INTERL1-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC4_INTERL1: [[VECTOR_BODY]]: |
| ; VEC4_INTERL1-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE7:.*]] ] |
| ; VEC4_INTERL1-NEXT: [[DOTCAST1:%.*]] = sitofp i64 [[INDEX]] to float |
| ; VEC4_INTERL1-NEXT: [[TMP16:%.*]] = fmul fast float 1.000000e+00, [[DOTCAST1]] |
| ; VEC4_INTERL1-NEXT: [[TMP17:%.*]] = fadd fast float 0.000000e+00, [[TMP16]] |
| ; VEC4_INTERL1-NEXT: [[TMP0:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; VEC4_INTERL1-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP0]], align 4 |
| ; VEC4_INTERL1-NEXT: [[TMP1:%.*]] = fcmp fast oeq <4 x float> [[WIDE_LOAD]], zeroinitializer |
| ; VEC4_INTERL1-NEXT: [[TMP2:%.*]] = extractelement <4 x i1> [[TMP1]], i64 0 |
| ; VEC4_INTERL1-NEXT: br i1 [[TMP2]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] |
| ; VEC4_INTERL1: [[PRED_STORE_IF]]: |
| ; VEC4_INTERL1-NEXT: store float [[TMP17]], ptr [[TMP0]], align 4 |
| ; VEC4_INTERL1-NEXT: br label %[[PRED_STORE_CONTINUE]] |
| ; VEC4_INTERL1: [[PRED_STORE_CONTINUE]]: |
| ; VEC4_INTERL1-NEXT: [[TMP3:%.*]] = extractelement <4 x i1> [[TMP1]], i64 1 |
| ; VEC4_INTERL1-NEXT: br i1 [[TMP3]], label %[[PRED_STORE_IF2:.*]], label %[[PRED_STORE_CONTINUE3:.*]] |
| ; VEC4_INTERL1: [[PRED_STORE_IF2]]: |
| ; VEC4_INTERL1-NEXT: [[TMP18:%.*]] = add i64 [[INDEX]], 1 |
| ; VEC4_INTERL1-NEXT: [[TMP5:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP18]] |
| ; VEC4_INTERL1-NEXT: [[TMP6:%.*]] = fadd fast float [[TMP17]], 1.000000e+00 |
| ; VEC4_INTERL1-NEXT: store float [[TMP6]], ptr [[TMP5]], align 4 |
| ; VEC4_INTERL1-NEXT: br label %[[PRED_STORE_CONTINUE3]] |
| ; VEC4_INTERL1: [[PRED_STORE_CONTINUE3]]: |
| ; VEC4_INTERL1-NEXT: [[TMP7:%.*]] = extractelement <4 x i1> [[TMP1]], i64 2 |
| ; VEC4_INTERL1-NEXT: br i1 [[TMP7]], label %[[PRED_STORE_IF4:.*]], label %[[PRED_STORE_CONTINUE5:.*]] |
| ; VEC4_INTERL1: [[PRED_STORE_IF4]]: |
| ; VEC4_INTERL1-NEXT: [[TMP20:%.*]] = add i64 [[INDEX]], 2 |
| ; VEC4_INTERL1-NEXT: [[TMP9:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP20]] |
| ; VEC4_INTERL1-NEXT: [[TMP10:%.*]] = fadd fast float [[TMP17]], 2.000000e+00 |
| ; VEC4_INTERL1-NEXT: store float [[TMP10]], ptr [[TMP9]], align 4 |
| ; VEC4_INTERL1-NEXT: br label %[[PRED_STORE_CONTINUE5]] |
| ; VEC4_INTERL1: [[PRED_STORE_CONTINUE5]]: |
| ; VEC4_INTERL1-NEXT: [[TMP11:%.*]] = extractelement <4 x i1> [[TMP1]], i64 3 |
| ; VEC4_INTERL1-NEXT: br i1 [[TMP11]], label %[[PRED_STORE_IF6:.*]], label %[[PRED_STORE_CONTINUE7]] |
| ; VEC4_INTERL1: [[PRED_STORE_IF6]]: |
| ; VEC4_INTERL1-NEXT: [[TMP19:%.*]] = add i64 [[INDEX]], 3 |
| ; VEC4_INTERL1-NEXT: [[TMP13:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP19]] |
| ; VEC4_INTERL1-NEXT: [[TMP14:%.*]] = fadd fast float [[TMP17]], 3.000000e+00 |
| ; VEC4_INTERL1-NEXT: store float [[TMP14]], ptr [[TMP13]], align 4 |
| ; VEC4_INTERL1-NEXT: br label %[[PRED_STORE_CONTINUE7]] |
| ; VEC4_INTERL1: [[PRED_STORE_CONTINUE7]]: |
| ; VEC4_INTERL1-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 |
| ; VEC4_INTERL1-NEXT: [[TMP15:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC4_INTERL1-NEXT: br i1 [[TMP15]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]] |
| ; VEC4_INTERL1: [[MIDDLE_BLOCK]]: |
| ; VEC4_INTERL1-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]] |
| ; VEC4_INTERL1-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]] |
| ; VEC4_INTERL1: [[SCALAR_PH]]: |
| ; VEC4_INTERL1-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] |
| ; VEC4_INTERL1-NEXT: [[BC_RESUME_VAL7:%.*]] = phi float [ [[TMP12]], %[[MIDDLE_BLOCK]] ], [ 0.000000e+00, %[[ENTRY]] ] |
| ; VEC4_INTERL1-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC4_INTERL1: [[FOR_BODY]]: |
| ; VEC4_INTERL1-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[FOR_INC:.*]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; VEC4_INTERL1-NEXT: [[J:%.*]] = phi float [ [[J_NEXT:%.*]], %[[FOR_INC]] ], [ [[BC_RESUME_VAL7]], %[[SCALAR_PH]] ] |
| ; VEC4_INTERL1-NEXT: [[VAR0:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[I]] |
| ; VEC4_INTERL1-NEXT: [[VAR1:%.*]] = load float, ptr [[VAR0]], align 4 |
| ; VEC4_INTERL1-NEXT: [[VAR2:%.*]] = fcmp fast oeq float [[VAR1]], 0.000000e+00 |
| ; VEC4_INTERL1-NEXT: br i1 [[VAR2]], label %[[IF_PRED:.*]], label %[[FOR_INC]] |
| ; VEC4_INTERL1: [[IF_PRED]]: |
| ; VEC4_INTERL1-NEXT: store float [[J]], ptr [[VAR0]], align 4 |
| ; VEC4_INTERL1-NEXT: br label %[[FOR_INC]] |
| ; VEC4_INTERL1: [[FOR_INC]]: |
| ; VEC4_INTERL1-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1 |
| ; VEC4_INTERL1-NEXT: [[J_NEXT]] = fadd fast float [[J]], 1.000000e+00 |
| ; VEC4_INTERL1-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]] |
| ; VEC4_INTERL1-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END]], !llvm.loop [[LOOP14:![0-9]+]] |
| ; VEC4_INTERL1: [[FOR_END]]: |
| ; VEC4_INTERL1-NEXT: ret void |
| ; |
| ; VEC4_INTERL2-LABEL: define void @non_primary_iv_float_scalar( |
| ; VEC4_INTERL2-SAME: ptr [[A:%.*]], i64 [[N:%.*]]) { |
| ; VEC4_INTERL2-NEXT: [[ENTRY:.*]]: |
| ; VEC4_INTERL2-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1) |
| ; VEC4_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 8 |
| ; VEC4_INTERL2-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC4_INTERL2: [[VECTOR_PH]]: |
| ; VEC4_INTERL2-NEXT: [[N_MOD_VF:%.*]] = and i64 [[SMAX]], 7 |
| ; VEC4_INTERL2-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX]], [[N_MOD_VF]] |
| ; VEC4_INTERL2-NEXT: [[TMP10:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC4_INTERL2-NEXT: [[TMP14:%.*]] = fmul fast float 1.000000e+00, [[TMP10]] |
| ; VEC4_INTERL2-NEXT: [[TMP18:%.*]] = fadd fast float 0.000000e+00, [[TMP14]] |
| ; VEC4_INTERL2-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC4_INTERL2: [[VECTOR_BODY]]: |
| ; VEC4_INTERL2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE16:.*]] ] |
| ; VEC4_INTERL2-NEXT: [[DOTCAST1:%.*]] = sitofp i64 [[INDEX]] to float |
| ; VEC4_INTERL2-NEXT: [[TMP22:%.*]] = fmul fast float 1.000000e+00, [[DOTCAST1]] |
| ; VEC4_INTERL2-NEXT: [[TMP6:%.*]] = fadd fast float 0.000000e+00, [[TMP22]] |
| ; VEC4_INTERL2-NEXT: [[TMP0:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; VEC4_INTERL2-NEXT: [[TMP1:%.*]] = getelementptr inbounds float, ptr [[TMP0]], i64 4 |
| ; VEC4_INTERL2-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP0]], align 4 |
| ; VEC4_INTERL2-NEXT: [[WIDE_LOAD2:%.*]] = load <4 x float>, ptr [[TMP1]], align 4 |
| ; VEC4_INTERL2-NEXT: [[TMP2:%.*]] = fcmp fast oeq <4 x float> [[WIDE_LOAD]], zeroinitializer |
| ; VEC4_INTERL2-NEXT: [[TMP3:%.*]] = fcmp fast oeq <4 x float> [[WIDE_LOAD2]], zeroinitializer |
| ; VEC4_INTERL2-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP2]], i64 0 |
| ; VEC4_INTERL2-NEXT: br i1 [[TMP4]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] |
| ; VEC4_INTERL2: [[PRED_STORE_IF]]: |
| ; VEC4_INTERL2-NEXT: store float [[TMP6]], ptr [[TMP0]], align 4 |
| ; VEC4_INTERL2-NEXT: br label %[[PRED_STORE_CONTINUE]] |
| ; VEC4_INTERL2: [[PRED_STORE_CONTINUE]]: |
| ; VEC4_INTERL2-NEXT: [[TMP5:%.*]] = extractelement <4 x i1> [[TMP2]], i64 1 |
| ; VEC4_INTERL2-NEXT: br i1 [[TMP5]], label %[[PRED_STORE_IF3:.*]], label %[[PRED_STORE_CONTINUE4:.*]] |
| ; VEC4_INTERL2: [[PRED_STORE_IF3]]: |
| ; VEC4_INTERL2-NEXT: [[TMP26:%.*]] = add i64 [[INDEX]], 1 |
| ; VEC4_INTERL2-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP26]] |
| ; VEC4_INTERL2-NEXT: [[TMP8:%.*]] = fadd fast float [[TMP6]], 1.000000e+00 |
| ; VEC4_INTERL2-NEXT: store float [[TMP8]], ptr [[TMP7]], align 4 |
| ; VEC4_INTERL2-NEXT: br label %[[PRED_STORE_CONTINUE4]] |
| ; VEC4_INTERL2: [[PRED_STORE_CONTINUE4]]: |
| ; VEC4_INTERL2-NEXT: [[TMP9:%.*]] = extractelement <4 x i1> [[TMP2]], i64 2 |
| ; VEC4_INTERL2-NEXT: br i1 [[TMP9]], label %[[PRED_STORE_IF5:.*]], label %[[PRED_STORE_CONTINUE6:.*]] |
| ; VEC4_INTERL2: [[PRED_STORE_IF5]]: |
| ; VEC4_INTERL2-NEXT: [[TMP30:%.*]] = add i64 [[INDEX]], 2 |
| ; VEC4_INTERL2-NEXT: [[TMP11:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP30]] |
| ; VEC4_INTERL2-NEXT: [[TMP12:%.*]] = fadd fast float [[TMP6]], 2.000000e+00 |
| ; VEC4_INTERL2-NEXT: store float [[TMP12]], ptr [[TMP11]], align 4 |
| ; VEC4_INTERL2-NEXT: br label %[[PRED_STORE_CONTINUE6]] |
| ; VEC4_INTERL2: [[PRED_STORE_CONTINUE6]]: |
| ; VEC4_INTERL2-NEXT: [[TMP13:%.*]] = extractelement <4 x i1> [[TMP2]], i64 3 |
| ; VEC4_INTERL2-NEXT: br i1 [[TMP13]], label %[[PRED_STORE_IF7:.*]], label %[[PRED_STORE_CONTINUE8:.*]] |
| ; VEC4_INTERL2: [[PRED_STORE_IF7]]: |
| ; VEC4_INTERL2-NEXT: [[TMP34:%.*]] = add i64 [[INDEX]], 3 |
| ; VEC4_INTERL2-NEXT: [[TMP15:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP34]] |
| ; VEC4_INTERL2-NEXT: [[TMP16:%.*]] = fadd fast float [[TMP6]], 3.000000e+00 |
| ; VEC4_INTERL2-NEXT: store float [[TMP16]], ptr [[TMP15]], align 4 |
| ; VEC4_INTERL2-NEXT: br label %[[PRED_STORE_CONTINUE8]] |
| ; VEC4_INTERL2: [[PRED_STORE_CONTINUE8]]: |
| ; VEC4_INTERL2-NEXT: [[TMP17:%.*]] = extractelement <4 x i1> [[TMP3]], i64 0 |
| ; VEC4_INTERL2-NEXT: br i1 [[TMP17]], label %[[PRED_STORE_IF9:.*]], label %[[PRED_STORE_CONTINUE10:.*]] |
| ; VEC4_INTERL2: [[PRED_STORE_IF9]]: |
| ; VEC4_INTERL2-NEXT: [[TMP35:%.*]] = add i64 [[INDEX]], 4 |
| ; VEC4_INTERL2-NEXT: [[TMP19:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP35]] |
| ; VEC4_INTERL2-NEXT: [[TMP20:%.*]] = fadd fast float [[TMP6]], 4.000000e+00 |
| ; VEC4_INTERL2-NEXT: store float [[TMP20]], ptr [[TMP19]], align 4 |
| ; VEC4_INTERL2-NEXT: br label %[[PRED_STORE_CONTINUE10]] |
| ; VEC4_INTERL2: [[PRED_STORE_CONTINUE10]]: |
| ; VEC4_INTERL2-NEXT: [[TMP21:%.*]] = extractelement <4 x i1> [[TMP3]], i64 1 |
| ; VEC4_INTERL2-NEXT: br i1 [[TMP21]], label %[[PRED_STORE_IF11:.*]], label %[[PRED_STORE_CONTINUE12:.*]] |
| ; VEC4_INTERL2: [[PRED_STORE_IF11]]: |
| ; VEC4_INTERL2-NEXT: [[TMP36:%.*]] = add i64 [[INDEX]], 5 |
| ; VEC4_INTERL2-NEXT: [[TMP23:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP36]] |
| ; VEC4_INTERL2-NEXT: [[TMP24:%.*]] = fadd fast float [[TMP6]], 5.000000e+00 |
| ; VEC4_INTERL2-NEXT: store float [[TMP24]], ptr [[TMP23]], align 4 |
| ; VEC4_INTERL2-NEXT: br label %[[PRED_STORE_CONTINUE12]] |
| ; VEC4_INTERL2: [[PRED_STORE_CONTINUE12]]: |
| ; VEC4_INTERL2-NEXT: [[TMP25:%.*]] = extractelement <4 x i1> [[TMP3]], i64 2 |
| ; VEC4_INTERL2-NEXT: br i1 [[TMP25]], label %[[PRED_STORE_IF13:.*]], label %[[PRED_STORE_CONTINUE14:.*]] |
| ; VEC4_INTERL2: [[PRED_STORE_IF13]]: |
| ; VEC4_INTERL2-NEXT: [[TMP38:%.*]] = add i64 [[INDEX]], 6 |
| ; VEC4_INTERL2-NEXT: [[TMP27:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP38]] |
| ; VEC4_INTERL2-NEXT: [[TMP28:%.*]] = fadd fast float [[TMP6]], 6.000000e+00 |
| ; VEC4_INTERL2-NEXT: store float [[TMP28]], ptr [[TMP27]], align 4 |
| ; VEC4_INTERL2-NEXT: br label %[[PRED_STORE_CONTINUE14]] |
| ; VEC4_INTERL2: [[PRED_STORE_CONTINUE14]]: |
| ; VEC4_INTERL2-NEXT: [[TMP29:%.*]] = extractelement <4 x i1> [[TMP3]], i64 3 |
| ; VEC4_INTERL2-NEXT: br i1 [[TMP29]], label %[[PRED_STORE_IF15:.*]], label %[[PRED_STORE_CONTINUE16]] |
| ; VEC4_INTERL2: [[PRED_STORE_IF15]]: |
| ; VEC4_INTERL2-NEXT: [[TMP37:%.*]] = add i64 [[INDEX]], 7 |
| ; VEC4_INTERL2-NEXT: [[TMP31:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP37]] |
| ; VEC4_INTERL2-NEXT: [[TMP32:%.*]] = fadd fast float [[TMP6]], 7.000000e+00 |
| ; VEC4_INTERL2-NEXT: store float [[TMP32]], ptr [[TMP31]], align 4 |
| ; VEC4_INTERL2-NEXT: br label %[[PRED_STORE_CONTINUE16]] |
| ; VEC4_INTERL2: [[PRED_STORE_CONTINUE16]]: |
| ; VEC4_INTERL2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 |
| ; VEC4_INTERL2-NEXT: [[TMP33:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC4_INTERL2-NEXT: br i1 [[TMP33]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]] |
| ; VEC4_INTERL2: [[MIDDLE_BLOCK]]: |
| ; VEC4_INTERL2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]] |
| ; VEC4_INTERL2-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]] |
| ; VEC4_INTERL2: [[SCALAR_PH]]: |
| ; VEC4_INTERL2-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] |
| ; VEC4_INTERL2-NEXT: [[BC_RESUME_VAL16:%.*]] = phi float [ [[TMP18]], %[[MIDDLE_BLOCK]] ], [ 0.000000e+00, %[[ENTRY]] ] |
| ; VEC4_INTERL2-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC4_INTERL2: [[FOR_BODY]]: |
| ; VEC4_INTERL2-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[FOR_INC:.*]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; VEC4_INTERL2-NEXT: [[J:%.*]] = phi float [ [[J_NEXT:%.*]], %[[FOR_INC]] ], [ [[BC_RESUME_VAL16]], %[[SCALAR_PH]] ] |
| ; VEC4_INTERL2-NEXT: [[VAR0:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[I]] |
| ; VEC4_INTERL2-NEXT: [[VAR1:%.*]] = load float, ptr [[VAR0]], align 4 |
| ; VEC4_INTERL2-NEXT: [[VAR2:%.*]] = fcmp fast oeq float [[VAR1]], 0.000000e+00 |
| ; VEC4_INTERL2-NEXT: br i1 [[VAR2]], label %[[IF_PRED:.*]], label %[[FOR_INC]] |
| ; VEC4_INTERL2: [[IF_PRED]]: |
| ; VEC4_INTERL2-NEXT: store float [[J]], ptr [[VAR0]], align 4 |
| ; VEC4_INTERL2-NEXT: br label %[[FOR_INC]] |
| ; VEC4_INTERL2: [[FOR_INC]]: |
| ; VEC4_INTERL2-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1 |
| ; VEC4_INTERL2-NEXT: [[J_NEXT]] = fadd fast float [[J]], 1.000000e+00 |
| ; VEC4_INTERL2-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]] |
| ; VEC4_INTERL2-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END]], !llvm.loop [[LOOP14:![0-9]+]] |
| ; VEC4_INTERL2: [[FOR_END]]: |
| ; VEC4_INTERL2-NEXT: ret void |
| ; |
| ; VEC1_INTERL2-LABEL: define void @non_primary_iv_float_scalar( |
| ; VEC1_INTERL2-SAME: ptr [[A:%.*]], i64 [[N:%.*]]) { |
| ; VEC1_INTERL2-NEXT: [[ENTRY:.*]]: |
| ; VEC1_INTERL2-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1) |
| ; VEC1_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 2 |
| ; VEC1_INTERL2-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC1_INTERL2: [[VECTOR_PH]]: |
| ; VEC1_INTERL2-NEXT: [[N_MOD_VF:%.*]] = and i64 [[SMAX]], 1 |
| ; VEC1_INTERL2-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX]], [[N_MOD_VF]] |
| ; VEC1_INTERL2-NEXT: [[TMP1:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC1_INTERL2-NEXT: [[TMP9:%.*]] = fmul fast float 1.000000e+00, [[TMP1]] |
| ; VEC1_INTERL2-NEXT: [[TMP10:%.*]] = fadd fast float 0.000000e+00, [[TMP9]] |
| ; VEC1_INTERL2-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC1_INTERL2: [[VECTOR_BODY]]: |
| ; VEC1_INTERL2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE3:.*]] ] |
| ; VEC1_INTERL2-NEXT: [[TMP11:%.*]] = add i64 [[INDEX]], 1 |
| ; VEC1_INTERL2-NEXT: [[DOTCAST1:%.*]] = sitofp i64 [[INDEX]] to float |
| ; VEC1_INTERL2-NEXT: [[TMP12:%.*]] = fmul fast float 1.000000e+00, [[DOTCAST1]] |
| ; VEC1_INTERL2-NEXT: [[TMP13:%.*]] = fadd fast float 0.000000e+00, [[TMP12]] |
| ; VEC1_INTERL2-NEXT: [[TMP0:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; VEC1_INTERL2-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP11]] |
| ; VEC1_INTERL2-NEXT: [[TMP3:%.*]] = load float, ptr [[TMP0]], align 4 |
| ; VEC1_INTERL2-NEXT: [[TMP4:%.*]] = load float, ptr [[TMP2]], align 4 |
| ; VEC1_INTERL2-NEXT: [[TMP5:%.*]] = fcmp fast oeq float [[TMP3]], 0.000000e+00 |
| ; VEC1_INTERL2-NEXT: [[TMP6:%.*]] = fcmp fast oeq float [[TMP4]], 0.000000e+00 |
| ; VEC1_INTERL2-NEXT: br i1 [[TMP5]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] |
| ; VEC1_INTERL2: [[PRED_STORE_IF]]: |
| ; VEC1_INTERL2-NEXT: store float [[TMP13]], ptr [[TMP0]], align 4 |
| ; VEC1_INTERL2-NEXT: br label %[[PRED_STORE_CONTINUE]] |
| ; VEC1_INTERL2: [[PRED_STORE_CONTINUE]]: |
| ; VEC1_INTERL2-NEXT: br i1 [[TMP6]], label %[[PRED_STORE_IF2:.*]], label %[[PRED_STORE_CONTINUE3]] |
| ; VEC1_INTERL2: [[PRED_STORE_IF2]]: |
| ; VEC1_INTERL2-NEXT: [[TMP7:%.*]] = fadd fast float [[TMP13]], 1.000000e+00 |
| ; VEC1_INTERL2-NEXT: store float [[TMP7]], ptr [[TMP2]], align 4 |
| ; VEC1_INTERL2-NEXT: br label %[[PRED_STORE_CONTINUE3]] |
| ; VEC1_INTERL2: [[PRED_STORE_CONTINUE3]]: |
| ; VEC1_INTERL2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; VEC1_INTERL2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC1_INTERL2-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]] |
| ; VEC1_INTERL2: [[MIDDLE_BLOCK]]: |
| ; VEC1_INTERL2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]] |
| ; VEC1_INTERL2-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]] |
| ; VEC1_INTERL2: [[SCALAR_PH]]: |
| ; VEC1_INTERL2-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] |
| ; VEC1_INTERL2-NEXT: [[BC_RESUME_VAL3:%.*]] = phi float [ [[TMP10]], %[[MIDDLE_BLOCK]] ], [ 0.000000e+00, %[[ENTRY]] ] |
| ; VEC1_INTERL2-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC1_INTERL2: [[FOR_BODY]]: |
| ; VEC1_INTERL2-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[FOR_INC:.*]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; VEC1_INTERL2-NEXT: [[J:%.*]] = phi float [ [[J_NEXT:%.*]], %[[FOR_INC]] ], [ [[BC_RESUME_VAL3]], %[[SCALAR_PH]] ] |
| ; VEC1_INTERL2-NEXT: [[VAR0:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[I]] |
| ; VEC1_INTERL2-NEXT: [[VAR1:%.*]] = load float, ptr [[VAR0]], align 4 |
| ; VEC1_INTERL2-NEXT: [[VAR2:%.*]] = fcmp fast oeq float [[VAR1]], 0.000000e+00 |
| ; VEC1_INTERL2-NEXT: br i1 [[VAR2]], label %[[IF_PRED:.*]], label %[[FOR_INC]] |
| ; VEC1_INTERL2: [[IF_PRED]]: |
| ; VEC1_INTERL2-NEXT: store float [[J]], ptr [[VAR0]], align 4 |
| ; VEC1_INTERL2-NEXT: br label %[[FOR_INC]] |
| ; VEC1_INTERL2: [[FOR_INC]]: |
| ; VEC1_INTERL2-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1 |
| ; VEC1_INTERL2-NEXT: [[J_NEXT]] = fadd fast float [[J]], 1.000000e+00 |
| ; VEC1_INTERL2-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]] |
| ; VEC1_INTERL2-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END]], !llvm.loop [[LOOP14:![0-9]+]] |
| ; VEC1_INTERL2: [[FOR_END]]: |
| ; VEC1_INTERL2-NEXT: ret void |
| ; |
| ; VEC2_INTERL1_PRED_STORE-LABEL: define void @non_primary_iv_float_scalar( |
| ; VEC2_INTERL1_PRED_STORE-SAME: ptr [[A:%.*]], i64 [[N:%.*]]) { |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ENTRY:.*]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N]], i64 1) |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 2 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[VECTOR_PH]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[N_MOD_VF:%.*]] = and i64 [[SMAX]], 1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX]], [[N_MOD_VF]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP4:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP8:%.*]] = fmul fast float 1.000000e+00, [[TMP4]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP9:%.*]] = fadd fast float 0.000000e+00, [[TMP8]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[VECTOR_BODY]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE3:.*]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTCAST1:%.*]] = sitofp i64 [[INDEX]] to float |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP10:%.*]] = fmul fast float 1.000000e+00, [[DOTCAST1]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP12:%.*]] = fadd fast float 0.000000e+00, [[TMP10]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP0:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[WIDE_LOAD:%.*]] = load <2 x float>, ptr [[TMP0]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP1:%.*]] = fcmp fast oeq <2 x float> [[WIDE_LOAD]], zeroinitializer |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP2:%.*]] = extractelement <2 x i1> [[TMP1]], i64 0 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[TMP2]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[PRED_STORE_IF]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store float [[TMP12]], ptr [[TMP0]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[PRED_STORE_CONTINUE]] |
| ; VEC2_INTERL1_PRED_STORE: [[PRED_STORE_CONTINUE]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP3:%.*]] = extractelement <2 x i1> [[TMP1]], i64 1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[TMP3]], label %[[PRED_STORE_IF2:.*]], label %[[PRED_STORE_CONTINUE3]] |
| ; VEC2_INTERL1_PRED_STORE: [[PRED_STORE_IF2]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP11:%.*]] = add i64 [[INDEX]], 1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP5:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP11]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP6:%.*]] = fadd fast float [[TMP12]], 1.000000e+00 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store float [[TMP6]], ptr [[TMP5]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[PRED_STORE_CONTINUE3]] |
| ; VEC2_INTERL1_PRED_STORE: [[PRED_STORE_CONTINUE3]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]] |
| ; VEC2_INTERL1_PRED_STORE: [[MIDDLE_BLOCK]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[CMP_N]], label %[[FOR_END:.*]], label %[[SCALAR_PH]] |
| ; VEC2_INTERL1_PRED_STORE: [[SCALAR_PH]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BC_RESUME_VAL3:%.*]] = phi float [ [[TMP9]], %[[MIDDLE_BLOCK]] ], [ 0.000000e+00, %[[ENTRY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_BODY]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[FOR_INC:.*]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[J:%.*]] = phi float [ [[J_NEXT:%.*]], %[[FOR_INC]] ], [ [[BC_RESUME_VAL3]], %[[SCALAR_PH]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[VAR0:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[I]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[VAR1:%.*]] = load float, ptr [[VAR0]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[VAR2:%.*]] = fcmp fast oeq float [[VAR1]], 0.000000e+00 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[VAR2]], label %[[IF_PRED:.*]], label %[[FOR_INC]] |
| ; VEC2_INTERL1_PRED_STORE: [[IF_PRED]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store float [[J]], ptr [[VAR0]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[FOR_INC]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_INC]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[J_NEXT]] = fadd fast float [[J]], 1.000000e+00 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[COND]], label %[[FOR_BODY]], label %[[FOR_END]], !llvm.loop [[LOOP14:![0-9]+]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_END]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: ret void |
| ; |
| entry: |
| br label %for.body |
| |
| for.body: |
| %i = phi i64 [ %i.next, %for.inc ], [ 0, %entry ] |
| %j = phi float [ %j.next, %for.inc ], [ 0.0, %entry ] |
| %var0 = getelementptr inbounds float, ptr %A, i64 %i |
| %var1 = load float, ptr %var0, align 4 |
| %var2 = fcmp fast oeq float %var1, 0.0 |
| br i1 %var2, label %if.pred, label %for.inc |
| |
| if.pred: |
| store float %j, ptr %var0, align 4 |
| br label %for.inc |
| |
| for.inc: |
| %i.next = add nuw nsw i64 %i, 1 |
| %j.next = fadd fast float %j, 1.0 |
| %cond = icmp slt i64 %i.next, %N |
| br i1 %cond, label %for.body, label %for.end |
| |
| for.end: |
| ret void |
| } |
| |
| define i32 @float_induction_with_dbg_on_fadd(ptr %dst) { |
| ; VEC4_INTERL1-LABEL: define i32 @float_induction_with_dbg_on_fadd( |
| ; VEC4_INTERL1-SAME: ptr [[DST:%.*]]) { |
| ; VEC4_INTERL1-NEXT: [[ENTRY:.*:]] |
| ; VEC4_INTERL1-NEXT: br label %[[VECTOR_PH:.*]] |
| ; VEC4_INTERL1: [[VECTOR_PH]]: |
| ; VEC4_INTERL1-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC4_INTERL1: [[VECTOR_BODY]]: |
| ; VEC4_INTERL1-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[VEC_IND:%.*]] = phi <4 x float> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ], !dbg [[DBG15:![0-9]+]] |
| ; VEC4_INTERL1-NEXT: [[TMP0:%.*]] = fadd reassoc <4 x float> [[VEC_IND]], zeroinitializer |
| ; VEC4_INTERL1-NEXT: [[TMP2:%.*]] = getelementptr float, ptr null, i64 [[INDEX]] |
| ; VEC4_INTERL1-NEXT: store <4 x float> [[TMP0]], ptr [[TMP2]], align 8 |
| ; VEC4_INTERL1-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 |
| ; VEC4_INTERL1-NEXT: [[VEC_IND_NEXT]] = fadd reassoc <4 x float> [[VEC_IND]], zeroinitializer, !dbg [[DBG15]] |
| ; VEC4_INTERL1-NEXT: [[TMP1:%.*]] = icmp eq i64 [[INDEX_NEXT]], 200 |
| ; VEC4_INTERL1-NEXT: br i1 [[TMP1]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP21:![0-9]+]] |
| ; VEC4_INTERL1: [[MIDDLE_BLOCK]]: |
| ; VEC4_INTERL1-NEXT: br label %[[EXIT:.*]] |
| ; VEC4_INTERL1: [[EXIT]]: |
| ; VEC4_INTERL1-NEXT: ret i32 0 |
| ; |
| ; VEC4_INTERL2-LABEL: define i32 @float_induction_with_dbg_on_fadd( |
| ; VEC4_INTERL2-SAME: ptr [[DST:%.*]]) { |
| ; VEC4_INTERL2-NEXT: [[ENTRY:.*:]] |
| ; VEC4_INTERL2-NEXT: br label %[[VECTOR_PH:.*]] |
| ; VEC4_INTERL2: [[VECTOR_PH]]: |
| ; VEC4_INTERL2-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC4_INTERL2: [[VECTOR_BODY]]: |
| ; VEC4_INTERL2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[VEC_IND:%.*]] = phi <4 x float> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ], !dbg [[DBG15:![0-9]+]] |
| ; VEC4_INTERL2-NEXT: [[STEP_ADD:%.*]] = fadd reassoc <4 x float> [[VEC_IND]], zeroinitializer, !dbg [[DBG15]] |
| ; VEC4_INTERL2-NEXT: [[TMP0:%.*]] = fadd reassoc <4 x float> [[VEC_IND]], zeroinitializer |
| ; VEC4_INTERL2-NEXT: [[TMP1:%.*]] = fadd reassoc <4 x float> [[STEP_ADD]], zeroinitializer |
| ; VEC4_INTERL2-NEXT: [[TMP4:%.*]] = getelementptr float, ptr null, i64 [[INDEX]] |
| ; VEC4_INTERL2-NEXT: [[TMP3:%.*]] = getelementptr float, ptr [[TMP4]], i64 4 |
| ; VEC4_INTERL2-NEXT: store <4 x float> [[TMP0]], ptr [[TMP4]], align 8 |
| ; VEC4_INTERL2-NEXT: store <4 x float> [[TMP1]], ptr [[TMP3]], align 8 |
| ; VEC4_INTERL2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 |
| ; VEC4_INTERL2-NEXT: [[VEC_IND_NEXT]] = fadd reassoc <4 x float> [[STEP_ADD]], zeroinitializer, !dbg [[DBG15]] |
| ; VEC4_INTERL2-NEXT: [[TMP2:%.*]] = icmp eq i64 [[INDEX_NEXT]], 200 |
| ; VEC4_INTERL2-NEXT: br i1 [[TMP2]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP21:![0-9]+]] |
| ; VEC4_INTERL2: [[MIDDLE_BLOCK]]: |
| ; VEC4_INTERL2-NEXT: br label %[[EXIT:.*]] |
| ; VEC4_INTERL2: [[EXIT]]: |
| ; VEC4_INTERL2-NEXT: ret i32 0 |
| ; |
| ; VEC1_INTERL2-LABEL: define i32 @float_induction_with_dbg_on_fadd( |
| ; VEC1_INTERL2-SAME: ptr [[DST:%.*]]) { |
| ; VEC1_INTERL2-NEXT: [[ENTRY:.*:]] |
| ; VEC1_INTERL2-NEXT: br label %[[VECTOR_PH:.*]] |
| ; VEC1_INTERL2: [[VECTOR_PH]]: |
| ; VEC1_INTERL2-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC1_INTERL2: [[VECTOR_BODY]]: |
| ; VEC1_INTERL2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC1_INTERL2-NEXT: [[DOTCAST:%.*]] = sitofp i64 [[INDEX]] to float |
| ; VEC1_INTERL2-NEXT: [[TMP1:%.*]] = fmul reassoc float 0.000000e+00, [[DOTCAST]] |
| ; VEC1_INTERL2-NEXT: [[TMP0:%.*]] = fadd reassoc float 0.000000e+00, [[TMP1]] |
| ; VEC1_INTERL2-NEXT: [[TMP5:%.*]] = fadd reassoc float [[TMP0]], 0.000000e+00, !dbg [[DBG15:![0-9]+]] |
| ; VEC1_INTERL2-NEXT: [[TMP7:%.*]] = add i64 [[INDEX]], 1 |
| ; VEC1_INTERL2-NEXT: [[OFFSET_IDX:%.*]] = fadd reassoc float [[TMP0]], 0.000000e+00 |
| ; VEC1_INTERL2-NEXT: [[TMP6:%.*]] = fadd reassoc float [[TMP5]], 0.000000e+00 |
| ; VEC1_INTERL2-NEXT: [[TMP3:%.*]] = getelementptr float, ptr null, i64 [[INDEX]] |
| ; VEC1_INTERL2-NEXT: [[TMP8:%.*]] = getelementptr float, ptr null, i64 [[TMP7]] |
| ; VEC1_INTERL2-NEXT: store float [[OFFSET_IDX]], ptr [[TMP3]], align 8 |
| ; VEC1_INTERL2-NEXT: store float [[TMP6]], ptr [[TMP8]], align 8 |
| ; VEC1_INTERL2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; VEC1_INTERL2-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], 200 |
| ; VEC1_INTERL2-NEXT: br i1 [[TMP4]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP21:![0-9]+]] |
| ; VEC1_INTERL2: [[MIDDLE_BLOCK]]: |
| ; VEC1_INTERL2-NEXT: br label %[[EXIT:.*]] |
| ; VEC1_INTERL2: [[EXIT]]: |
| ; VEC1_INTERL2-NEXT: ret i32 0 |
| ; |
| ; VEC2_INTERL1_PRED_STORE-LABEL: define i32 @float_induction_with_dbg_on_fadd( |
| ; VEC2_INTERL1_PRED_STORE-SAME: ptr [[DST:%.*]]) { |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ENTRY:.*:]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[VECTOR_PH:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[VECTOR_PH]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[VECTOR_BODY]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[VEC_IND:%.*]] = phi <2 x float> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ], !dbg [[DBG15:![0-9]+]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP0:%.*]] = fadd reassoc <2 x float> [[VEC_IND]], zeroinitializer |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP2:%.*]] = getelementptr float, ptr null, i64 [[INDEX]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store <2 x float> [[TMP0]], ptr [[TMP2]], align 8 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[VEC_IND_NEXT]] = fadd reassoc <2 x float> [[VEC_IND]], zeroinitializer, !dbg [[DBG15]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP1:%.*]] = icmp eq i64 [[INDEX_NEXT]], 200 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[TMP1]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP21:![0-9]+]] |
| ; VEC2_INTERL1_PRED_STORE: [[MIDDLE_BLOCK]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[EXIT:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[EXIT]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: ret i32 0 |
| ; |
| entry: |
| br label %loop |
| |
| loop: |
| %fp.iv = phi float [ 0.000000e+00, %entry ], [ %fp.iv.next, %loop ], !dbg !4 |
| %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] |
| %fp.iv.next = fadd reassoc float %fp.iv, 0.000000e+00 |
| %gep = getelementptr float, ptr null, i64 %iv |
| store float %fp.iv.next, ptr %gep, align 8 |
| %iv.next = add i64 %iv, 1 |
| %exitcond.not = icmp eq i64 %iv.next, 200 |
| br i1 %exitcond.not, label %exit, label %loop |
| |
| exit: |
| ret i32 0 |
| } |
| |
| define void @fp_iv_used_in_gep_fadd(float %init, ptr noalias nocapture %A, float %fpinc, i32 %N) { |
| ; VEC4_INTERL1-LABEL: define void @fp_iv_used_in_gep_fadd( |
| ; VEC4_INTERL1-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], float [[FPINC:%.*]], i32 [[N:%.*]]) { |
| ; VEC4_INTERL1-NEXT: [[ENTRY:.*]]: |
| ; VEC4_INTERL1-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1 |
| ; VEC4_INTERL1-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 |
| ; VEC4_INTERL1-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 1 |
| ; VEC4_INTERL1-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], 4 |
| ; VEC4_INTERL1-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC4_INTERL1: [[VECTOR_PH]]: |
| ; VEC4_INTERL1-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP2]], 3 |
| ; VEC4_INTERL1-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP2]], [[N_MOD_VF]] |
| ; VEC4_INTERL1-NEXT: [[DOTCAST:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC4_INTERL1-NEXT: [[TMP3:%.*]] = fmul fast float [[FPINC]], [[DOTCAST]] |
| ; VEC4_INTERL1-NEXT: [[TMP4:%.*]] = fadd fast float [[INIT]], [[TMP3]] |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[INIT]], i64 0 |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x float> poison, float [[FPINC]], i64 0 |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT1]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL1-NEXT: [[TMP5:%.*]] = fmul fast <4 x float> <float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, [[BROADCAST_SPLAT2]] |
| ; VEC4_INTERL1-NEXT: [[INDUCTION:%.*]] = fadd fast <4 x float> [[BROADCAST_SPLAT]], [[TMP5]] |
| ; VEC4_INTERL1-NEXT: [[TMP6:%.*]] = fmul fast float [[FPINC]], 4.000000e+00 |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <4 x float> poison, float [[TMP6]], i64 0 |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLAT4:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT3]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL1-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC4_INTERL1: [[VECTOR_BODY]]: |
| ; VEC4_INTERL1-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[VEC_IND:%.*]] = phi <4 x float> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[DOTCAST5:%.*]] = sitofp i64 [[INDEX]] to float |
| ; VEC4_INTERL1-NEXT: [[TMP7:%.*]] = fmul fast float [[FPINC]], [[DOTCAST5]] |
| ; VEC4_INTERL1-NEXT: [[OFFSET_IDX:%.*]] = fadd fast float [[INIT]], [[TMP7]] |
| ; VEC4_INTERL1-NEXT: [[TMP9:%.*]] = fmul fast float 1.000000e+00, [[FPINC]] |
| ; VEC4_INTERL1-NEXT: [[TMP10:%.*]] = fadd fast float [[OFFSET_IDX]], [[TMP9]] |
| ; VEC4_INTERL1-NEXT: [[TMP11:%.*]] = fmul fast float 2.000000e+00, [[FPINC]] |
| ; VEC4_INTERL1-NEXT: [[TMP12:%.*]] = fadd fast float [[OFFSET_IDX]], [[TMP11]] |
| ; VEC4_INTERL1-NEXT: [[TMP18:%.*]] = fmul fast float 3.000000e+00, [[FPINC]] |
| ; VEC4_INTERL1-NEXT: [[TMP20:%.*]] = fadd fast float [[OFFSET_IDX]], [[TMP18]] |
| ; VEC4_INTERL1-NEXT: [[TMP13:%.*]] = fptoui <4 x float> [[VEC_IND]] to <4 x i32> |
| ; VEC4_INTERL1-NEXT: [[TMP14:%.*]] = extractelement <4 x i32> [[TMP13]], i64 0 |
| ; VEC4_INTERL1-NEXT: [[TMP19:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP14]] |
| ; VEC4_INTERL1-NEXT: [[TMP15:%.*]] = extractelement <4 x i32> [[TMP13]], i64 1 |
| ; VEC4_INTERL1-NEXT: [[TMP23:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP15]] |
| ; VEC4_INTERL1-NEXT: [[TMP16:%.*]] = extractelement <4 x i32> [[TMP13]], i64 2 |
| ; VEC4_INTERL1-NEXT: [[TMP25:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP16]] |
| ; VEC4_INTERL1-NEXT: [[TMP17:%.*]] = extractelement <4 x i32> [[TMP13]], i64 3 |
| ; VEC4_INTERL1-NEXT: [[TMP27:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP17]] |
| ; VEC4_INTERL1-NEXT: store float [[OFFSET_IDX]], ptr [[TMP19]], align 4 |
| ; VEC4_INTERL1-NEXT: store float [[TMP10]], ptr [[TMP23]], align 4 |
| ; VEC4_INTERL1-NEXT: store float [[TMP12]], ptr [[TMP25]], align 4 |
| ; VEC4_INTERL1-NEXT: store float [[TMP20]], ptr [[TMP27]], align 4 |
| ; VEC4_INTERL1-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 |
| ; VEC4_INTERL1-NEXT: [[VEC_IND_NEXT]] = fadd fast <4 x float> [[VEC_IND]], [[BROADCAST_SPLAT4]] |
| ; VEC4_INTERL1-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC4_INTERL1-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP22:![0-9]+]] |
| ; VEC4_INTERL1: [[MIDDLE_BLOCK]]: |
| ; VEC4_INTERL1-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]] |
| ; VEC4_INTERL1-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC4_INTERL1: [[SCALAR_PH]]: |
| ; VEC4_INTERL1-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] |
| ; VEC4_INTERL1-NEXT: [[BC_RESUME_VAL5:%.*]] = phi float [ [[TMP4]], %[[MIDDLE_BLOCK]] ], [ [[INIT]], %[[ENTRY]] ] |
| ; VEC4_INTERL1-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC4_INTERL1: [[FOR_BODY]]: |
| ; VEC4_INTERL1-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[X_05:%.*]] = phi float [ [[BC_RESUME_VAL5]], %[[SCALAR_PH]] ], [ [[ADD:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[C:%.*]] = fptoui float [[X_05]] to i32 |
| ; VEC4_INTERL1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[C]] |
| ; VEC4_INTERL1-NEXT: store float [[X_05]], ptr [[ARRAYIDX]], align 4 |
| ; VEC4_INTERL1-NEXT: [[ADD]] = fadd fast float [[X_05]], [[FPINC]] |
| ; VEC4_INTERL1-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC4_INTERL1-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC4_INTERL1-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC4_INTERL1-NEXT: br i1 [[EXITCOND]], label %[[EXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP23:![0-9]+]] |
| ; VEC4_INTERL1: [[EXIT]]: |
| ; VEC4_INTERL1-NEXT: ret void |
| ; |
| ; VEC4_INTERL2-LABEL: define void @fp_iv_used_in_gep_fadd( |
| ; VEC4_INTERL2-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], float [[FPINC:%.*]], i32 [[N:%.*]]) { |
| ; VEC4_INTERL2-NEXT: [[ENTRY:.*]]: |
| ; VEC4_INTERL2-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1 |
| ; VEC4_INTERL2-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 |
| ; VEC4_INTERL2-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 1 |
| ; VEC4_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], 8 |
| ; VEC4_INTERL2-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC4_INTERL2: [[VECTOR_PH]]: |
| ; VEC4_INTERL2-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP2]], 7 |
| ; VEC4_INTERL2-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP2]], [[N_MOD_VF]] |
| ; VEC4_INTERL2-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[FPINC]], i64 0 |
| ; VEC4_INTERL2-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL2-NEXT: [[DOTCAST:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC4_INTERL2-NEXT: [[TMP3:%.*]] = fmul fast float [[FPINC]], [[DOTCAST]] |
| ; VEC4_INTERL2-NEXT: [[TMP4:%.*]] = fadd fast float [[INIT]], [[TMP3]] |
| ; VEC4_INTERL2-NEXT: [[TMP5:%.*]] = fmul fast <4 x float> splat (float 4.000000e+00), [[BROADCAST_SPLAT]] |
| ; VEC4_INTERL2-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x float> poison, float [[INIT]], i64 0 |
| ; VEC4_INTERL2-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT1]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL2-NEXT: [[TMP6:%.*]] = fmul fast <4 x float> <float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, [[BROADCAST_SPLAT]] |
| ; VEC4_INTERL2-NEXT: [[INDUCTION:%.*]] = fadd fast <4 x float> [[BROADCAST_SPLAT2]], [[TMP6]] |
| ; VEC4_INTERL2-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC4_INTERL2: [[VECTOR_BODY]]: |
| ; VEC4_INTERL2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[VEC_IND:%.*]] = phi <4 x float> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[STEP_ADD:%.*]] = fadd fast <4 x float> [[VEC_IND]], [[TMP5]] |
| ; VEC4_INTERL2-NEXT: [[DOTCAST3:%.*]] = sitofp i64 [[INDEX]] to float |
| ; VEC4_INTERL2-NEXT: [[TMP7:%.*]] = fmul fast float [[FPINC]], [[DOTCAST3]] |
| ; VEC4_INTERL2-NEXT: [[OFFSET_IDX:%.*]] = fadd fast float [[INIT]], [[TMP7]] |
| ; VEC4_INTERL2-NEXT: [[TMP9:%.*]] = fmul fast float 1.000000e+00, [[FPINC]] |
| ; VEC4_INTERL2-NEXT: [[TMP10:%.*]] = fadd fast float [[OFFSET_IDX]], [[TMP9]] |
| ; VEC4_INTERL2-NEXT: [[TMP11:%.*]] = fmul fast float 2.000000e+00, [[FPINC]] |
| ; VEC4_INTERL2-NEXT: [[TMP12:%.*]] = fadd fast float [[OFFSET_IDX]], [[TMP11]] |
| ; VEC4_INTERL2-NEXT: [[TMP13:%.*]] = fmul fast float 3.000000e+00, [[FPINC]] |
| ; VEC4_INTERL2-NEXT: [[TMP14:%.*]] = fadd fast float [[OFFSET_IDX]], [[TMP13]] |
| ; VEC4_INTERL2-NEXT: [[TMP15:%.*]] = fmul fast float 4.000000e+00, [[FPINC]] |
| ; VEC4_INTERL2-NEXT: [[TMP16:%.*]] = fadd fast float [[OFFSET_IDX]], [[TMP15]] |
| ; VEC4_INTERL2-NEXT: [[TMP17:%.*]] = fmul fast float 5.000000e+00, [[FPINC]] |
| ; VEC4_INTERL2-NEXT: [[TMP18:%.*]] = fadd fast float [[OFFSET_IDX]], [[TMP17]] |
| ; VEC4_INTERL2-NEXT: [[TMP19:%.*]] = fmul fast float 6.000000e+00, [[FPINC]] |
| ; VEC4_INTERL2-NEXT: [[TMP20:%.*]] = fadd fast float [[OFFSET_IDX]], [[TMP19]] |
| ; VEC4_INTERL2-NEXT: [[TMP31:%.*]] = fmul fast float 7.000000e+00, [[FPINC]] |
| ; VEC4_INTERL2-NEXT: [[TMP33:%.*]] = fadd fast float [[OFFSET_IDX]], [[TMP31]] |
| ; VEC4_INTERL2-NEXT: [[TMP21:%.*]] = fptoui <4 x float> [[VEC_IND]] to <4 x i32> |
| ; VEC4_INTERL2-NEXT: [[TMP26:%.*]] = fptoui <4 x float> [[STEP_ADD]] to <4 x i32> |
| ; VEC4_INTERL2-NEXT: [[TMP22:%.*]] = extractelement <4 x i32> [[TMP21]], i64 0 |
| ; VEC4_INTERL2-NEXT: [[TMP32:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP22]] |
| ; VEC4_INTERL2-NEXT: [[TMP23:%.*]] = extractelement <4 x i32> [[TMP21]], i64 1 |
| ; VEC4_INTERL2-NEXT: [[TMP36:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP23]] |
| ; VEC4_INTERL2-NEXT: [[TMP24:%.*]] = extractelement <4 x i32> [[TMP21]], i64 2 |
| ; VEC4_INTERL2-NEXT: [[TMP38:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP24]] |
| ; VEC4_INTERL2-NEXT: [[TMP25:%.*]] = extractelement <4 x i32> [[TMP21]], i64 3 |
| ; VEC4_INTERL2-NEXT: [[TMP40:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP25]] |
| ; VEC4_INTERL2-NEXT: [[TMP27:%.*]] = extractelement <4 x i32> [[TMP26]], i64 0 |
| ; VEC4_INTERL2-NEXT: [[TMP42:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP27]] |
| ; VEC4_INTERL2-NEXT: [[TMP28:%.*]] = extractelement <4 x i32> [[TMP26]], i64 1 |
| ; VEC4_INTERL2-NEXT: [[TMP44:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP28]] |
| ; VEC4_INTERL2-NEXT: [[TMP29:%.*]] = extractelement <4 x i32> [[TMP26]], i64 2 |
| ; VEC4_INTERL2-NEXT: [[TMP46:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP29]] |
| ; VEC4_INTERL2-NEXT: [[TMP30:%.*]] = extractelement <4 x i32> [[TMP26]], i64 3 |
| ; VEC4_INTERL2-NEXT: [[TMP43:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP30]] |
| ; VEC4_INTERL2-NEXT: store float [[OFFSET_IDX]], ptr [[TMP32]], align 4 |
| ; VEC4_INTERL2-NEXT: store float [[TMP10]], ptr [[TMP36]], align 4 |
| ; VEC4_INTERL2-NEXT: store float [[TMP12]], ptr [[TMP38]], align 4 |
| ; VEC4_INTERL2-NEXT: store float [[TMP14]], ptr [[TMP40]], align 4 |
| ; VEC4_INTERL2-NEXT: store float [[TMP16]], ptr [[TMP42]], align 4 |
| ; VEC4_INTERL2-NEXT: store float [[TMP18]], ptr [[TMP44]], align 4 |
| ; VEC4_INTERL2-NEXT: store float [[TMP20]], ptr [[TMP46]], align 4 |
| ; VEC4_INTERL2-NEXT: store float [[TMP33]], ptr [[TMP43]], align 4 |
| ; VEC4_INTERL2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 |
| ; VEC4_INTERL2-NEXT: [[VEC_IND_NEXT]] = fadd fast <4 x float> [[STEP_ADD]], [[TMP5]] |
| ; VEC4_INTERL2-NEXT: [[TMP47:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC4_INTERL2-NEXT: br i1 [[TMP47]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP22:![0-9]+]] |
| ; VEC4_INTERL2: [[MIDDLE_BLOCK]]: |
| ; VEC4_INTERL2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]] |
| ; VEC4_INTERL2-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC4_INTERL2: [[SCALAR_PH]]: |
| ; VEC4_INTERL2-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] |
| ; VEC4_INTERL2-NEXT: [[BC_RESUME_VAL3:%.*]] = phi float [ [[TMP4]], %[[MIDDLE_BLOCK]] ], [ [[INIT]], %[[ENTRY]] ] |
| ; VEC4_INTERL2-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC4_INTERL2: [[FOR_BODY]]: |
| ; VEC4_INTERL2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[X_05:%.*]] = phi float [ [[BC_RESUME_VAL3]], %[[SCALAR_PH]] ], [ [[ADD:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[C:%.*]] = fptoui float [[X_05]] to i32 |
| ; VEC4_INTERL2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[C]] |
| ; VEC4_INTERL2-NEXT: store float [[X_05]], ptr [[ARRAYIDX]], align 4 |
| ; VEC4_INTERL2-NEXT: [[ADD]] = fadd fast float [[X_05]], [[FPINC]] |
| ; VEC4_INTERL2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC4_INTERL2-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC4_INTERL2-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC4_INTERL2-NEXT: br i1 [[EXITCOND]], label %[[EXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP23:![0-9]+]] |
| ; VEC4_INTERL2: [[EXIT]]: |
| ; VEC4_INTERL2-NEXT: ret void |
| ; |
| ; VEC1_INTERL2-LABEL: define void @fp_iv_used_in_gep_fadd( |
| ; VEC1_INTERL2-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], float [[FPINC:%.*]], i32 [[N:%.*]]) { |
| ; VEC1_INTERL2-NEXT: [[ENTRY:.*]]: |
| ; VEC1_INTERL2-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1 |
| ; VEC1_INTERL2-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 |
| ; VEC1_INTERL2-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 1 |
| ; VEC1_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], 2 |
| ; VEC1_INTERL2-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC1_INTERL2: [[VECTOR_PH]]: |
| ; VEC1_INTERL2-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP2]], 1 |
| ; VEC1_INTERL2-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP2]], [[N_MOD_VF]] |
| ; VEC1_INTERL2-NEXT: [[DOTCAST:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC1_INTERL2-NEXT: [[TMP3:%.*]] = fmul fast float [[FPINC]], [[DOTCAST]] |
| ; VEC1_INTERL2-NEXT: [[TMP4:%.*]] = fadd fast float [[INIT]], [[TMP3]] |
| ; VEC1_INTERL2-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC1_INTERL2: [[VECTOR_BODY]]: |
| ; VEC1_INTERL2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC1_INTERL2-NEXT: [[DOTCAST1:%.*]] = sitofp i64 [[INDEX]] to float |
| ; VEC1_INTERL2-NEXT: [[TMP5:%.*]] = fmul fast float [[FPINC]], [[DOTCAST1]] |
| ; VEC1_INTERL2-NEXT: [[OFFSET_IDX:%.*]] = fadd fast float [[INIT]], [[TMP5]] |
| ; VEC1_INTERL2-NEXT: [[TMP9:%.*]] = fmul fast float 1.000000e+00, [[FPINC]] |
| ; VEC1_INTERL2-NEXT: [[TMP6:%.*]] = fadd fast float [[OFFSET_IDX]], [[TMP9]] |
| ; VEC1_INTERL2-NEXT: [[TMP7:%.*]] = fptoui float [[OFFSET_IDX]] to i32 |
| ; VEC1_INTERL2-NEXT: [[TMP8:%.*]] = fptoui float [[TMP6]] to i32 |
| ; VEC1_INTERL2-NEXT: [[TMP10:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP7]] |
| ; VEC1_INTERL2-NEXT: [[TMP12:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP8]] |
| ; VEC1_INTERL2-NEXT: store float [[OFFSET_IDX]], ptr [[TMP10]], align 4 |
| ; VEC1_INTERL2-NEXT: store float [[TMP6]], ptr [[TMP12]], align 4 |
| ; VEC1_INTERL2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; VEC1_INTERL2-NEXT: [[TMP13:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC1_INTERL2-NEXT: br i1 [[TMP13]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP22:![0-9]+]] |
| ; VEC1_INTERL2: [[MIDDLE_BLOCK]]: |
| ; VEC1_INTERL2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]] |
| ; VEC1_INTERL2-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC1_INTERL2: [[SCALAR_PH]]: |
| ; VEC1_INTERL2-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] |
| ; VEC1_INTERL2-NEXT: [[BC_RESUME_VAL1:%.*]] = phi float [ [[TMP4]], %[[MIDDLE_BLOCK]] ], [ [[INIT]], %[[ENTRY]] ] |
| ; VEC1_INTERL2-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC1_INTERL2: [[FOR_BODY]]: |
| ; VEC1_INTERL2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ] |
| ; VEC1_INTERL2-NEXT: [[X_05:%.*]] = phi float [ [[BC_RESUME_VAL1]], %[[SCALAR_PH]] ], [ [[ADD:%.*]], %[[FOR_BODY]] ] |
| ; VEC1_INTERL2-NEXT: [[C:%.*]] = fptoui float [[X_05]] to i32 |
| ; VEC1_INTERL2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[C]] |
| ; VEC1_INTERL2-NEXT: store float [[X_05]], ptr [[ARRAYIDX]], align 4 |
| ; VEC1_INTERL2-NEXT: [[ADD]] = fadd fast float [[X_05]], [[FPINC]] |
| ; VEC1_INTERL2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC1_INTERL2-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC1_INTERL2-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC1_INTERL2-NEXT: br i1 [[EXITCOND]], label %[[EXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP23:![0-9]+]] |
| ; VEC1_INTERL2: [[EXIT]]: |
| ; VEC1_INTERL2-NEXT: ret void |
| ; |
| ; VEC2_INTERL1_PRED_STORE-LABEL: define void @fp_iv_used_in_gep_fadd( |
| ; VEC2_INTERL1_PRED_STORE-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], float [[FPINC:%.*]], i32 [[N:%.*]]) { |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ENTRY:.*]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], 2 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[VECTOR_PH]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP2]], 1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP2]], [[N_MOD_VF]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTCAST:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP3:%.*]] = fmul fast float [[FPINC]], [[DOTCAST]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP4:%.*]] = fadd fast float [[INIT]], [[TMP3]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x float> poison, float [[INIT]], i64 0 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x float> [[BROADCAST_SPLATINSERT]], <2 x float> poison, <2 x i32> zeroinitializer |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <2 x float> poison, float [[FPINC]], i64 0 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <2 x float> [[BROADCAST_SPLATINSERT1]], <2 x float> poison, <2 x i32> zeroinitializer |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP5:%.*]] = fmul fast <2 x float> <float 0.000000e+00, float 1.000000e+00>, [[BROADCAST_SPLAT2]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDUCTION:%.*]] = fadd fast <2 x float> [[BROADCAST_SPLAT]], [[TMP5]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP6:%.*]] = fmul fast float [[FPINC]], 2.000000e+00 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <2 x float> poison, float [[TMP6]], i64 0 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLAT4:%.*]] = shufflevector <2 x float> [[BROADCAST_SPLATINSERT3]], <2 x float> poison, <2 x i32> zeroinitializer |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[VECTOR_BODY]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[VEC_IND:%.*]] = phi <2 x float> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTCAST5:%.*]] = sitofp i64 [[INDEX]] to float |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP7:%.*]] = fmul fast float [[FPINC]], [[DOTCAST5]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[OFFSET_IDX:%.*]] = fadd fast float [[INIT]], [[TMP7]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP12:%.*]] = fmul fast float 1.000000e+00, [[FPINC]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP8:%.*]] = fadd fast float [[OFFSET_IDX]], [[TMP12]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP9:%.*]] = fptoui <2 x float> [[VEC_IND]] to <2 x i32> |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP10:%.*]] = extractelement <2 x i32> [[TMP9]], i64 0 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP13:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP10]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP11:%.*]] = extractelement <2 x i32> [[TMP9]], i64 1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP15:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP11]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store float [[OFFSET_IDX]], ptr [[TMP13]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store float [[TMP8]], ptr [[TMP15]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[VEC_IND_NEXT]] = fadd fast <2 x float> [[VEC_IND]], [[BROADCAST_SPLAT4]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP16:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[TMP16]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP22:![0-9]+]] |
| ; VEC2_INTERL1_PRED_STORE: [[MIDDLE_BLOCK]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC2_INTERL1_PRED_STORE: [[SCALAR_PH]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BC_RESUME_VAL5:%.*]] = phi float [ [[TMP4]], %[[MIDDLE_BLOCK]] ], [ [[INIT]], %[[ENTRY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_BODY]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[X_05:%.*]] = phi float [ [[BC_RESUME_VAL5]], %[[SCALAR_PH]] ], [ [[ADD:%.*]], %[[FOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[C:%.*]] = fptoui float [[X_05]] to i32 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[C]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store float [[X_05]], ptr [[ARRAYIDX]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ADD]] = fadd fast float [[X_05]], [[FPINC]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[EXITCOND]], label %[[EXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP23:![0-9]+]] |
| ; VEC2_INTERL1_PRED_STORE: [[EXIT]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: ret void |
| ; |
| entry: |
| br label %for.body |
| |
| for.body: |
| %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] |
| %x.05 = phi float [ %init, %entry ], [ %add, %for.body ] |
| %c = fptoui float %x.05 to i32 |
| %arrayidx = getelementptr inbounds float, ptr %A, i32 %c |
| store float %x.05, ptr %arrayidx, align 4 |
| %add = fadd fast float %x.05, %fpinc |
| %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 |
| %lftr.wideiv = trunc i64 %indvars.iv.next to i32 |
| %exitcond = icmp eq i32 %lftr.wideiv, %N |
| br i1 %exitcond, label %exit, label %for.body |
| |
| exit: |
| ret void |
| } |
| |
| define void @fp_iv_used_in_gep_fsub(float %init, ptr noalias nocapture %A, float %fpinc, i32 %N) { |
| ; VEC4_INTERL1-LABEL: define void @fp_iv_used_in_gep_fsub( |
| ; VEC4_INTERL1-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], float [[FPINC:%.*]], i32 [[N:%.*]]) { |
| ; VEC4_INTERL1-NEXT: [[ENTRY:.*]]: |
| ; VEC4_INTERL1-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1 |
| ; VEC4_INTERL1-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 |
| ; VEC4_INTERL1-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 1 |
| ; VEC4_INTERL1-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], 4 |
| ; VEC4_INTERL1-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC4_INTERL1: [[VECTOR_PH]]: |
| ; VEC4_INTERL1-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP2]], 3 |
| ; VEC4_INTERL1-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP2]], [[N_MOD_VF]] |
| ; VEC4_INTERL1-NEXT: [[DOTCAST:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC4_INTERL1-NEXT: [[TMP3:%.*]] = fmul fast float [[FPINC]], [[DOTCAST]] |
| ; VEC4_INTERL1-NEXT: [[TMP4:%.*]] = fsub fast float [[INIT]], [[TMP3]] |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[INIT]], i64 0 |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x float> poison, float [[FPINC]], i64 0 |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT1]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL1-NEXT: [[TMP5:%.*]] = fmul fast <4 x float> <float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, [[BROADCAST_SPLAT2]] |
| ; VEC4_INTERL1-NEXT: [[INDUCTION:%.*]] = fsub fast <4 x float> [[BROADCAST_SPLAT]], [[TMP5]] |
| ; VEC4_INTERL1-NEXT: [[TMP6:%.*]] = fmul fast float [[FPINC]], 4.000000e+00 |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <4 x float> poison, float [[TMP6]], i64 0 |
| ; VEC4_INTERL1-NEXT: [[BROADCAST_SPLAT4:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT3]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL1-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC4_INTERL1: [[VECTOR_BODY]]: |
| ; VEC4_INTERL1-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[VEC_IND:%.*]] = phi <4 x float> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[DOTCAST5:%.*]] = sitofp i64 [[INDEX]] to float |
| ; VEC4_INTERL1-NEXT: [[TMP7:%.*]] = fmul fast float [[FPINC]], [[DOTCAST5]] |
| ; VEC4_INTERL1-NEXT: [[OFFSET_IDX:%.*]] = fsub fast float [[INIT]], [[TMP7]] |
| ; VEC4_INTERL1-NEXT: [[TMP9:%.*]] = fmul fast float -1.000000e+00, [[FPINC]] |
| ; VEC4_INTERL1-NEXT: [[TMP10:%.*]] = fsub fast float [[OFFSET_IDX]], [[TMP9]] |
| ; VEC4_INTERL1-NEXT: [[TMP11:%.*]] = fmul fast float -2.000000e+00, [[FPINC]] |
| ; VEC4_INTERL1-NEXT: [[TMP12:%.*]] = fsub fast float [[OFFSET_IDX]], [[TMP11]] |
| ; VEC4_INTERL1-NEXT: [[TMP18:%.*]] = fmul fast float -3.000000e+00, [[FPINC]] |
| ; VEC4_INTERL1-NEXT: [[TMP20:%.*]] = fsub fast float [[OFFSET_IDX]], [[TMP18]] |
| ; VEC4_INTERL1-NEXT: [[TMP13:%.*]] = fptoui <4 x float> [[VEC_IND]] to <4 x i32> |
| ; VEC4_INTERL1-NEXT: [[TMP14:%.*]] = extractelement <4 x i32> [[TMP13]], i64 0 |
| ; VEC4_INTERL1-NEXT: [[TMP19:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP14]] |
| ; VEC4_INTERL1-NEXT: [[TMP15:%.*]] = extractelement <4 x i32> [[TMP13]], i64 1 |
| ; VEC4_INTERL1-NEXT: [[TMP23:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP15]] |
| ; VEC4_INTERL1-NEXT: [[TMP16:%.*]] = extractelement <4 x i32> [[TMP13]], i64 2 |
| ; VEC4_INTERL1-NEXT: [[TMP25:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP16]] |
| ; VEC4_INTERL1-NEXT: [[TMP17:%.*]] = extractelement <4 x i32> [[TMP13]], i64 3 |
| ; VEC4_INTERL1-NEXT: [[TMP27:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP17]] |
| ; VEC4_INTERL1-NEXT: store float [[OFFSET_IDX]], ptr [[TMP19]], align 4 |
| ; VEC4_INTERL1-NEXT: store float [[TMP10]], ptr [[TMP23]], align 4 |
| ; VEC4_INTERL1-NEXT: store float [[TMP12]], ptr [[TMP25]], align 4 |
| ; VEC4_INTERL1-NEXT: store float [[TMP20]], ptr [[TMP27]], align 4 |
| ; VEC4_INTERL1-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 |
| ; VEC4_INTERL1-NEXT: [[VEC_IND_NEXT]] = fsub fast <4 x float> [[VEC_IND]], [[BROADCAST_SPLAT4]] |
| ; VEC4_INTERL1-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC4_INTERL1-NEXT: br i1 [[TMP26]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP24:![0-9]+]] |
| ; VEC4_INTERL1: [[MIDDLE_BLOCK]]: |
| ; VEC4_INTERL1-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]] |
| ; VEC4_INTERL1-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC4_INTERL1: [[SCALAR_PH]]: |
| ; VEC4_INTERL1-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] |
| ; VEC4_INTERL1-NEXT: [[BC_RESUME_VAL5:%.*]] = phi float [ [[TMP4]], %[[MIDDLE_BLOCK]] ], [ [[INIT]], %[[ENTRY]] ] |
| ; VEC4_INTERL1-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC4_INTERL1: [[FOR_BODY]]: |
| ; VEC4_INTERL1-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[X_05:%.*]] = phi float [ [[BC_RESUME_VAL5]], %[[SCALAR_PH]] ], [ [[ADD:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[C:%.*]] = fptoui float [[X_05]] to i32 |
| ; VEC4_INTERL1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[C]] |
| ; VEC4_INTERL1-NEXT: store float [[X_05]], ptr [[ARRAYIDX]], align 4 |
| ; VEC4_INTERL1-NEXT: [[ADD]] = fsub fast float [[X_05]], [[FPINC]] |
| ; VEC4_INTERL1-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC4_INTERL1-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC4_INTERL1-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC4_INTERL1-NEXT: br i1 [[EXITCOND]], label %[[EXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP25:![0-9]+]] |
| ; VEC4_INTERL1: [[EXIT]]: |
| ; VEC4_INTERL1-NEXT: ret void |
| ; |
| ; VEC4_INTERL2-LABEL: define void @fp_iv_used_in_gep_fsub( |
| ; VEC4_INTERL2-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], float [[FPINC:%.*]], i32 [[N:%.*]]) { |
| ; VEC4_INTERL2-NEXT: [[ENTRY:.*]]: |
| ; VEC4_INTERL2-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1 |
| ; VEC4_INTERL2-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 |
| ; VEC4_INTERL2-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 1 |
| ; VEC4_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], 8 |
| ; VEC4_INTERL2-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC4_INTERL2: [[VECTOR_PH]]: |
| ; VEC4_INTERL2-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP2]], 7 |
| ; VEC4_INTERL2-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP2]], [[N_MOD_VF]] |
| ; VEC4_INTERL2-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[FPINC]], i64 0 |
| ; VEC4_INTERL2-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL2-NEXT: [[DOTCAST:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC4_INTERL2-NEXT: [[TMP3:%.*]] = fmul fast float [[FPINC]], [[DOTCAST]] |
| ; VEC4_INTERL2-NEXT: [[TMP4:%.*]] = fsub fast float [[INIT]], [[TMP3]] |
| ; VEC4_INTERL2-NEXT: [[TMP5:%.*]] = fmul fast <4 x float> splat (float 4.000000e+00), [[BROADCAST_SPLAT]] |
| ; VEC4_INTERL2-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <4 x float> poison, float [[INIT]], i64 0 |
| ; VEC4_INTERL2-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT1]], <4 x float> poison, <4 x i32> zeroinitializer |
| ; VEC4_INTERL2-NEXT: [[TMP6:%.*]] = fmul fast <4 x float> <float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, [[BROADCAST_SPLAT]] |
| ; VEC4_INTERL2-NEXT: [[INDUCTION:%.*]] = fsub fast <4 x float> [[BROADCAST_SPLAT2]], [[TMP6]] |
| ; VEC4_INTERL2-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC4_INTERL2: [[VECTOR_BODY]]: |
| ; VEC4_INTERL2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[VEC_IND:%.*]] = phi <4 x float> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[STEP_ADD:%.*]] = fsub fast <4 x float> [[VEC_IND]], [[TMP5]] |
| ; VEC4_INTERL2-NEXT: [[DOTCAST3:%.*]] = sitofp i64 [[INDEX]] to float |
| ; VEC4_INTERL2-NEXT: [[TMP7:%.*]] = fmul fast float [[FPINC]], [[DOTCAST3]] |
| ; VEC4_INTERL2-NEXT: [[OFFSET_IDX:%.*]] = fsub fast float [[INIT]], [[TMP7]] |
| ; VEC4_INTERL2-NEXT: [[TMP9:%.*]] = fmul fast float -1.000000e+00, [[FPINC]] |
| ; VEC4_INTERL2-NEXT: [[TMP10:%.*]] = fsub fast float [[OFFSET_IDX]], [[TMP9]] |
| ; VEC4_INTERL2-NEXT: [[TMP11:%.*]] = fmul fast float -2.000000e+00, [[FPINC]] |
| ; VEC4_INTERL2-NEXT: [[TMP12:%.*]] = fsub fast float [[OFFSET_IDX]], [[TMP11]] |
| ; VEC4_INTERL2-NEXT: [[TMP13:%.*]] = fmul fast float -3.000000e+00, [[FPINC]] |
| ; VEC4_INTERL2-NEXT: [[TMP14:%.*]] = fsub fast float [[OFFSET_IDX]], [[TMP13]] |
| ; VEC4_INTERL2-NEXT: [[TMP15:%.*]] = fmul fast float 4.000000e+00, [[FPINC]] |
| ; VEC4_INTERL2-NEXT: [[TMP16:%.*]] = fsub fast float [[OFFSET_IDX]], [[TMP15]] |
| ; VEC4_INTERL2-NEXT: [[TMP17:%.*]] = fmul fast float 3.000000e+00, [[FPINC]] |
| ; VEC4_INTERL2-NEXT: [[TMP18:%.*]] = fsub fast float [[OFFSET_IDX]], [[TMP17]] |
| ; VEC4_INTERL2-NEXT: [[TMP30:%.*]] = fmul fast float 2.000000e+00, [[FPINC]] |
| ; VEC4_INTERL2-NEXT: [[TMP32:%.*]] = fsub fast float [[OFFSET_IDX]], [[TMP30]] |
| ; VEC4_INTERL2-NEXT: [[TMP33:%.*]] = fmul fast float 1.000000e+00, [[FPINC]] |
| ; VEC4_INTERL2-NEXT: [[TMP19:%.*]] = fsub fast float [[OFFSET_IDX]], [[TMP33]] |
| ; VEC4_INTERL2-NEXT: [[TMP20:%.*]] = fptoui <4 x float> [[VEC_IND]] to <4 x i32> |
| ; VEC4_INTERL2-NEXT: [[TMP25:%.*]] = fptoui <4 x float> [[STEP_ADD]] to <4 x i32> |
| ; VEC4_INTERL2-NEXT: [[TMP21:%.*]] = extractelement <4 x i32> [[TMP20]], i64 0 |
| ; VEC4_INTERL2-NEXT: [[TMP31:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP21]] |
| ; VEC4_INTERL2-NEXT: [[TMP22:%.*]] = extractelement <4 x i32> [[TMP20]], i64 1 |
| ; VEC4_INTERL2-NEXT: [[TMP35:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP22]] |
| ; VEC4_INTERL2-NEXT: [[TMP23:%.*]] = extractelement <4 x i32> [[TMP20]], i64 2 |
| ; VEC4_INTERL2-NEXT: [[TMP37:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP23]] |
| ; VEC4_INTERL2-NEXT: [[TMP24:%.*]] = extractelement <4 x i32> [[TMP20]], i64 3 |
| ; VEC4_INTERL2-NEXT: [[TMP39:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP24]] |
| ; VEC4_INTERL2-NEXT: [[TMP26:%.*]] = extractelement <4 x i32> [[TMP25]], i64 0 |
| ; VEC4_INTERL2-NEXT: [[TMP41:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP26]] |
| ; VEC4_INTERL2-NEXT: [[TMP27:%.*]] = extractelement <4 x i32> [[TMP25]], i64 1 |
| ; VEC4_INTERL2-NEXT: [[TMP43:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP27]] |
| ; VEC4_INTERL2-NEXT: [[TMP28:%.*]] = extractelement <4 x i32> [[TMP25]], i64 2 |
| ; VEC4_INTERL2-NEXT: [[TMP40:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP28]] |
| ; VEC4_INTERL2-NEXT: [[TMP29:%.*]] = extractelement <4 x i32> [[TMP25]], i64 3 |
| ; VEC4_INTERL2-NEXT: [[TMP45:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP29]] |
| ; VEC4_INTERL2-NEXT: store float [[OFFSET_IDX]], ptr [[TMP31]], align 4 |
| ; VEC4_INTERL2-NEXT: store float [[TMP10]], ptr [[TMP35]], align 4 |
| ; VEC4_INTERL2-NEXT: store float [[TMP12]], ptr [[TMP37]], align 4 |
| ; VEC4_INTERL2-NEXT: store float [[TMP14]], ptr [[TMP39]], align 4 |
| ; VEC4_INTERL2-NEXT: store float [[TMP16]], ptr [[TMP41]], align 4 |
| ; VEC4_INTERL2-NEXT: store float [[TMP18]], ptr [[TMP43]], align 4 |
| ; VEC4_INTERL2-NEXT: store float [[TMP32]], ptr [[TMP40]], align 4 |
| ; VEC4_INTERL2-NEXT: store float [[TMP19]], ptr [[TMP45]], align 4 |
| ; VEC4_INTERL2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 |
| ; VEC4_INTERL2-NEXT: [[VEC_IND_NEXT]] = fsub fast <4 x float> [[STEP_ADD]], [[TMP5]] |
| ; VEC4_INTERL2-NEXT: [[TMP46:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC4_INTERL2-NEXT: br i1 [[TMP46]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP24:![0-9]+]] |
| ; VEC4_INTERL2: [[MIDDLE_BLOCK]]: |
| ; VEC4_INTERL2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]] |
| ; VEC4_INTERL2-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC4_INTERL2: [[SCALAR_PH]]: |
| ; VEC4_INTERL2-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] |
| ; VEC4_INTERL2-NEXT: [[BC_RESUME_VAL3:%.*]] = phi float [ [[TMP4]], %[[MIDDLE_BLOCK]] ], [ [[INIT]], %[[ENTRY]] ] |
| ; VEC4_INTERL2-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC4_INTERL2: [[FOR_BODY]]: |
| ; VEC4_INTERL2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[X_05:%.*]] = phi float [ [[BC_RESUME_VAL3]], %[[SCALAR_PH]] ], [ [[ADD:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[C:%.*]] = fptoui float [[X_05]] to i32 |
| ; VEC4_INTERL2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[C]] |
| ; VEC4_INTERL2-NEXT: store float [[X_05]], ptr [[ARRAYIDX]], align 4 |
| ; VEC4_INTERL2-NEXT: [[ADD]] = fsub fast float [[X_05]], [[FPINC]] |
| ; VEC4_INTERL2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC4_INTERL2-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC4_INTERL2-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC4_INTERL2-NEXT: br i1 [[EXITCOND]], label %[[EXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP25:![0-9]+]] |
| ; VEC4_INTERL2: [[EXIT]]: |
| ; VEC4_INTERL2-NEXT: ret void |
| ; |
| ; VEC1_INTERL2-LABEL: define void @fp_iv_used_in_gep_fsub( |
| ; VEC1_INTERL2-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], float [[FPINC:%.*]], i32 [[N:%.*]]) { |
| ; VEC1_INTERL2-NEXT: [[ENTRY:.*]]: |
| ; VEC1_INTERL2-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1 |
| ; VEC1_INTERL2-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 |
| ; VEC1_INTERL2-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 1 |
| ; VEC1_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], 2 |
| ; VEC1_INTERL2-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC1_INTERL2: [[VECTOR_PH]]: |
| ; VEC1_INTERL2-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP2]], 1 |
| ; VEC1_INTERL2-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP2]], [[N_MOD_VF]] |
| ; VEC1_INTERL2-NEXT: [[DOTCAST:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC1_INTERL2-NEXT: [[TMP3:%.*]] = fmul fast float [[FPINC]], [[DOTCAST]] |
| ; VEC1_INTERL2-NEXT: [[TMP4:%.*]] = fsub fast float [[INIT]], [[TMP3]] |
| ; VEC1_INTERL2-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC1_INTERL2: [[VECTOR_BODY]]: |
| ; VEC1_INTERL2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC1_INTERL2-NEXT: [[DOTCAST1:%.*]] = sitofp i64 [[INDEX]] to float |
| ; VEC1_INTERL2-NEXT: [[TMP5:%.*]] = fmul fast float [[FPINC]], [[DOTCAST1]] |
| ; VEC1_INTERL2-NEXT: [[OFFSET_IDX:%.*]] = fsub fast float [[INIT]], [[TMP5]] |
| ; VEC1_INTERL2-NEXT: [[TMP9:%.*]] = fmul fast float 1.000000e+00, [[FPINC]] |
| ; VEC1_INTERL2-NEXT: [[TMP6:%.*]] = fsub fast float [[OFFSET_IDX]], [[TMP9]] |
| ; VEC1_INTERL2-NEXT: [[TMP7:%.*]] = fptoui float [[OFFSET_IDX]] to i32 |
| ; VEC1_INTERL2-NEXT: [[TMP8:%.*]] = fptoui float [[TMP6]] to i32 |
| ; VEC1_INTERL2-NEXT: [[TMP10:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP7]] |
| ; VEC1_INTERL2-NEXT: [[TMP12:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP8]] |
| ; VEC1_INTERL2-NEXT: store float [[OFFSET_IDX]], ptr [[TMP10]], align 4 |
| ; VEC1_INTERL2-NEXT: store float [[TMP6]], ptr [[TMP12]], align 4 |
| ; VEC1_INTERL2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; VEC1_INTERL2-NEXT: [[TMP13:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC1_INTERL2-NEXT: br i1 [[TMP13]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP24:![0-9]+]] |
| ; VEC1_INTERL2: [[MIDDLE_BLOCK]]: |
| ; VEC1_INTERL2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]] |
| ; VEC1_INTERL2-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC1_INTERL2: [[SCALAR_PH]]: |
| ; VEC1_INTERL2-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] |
| ; VEC1_INTERL2-NEXT: [[BC_RESUME_VAL1:%.*]] = phi float [ [[TMP4]], %[[MIDDLE_BLOCK]] ], [ [[INIT]], %[[ENTRY]] ] |
| ; VEC1_INTERL2-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC1_INTERL2: [[FOR_BODY]]: |
| ; VEC1_INTERL2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ] |
| ; VEC1_INTERL2-NEXT: [[X_05:%.*]] = phi float [ [[BC_RESUME_VAL1]], %[[SCALAR_PH]] ], [ [[ADD:%.*]], %[[FOR_BODY]] ] |
| ; VEC1_INTERL2-NEXT: [[C:%.*]] = fptoui float [[X_05]] to i32 |
| ; VEC1_INTERL2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[C]] |
| ; VEC1_INTERL2-NEXT: store float [[X_05]], ptr [[ARRAYIDX]], align 4 |
| ; VEC1_INTERL2-NEXT: [[ADD]] = fsub fast float [[X_05]], [[FPINC]] |
| ; VEC1_INTERL2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC1_INTERL2-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC1_INTERL2-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC1_INTERL2-NEXT: br i1 [[EXITCOND]], label %[[EXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP25:![0-9]+]] |
| ; VEC1_INTERL2: [[EXIT]]: |
| ; VEC1_INTERL2-NEXT: ret void |
| ; |
| ; VEC2_INTERL1_PRED_STORE-LABEL: define void @fp_iv_used_in_gep_fsub( |
| ; VEC2_INTERL1_PRED_STORE-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], float [[FPINC:%.*]], i32 [[N:%.*]]) { |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ENTRY:.*]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], 2 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[VECTOR_PH]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[N_MOD_VF:%.*]] = and i64 [[TMP2]], 1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP2]], [[N_MOD_VF]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTCAST:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP3:%.*]] = fmul fast float [[FPINC]], [[DOTCAST]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP4:%.*]] = fsub fast float [[INIT]], [[TMP3]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x float> poison, float [[INIT]], i64 0 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x float> [[BROADCAST_SPLATINSERT]], <2 x float> poison, <2 x i32> zeroinitializer |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <2 x float> poison, float [[FPINC]], i64 0 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <2 x float> [[BROADCAST_SPLATINSERT1]], <2 x float> poison, <2 x i32> zeroinitializer |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP5:%.*]] = fmul fast <2 x float> <float 0.000000e+00, float 1.000000e+00>, [[BROADCAST_SPLAT2]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDUCTION:%.*]] = fsub fast <2 x float> [[BROADCAST_SPLAT]], [[TMP5]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP6:%.*]] = fmul fast float [[FPINC]], 2.000000e+00 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <2 x float> poison, float [[TMP6]], i64 0 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BROADCAST_SPLAT4:%.*]] = shufflevector <2 x float> [[BROADCAST_SPLATINSERT3]], <2 x float> poison, <2 x i32> zeroinitializer |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[VECTOR_BODY]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[VEC_IND:%.*]] = phi <2 x float> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[DOTCAST5:%.*]] = sitofp i64 [[INDEX]] to float |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP7:%.*]] = fmul fast float [[FPINC]], [[DOTCAST5]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[OFFSET_IDX:%.*]] = fsub fast float [[INIT]], [[TMP7]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP12:%.*]] = fmul fast float -1.000000e+00, [[FPINC]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP8:%.*]] = fsub fast float [[OFFSET_IDX]], [[TMP12]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP9:%.*]] = fptoui <2 x float> [[VEC_IND]] to <2 x i32> |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP10:%.*]] = extractelement <2 x i32> [[TMP9]], i64 0 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP13:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP10]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP11:%.*]] = extractelement <2 x i32> [[TMP9]], i64 1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP15:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[TMP11]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store float [[OFFSET_IDX]], ptr [[TMP13]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store float [[TMP8]], ptr [[TMP15]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[VEC_IND_NEXT]] = fsub fast <2 x float> [[VEC_IND]], [[BROADCAST_SPLAT4]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[TMP16:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[TMP16]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP24:![0-9]+]] |
| ; VEC2_INTERL1_PRED_STORE: [[MIDDLE_BLOCK]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]] |
| ; VEC2_INTERL1_PRED_STORE: [[SCALAR_PH]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[BC_RESUME_VAL5:%.*]] = phi float [ [[TMP4]], %[[MIDDLE_BLOCK]] ], [ [[INIT]], %[[ENTRY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_BODY]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[X_05:%.*]] = phi float [ [[BC_RESUME_VAL5]], %[[SCALAR_PH]] ], [ [[ADD:%.*]], %[[FOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[C:%.*]] = fptoui float [[X_05]] to i32 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[C]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store float [[X_05]], ptr [[ARRAYIDX]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ADD]] = fsub fast float [[X_05]], [[FPINC]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[EXITCOND]], label %[[EXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP25:![0-9]+]] |
| ; VEC2_INTERL1_PRED_STORE: [[EXIT]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: ret void |
| ; |
| entry: |
| br label %for.body |
| |
| for.body: |
| %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] |
| %x.05 = phi float [ %init, %entry ], [ %add, %for.body ] |
| %c = fptoui float %x.05 to i32 |
| %arrayidx = getelementptr inbounds float, ptr %A, i32 %c |
| store float %x.05, ptr %arrayidx, align 4 |
| %add = fsub fast float %x.05, %fpinc |
| %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 |
| %lftr.wideiv = trunc i64 %indvars.iv.next to i32 |
| %exitcond = icmp eq i32 %lftr.wideiv, %N |
| br i1 %exitcond, label %exit, label %for.body |
| |
| exit: |
| ret void |
| } |
| |
| define void @fp_iv_used_in_gep_fmul(float %init, ptr noalias nocapture %A, float %fpinc, i32 %N) { |
| ; VEC4_INTERL1-LABEL: define void @fp_iv_used_in_gep_fmul( |
| ; VEC4_INTERL1-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], float [[FPINC:%.*]], i32 [[N:%.*]]) { |
| ; VEC4_INTERL1-NEXT: [[ENTRY:.*]]: |
| ; VEC4_INTERL1-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC4_INTERL1: [[FOR_BODY]]: |
| ; VEC4_INTERL1-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[X_05:%.*]] = phi float [ [[INIT]], %[[ENTRY]] ], [ [[ADD:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL1-NEXT: [[C:%.*]] = fptoui float [[X_05]] to i32 |
| ; VEC4_INTERL1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[C]] |
| ; VEC4_INTERL1-NEXT: store float [[X_05]], ptr [[ARRAYIDX]], align 4 |
| ; VEC4_INTERL1-NEXT: [[ADD]] = fmul fast float [[X_05]], [[FPINC]] |
| ; VEC4_INTERL1-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC4_INTERL1-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC4_INTERL1-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC4_INTERL1-NEXT: br i1 [[EXITCOND]], label %[[EXIT:.*]], label %[[FOR_BODY]] |
| ; VEC4_INTERL1: [[EXIT]]: |
| ; VEC4_INTERL1-NEXT: ret void |
| ; |
| ; VEC4_INTERL2-LABEL: define void @fp_iv_used_in_gep_fmul( |
| ; VEC4_INTERL2-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], float [[FPINC:%.*]], i32 [[N:%.*]]) { |
| ; VEC4_INTERL2-NEXT: [[ENTRY:.*]]: |
| ; VEC4_INTERL2-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC4_INTERL2: [[FOR_BODY]]: |
| ; VEC4_INTERL2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[X_05:%.*]] = phi float [ [[INIT]], %[[ENTRY]] ], [ [[ADD:%.*]], %[[FOR_BODY]] ] |
| ; VEC4_INTERL2-NEXT: [[C:%.*]] = fptoui float [[X_05]] to i32 |
| ; VEC4_INTERL2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[C]] |
| ; VEC4_INTERL2-NEXT: store float [[X_05]], ptr [[ARRAYIDX]], align 4 |
| ; VEC4_INTERL2-NEXT: [[ADD]] = fmul fast float [[X_05]], [[FPINC]] |
| ; VEC4_INTERL2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC4_INTERL2-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC4_INTERL2-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC4_INTERL2-NEXT: br i1 [[EXITCOND]], label %[[EXIT:.*]], label %[[FOR_BODY]] |
| ; VEC4_INTERL2: [[EXIT]]: |
| ; VEC4_INTERL2-NEXT: ret void |
| ; |
| ; VEC1_INTERL2-LABEL: define void @fp_iv_used_in_gep_fmul( |
| ; VEC1_INTERL2-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], float [[FPINC:%.*]], i32 [[N:%.*]]) { |
| ; VEC1_INTERL2-NEXT: [[ENTRY:.*]]: |
| ; VEC1_INTERL2-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC1_INTERL2: [[FOR_BODY]]: |
| ; VEC1_INTERL2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ] |
| ; VEC1_INTERL2-NEXT: [[X_05:%.*]] = phi float [ [[INIT]], %[[ENTRY]] ], [ [[ADD:%.*]], %[[FOR_BODY]] ] |
| ; VEC1_INTERL2-NEXT: [[C:%.*]] = fptoui float [[X_05]] to i32 |
| ; VEC1_INTERL2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[C]] |
| ; VEC1_INTERL2-NEXT: store float [[X_05]], ptr [[ARRAYIDX]], align 4 |
| ; VEC1_INTERL2-NEXT: [[ADD]] = fmul fast float [[X_05]], [[FPINC]] |
| ; VEC1_INTERL2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC1_INTERL2-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC1_INTERL2-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC1_INTERL2-NEXT: br i1 [[EXITCOND]], label %[[EXIT:.*]], label %[[FOR_BODY]] |
| ; VEC1_INTERL2: [[EXIT]]: |
| ; VEC1_INTERL2-NEXT: ret void |
| ; |
| ; VEC2_INTERL1_PRED_STORE-LABEL: define void @fp_iv_used_in_gep_fmul( |
| ; VEC2_INTERL1_PRED_STORE-SAME: float [[INIT:%.*]], ptr noalias captures(none) [[A:%.*]], float [[FPINC:%.*]], i32 [[N:%.*]]) { |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ENTRY:.*]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br label %[[FOR_BODY:.*]] |
| ; VEC2_INTERL1_PRED_STORE: [[FOR_BODY]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[X_05:%.*]] = phi float [ [[INIT]], %[[ENTRY]] ], [ [[ADD:%.*]], %[[FOR_BODY]] ] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[C:%.*]] = fptoui float [[X_05]] to i32 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A]], i32 [[C]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: store float [[X_05]], ptr [[ARRAYIDX]], align 4 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[ADD]] = fmul fast float [[X_05]], [[FPINC]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 |
| ; VEC2_INTERL1_PRED_STORE-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] |
| ; VEC2_INTERL1_PRED_STORE-NEXT: br i1 [[EXITCOND]], label %[[EXIT:.*]], label %[[FOR_BODY]] |
| ; VEC2_INTERL1_PRED_STORE: [[EXIT]]: |
| ; VEC2_INTERL1_PRED_STORE-NEXT: ret void |
| ; |
| entry: |
| br label %for.body |
| |
| for.body: |
| %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] |
| %x.05 = phi float [ %init, %entry ], [ %add, %for.body ] |
| %c = fptoui float %x.05 to i32 |
| %arrayidx = getelementptr inbounds float, ptr %A, i32 %c |
| store float %x.05, ptr %arrayidx, align 4 |
| %add = fmul fast float %x.05, %fpinc |
| %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 |
| %lftr.wideiv = trunc i64 %indvars.iv.next to i32 |
| %exitcond = icmp eq i32 %lftr.wideiv, %N |
| br i1 %exitcond, label %exit, label %for.body |
| |
| exit: |
| ret void |
| } |
| !llvm.module.flags = !{!3} |
| |
| !0 = distinct !DICompileUnit(language: DW_LANG_C11, file: !1) |
| !1 = !DIFile(filename: "bbi-99425.c", directory: "/tmp") |
| !2 = !{} |
| !3 = !{i32 2, !"Debug Info Version", i32 3} |
| !4 = !DILocation(line: 5, column: 12, scope: !8) |
| !8 = distinct !DISubprogram(name: "main", scope: !1, file: !1, line: 3, type: !9, unit: !0, retainedNodes: !2) |
| !9 = !DISubroutineType(types: !2) |
