llvm/test/Transforms/LoopVectorize/X86/interleave-ptradd-with-replicated-operand.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --filter-out-after "scalar.ph:" --version 6
; RUN: opt -p loop-vectorize -force-vector-width=4 -force-vector-interleave=4 -S %s | FileCheck %s

target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Test for https://github.com/llvm/llvm-project/issues/111606.
define ptr @test_interleave_ptradd_with_replicated_op(ptr %m) #0 {
; CHECK-LABEL: define ptr @test_interleave_ptradd_with_replicated_op(
; CHECK-SAME: ptr [[M:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    br label %[[VECTOR_PH:.*]]
; CHECK:       [[VECTOR_PH]]:
; CHECK-NEXT:    [[TMP0:%.*]] = getelementptr i8, ptr [[M]], i64 768
; CHECK-NEXT:    br label %[[VECTOR_BODY:.*]]
; CHECK:       [[VECTOR_BODY]]:
; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-NEXT:    [[TMP1:%.*]] = shl i64 [[INDEX]], 3
; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[TMP1]], 8
; CHECK-NEXT:    [[TMP3:%.*]] = add i64 [[TMP1]], 16
; CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[TMP1]], 24
; CHECK-NEXT:    [[TMP5:%.*]] = add i64 [[TMP1]], 32
; CHECK-NEXT:    [[TMP6:%.*]] = add i64 [[TMP1]], 40
; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[TMP1]], 48
; CHECK-NEXT:    [[TMP8:%.*]] = add i64 [[TMP1]], 56
; CHECK-NEXT:    [[TMP9:%.*]] = add i64 [[TMP1]], 64
; CHECK-NEXT:    [[TMP10:%.*]] = add i64 [[TMP1]], 72
; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[TMP1]], 80
; CHECK-NEXT:    [[TMP12:%.*]] = add i64 [[TMP1]], 88
; CHECK-NEXT:    [[TMP13:%.*]] = add i64 [[TMP1]], 96
; CHECK-NEXT:    [[TMP14:%.*]] = add i64 [[TMP1]], 104
; CHECK-NEXT:    [[TMP15:%.*]] = add i64 [[TMP1]], 112
; CHECK-NEXT:    [[TMP16:%.*]] = add i64 [[TMP1]], 120
; CHECK-NEXT:    [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[M]], i64 [[TMP1]]
; CHECK-NEXT:    [[NEXT_GEP1:%.*]] = getelementptr i8, ptr [[M]], i64 [[TMP2]]
; CHECK-NEXT:    [[NEXT_GEP2:%.*]] = getelementptr i8, ptr [[M]], i64 [[TMP3]]
; CHECK-NEXT:    [[NEXT_GEP3:%.*]] = getelementptr i8, ptr [[M]], i64 [[TMP4]]
; CHECK-NEXT:    [[NEXT_GEP4:%.*]] = getelementptr i8, ptr [[M]], i64 [[TMP5]]
; CHECK-NEXT:    [[NEXT_GEP5:%.*]] = getelementptr i8, ptr [[M]], i64 [[TMP6]]
; CHECK-NEXT:    [[NEXT_GEP6:%.*]] = getelementptr i8, ptr [[M]], i64 [[TMP7]]
; CHECK-NEXT:    [[NEXT_GEP7:%.*]] = getelementptr i8, ptr [[M]], i64 [[TMP8]]
; CHECK-NEXT:    [[NEXT_GEP8:%.*]] = getelementptr i8, ptr [[M]], i64 [[TMP9]]
; CHECK-NEXT:    [[NEXT_GEP9:%.*]] = getelementptr i8, ptr [[M]], i64 [[TMP10]]
; CHECK-NEXT:    [[NEXT_GEP10:%.*]] = getelementptr i8, ptr [[M]], i64 [[TMP11]]
; CHECK-NEXT:    [[NEXT_GEP11:%.*]] = getelementptr i8, ptr [[M]], i64 [[TMP12]]
; CHECK-NEXT:    [[NEXT_GEP12:%.*]] = getelementptr i8, ptr [[M]], i64 [[TMP13]]
; CHECK-NEXT:    [[NEXT_GEP13:%.*]] = getelementptr i8, ptr [[M]], i64 [[TMP14]]
; CHECK-NEXT:    [[NEXT_GEP14:%.*]] = getelementptr i8, ptr [[M]], i64 [[TMP15]]
; CHECK-NEXT:    [[NEXT_GEP15:%.*]] = getelementptr i8, ptr [[M]], i64 [[TMP16]]
; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr i8, ptr [[NEXT_GEP]], i64 4
; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr i8, ptr [[NEXT_GEP4]], i64 4
; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr i8, ptr [[NEXT_GEP8]], i64 4
; CHECK-NEXT:    [[TMP20:%.*]] = getelementptr i8, ptr [[NEXT_GEP12]], i64 4
; CHECK-NEXT:    [[TMP21:%.*]] = getelementptr i8, ptr [[TMP17]], i32 -4
; CHECK-NEXT:    [[TMP22:%.*]] = getelementptr i8, ptr [[TMP18]], i32 -4
; CHECK-NEXT:    [[TMP23:%.*]] = getelementptr i8, ptr [[TMP19]], i32 -4
; CHECK-NEXT:    [[TMP24:%.*]] = getelementptr i8, ptr [[TMP20]], i32 -4
; CHECK-NEXT:    [[WIDE_VEC:%.*]] = load <8 x i32>, ptr [[TMP21]], align 4
; CHECK-NEXT:    [[STRIDED_VEC:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
; CHECK-NEXT:    [[STRIDED_VEC16:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
; CHECK-NEXT:    [[WIDE_VEC17:%.*]] = load <8 x i32>, ptr [[TMP22]], align 4
; CHECK-NEXT:    [[STRIDED_VEC18:%.*]] = shufflevector <8 x i32> [[WIDE_VEC17]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
; CHECK-NEXT:    [[STRIDED_VEC19:%.*]] = shufflevector <8 x i32> [[WIDE_VEC17]], <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
; CHECK-NEXT:    [[WIDE_VEC20:%.*]] = load <8 x i32>, ptr [[TMP23]], align 4
; CHECK-NEXT:    [[STRIDED_VEC21:%.*]] = shufflevector <8 x i32> [[WIDE_VEC20]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
; CHECK-NEXT:    [[STRIDED_VEC22:%.*]] = shufflevector <8 x i32> [[WIDE_VEC20]], <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
; CHECK-NEXT:    [[WIDE_VEC23:%.*]] = load <8 x i32>, ptr [[TMP24]], align 4
; CHECK-NEXT:    [[STRIDED_VEC24:%.*]] = shufflevector <8 x i32> [[WIDE_VEC23]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
; CHECK-NEXT:    [[STRIDED_VEC25:%.*]] = shufflevector <8 x i32> [[WIDE_VEC23]], <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
; CHECK-NEXT:    [[TMP25:%.*]] = add <4 x i32> [[STRIDED_VEC16]], [[STRIDED_VEC]]
; CHECK-NEXT:    [[TMP30:%.*]] = add <4 x i32> [[STRIDED_VEC19]], [[STRIDED_VEC18]]
; CHECK-NEXT:    [[TMP35:%.*]] = add <4 x i32> [[STRIDED_VEC22]], [[STRIDED_VEC21]]
; CHECK-NEXT:    [[TMP40:%.*]] = add <4 x i32> [[STRIDED_VEC25]], [[STRIDED_VEC24]]
; CHECK-NEXT:    [[TMP26:%.*]] = extractelement <4 x i32> [[TMP25]], i64 0
; CHECK-NEXT:    store i32 [[TMP26]], ptr [[NEXT_GEP]], align 4
; CHECK-NEXT:    [[TMP27:%.*]] = extractelement <4 x i32> [[TMP25]], i64 1
; CHECK-NEXT:    store i32 [[TMP27]], ptr [[NEXT_GEP1]], align 4
; CHECK-NEXT:    [[TMP28:%.*]] = extractelement <4 x i32> [[TMP25]], i64 2
; CHECK-NEXT:    store i32 [[TMP28]], ptr [[NEXT_GEP2]], align 4
; CHECK-NEXT:    [[TMP29:%.*]] = extractelement <4 x i32> [[TMP25]], i64 3
; CHECK-NEXT:    store i32 [[TMP29]], ptr [[NEXT_GEP3]], align 4
; CHECK-NEXT:    [[TMP31:%.*]] = extractelement <4 x i32> [[TMP30]], i64 0
; CHECK-NEXT:    store i32 [[TMP31]], ptr [[NEXT_GEP4]], align 4
; CHECK-NEXT:    [[TMP32:%.*]] = extractelement <4 x i32> [[TMP30]], i64 1
; CHECK-NEXT:    store i32 [[TMP32]], ptr [[NEXT_GEP5]], align 4
; CHECK-NEXT:    [[TMP33:%.*]] = extractelement <4 x i32> [[TMP30]], i64 2
; CHECK-NEXT:    store i32 [[TMP33]], ptr [[NEXT_GEP6]], align 4
; CHECK-NEXT:    [[TMP34:%.*]] = extractelement <4 x i32> [[TMP30]], i64 3
; CHECK-NEXT:    store i32 [[TMP34]], ptr [[NEXT_GEP7]], align 4
; CHECK-NEXT:    [[TMP36:%.*]] = extractelement <4 x i32> [[TMP35]], i64 0
; CHECK-NEXT:    store i32 [[TMP36]], ptr [[NEXT_GEP8]], align 4
; CHECK-NEXT:    [[TMP37:%.*]] = extractelement <4 x i32> [[TMP35]], i64 1
; CHECK-NEXT:    store i32 [[TMP37]], ptr [[NEXT_GEP9]], align 4
; CHECK-NEXT:    [[TMP38:%.*]] = extractelement <4 x i32> [[TMP35]], i64 2
; CHECK-NEXT:    store i32 [[TMP38]], ptr [[NEXT_GEP10]], align 4
; CHECK-NEXT:    [[TMP39:%.*]] = extractelement <4 x i32> [[TMP35]], i64 3
; CHECK-NEXT:    store i32 [[TMP39]], ptr [[NEXT_GEP11]], align 4
; CHECK-NEXT:    [[TMP41:%.*]] = extractelement <4 x i32> [[TMP40]], i64 0
; CHECK-NEXT:    store i32 [[TMP41]], ptr [[NEXT_GEP12]], align 4
; CHECK-NEXT:    [[TMP42:%.*]] = extractelement <4 x i32> [[TMP40]], i64 1
; CHECK-NEXT:    store i32 [[TMP42]], ptr [[NEXT_GEP13]], align 4
; CHECK-NEXT:    [[TMP43:%.*]] = extractelement <4 x i32> [[TMP40]], i64 2
; CHECK-NEXT:    store i32 [[TMP43]], ptr [[NEXT_GEP14]], align 4
; CHECK-NEXT:    [[TMP44:%.*]] = extractelement <4 x i32> [[TMP40]], i64 3
; CHECK-NEXT:    store i32 [[TMP44]], ptr [[NEXT_GEP15]], align 4
; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 16
; CHECK-NEXT:    [[TMP45:%.*]] = icmp eq i64 [[INDEX_NEXT]], 96
; CHECK-NEXT:    br i1 [[TMP45]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
; CHECK:       [[MIDDLE_BLOCK]]:
; CHECK-NEXT:    br label %[[SCALAR_PH:.*]]
; CHECK:       [[SCALAR_PH]]:
;
entry:
  br label %loop

loop:
  %ptr.iv = phi ptr [ %m, %entry ], [ %ptr.iv.next, %loop ]
  %iv = phi i32 [ 1, %entry ], [ %iv.next, %loop ]
  %ptr.iv.next = getelementptr i8, ptr %ptr.iv, i64 8
  %p.4 = getelementptr i8, ptr %ptr.iv, i64 4
  %l.1 = load i32, ptr %p.4, align 4
  %p.0 = getelementptr i8, ptr %ptr.iv, i64 0
  %l.2 = load i32, ptr %p.0, align 4
  %add = add i32 %l.1, %l.2
  store i32 %add, ptr %ptr.iv, align 4
  %iv.next = add i32 %iv, 1
  %tobool.not = icmp eq i32 %iv, 100
  br i1 %tobool.not, label %exit, label %loop

exit:
  ret ptr %p.4
}

attributes #0 = { "target-cpu"="znver2" }