| ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --filter "Cost for VF" --filter "LV: Selecting VF" --filter "Found an estimated cost of .* for VF 1" --filter "Cost of .* for VF" --version 6 |
| ; RUN: opt -passes=loop-vectorize -debug-only=loop-vectorize -disable-output < %s 2>&1 | FileCheck %s |
| ; REQUIRES: asserts |
| |
| target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64" |
| target triple = "thumbv8.1m.main-arm-none-eabi" |
| |
| define void @expensive_icmp(ptr noalias nocapture %d, ptr nocapture readonly %s, i32 %n, i16 zeroext %m) #0 { |
| ; CHECK-LABEL: 'expensive_icmp' |
| ; CHECK: LV: Found an estimated cost of 0 for VF 1 For instruction: %i.016 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ] |
| ; CHECK: LV: Found an estimated cost of 0 for VF 1 For instruction: %arrayidx = getelementptr inbounds i16, ptr %s, i32 %i.016 |
| ; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: %1 = load i16, ptr %arrayidx, align 2 |
| ; CHECK: LV: Found an estimated cost of 0 for VF 1 For instruction: %conv = sext i16 %1 to i32 |
| ; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: %cmp2 = icmp sgt i32 %conv, %conv1 |
| ; CHECK: LV: Found an estimated cost of 0 for VF 1 For instruction: br i1 %cmp2, label %if.then, label %for.inc |
| ; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: %conv6 = add i16 %1, %0 |
| ; CHECK: LV: Found an estimated cost of 0 for VF 1 For instruction: %arrayidx7 = getelementptr inbounds i16, ptr %d, i32 %i.016 |
| ; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: store i16 %conv6, ptr %arrayidx7, align 2 |
| ; CHECK: LV: Found an estimated cost of 0 for VF 1 For instruction: br label %for.inc |
| ; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: %inc = add nuw nsw i32 %i.016, 1 |
| ; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: %exitcond.not = icmp eq i32 %inc, %n |
| ; CHECK: LV: Found an estimated cost of 0 for VF 1 For instruction: br i1 %exitcond.not, label %for.cond.cleanup.loopexit, label %for.body |
| ; CHECK: Cost of 1 for VF 2: induction instruction %inc = add nuw nsw i32 %i.016, 1 |
| ; CHECK: Cost of 0 for VF 2: induction instruction %i.016 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ] |
| ; CHECK: Cost of 0 for VF 2: vp<[[VP4:%[0-9]+]]> = SCALAR-STEPS vp<[[VP3:%[0-9]+]]>, ir<1>, vp<[[VP0:%[0-9]+]]> |
| ; CHECK: Cost of 0 for VF 2: CLONE ir<%arrayidx> = getelementptr inbounds ir<%s>, vp<[[VP4]]> |
| ; CHECK: Cost of 0 for VF 2: vp<[[VP5:%[0-9]+]]> = vector-pointer inbounds i16, ir<%arrayidx>, ir<1> |
| ; CHECK: Cost of 18 for VF 2: WIDEN ir<%1> = load vp<[[VP5]]> |
| ; CHECK: Cost of 4 for VF 2: WIDEN-CAST ir<%conv> = sext ir<%1> to i32 |
| ; CHECK: Cost of 20 for VF 2: WIDEN ir<%cmp2> = icmp sgt ir<%conv>, ir<%conv1> |
| ; CHECK: Cost of 26 for VF 2: WIDEN ir<%conv6> = add ir<%1>, ir<%0> |
| ; CHECK: Cost of 0 for VF 2: CLONE ir<%arrayidx7> = getelementptr ir<%d>, vp<[[VP4]]> |
| ; CHECK: Cost of 0 for VF 2: vp<[[VP6:%[0-9]+]]> = vector-pointer i16, ir<%arrayidx7>, ir<1> |
| ; CHECK: Cost of 16 for VF 2: WIDEN store vp<[[VP6]]>, ir<%conv6>, ir<%cmp2> |
| ; CHECK: Cost of 0 for VF 2: EMIT vp<%index.next> = add nuw vp<[[VP3]]>, vp<[[VP1:%[0-9]+]]> |
| ; CHECK: Cost of 1 for VF 2: EMIT branch-on-count vp<%index.next>, vp<[[VP2:%[0-9]+]]> |
| ; CHECK: Cost of 0 for VF 2: vector loop backedge |
| ; CHECK: Cost of 0 for VF 2: IR %conv1 = zext i16 %m to i32 |
| ; CHECK: Cost of 0 for VF 2: IR %0 = trunc i32 %n to i16 |
| ; CHECK: Cost of 0 for VF 2: EMIT-SCALAR vp<%bc.resume.val> = phi [ vp<[[VP2]]>, middle.block ], [ ir<0>, ir-bb<for.body.lr.ph> ] |
| ; CHECK: Cost of 0 for VF 2: IR %i.016 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ] (extra operand: vp<%bc.resume.val> from scalar.ph) |
| ; CHECK: Cost of 0 for VF 2: IR %arrayidx = getelementptr inbounds i16, ptr %s, i32 %i.016 |
| ; CHECK: Cost of 0 for VF 2: IR %1 = load i16, ptr %arrayidx, align 2 |
| ; CHECK: Cost of 0 for VF 2: IR %conv = sext i16 %1 to i32 |
| ; CHECK: Cost of 0 for VF 2: IR %cmp2 = icmp sgt i32 %conv, %conv1 |
| ; CHECK: Cost of 1 for VF 2: EMIT vp<%cmp.n> = icmp eq ir<%n>, vp<[[VP2]]> |
| ; CHECK: Cost of 0 for VF 2: EMIT branch-on-cond vp<%cmp.n> |
| ; CHECK: Cost for VF 2: 86 (Estimated cost per lane: 43) |
| ; CHECK: Cost of 1 for VF 4: induction instruction %inc = add nuw nsw i32 %i.016, 1 |
| ; CHECK: Cost of 0 for VF 4: induction instruction %i.016 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ] |
| ; CHECK: Cost of 0 for VF 4: vp<[[VP4]]> = SCALAR-STEPS vp<[[VP3]]>, ir<1>, vp<[[VP0]]> |
| ; CHECK: Cost of 0 for VF 4: CLONE ir<%arrayidx> = getelementptr inbounds ir<%s>, vp<[[VP4]]> |
| ; CHECK: Cost of 0 for VF 4: vp<[[VP5]]> = vector-pointer inbounds i16, ir<%arrayidx>, ir<1> |
| ; CHECK: Cost of 2 for VF 4: WIDEN ir<%1> = load vp<[[VP5]]> |
| ; CHECK: Cost of 0 for VF 4: WIDEN-CAST ir<%conv> = sext ir<%1> to i32 |
| ; CHECK: Cost of 2 for VF 4: WIDEN ir<%cmp2> = icmp sgt ir<%conv>, ir<%conv1> |
| ; CHECK: Cost of 2 for VF 4: WIDEN ir<%conv6> = add ir<%1>, ir<%0> |
| ; CHECK: Cost of 0 for VF 4: CLONE ir<%arrayidx7> = getelementptr ir<%d>, vp<[[VP4]]> |
| ; CHECK: Cost of 0 for VF 4: vp<[[VP6]]> = vector-pointer i16, ir<%arrayidx7>, ir<1> |
| ; CHECK: Cost of 2 for VF 4: WIDEN store vp<[[VP6]]>, ir<%conv6>, ir<%cmp2> |
| ; CHECK: Cost of 0 for VF 4: EMIT vp<%index.next> = add nuw vp<[[VP3]]>, vp<[[VP1]]> |
| ; CHECK: Cost of 1 for VF 4: EMIT branch-on-count vp<%index.next>, vp<[[VP2]]> |
| ; CHECK: Cost of 0 for VF 4: vector loop backedge |
| ; CHECK: Cost of 0 for VF 4: IR %conv1 = zext i16 %m to i32 |
| ; CHECK: Cost of 0 for VF 4: IR %0 = trunc i32 %n to i16 |
| ; CHECK: Cost of 0 for VF 4: EMIT-SCALAR vp<%bc.resume.val> = phi [ vp<[[VP2]]>, middle.block ], [ ir<0>, ir-bb<for.body.lr.ph> ] |
| ; CHECK: Cost of 0 for VF 4: IR %i.016 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ] (extra operand: vp<%bc.resume.val> from scalar.ph) |
| ; CHECK: Cost of 0 for VF 4: IR %arrayidx = getelementptr inbounds i16, ptr %s, i32 %i.016 |
| ; CHECK: Cost of 0 for VF 4: IR %1 = load i16, ptr %arrayidx, align 2 |
| ; CHECK: Cost of 0 for VF 4: IR %conv = sext i16 %1 to i32 |
| ; CHECK: Cost of 0 for VF 4: IR %cmp2 = icmp sgt i32 %conv, %conv1 |
| ; CHECK: Cost of 1 for VF 4: EMIT vp<%cmp.n> = icmp eq ir<%n>, vp<[[VP2]]> |
| ; CHECK: Cost of 0 for VF 4: EMIT branch-on-cond vp<%cmp.n> |
| ; CHECK: Cost for VF 4: 10 (Estimated cost per lane: 2.5) |
| ; CHECK: Cost of 1 for VF 8: induction instruction %inc = add nuw nsw i32 %i.016, 1 |
| ; CHECK: Cost of 0 for VF 8: induction instruction %i.016 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ] |
| ; CHECK: Cost of 0 for VF 8: vp<[[VP4]]> = SCALAR-STEPS vp<[[VP3]]>, ir<1>, vp<[[VP0]]> |
| ; CHECK: Cost of 0 for VF 8: CLONE ir<%arrayidx> = getelementptr inbounds ir<%s>, vp<[[VP4]]> |
| ; CHECK: Cost of 0 for VF 8: vp<[[VP5]]> = vector-pointer inbounds i16, ir<%arrayidx>, ir<1> |
| ; CHECK: Cost of 2 for VF 8: WIDEN ir<%1> = load vp<[[VP5]]> |
| ; CHECK: Cost of 2 for VF 8: WIDEN-CAST ir<%conv> = sext ir<%1> to i32 |
| ; CHECK: Cost of 36 for VF 8: WIDEN ir<%cmp2> = icmp sgt ir<%conv>, ir<%conv1> |
| ; CHECK: Cost of 2 for VF 8: WIDEN ir<%conv6> = add ir<%1>, ir<%0> |
| ; CHECK: Cost of 0 for VF 8: CLONE ir<%arrayidx7> = getelementptr ir<%d>, vp<[[VP4]]> |
| ; CHECK: Cost of 0 for VF 8: vp<[[VP6]]> = vector-pointer i16, ir<%arrayidx7>, ir<1> |
| ; CHECK: Cost of 2 for VF 8: WIDEN store vp<[[VP6]]>, ir<%conv6>, ir<%cmp2> |
| ; CHECK: Cost of 0 for VF 8: EMIT vp<%index.next> = add nuw vp<[[VP3]]>, vp<[[VP1]]> |
| ; CHECK: Cost of 1 for VF 8: EMIT branch-on-count vp<%index.next>, vp<[[VP2]]> |
| ; CHECK: Cost of 0 for VF 8: vector loop backedge |
| ; CHECK: Cost of 0 for VF 8: IR %conv1 = zext i16 %m to i32 |
| ; CHECK: Cost of 0 for VF 8: IR %0 = trunc i32 %n to i16 |
| ; CHECK: Cost of 0 for VF 8: EMIT-SCALAR vp<%bc.resume.val> = phi [ vp<[[VP2]]>, middle.block ], [ ir<0>, ir-bb<for.body.lr.ph> ] |
| ; CHECK: Cost of 0 for VF 8: IR %i.016 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ] (extra operand: vp<%bc.resume.val> from scalar.ph) |
| ; CHECK: Cost of 0 for VF 8: IR %arrayidx = getelementptr inbounds i16, ptr %s, i32 %i.016 |
| ; CHECK: Cost of 0 for VF 8: IR %1 = load i16, ptr %arrayidx, align 2 |
| ; CHECK: Cost of 0 for VF 8: IR %conv = sext i16 %1 to i32 |
| ; CHECK: Cost of 0 for VF 8: IR %cmp2 = icmp sgt i32 %conv, %conv1 |
| ; CHECK: Cost of 1 for VF 8: EMIT vp<%cmp.n> = icmp eq ir<%n>, vp<[[VP2]]> |
| ; CHECK: Cost of 0 for VF 8: EMIT branch-on-cond vp<%cmp.n> |
| ; CHECK: Cost for VF 8: 46 (Estimated cost per lane: 5.75) |
| ; CHECK: LV: Selecting VF: 4. |
| ; CHECK: Cost of 1 for VF 4: EMIT vp<%cmp.n> = icmp eq ir<%n>, vp<[[VP2]]> |
| ; CHECK: Cost of 0 for VF 4: EMIT branch-on-cond vp<%cmp.n> |
| ; |
| entry: |
| %cmp15 = icmp sgt i32 %n, 0 |
| br i1 %cmp15, label %for.body.lr.ph, label %for.cond.cleanup |
| |
| for.body.lr.ph: |
| %conv1 = zext i16 %m to i32 |
| %0 = trunc i32 %n to i16 |
| br label %for.body |
| |
| for.cond.cleanup: |
| ret void |
| |
| for.body: |
| %i.016 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ] |
| %arrayidx = getelementptr inbounds i16, ptr %s, i32 %i.016 |
| %1 = load i16, ptr %arrayidx, align 2 |
| %conv = sext i16 %1 to i32 |
| %cmp2 = icmp sgt i32 %conv, %conv1 |
| br i1 %cmp2, label %if.then, label %for.inc |
| |
| if.then: |
| %conv6 = add i16 %1, %0 |
| %arrayidx7 = getelementptr inbounds i16, ptr %d, i32 %i.016 |
| store i16 %conv6, ptr %arrayidx7, align 2 |
| br label %for.inc |
| |
| for.inc: |
| %inc = add nuw nsw i32 %i.016, 1 |
| %exitcond.not = icmp eq i32 %inc, %n |
| br i1 %exitcond.not, label %for.cond.cleanup, label %for.body |
| } |
| |
| define void @cheap_icmp(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, ptr nocapture %pDst, i32 %blockSize) #0 { |
| ; CHECK-LABEL: 'cheap_icmp' |
| ; CHECK: LV: Found an estimated cost of 0 for VF 1 For instruction: %blkCnt.012 = phi i32 [ %dec, %while.body ], [ %blockSize, %while.body.preheader ] |
| ; CHECK: LV: Found an estimated cost of 0 for VF 1 For instruction: %pSrcA.addr.011 = phi ptr [ %incdec.ptr, %while.body ], [ %pSrcA, %while.body.preheader ] |
| ; CHECK: LV: Found an estimated cost of 0 for VF 1 For instruction: %pDst.addr.010 = phi ptr [ %incdec.ptr5, %while.body ], [ %pDst, %while.body.preheader ] |
| ; CHECK: LV: Found an estimated cost of 0 for VF 1 For instruction: %pSrcB.addr.09 = phi ptr [ %incdec.ptr2, %while.body ], [ %pSrcB, %while.body.preheader ] |
| ; CHECK: LV: Found an estimated cost of 0 for VF 1 For instruction: %incdec.ptr = getelementptr inbounds i8, ptr %pSrcA.addr.011, i32 1 |
| ; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: %0 = load i8, ptr %pSrcA.addr.011, align 1 |
| ; CHECK: LV: Found an estimated cost of 0 for VF 1 For instruction: %conv1 = sext i8 %0 to i32 |
| ; CHECK: LV: Found an estimated cost of 0 for VF 1 For instruction: %incdec.ptr2 = getelementptr inbounds i8, ptr %pSrcB.addr.09, i32 1 |
| ; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: %1 = load i8, ptr %pSrcB.addr.09, align 1 |
| ; CHECK: LV: Found an estimated cost of 0 for VF 1 For instruction: %conv3 = sext i8 %1 to i32 |
| ; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: %mul = mul nsw i32 %conv3, %conv1 |
| ; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: %shr = ashr i32 %mul, 7 |
| ; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: %2 = icmp slt i32 %shr, 127 |
| ; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: %spec.select.i = select i1 %2, i32 %shr, i32 127 |
| ; CHECK: LV: Found an estimated cost of 0 for VF 1 For instruction: %conv4 = trunc i32 %spec.select.i to i8 |
| ; CHECK: LV: Found an estimated cost of 0 for VF 1 For instruction: %incdec.ptr5 = getelementptr inbounds i8, ptr %pDst.addr.010, i32 1 |
| ; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: store i8 %conv4, ptr %pDst.addr.010, align 1 |
| ; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: %dec = add i32 %blkCnt.012, -1 |
| ; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: %cmp.not = icmp eq i32 %dec, 0 |
| ; CHECK: LV: Found an estimated cost of 0 for VF 1 For instruction: br i1 %cmp.not, label %while.end.loopexit, label %while.body |
| ; CHECK: Cost of 1 for VF 2: induction instruction %dec = add i32 %blkCnt.012, -1 |
| ; CHECK: Cost of 0 for VF 2: induction instruction %blkCnt.012 = phi i32 [ %dec, %while.body ], [ %blockSize, %while.body.preheader ] |
| ; CHECK: Cost of 0 for VF 2: induction instruction %incdec.ptr = getelementptr inbounds i8, ptr %pSrcA.addr.011, i32 1 |
| ; CHECK: Cost of 0 for VF 2: induction instruction %pSrcA.addr.011 = phi ptr [ %incdec.ptr, %while.body ], [ %pSrcA, %while.body.preheader ] |
| ; CHECK: Cost of 0 for VF 2: induction instruction %incdec.ptr5 = getelementptr inbounds i8, ptr %pDst.addr.010, i32 1 |
| ; CHECK: Cost of 0 for VF 2: induction instruction %pDst.addr.010 = phi ptr [ %incdec.ptr5, %while.body ], [ %pDst, %while.body.preheader ] |
| ; CHECK: Cost of 0 for VF 2: induction instruction %incdec.ptr2 = getelementptr inbounds i8, ptr %pSrcB.addr.09, i32 1 |
| ; CHECK: Cost of 0 for VF 2: induction instruction %pSrcB.addr.09 = phi ptr [ %incdec.ptr2, %while.body ], [ %pSrcB, %while.body.preheader ] |
| ; CHECK: Cost of 0 for VF 2: vp<[[VP8:%[0-9]+]]> = SCALAR-STEPS vp<[[VP7:%[0-9]+]]>, ir<1>, vp<[[VP0:%[0-9]+]]> |
| ; CHECK: Cost of 0 for VF 2: EMIT vp<%next.gep> = ptradd ir<%pSrcA>, vp<[[VP8]]> |
| ; CHECK: Cost of 0 for VF 2: vp<[[VP9:%[0-9]+]]> = SCALAR-STEPS vp<[[VP7]]>, ir<1>, vp<[[VP0]]> |
| ; CHECK: Cost of 0 for VF 2: EMIT vp<%next.gep>.1 = ptradd ir<%pDst>, vp<[[VP9]]> |
| ; CHECK: Cost of 0 for VF 2: vp<[[VP10:%[0-9]+]]> = SCALAR-STEPS vp<[[VP7]]>, ir<1>, vp<[[VP0]]> |
| ; CHECK: Cost of 0 for VF 2: EMIT vp<%next.gep>.2 = ptradd ir<%pSrcB>, vp<[[VP10]]> |
| ; CHECK: Cost of 0 for VF 2: vp<[[VP11:%[0-9]+]]> = vector-pointer i8, vp<%next.gep>, ir<1> |
| ; CHECK: Cost of 18 for VF 2: WIDEN ir<%0> = load vp<[[VP11]]> |
| ; CHECK: Cost of 4 for VF 2: WIDEN-CAST ir<%conv1> = sext ir<%0> to i32 |
| ; CHECK: Cost of 0 for VF 2: vp<[[VP12:%[0-9]+]]> = vector-pointer i8, vp<%next.gep>.2, ir<1> |
| ; CHECK: Cost of 18 for VF 2: WIDEN ir<%1> = load vp<[[VP12]]> |
| ; CHECK: Cost of 4 for VF 2: WIDEN-CAST ir<%conv3> = sext ir<%1> to i32 |
| ; CHECK: Cost of 26 for VF 2: WIDEN ir<%mul> = mul nsw ir<%conv3>, ir<%conv1> |
| ; CHECK: Cost of 18 for VF 2: WIDEN ir<%shr> = ashr ir<%mul>, ir<7> |
| ; CHECK: Cost of 0 for VF 2: WIDEN ir<%2> = icmp slt ir<%shr>, ir<127> |
| ; CHECK: Cost of 22 for VF 2: WIDEN ir<%spec.select.i> = select ir<%2>, ir<%shr>, ir<127> |
| ; CHECK: Cost of 0 for VF 2: WIDEN-CAST ir<%conv4> = trunc ir<%spec.select.i> to i8 |
| ; CHECK: Cost of 0 for VF 2: vp<[[VP13:%[0-9]+]]> = vector-pointer i8, vp<%next.gep>.1, ir<1> |
| ; CHECK: Cost of 18 for VF 2: WIDEN store vp<[[VP13]]>, ir<%conv4> |
| ; CHECK: Cost of 0 for VF 2: EMIT vp<%index.next> = add nuw vp<[[VP7]]>, vp<[[VP1:%[0-9]+]]> |
| ; CHECK: Cost of 1 for VF 2: EMIT branch-on-count vp<%index.next>, vp<[[VP2:%[0-9]+]]> |
| ; CHECK: Cost of 0 for VF 2: vector loop backedge |
| ; CHECK: Cost of 0 for VF 2: EMIT-SCALAR vp<%bc.resume.val> = phi [ vp<[[VP3:%[0-9]+]]>, middle.block ], [ ir<%blockSize>, ir-bb<while.body.preheader> ] |
| ; CHECK: Cost of 0 for VF 2: EMIT-SCALAR vp<%bc.resume.val>.1 = phi [ vp<[[VP4:%[0-9]+]]>, middle.block ], [ ir<%pSrcA>, ir-bb<while.body.preheader> ] |
| ; CHECK: Cost of 0 for VF 2: EMIT-SCALAR vp<%bc.resume.val>.2 = phi [ vp<[[VP5:%[0-9]+]]>, middle.block ], [ ir<%pDst>, ir-bb<while.body.preheader> ] |
| ; CHECK: Cost of 0 for VF 2: EMIT-SCALAR vp<%bc.resume.val>.3 = phi [ vp<[[VP6:%[0-9]+]]>, middle.block ], [ ir<%pSrcB>, ir-bb<while.body.preheader> ] |
| ; CHECK: Cost of 0 for VF 2: IR %blkCnt.012 = phi i32 [ %dec, %while.body ], [ %blockSize, %while.body.preheader ] (extra operand: vp<%bc.resume.val> from scalar.ph) |
| ; CHECK: Cost of 0 for VF 2: IR %pSrcA.addr.011 = phi ptr [ %incdec.ptr, %while.body ], [ %pSrcA, %while.body.preheader ] (extra operand: vp<%bc.resume.val>.1 from scalar.ph) |
| ; CHECK: Cost of 0 for VF 2: IR %pDst.addr.010 = phi ptr [ %incdec.ptr5, %while.body ], [ %pDst, %while.body.preheader ] (extra operand: vp<%bc.resume.val>.2 from scalar.ph) |
| ; CHECK: Cost of 0 for VF 2: IR %pSrcB.addr.09 = phi ptr [ %incdec.ptr2, %while.body ], [ %pSrcB, %while.body.preheader ] (extra operand: vp<%bc.resume.val>.3 from scalar.ph) |
| ; CHECK: Cost of 0 for VF 2: IR %incdec.ptr = getelementptr inbounds i8, ptr %pSrcA.addr.011, i32 1 |
| ; CHECK: Cost of 0 for VF 2: IR %0 = load i8, ptr %pSrcA.addr.011, align 1 |
| ; CHECK: Cost of 0 for VF 2: IR %conv1 = sext i8 %0 to i32 |
| ; CHECK: Cost of 0 for VF 2: IR %incdec.ptr2 = getelementptr inbounds i8, ptr %pSrcB.addr.09, i32 1 |
| ; CHECK: Cost of 0 for VF 2: IR %1 = load i8, ptr %pSrcB.addr.09, align 1 |
| ; CHECK: Cost of 0 for VF 2: IR %conv3 = sext i8 %1 to i32 |
| ; CHECK: Cost of 0 for VF 2: IR %mul = mul nsw i32 %conv3, %conv1 |
| ; CHECK: Cost of 0 for VF 2: IR %shr = ashr i32 %mul, 7 |
| ; CHECK: Cost of 0 for VF 2: IR %2 = icmp slt i32 %shr, 127 |
| ; CHECK: Cost of 0 for VF 2: IR %spec.select.i = select i1 %2, i32 %shr, i32 127 |
| ; CHECK: Cost of 0 for VF 2: IR %conv4 = trunc i32 %spec.select.i to i8 |
| ; CHECK: Cost of 0 for VF 2: IR %incdec.ptr5 = getelementptr inbounds i8, ptr %pDst.addr.010, i32 1 |
| ; CHECK: Cost of 0 for VF 2: IR store i8 %conv4, ptr %pDst.addr.010, align 1 |
| ; CHECK: Cost of 0 for VF 2: IR %dec = add i32 %blkCnt.012, -1 |
| ; CHECK: Cost of 0 for VF 2: IR %cmp.not = icmp eq i32 %dec, 0 |
| ; CHECK: Cost of 1 for VF 2: vp<[[VP3]]> = DERIVED-IV ir<%blockSize> + vp<[[VP2]]> * ir<-1> |
| ; CHECK: Cost of 0 for VF 2: vp<[[VP4]]> = DERIVED-IV ir<%pSrcA> + vp<[[VP2]]> * ir<1> |
| ; CHECK: Cost of 0 for VF 2: vp<[[VP5]]> = DERIVED-IV ir<%pDst> + vp<[[VP2]]> * ir<1> |
| ; CHECK: Cost of 0 for VF 2: vp<[[VP6]]> = DERIVED-IV ir<%pSrcB> + vp<[[VP2]]> * ir<1> |
| ; CHECK: Cost of 1 for VF 2: EMIT vp<%cmp.n> = icmp eq ir<%blockSize>, vp<[[VP2]]> |
| ; CHECK: Cost of 0 for VF 2: EMIT branch-on-cond vp<%cmp.n> |
| ; CHECK: Cost for VF 2: 130 (Estimated cost per lane: 65) |
| ; CHECK: Cost of 1 for VF 4: induction instruction %dec = add i32 %blkCnt.012, -1 |
| ; CHECK: Cost of 0 for VF 4: induction instruction %blkCnt.012 = phi i32 [ %dec, %while.body ], [ %blockSize, %while.body.preheader ] |
| ; CHECK: Cost of 0 for VF 4: induction instruction %incdec.ptr = getelementptr inbounds i8, ptr %pSrcA.addr.011, i32 1 |
| ; CHECK: Cost of 0 for VF 4: induction instruction %pSrcA.addr.011 = phi ptr [ %incdec.ptr, %while.body ], [ %pSrcA, %while.body.preheader ] |
| ; CHECK: Cost of 0 for VF 4: induction instruction %incdec.ptr5 = getelementptr inbounds i8, ptr %pDst.addr.010, i32 1 |
| ; CHECK: Cost of 0 for VF 4: induction instruction %pDst.addr.010 = phi ptr [ %incdec.ptr5, %while.body ], [ %pDst, %while.body.preheader ] |
| ; CHECK: Cost of 0 for VF 4: induction instruction %incdec.ptr2 = getelementptr inbounds i8, ptr %pSrcB.addr.09, i32 1 |
| ; CHECK: Cost of 0 for VF 4: induction instruction %pSrcB.addr.09 = phi ptr [ %incdec.ptr2, %while.body ], [ %pSrcB, %while.body.preheader ] |
| ; CHECK: Cost of 0 for VF 4: vp<[[VP8]]> = SCALAR-STEPS vp<[[VP7]]>, ir<1>, vp<[[VP0]]> |
| ; CHECK: Cost of 0 for VF 4: EMIT vp<%next.gep> = ptradd ir<%pSrcA>, vp<[[VP8]]> |
| ; CHECK: Cost of 0 for VF 4: vp<[[VP9]]> = SCALAR-STEPS vp<[[VP7]]>, ir<1>, vp<[[VP0]]> |
| ; CHECK: Cost of 0 for VF 4: EMIT vp<%next.gep>.1 = ptradd ir<%pDst>, vp<[[VP9]]> |
| ; CHECK: Cost of 0 for VF 4: vp<[[VP10]]> = SCALAR-STEPS vp<[[VP7]]>, ir<1>, vp<[[VP0]]> |
| ; CHECK: Cost of 0 for VF 4: EMIT vp<%next.gep>.2 = ptradd ir<%pSrcB>, vp<[[VP10]]> |
| ; CHECK: Cost of 0 for VF 4: vp<[[VP11]]> = vector-pointer i8, vp<%next.gep>, ir<1> |
| ; CHECK: Cost of 2 for VF 4: WIDEN ir<%0> = load vp<[[VP11]]> |
| ; CHECK: Cost of 0 for VF 4: WIDEN-CAST ir<%conv1> = sext ir<%0> to i32 |
| ; CHECK: Cost of 0 for VF 4: vp<[[VP12]]> = vector-pointer i8, vp<%next.gep>.2, ir<1> |
| ; CHECK: Cost of 2 for VF 4: WIDEN ir<%1> = load vp<[[VP12]]> |
| ; CHECK: Cost of 0 for VF 4: WIDEN-CAST ir<%conv3> = sext ir<%1> to i32 |
| ; CHECK: Cost of 2 for VF 4: WIDEN ir<%mul> = mul nsw ir<%conv3>, ir<%conv1> |
| ; CHECK: Cost of 2 for VF 4: WIDEN ir<%shr> = ashr ir<%mul>, ir<7> |
| ; CHECK: Cost of 0 for VF 4: WIDEN ir<%2> = icmp slt ir<%shr>, ir<127> |
| ; CHECK: Cost of 2 for VF 4: WIDEN ir<%spec.select.i> = select ir<%2>, ir<%shr>, ir<127> |
| ; CHECK: Cost of 0 for VF 4: WIDEN-CAST ir<%conv4> = trunc ir<%spec.select.i> to i8 |
| ; CHECK: Cost of 0 for VF 4: vp<[[VP13]]> = vector-pointer i8, vp<%next.gep>.1, ir<1> |
| ; CHECK: Cost of 2 for VF 4: WIDEN store vp<[[VP13]]>, ir<%conv4> |
| ; CHECK: Cost of 0 for VF 4: EMIT vp<%index.next> = add nuw vp<[[VP7]]>, vp<[[VP1]]> |
| ; CHECK: Cost of 1 for VF 4: EMIT branch-on-count vp<%index.next>, vp<[[VP2]]> |
| ; CHECK: Cost of 0 for VF 4: vector loop backedge |
| ; CHECK: Cost of 0 for VF 4: EMIT-SCALAR vp<%bc.resume.val> = phi [ vp<[[VP3]]>, middle.block ], [ ir<%blockSize>, ir-bb<while.body.preheader> ] |
| ; CHECK: Cost of 0 for VF 4: EMIT-SCALAR vp<%bc.resume.val>.1 = phi [ vp<[[VP4]]>, middle.block ], [ ir<%pSrcA>, ir-bb<while.body.preheader> ] |
| ; CHECK: Cost of 0 for VF 4: EMIT-SCALAR vp<%bc.resume.val>.2 = phi [ vp<[[VP5]]>, middle.block ], [ ir<%pDst>, ir-bb<while.body.preheader> ] |
| ; CHECK: Cost of 0 for VF 4: EMIT-SCALAR vp<%bc.resume.val>.3 = phi [ vp<[[VP6]]>, middle.block ], [ ir<%pSrcB>, ir-bb<while.body.preheader> ] |
| ; CHECK: Cost of 0 for VF 4: IR %blkCnt.012 = phi i32 [ %dec, %while.body ], [ %blockSize, %while.body.preheader ] (extra operand: vp<%bc.resume.val> from scalar.ph) |
| ; CHECK: Cost of 0 for VF 4: IR %pSrcA.addr.011 = phi ptr [ %incdec.ptr, %while.body ], [ %pSrcA, %while.body.preheader ] (extra operand: vp<%bc.resume.val>.1 from scalar.ph) |
| ; CHECK: Cost of 0 for VF 4: IR %pDst.addr.010 = phi ptr [ %incdec.ptr5, %while.body ], [ %pDst, %while.body.preheader ] (extra operand: vp<%bc.resume.val>.2 from scalar.ph) |
| ; CHECK: Cost of 0 for VF 4: IR %pSrcB.addr.09 = phi ptr [ %incdec.ptr2, %while.body ], [ %pSrcB, %while.body.preheader ] (extra operand: vp<%bc.resume.val>.3 from scalar.ph) |
| ; CHECK: Cost of 0 for VF 4: IR %incdec.ptr = getelementptr inbounds i8, ptr %pSrcA.addr.011, i32 1 |
| ; CHECK: Cost of 0 for VF 4: IR %0 = load i8, ptr %pSrcA.addr.011, align 1 |
| ; CHECK: Cost of 0 for VF 4: IR %conv1 = sext i8 %0 to i32 |
| ; CHECK: Cost of 0 for VF 4: IR %incdec.ptr2 = getelementptr inbounds i8, ptr %pSrcB.addr.09, i32 1 |
| ; CHECK: Cost of 0 for VF 4: IR %1 = load i8, ptr %pSrcB.addr.09, align 1 |
| ; CHECK: Cost of 0 for VF 4: IR %conv3 = sext i8 %1 to i32 |
| ; CHECK: Cost of 0 for VF 4: IR %mul = mul nsw i32 %conv3, %conv1 |
| ; CHECK: Cost of 0 for VF 4: IR %shr = ashr i32 %mul, 7 |
| ; CHECK: Cost of 0 for VF 4: IR %2 = icmp slt i32 %shr, 127 |
| ; CHECK: Cost of 0 for VF 4: IR %spec.select.i = select i1 %2, i32 %shr, i32 127 |
| ; CHECK: Cost of 0 for VF 4: IR %conv4 = trunc i32 %spec.select.i to i8 |
| ; CHECK: Cost of 0 for VF 4: IR %incdec.ptr5 = getelementptr inbounds i8, ptr %pDst.addr.010, i32 1 |
| ; CHECK: Cost of 0 for VF 4: IR store i8 %conv4, ptr %pDst.addr.010, align 1 |
| ; CHECK: Cost of 0 for VF 4: IR %dec = add i32 %blkCnt.012, -1 |
| ; CHECK: Cost of 0 for VF 4: IR %cmp.not = icmp eq i32 %dec, 0 |
| ; CHECK: Cost of 1 for VF 4: vp<[[VP3]]> = DERIVED-IV ir<%blockSize> + vp<[[VP2]]> * ir<-1> |
| ; CHECK: Cost of 0 for VF 4: vp<[[VP4]]> = DERIVED-IV ir<%pSrcA> + vp<[[VP2]]> * ir<1> |
| ; CHECK: Cost of 0 for VF 4: vp<[[VP5]]> = DERIVED-IV ir<%pDst> + vp<[[VP2]]> * ir<1> |
| ; CHECK: Cost of 0 for VF 4: vp<[[VP6]]> = DERIVED-IV ir<%pSrcB> + vp<[[VP2]]> * ir<1> |
| ; CHECK: Cost of 1 for VF 4: EMIT vp<%cmp.n> = icmp eq ir<%blockSize>, vp<[[VP2]]> |
| ; CHECK: Cost of 0 for VF 4: EMIT branch-on-cond vp<%cmp.n> |
| ; CHECK: Cost for VF 4: 14 (Estimated cost per lane: 3.5) |
| ; CHECK: Cost of 1 for VF 8: induction instruction %dec = add i32 %blkCnt.012, -1 |
| ; CHECK: Cost of 0 for VF 8: induction instruction %blkCnt.012 = phi i32 [ %dec, %while.body ], [ %blockSize, %while.body.preheader ] |
| ; CHECK: Cost of 0 for VF 8: induction instruction %incdec.ptr = getelementptr inbounds i8, ptr %pSrcA.addr.011, i32 1 |
| ; CHECK: Cost of 0 for VF 8: induction instruction %pSrcA.addr.011 = phi ptr [ %incdec.ptr, %while.body ], [ %pSrcA, %while.body.preheader ] |
| ; CHECK: Cost of 0 for VF 8: induction instruction %incdec.ptr5 = getelementptr inbounds i8, ptr %pDst.addr.010, i32 1 |
| ; CHECK: Cost of 0 for VF 8: induction instruction %pDst.addr.010 = phi ptr [ %incdec.ptr5, %while.body ], [ %pDst, %while.body.preheader ] |
| ; CHECK: Cost of 0 for VF 8: induction instruction %incdec.ptr2 = getelementptr inbounds i8, ptr %pSrcB.addr.09, i32 1 |
| ; CHECK: Cost of 0 for VF 8: induction instruction %pSrcB.addr.09 = phi ptr [ %incdec.ptr2, %while.body ], [ %pSrcB, %while.body.preheader ] |
| ; CHECK: Cost of 0 for VF 8: vp<[[VP8]]> = SCALAR-STEPS vp<[[VP7]]>, ir<1>, vp<[[VP0]]> |
| ; CHECK: Cost of 0 for VF 8: EMIT vp<%next.gep> = ptradd ir<%pSrcA>, vp<[[VP8]]> |
| ; CHECK: Cost of 0 for VF 8: vp<[[VP9]]> = SCALAR-STEPS vp<[[VP7]]>, ir<1>, vp<[[VP0]]> |
| ; CHECK: Cost of 0 for VF 8: EMIT vp<%next.gep>.1 = ptradd ir<%pDst>, vp<[[VP9]]> |
| ; CHECK: Cost of 0 for VF 8: vp<[[VP10]]> = SCALAR-STEPS vp<[[VP7]]>, ir<1>, vp<[[VP0]]> |
| ; CHECK: Cost of 0 for VF 8: EMIT vp<%next.gep>.2 = ptradd ir<%pSrcB>, vp<[[VP10]]> |
| ; CHECK: Cost of 0 for VF 8: vp<[[VP11]]> = vector-pointer i8, vp<%next.gep>, ir<1> |
| ; CHECK: Cost of 2 for VF 8: WIDEN ir<%0> = load vp<[[VP11]]> |
| ; CHECK: Cost of 2 for VF 8: WIDEN-CAST ir<%conv1> = sext ir<%0> to i32 |
| ; CHECK: Cost of 0 for VF 8: vp<[[VP12]]> = vector-pointer i8, vp<%next.gep>.2, ir<1> |
| ; CHECK: Cost of 2 for VF 8: WIDEN ir<%1> = load vp<[[VP12]]> |
| ; CHECK: Cost of 2 for VF 8: WIDEN-CAST ir<%conv3> = sext ir<%1> to i32 |
| ; CHECK: Cost of 4 for VF 8: WIDEN ir<%mul> = mul nsw ir<%conv3>, ir<%conv1> |
| ; CHECK: Cost of 4 for VF 8: WIDEN ir<%shr> = ashr ir<%mul>, ir<7> |
| ; CHECK: Cost of 0 for VF 8: WIDEN ir<%2> = icmp slt ir<%shr>, ir<127> |
| ; CHECK: Cost of 4 for VF 8: WIDEN ir<%spec.select.i> = select ir<%2>, ir<%shr>, ir<127> |
| ; CHECK: Cost of 2 for VF 8: WIDEN-CAST ir<%conv4> = trunc ir<%spec.select.i> to i8 |
| ; CHECK: Cost of 0 for VF 8: vp<[[VP13]]> = vector-pointer i8, vp<%next.gep>.1, ir<1> |
| ; CHECK: Cost of 2 for VF 8: WIDEN store vp<[[VP13]]>, ir<%conv4> |
| ; CHECK: Cost of 0 for VF 8: EMIT vp<%index.next> = add nuw vp<[[VP7]]>, vp<[[VP1]]> |
| ; CHECK: Cost of 1 for VF 8: EMIT branch-on-count vp<%index.next>, vp<[[VP2]]> |
| ; CHECK: Cost of 0 for VF 8: vector loop backedge |
| ; CHECK: Cost of 0 for VF 8: EMIT-SCALAR vp<%bc.resume.val> = phi [ vp<[[VP3]]>, middle.block ], [ ir<%blockSize>, ir-bb<while.body.preheader> ] |
| ; CHECK: Cost of 0 for VF 8: EMIT-SCALAR vp<%bc.resume.val>.1 = phi [ vp<[[VP4]]>, middle.block ], [ ir<%pSrcA>, ir-bb<while.body.preheader> ] |
| ; CHECK: Cost of 0 for VF 8: EMIT-SCALAR vp<%bc.resume.val>.2 = phi [ vp<[[VP5]]>, middle.block ], [ ir<%pDst>, ir-bb<while.body.preheader> ] |
| ; CHECK: Cost of 0 for VF 8: EMIT-SCALAR vp<%bc.resume.val>.3 = phi [ vp<[[VP6]]>, middle.block ], [ ir<%pSrcB>, ir-bb<while.body.preheader> ] |
| ; CHECK: Cost of 0 for VF 8: IR %blkCnt.012 = phi i32 [ %dec, %while.body ], [ %blockSize, %while.body.preheader ] (extra operand: vp<%bc.resume.val> from scalar.ph) |
| ; CHECK: Cost of 0 for VF 8: IR %pSrcA.addr.011 = phi ptr [ %incdec.ptr, %while.body ], [ %pSrcA, %while.body.preheader ] (extra operand: vp<%bc.resume.val>.1 from scalar.ph) |
| ; CHECK: Cost of 0 for VF 8: IR %pDst.addr.010 = phi ptr [ %incdec.ptr5, %while.body ], [ %pDst, %while.body.preheader ] (extra operand: vp<%bc.resume.val>.2 from scalar.ph) |
| ; CHECK: Cost of 0 for VF 8: IR %pSrcB.addr.09 = phi ptr [ %incdec.ptr2, %while.body ], [ %pSrcB, %while.body.preheader ] (extra operand: vp<%bc.resume.val>.3 from scalar.ph) |
| ; CHECK: Cost of 0 for VF 8: IR %incdec.ptr = getelementptr inbounds i8, ptr %pSrcA.addr.011, i32 1 |
| ; CHECK: Cost of 0 for VF 8: IR %0 = load i8, ptr %pSrcA.addr.011, align 1 |
| ; CHECK: Cost of 0 for VF 8: IR %conv1 = sext i8 %0 to i32 |
| ; CHECK: Cost of 0 for VF 8: IR %incdec.ptr2 = getelementptr inbounds i8, ptr %pSrcB.addr.09, i32 1 |
| ; CHECK: Cost of 0 for VF 8: IR %1 = load i8, ptr %pSrcB.addr.09, align 1 |
| ; CHECK: Cost of 0 for VF 8: IR %conv3 = sext i8 %1 to i32 |
| ; CHECK: Cost of 0 for VF 8: IR %mul = mul nsw i32 %conv3, %conv1 |
| ; CHECK: Cost of 0 for VF 8: IR %shr = ashr i32 %mul, 7 |
| ; CHECK: Cost of 0 for VF 8: IR %2 = icmp slt i32 %shr, 127 |
| ; CHECK: Cost of 0 for VF 8: IR %spec.select.i = select i1 %2, i32 %shr, i32 127 |
| ; CHECK: Cost of 0 for VF 8: IR %conv4 = trunc i32 %spec.select.i to i8 |
| ; CHECK: Cost of 0 for VF 8: IR %incdec.ptr5 = getelementptr inbounds i8, ptr %pDst.addr.010, i32 1 |
| ; CHECK: Cost of 0 for VF 8: IR store i8 %conv4, ptr %pDst.addr.010, align 1 |
| ; CHECK: Cost of 0 for VF 8: IR %dec = add i32 %blkCnt.012, -1 |
| ; CHECK: Cost of 0 for VF 8: IR %cmp.not = icmp eq i32 %dec, 0 |
| ; CHECK: Cost of 1 for VF 8: vp<[[VP3]]> = DERIVED-IV ir<%blockSize> + vp<[[VP2]]> * ir<-1> |
| ; CHECK: Cost of 0 for VF 8: vp<[[VP4]]> = DERIVED-IV ir<%pSrcA> + vp<[[VP2]]> * ir<1> |
| ; CHECK: Cost of 0 for VF 8: vp<[[VP5]]> = DERIVED-IV ir<%pDst> + vp<[[VP2]]> * ir<1> |
| ; CHECK: Cost of 0 for VF 8: vp<[[VP6]]> = DERIVED-IV ir<%pSrcB> + vp<[[VP2]]> * ir<1> |
| ; CHECK: Cost of 1 for VF 8: EMIT vp<%cmp.n> = icmp eq ir<%blockSize>, vp<[[VP2]]> |
| ; CHECK: Cost of 0 for VF 8: EMIT branch-on-cond vp<%cmp.n> |
| ; CHECK: Cost for VF 8: 26 (Estimated cost per lane: 3.25) |
| ; CHECK: Cost of 1 for VF 16: induction instruction %dec = add i32 %blkCnt.012, -1 |
| ; CHECK: Cost of 0 for VF 16: induction instruction %blkCnt.012 = phi i32 [ %dec, %while.body ], [ %blockSize, %while.body.preheader ] |
| ; CHECK: Cost of 0 for VF 16: induction instruction %incdec.ptr = getelementptr inbounds i8, ptr %pSrcA.addr.011, i32 1 |
| ; CHECK: Cost of 0 for VF 16: induction instruction %pSrcA.addr.011 = phi ptr [ %incdec.ptr, %while.body ], [ %pSrcA, %while.body.preheader ] |
| ; CHECK: Cost of 0 for VF 16: induction instruction %incdec.ptr5 = getelementptr inbounds i8, ptr %pDst.addr.010, i32 1 |
| ; CHECK: Cost of 0 for VF 16: induction instruction %pDst.addr.010 = phi ptr [ %incdec.ptr5, %while.body ], [ %pDst, %while.body.preheader ] |
| ; CHECK: Cost of 0 for VF 16: induction instruction %incdec.ptr2 = getelementptr inbounds i8, ptr %pSrcB.addr.09, i32 1 |
| ; CHECK: Cost of 0 for VF 16: induction instruction %pSrcB.addr.09 = phi ptr [ %incdec.ptr2, %while.body ], [ %pSrcB, %while.body.preheader ] |
| ; CHECK: Cost of 0 for VF 16: vp<[[VP8]]> = SCALAR-STEPS vp<[[VP7]]>, ir<1>, vp<[[VP0]]> |
| ; CHECK: Cost of 0 for VF 16: EMIT vp<%next.gep> = ptradd ir<%pSrcA>, vp<[[VP8]]> |
| ; CHECK: Cost of 0 for VF 16: vp<[[VP9]]> = SCALAR-STEPS vp<[[VP7]]>, ir<1>, vp<[[VP0]]> |
| ; CHECK: Cost of 0 for VF 16: EMIT vp<%next.gep>.1 = ptradd ir<%pDst>, vp<[[VP9]]> |
| ; CHECK: Cost of 0 for VF 16: vp<[[VP10]]> = SCALAR-STEPS vp<[[VP7]]>, ir<1>, vp<[[VP0]]> |
| ; CHECK: Cost of 0 for VF 16: EMIT vp<%next.gep>.2 = ptradd ir<%pSrcB>, vp<[[VP10]]> |
| ; CHECK: Cost of 0 for VF 16: vp<[[VP11]]> = vector-pointer i8, vp<%next.gep>, ir<1> |
| ; CHECK: Cost of 2 for VF 16: WIDEN ir<%0> = load vp<[[VP11]]> |
| ; CHECK: Cost of 6 for VF 16: WIDEN-CAST ir<%conv1> = sext ir<%0> to i32 |
| ; CHECK: Cost of 0 for VF 16: vp<[[VP12]]> = vector-pointer i8, vp<%next.gep>.2, ir<1> |
| ; CHECK: Cost of 2 for VF 16: WIDEN ir<%1> = load vp<[[VP12]]> |
| ; CHECK: Cost of 6 for VF 16: WIDEN-CAST ir<%conv3> = sext ir<%1> to i32 |
| ; CHECK: Cost of 8 for VF 16: WIDEN ir<%mul> = mul nsw ir<%conv3>, ir<%conv1> |
| ; CHECK: Cost of 8 for VF 16: WIDEN ir<%shr> = ashr ir<%mul>, ir<7> |
| ; CHECK: Cost of 0 for VF 16: WIDEN ir<%2> = icmp slt ir<%shr>, ir<127> |
| ; CHECK: Cost of 8 for VF 16: WIDEN ir<%spec.select.i> = select ir<%2>, ir<%shr>, ir<127> |
| ; CHECK: Cost of 6 for VF 16: WIDEN-CAST ir<%conv4> = trunc ir<%spec.select.i> to i8 |
| ; CHECK: Cost of 0 for VF 16: vp<[[VP13]]> = vector-pointer i8, vp<%next.gep>.1, ir<1> |
| ; CHECK: Cost of 2 for VF 16: WIDEN store vp<[[VP13]]>, ir<%conv4> |
| ; CHECK: Cost of 0 for VF 16: EMIT vp<%index.next> = add nuw vp<[[VP7]]>, vp<[[VP1]]> |
| ; CHECK: Cost of 1 for VF 16: EMIT branch-on-count vp<%index.next>, vp<[[VP2]]> |
| ; CHECK: Cost of 0 for VF 16: vector loop backedge |
| ; CHECK: Cost of 0 for VF 16: EMIT-SCALAR vp<%bc.resume.val> = phi [ vp<[[VP3]]>, middle.block ], [ ir<%blockSize>, ir-bb<while.body.preheader> ] |
| ; CHECK: Cost of 0 for VF 16: EMIT-SCALAR vp<%bc.resume.val>.1 = phi [ vp<[[VP4]]>, middle.block ], [ ir<%pSrcA>, ir-bb<while.body.preheader> ] |
| ; CHECK: Cost of 0 for VF 16: EMIT-SCALAR vp<%bc.resume.val>.2 = phi [ vp<[[VP5]]>, middle.block ], [ ir<%pDst>, ir-bb<while.body.preheader> ] |
| ; CHECK: Cost of 0 for VF 16: EMIT-SCALAR vp<%bc.resume.val>.3 = phi [ vp<[[VP6]]>, middle.block ], [ ir<%pSrcB>, ir-bb<while.body.preheader> ] |
| ; CHECK: Cost of 0 for VF 16: IR %blkCnt.012 = phi i32 [ %dec, %while.body ], [ %blockSize, %while.body.preheader ] (extra operand: vp<%bc.resume.val> from scalar.ph) |
| ; CHECK: Cost of 0 for VF 16: IR %pSrcA.addr.011 = phi ptr [ %incdec.ptr, %while.body ], [ %pSrcA, %while.body.preheader ] (extra operand: vp<%bc.resume.val>.1 from scalar.ph) |
| ; CHECK: Cost of 0 for VF 16: IR %pDst.addr.010 = phi ptr [ %incdec.ptr5, %while.body ], [ %pDst, %while.body.preheader ] (extra operand: vp<%bc.resume.val>.2 from scalar.ph) |
| ; CHECK: Cost of 0 for VF 16: IR %pSrcB.addr.09 = phi ptr [ %incdec.ptr2, %while.body ], [ %pSrcB, %while.body.preheader ] (extra operand: vp<%bc.resume.val>.3 from scalar.ph) |
| ; CHECK: Cost of 0 for VF 16: IR %incdec.ptr = getelementptr inbounds i8, ptr %pSrcA.addr.011, i32 1 |
| ; CHECK: Cost of 0 for VF 16: IR %0 = load i8, ptr %pSrcA.addr.011, align 1 |
| ; CHECK: Cost of 0 for VF 16: IR %conv1 = sext i8 %0 to i32 |
| ; CHECK: Cost of 0 for VF 16: IR %incdec.ptr2 = getelementptr inbounds i8, ptr %pSrcB.addr.09, i32 1 |
| ; CHECK: Cost of 0 for VF 16: IR %1 = load i8, ptr %pSrcB.addr.09, align 1 |
| ; CHECK: Cost of 0 for VF 16: IR %conv3 = sext i8 %1 to i32 |
| ; CHECK: Cost of 0 for VF 16: IR %mul = mul nsw i32 %conv3, %conv1 |
| ; CHECK: Cost of 0 for VF 16: IR %shr = ashr i32 %mul, 7 |
| ; CHECK: Cost of 0 for VF 16: IR %2 = icmp slt i32 %shr, 127 |
| ; CHECK: Cost of 0 for VF 16: IR %spec.select.i = select i1 %2, i32 %shr, i32 127 |
| ; CHECK: Cost of 0 for VF 16: IR %conv4 = trunc i32 %spec.select.i to i8 |
| ; CHECK: Cost of 0 for VF 16: IR %incdec.ptr5 = getelementptr inbounds i8, ptr %pDst.addr.010, i32 1 |
| ; CHECK: Cost of 0 for VF 16: IR store i8 %conv4, ptr %pDst.addr.010, align 1 |
| ; CHECK: Cost of 0 for VF 16: IR %dec = add i32 %blkCnt.012, -1 |
| ; CHECK: Cost of 0 for VF 16: IR %cmp.not = icmp eq i32 %dec, 0 |
| ; CHECK: Cost of 1 for VF 16: vp<[[VP3]]> = DERIVED-IV ir<%blockSize> + vp<[[VP2]]> * ir<-1> |
| ; CHECK: Cost of 0 for VF 16: vp<[[VP4]]> = DERIVED-IV ir<%pSrcA> + vp<[[VP2]]> * ir<1> |
| ; CHECK: Cost of 0 for VF 16: vp<[[VP5]]> = DERIVED-IV ir<%pDst> + vp<[[VP2]]> * ir<1> |
| ; CHECK: Cost of 0 for VF 16: vp<[[VP6]]> = DERIVED-IV ir<%pSrcB> + vp<[[VP2]]> * ir<1> |
| ; CHECK: Cost of 1 for VF 16: EMIT vp<%cmp.n> = icmp eq ir<%blockSize>, vp<[[VP2]]> |
| ; CHECK: Cost of 0 for VF 16: EMIT branch-on-cond vp<%cmp.n> |
| ; CHECK: Cost for VF 16: 50 (Estimated cost per lane: 3.13) |
| ; CHECK: LV: Selecting VF: 16. |
| ; CHECK: Cost of 1 for VF 16: EMIT vp<%cmp.n> = icmp eq ir<%blockSize>, vp<[[VP2]]> |
| ; CHECK: Cost of 0 for VF 16: EMIT branch-on-cond vp<%cmp.n> |
| ; |
| entry: |
| %cmp.not8 = icmp eq i32 %blockSize, 0 |
| br i1 %cmp.not8, label %while.end, label %while.body.preheader |
| |
| while.body.preheader: |
| br label %while.body |
| |
| while.body: |
| %blkCnt.012 = phi i32 [ %dec, %while.body ], [ %blockSize, %while.body.preheader ] |
| %pSrcA.addr.011 = phi ptr [ %incdec.ptr, %while.body ], [ %pSrcA, %while.body.preheader ] |
| %pDst.addr.010 = phi ptr [ %incdec.ptr5, %while.body ], [ %pDst, %while.body.preheader ] |
| %pSrcB.addr.09 = phi ptr [ %incdec.ptr2, %while.body ], [ %pSrcB, %while.body.preheader ] |
| %incdec.ptr = getelementptr inbounds i8, ptr %pSrcA.addr.011, i32 1 |
| %0 = load i8, ptr %pSrcA.addr.011, align 1 |
| %conv1 = sext i8 %0 to i32 |
| %incdec.ptr2 = getelementptr inbounds i8, ptr %pSrcB.addr.09, i32 1 |
| %1 = load i8, ptr %pSrcB.addr.09, align 1 |
| %conv3 = sext i8 %1 to i32 |
| %mul = mul nsw i32 %conv3, %conv1 |
| %shr = ashr i32 %mul, 7 |
| %2 = icmp slt i32 %shr, 127 |
| %spec.select.i = select i1 %2, i32 %shr, i32 127 |
| %conv4 = trunc i32 %spec.select.i to i8 |
| %incdec.ptr5 = getelementptr inbounds i8, ptr %pDst.addr.010, i32 1 |
| store i8 %conv4, ptr %pDst.addr.010, align 1 |
| %dec = add i32 %blkCnt.012, -1 |
| %cmp.not = icmp eq i32 %dec, 0 |
| br i1 %cmp.not, label %while.end.loopexit, label %while.body |
| |
| while.end.loopexit: |
| br label %while.end |
| |
| while.end: |
| ret void |
| } |
| |
| define void @floatcmp(ptr nocapture readonly %pSrc, ptr nocapture %pDst, i32 %blockSize) #0 { |
| ; CHECK-LABEL: 'floatcmp' |
| ; CHECK: LV: Found an estimated cost of 0 for VF 1 For instruction: %pSrc.addr.010 = phi ptr [ %incdec.ptr2, %while.body ], [ %pSrc, %while.body.preheader ] |
| ; CHECK: LV: Found an estimated cost of 0 for VF 1 For instruction: %blockSize.addr.09 = phi i32 [ %dec, %while.body ], [ %blockSize, %while.body.preheader ] |
| ; CHECK: LV: Found an estimated cost of 0 for VF 1 For instruction: %pDst.addr.08 = phi ptr [ %incdec.ptr, %while.body ], [ %pDst, %while.body.preheader ] |
| ; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: %0 = load float, ptr %pSrc.addr.010, align 4 |
| ; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: %cmp1 = fcmp nnan ninf nsz olt float %0, 0.000000e+00 |
| ; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: %cond = select nnan ninf nsz i1 %cmp1, float 1.000000e+01, float %0 |
| ; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: %conv = fptosi float %cond to i32 |
| ; CHECK: LV: Found an estimated cost of 0 for VF 1 For instruction: %incdec.ptr = getelementptr inbounds i32, ptr %pDst.addr.08, i32 1 |
| ; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: store i32 %conv, ptr %pDst.addr.08, align 4 |
| ; CHECK: LV: Found an estimated cost of 0 for VF 1 For instruction: %incdec.ptr2 = getelementptr inbounds float, ptr %pSrc.addr.010, i32 1 |
| ; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: %dec = add i32 %blockSize.addr.09, -1 |
| ; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: %cmp.not = icmp eq i32 %dec, 0 |
| ; CHECK: LV: Found an estimated cost of 0 for VF 1 For instruction: br i1 %cmp.not, label %while.end.loopexit, label %while.body |
| ; CHECK: Cost of 0 for VF 2: induction instruction %incdec.ptr2 = getelementptr inbounds float, ptr %pSrc.addr.010, i32 1 |
| ; CHECK: Cost of 0 for VF 2: induction instruction %pSrc.addr.010 = phi ptr [ %incdec.ptr2, %while.body ], [ %pSrc, %while.body.preheader ] |
| ; CHECK: Cost of 1 for VF 2: induction instruction %dec = add i32 %blockSize.addr.09, -1 |
| ; CHECK: Cost of 0 for VF 2: induction instruction %blockSize.addr.09 = phi i32 [ %dec, %while.body ], [ %blockSize, %while.body.preheader ] |
| ; CHECK: Cost of 0 for VF 2: induction instruction %incdec.ptr = getelementptr inbounds i32, ptr %pDst.addr.08, i32 1 |
| ; CHECK: Cost of 0 for VF 2: induction instruction %pDst.addr.08 = phi ptr [ %incdec.ptr, %while.body ], [ %pDst, %while.body.preheader ] |
| ; CHECK: Cost of 1 for VF 2: vp<[[VP7:%[0-9]+]]> = DERIVED-IV ir<0> + vp<[[VP6:%[0-9]+]]> * ir<4> |
| ; CHECK: Cost of 0 for VF 2: vp<[[VP8:%[0-9]+]]> = SCALAR-STEPS vp<[[VP7]]>, ir<4>, vp<[[VP0:%[0-9]+]]> |
| ; CHECK: Cost of 0 for VF 2: EMIT vp<%next.gep> = ptradd ir<%pSrc>, vp<[[VP8]]> |
| ; CHECK: Cost of 1 for VF 2: vp<[[VP9:%[0-9]+]]> = DERIVED-IV ir<0> + vp<[[VP6]]> * ir<4> |
| ; CHECK: Cost of 0 for VF 2: vp<[[VP10:%[0-9]+]]> = SCALAR-STEPS vp<[[VP9]]>, ir<4>, vp<[[VP0]]> |
| ; CHECK: Cost of 0 for VF 2: EMIT vp<%next.gep>.1 = ptradd ir<%pDst>, vp<[[VP10]]> |
| ; CHECK: Cost of 0 for VF 2: vp<[[VP11:%[0-9]+]]> = vector-pointer float, vp<%next.gep>, ir<1> |
| ; CHECK: Cost of 6 for VF 2: WIDEN ir<%0> = load vp<[[VP11]]> |
| ; CHECK: Cost of 12 for VF 2: WIDEN ir<%cmp1> = fcmp olt nnan ninf nsz ir<%0>, ir<0.000000e+00> |
| ; CHECK: Cost of 8 for VF 2: WIDEN ir<%cond> = select nnan ninf nsz ir<%cmp1>, ir<1.000000e+01>, ir<%0> |
| ; CHECK: Cost of 36 for VF 2: WIDEN-CAST ir<%conv> = fptosi ir<%cond> to i32 |
| ; CHECK: Cost of 0 for VF 2: vp<[[VP12:%[0-9]+]]> = vector-pointer i32, vp<%next.gep>.1, ir<1> |
| ; CHECK: Cost of 18 for VF 2: WIDEN store vp<[[VP12]]>, ir<%conv> |
| ; CHECK: Cost of 0 for VF 2: EMIT vp<%index.next> = add nuw vp<[[VP6]]>, vp<[[VP1:%[0-9]+]]> |
| ; CHECK: Cost of 1 for VF 2: EMIT branch-on-count vp<%index.next>, vp<[[VP2:%[0-9]+]]> |
| ; CHECK: Cost of 0 for VF 2: vector loop backedge |
| ; CHECK: Cost of 0 for VF 2: EMIT-SCALAR vp<%bc.resume.val> = phi [ vp<[[VP3:%[0-9]+]]>, middle.block ], [ ir<%pSrc>, ir-bb<while.body.preheader> ] |
| ; CHECK: Cost of 0 for VF 2: EMIT-SCALAR vp<%bc.resume.val>.1 = phi [ vp<[[VP4:%[0-9]+]]>, middle.block ], [ ir<%blockSize>, ir-bb<while.body.preheader> ] |
| ; CHECK: Cost of 0 for VF 2: EMIT-SCALAR vp<%bc.resume.val>.2 = phi [ vp<[[VP5:%[0-9]+]]>, middle.block ], [ ir<%pDst>, ir-bb<while.body.preheader> ] |
| ; CHECK: Cost of 0 for VF 2: IR %pSrc.addr.010 = phi ptr [ %incdec.ptr2, %while.body ], [ %pSrc, %while.body.preheader ] (extra operand: vp<%bc.resume.val> from scalar.ph) |
| ; CHECK: Cost of 0 for VF 2: IR %blockSize.addr.09 = phi i32 [ %dec, %while.body ], [ %blockSize, %while.body.preheader ] (extra operand: vp<%bc.resume.val>.1 from scalar.ph) |
| ; CHECK: Cost of 0 for VF 2: IR %pDst.addr.08 = phi ptr [ %incdec.ptr, %while.body ], [ %pDst, %while.body.preheader ] (extra operand: vp<%bc.resume.val>.2 from scalar.ph) |
| ; CHECK: Cost of 0 for VF 2: IR %0 = load float, ptr %pSrc.addr.010, align 4 |
| ; CHECK: Cost of 0 for VF 2: IR %cmp1 = fcmp nnan ninf nsz olt float %0, 0.000000e+00 |
| ; CHECK: Cost of 0 for VF 2: IR %cond = select nnan ninf nsz i1 %cmp1, float 1.000000e+01, float %0 |
| ; CHECK: Cost of 0 for VF 2: IR %conv = fptosi float %cond to i32 |
| ; CHECK: Cost of 0 for VF 2: IR %incdec.ptr = getelementptr inbounds i32, ptr %pDst.addr.08, i32 1 |
| ; CHECK: Cost of 0 for VF 2: IR store i32 %conv, ptr %pDst.addr.08, align 4 |
| ; CHECK: Cost of 0 for VF 2: IR %incdec.ptr2 = getelementptr inbounds float, ptr %pSrc.addr.010, i32 1 |
| ; CHECK: Cost of 0 for VF 2: IR %dec = add i32 %blockSize.addr.09, -1 |
| ; CHECK: Cost of 0 for VF 2: IR %cmp.not = icmp eq i32 %dec, 0 |
| ; CHECK: Cost of 0 for VF 2: vp<[[VP3]]> = DERIVED-IV ir<%pSrc> + vp<[[VP2]]> * ir<4> |
| ; CHECK: Cost of 1 for VF 2: vp<[[VP4]]> = DERIVED-IV ir<%blockSize> + vp<[[VP2]]> * ir<-1> |
| ; CHECK: Cost of 0 for VF 2: vp<[[VP5]]> = DERIVED-IV ir<%pDst> + vp<[[VP2]]> * ir<4> |
| ; CHECK: Cost of 1 for VF 2: EMIT vp<%cmp.n> = icmp eq ir<%blockSize>, vp<[[VP2]]> |
| ; CHECK: Cost of 0 for VF 2: EMIT branch-on-cond vp<%cmp.n> |
| ; CHECK: Cost for VF 2: 84 (Estimated cost per lane: 42) |
| ; CHECK: Cost of 0 for VF 4: induction instruction %incdec.ptr2 = getelementptr inbounds float, ptr %pSrc.addr.010, i32 1 |
| ; CHECK: Cost of 0 for VF 4: induction instruction %pSrc.addr.010 = phi ptr [ %incdec.ptr2, %while.body ], [ %pSrc, %while.body.preheader ] |
| ; CHECK: Cost of 1 for VF 4: induction instruction %dec = add i32 %blockSize.addr.09, -1 |
| ; CHECK: Cost of 0 for VF 4: induction instruction %blockSize.addr.09 = phi i32 [ %dec, %while.body ], [ %blockSize, %while.body.preheader ] |
| ; CHECK: Cost of 0 for VF 4: induction instruction %incdec.ptr = getelementptr inbounds i32, ptr %pDst.addr.08, i32 1 |
| ; CHECK: Cost of 0 for VF 4: induction instruction %pDst.addr.08 = phi ptr [ %incdec.ptr, %while.body ], [ %pDst, %while.body.preheader ] |
| ; CHECK: Cost of 1 for VF 4: vp<[[VP7]]> = DERIVED-IV ir<0> + vp<[[VP6]]> * ir<4> |
| ; CHECK: Cost of 0 for VF 4: vp<[[VP8]]> = SCALAR-STEPS vp<[[VP7]]>, ir<4>, vp<[[VP0]]> |
| ; CHECK: Cost of 0 for VF 4: EMIT vp<%next.gep> = ptradd ir<%pSrc>, vp<[[VP8]]> |
| ; CHECK: Cost of 1 for VF 4: vp<[[VP9]]> = DERIVED-IV ir<0> + vp<[[VP6]]> * ir<4> |
| ; CHECK: Cost of 0 for VF 4: vp<[[VP10]]> = SCALAR-STEPS vp<[[VP9]]>, ir<4>, vp<[[VP0]]> |
| ; CHECK: Cost of 0 for VF 4: EMIT vp<%next.gep>.1 = ptradd ir<%pDst>, vp<[[VP10]]> |
| ; CHECK: Cost of 0 for VF 4: vp<[[VP11]]> = vector-pointer float, vp<%next.gep>, ir<1> |
| ; CHECK: Cost of 2 for VF 4: WIDEN ir<%0> = load vp<[[VP11]]> |
| ; CHECK: Cost of 24 for VF 4: WIDEN ir<%cmp1> = fcmp olt nnan ninf nsz ir<%0>, ir<0.000000e+00> |
| ; CHECK: Cost of 16 for VF 4: WIDEN ir<%cond> = select nnan ninf nsz ir<%cmp1>, ir<1.000000e+01>, ir<%0> |
| ; CHECK: Cost of 72 for VF 4: WIDEN-CAST ir<%conv> = fptosi ir<%cond> to i32 |
| ; CHECK: Cost of 0 for VF 4: vp<[[VP12]]> = vector-pointer i32, vp<%next.gep>.1, ir<1> |
| ; CHECK: Cost of 2 for VF 4: WIDEN store vp<[[VP12]]>, ir<%conv> |
| ; CHECK: Cost of 0 for VF 4: EMIT vp<%index.next> = add nuw vp<[[VP6]]>, vp<[[VP1]]> |
| ; CHECK: Cost of 1 for VF 4: EMIT branch-on-count vp<%index.next>, vp<[[VP2]]> |
| ; CHECK: Cost of 0 for VF 4: vector loop backedge |
| ; CHECK: Cost of 0 for VF 4: EMIT-SCALAR vp<%bc.resume.val> = phi [ vp<[[VP3]]>, middle.block ], [ ir<%pSrc>, ir-bb<while.body.preheader> ] |
| ; CHECK: Cost of 0 for VF 4: EMIT-SCALAR vp<%bc.resume.val>.1 = phi [ vp<[[VP4]]>, middle.block ], [ ir<%blockSize>, ir-bb<while.body.preheader> ] |
| ; CHECK: Cost of 0 for VF 4: EMIT-SCALAR vp<%bc.resume.val>.2 = phi [ vp<[[VP5]]>, middle.block ], [ ir<%pDst>, ir-bb<while.body.preheader> ] |
| ; CHECK: Cost of 0 for VF 4: IR %pSrc.addr.010 = phi ptr [ %incdec.ptr2, %while.body ], [ %pSrc, %while.body.preheader ] (extra operand: vp<%bc.resume.val> from scalar.ph) |
| ; CHECK: Cost of 0 for VF 4: IR %blockSize.addr.09 = phi i32 [ %dec, %while.body ], [ %blockSize, %while.body.preheader ] (extra operand: vp<%bc.resume.val>.1 from scalar.ph) |
| ; CHECK: Cost of 0 for VF 4: IR %pDst.addr.08 = phi ptr [ %incdec.ptr, %while.body ], [ %pDst, %while.body.preheader ] (extra operand: vp<%bc.resume.val>.2 from scalar.ph) |
| ; CHECK: Cost of 0 for VF 4: IR %0 = load float, ptr %pSrc.addr.010, align 4 |
| ; CHECK: Cost of 0 for VF 4: IR %cmp1 = fcmp nnan ninf nsz olt float %0, 0.000000e+00 |
| ; CHECK: Cost of 0 for VF 4: IR %cond = select nnan ninf nsz i1 %cmp1, float 1.000000e+01, float %0 |
| ; CHECK: Cost of 0 for VF 4: IR %conv = fptosi float %cond to i32 |
| ; CHECK: Cost of 0 for VF 4: IR %incdec.ptr = getelementptr inbounds i32, ptr %pDst.addr.08, i32 1 |
| ; CHECK: Cost of 0 for VF 4: IR store i32 %conv, ptr %pDst.addr.08, align 4 |
| ; CHECK: Cost of 0 for VF 4: IR %incdec.ptr2 = getelementptr inbounds float, ptr %pSrc.addr.010, i32 1 |
| ; CHECK: Cost of 0 for VF 4: IR %dec = add i32 %blockSize.addr.09, -1 |
| ; CHECK: Cost of 0 for VF 4: IR %cmp.not = icmp eq i32 %dec, 0 |
| ; CHECK: Cost of 0 for VF 4: vp<[[VP3]]> = DERIVED-IV ir<%pSrc> + vp<[[VP2]]> * ir<4> |
| ; CHECK: Cost of 1 for VF 4: vp<[[VP4]]> = DERIVED-IV ir<%blockSize> + vp<[[VP2]]> * ir<-1> |
| ; CHECK: Cost of 0 for VF 4: vp<[[VP5]]> = DERIVED-IV ir<%pDst> + vp<[[VP2]]> * ir<4> |
| ; CHECK: Cost of 1 for VF 4: EMIT vp<%cmp.n> = icmp eq ir<%blockSize>, vp<[[VP2]]> |
| ; CHECK: Cost of 0 for VF 4: EMIT branch-on-cond vp<%cmp.n> |
| ; CHECK: Cost for VF 4: 120 (Estimated cost per lane: 30) |
| ; CHECK: LV: Selecting VF: 1. |
| ; |
| entry: |
| %cmp.not7 = icmp eq i32 %blockSize, 0 |
| br i1 %cmp.not7, label %while.end, label %while.body |
| |
| while.body: |
| %pSrc.addr.010 = phi ptr [ %incdec.ptr2, %while.body ], [ %pSrc, %entry ] |
| %blockSize.addr.09 = phi i32 [ %dec, %while.body ], [ %blockSize, %entry ] |
| %pDst.addr.08 = phi ptr [ %incdec.ptr, %while.body ], [ %pDst, %entry ] |
| %0 = load float, ptr %pSrc.addr.010, align 4 |
| %cmp1 = fcmp nnan ninf nsz olt float %0, 0.000000e+00 |
| %cond = select nnan ninf nsz i1 %cmp1, float 1.000000e+01, float %0 |
| %conv = fptosi float %cond to i32 |
| %incdec.ptr = getelementptr inbounds i32, ptr %pDst.addr.08, i32 1 |
| store i32 %conv, ptr %pDst.addr.08, align 4 |
| %incdec.ptr2 = getelementptr inbounds float, ptr %pSrc.addr.010, i32 1 |
| %dec = add i32 %blockSize.addr.09, -1 |
| %cmp.not = icmp eq i32 %dec, 0 |
| br i1 %cmp.not, label %while.end, label %while.body |
| |
| while.end: |
| ret void |
| } |
| |
| attributes #0 = { "target-features"="+mve" } |
