| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6 |
| ; RUN: opt -passes=loop-vectorize -mtriple=arm64-apple-ios -S -mcpu=cyclone -enable-interleaved-mem-accesses=false < %s | FileCheck %s |
| target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32:64-S128" |
| |
| @kernel = global [512 x float] zeroinitializer, align 16 |
| @kernel2 = global [512 x float] zeroinitializer, align 16 |
| @kernel3 = global [512 x float] zeroinitializer, align 16 |
| @kernel4 = global [512 x float] zeroinitializer, align 16 |
| @src_data = global [1536 x float] zeroinitializer, align 16 |
| |
| ; The cost of gathers in the loop gets offset by the vector math. |
| |
| define float @_Z4testmm(i64 %size, i64 %offset) { |
| ; CHECK-LABEL: define float @_Z4testmm( |
| ; CHECK-SAME: i64 [[SIZE:%.*]], i64 [[OFFSET:%.*]]) #[[ATTR0:[0-9]+]] { |
| ; CHECK-NEXT: [[ENTRY:.*]]: |
| ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SIZE]], 4 |
| ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; CHECK: [[VECTOR_PH]]: |
| ; CHECK-NEXT: [[MIN_ITERS_CHECK1:%.*]] = icmp ult i64 [[SIZE]], 16 |
| ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK1]], label %[[VEC_EPILOG_PH:.*]], label %[[VECTOR_PH1:.*]] |
| ; CHECK: [[VECTOR_PH1]]: |
| ; CHECK-NEXT: [[N_MOD_VF:%.*]] = and i64 [[SIZE]], 15 |
| ; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[SIZE]], [[N_MOD_VF]] |
| ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; CHECK: [[VECTOR_BODY]]: |
| ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH1]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x float> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP64:%.*]], %[[VECTOR_BODY]] ] |
| ; CHECK-NEXT: [[VEC_PHI1:%.*]] = phi <4 x float> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP65:%.*]], %[[VECTOR_BODY]] ] |
| ; CHECK-NEXT: [[VEC_PHI6:%.*]] = phi <4 x float> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP151:%.*]], %[[VECTOR_BODY]] ] |
| ; CHECK-NEXT: [[VEC_PHI9:%.*]] = phi <4 x float> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP152:%.*]], %[[VECTOR_BODY]] ] |
| ; CHECK-NEXT: [[VEC_PHI2:%.*]] = phi <4 x float> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP106:%.*]], %[[VECTOR_BODY]] ] |
| ; CHECK-NEXT: [[VEC_PHI3:%.*]] = phi <4 x float> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP107:%.*]], %[[VECTOR_BODY]] ] |
| ; CHECK-NEXT: [[VEC_PHI7:%.*]] = phi <4 x float> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP213:%.*]], %[[VECTOR_BODY]] ] |
| ; CHECK-NEXT: [[VEC_PHI8:%.*]] = phi <4 x float> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP214:%.*]], %[[VECTOR_BODY]] ] |
| ; CHECK-NEXT: [[VEC_PHI4:%.*]] = phi <4 x float> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP148:%.*]], %[[VECTOR_BODY]] ] |
| ; CHECK-NEXT: [[VEC_PHI5:%.*]] = phi <4 x float> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP149:%.*]], %[[VECTOR_BODY]] ] |
| ; CHECK-NEXT: [[VEC_PHI11:%.*]] = phi <4 x float> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP297:%.*]], %[[VECTOR_BODY]] ] |
| ; CHECK-NEXT: [[VEC_PHI12:%.*]] = phi <4 x float> [ zeroinitializer, %[[VECTOR_PH1]] ], [ [[TMP298:%.*]], %[[VECTOR_BODY]] ] |
| ; CHECK-NEXT: [[TMP8:%.*]] = add i64 [[INDEX]], 1 |
| ; CHECK-NEXT: [[TMP16:%.*]] = add i64 [[INDEX]], 2 |
| ; CHECK-NEXT: [[TMP24:%.*]] = add i64 [[INDEX]], 3 |
| ; CHECK-NEXT: [[TMP32:%.*]] = add i64 [[INDEX]], 4 |
| ; CHECK-NEXT: [[TMP48:%.*]] = add i64 [[INDEX]], 5 |
| ; CHECK-NEXT: [[TMP155:%.*]] = add i64 [[INDEX]], 6 |
| ; CHECK-NEXT: [[TMP7:%.*]] = add i64 [[INDEX]], 7 |
| ; CHECK-NEXT: [[TMP153:%.*]] = add i64 [[INDEX]], 8 |
| ; CHECK-NEXT: [[TMP163:%.*]] = add i64 [[INDEX]], 9 |
| ; CHECK-NEXT: [[TMP164:%.*]] = add i64 [[INDEX]], 10 |
| ; CHECK-NEXT: [[TMP165:%.*]] = add i64 [[INDEX]], 11 |
| ; CHECK-NEXT: [[TMP166:%.*]] = add i64 [[INDEX]], 12 |
| ; CHECK-NEXT: [[TMP167:%.*]] = add i64 [[INDEX]], 13 |
| ; CHECK-NEXT: [[TMP168:%.*]] = add i64 [[INDEX]], 14 |
| ; CHECK-NEXT: [[TMP169:%.*]] = add i64 [[INDEX]], 15 |
| ; CHECK-NEXT: [[ADD:%.*]] = add i64 [[INDEX]], [[OFFSET]] |
| ; CHECK-NEXT: [[TMP9:%.*]] = add i64 [[TMP8]], [[OFFSET]] |
| ; CHECK-NEXT: [[TMP10:%.*]] = add i64 [[TMP16]], [[OFFSET]] |
| ; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP24]], [[OFFSET]] |
| ; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[TMP32]], [[OFFSET]] |
| ; CHECK-NEXT: [[TMP13:%.*]] = add i64 [[TMP48]], [[OFFSET]] |
| ; CHECK-NEXT: [[TMP14:%.*]] = add i64 [[TMP155]], [[OFFSET]] |
| ; CHECK-NEXT: [[TMP15:%.*]] = add i64 [[TMP7]], [[OFFSET]] |
| ; CHECK-NEXT: [[TMP170:%.*]] = add i64 [[TMP153]], [[OFFSET]] |
| ; CHECK-NEXT: [[TMP171:%.*]] = add i64 [[TMP163]], [[OFFSET]] |
| ; CHECK-NEXT: [[TMP172:%.*]] = add i64 [[TMP164]], [[OFFSET]] |
| ; CHECK-NEXT: [[TMP173:%.*]] = add i64 [[TMP165]], [[OFFSET]] |
| ; CHECK-NEXT: [[TMP174:%.*]] = add i64 [[TMP166]], [[OFFSET]] |
| ; CHECK-NEXT: [[TMP175:%.*]] = add i64 [[TMP167]], [[OFFSET]] |
| ; CHECK-NEXT: [[TMP176:%.*]] = add i64 [[TMP168]], [[OFFSET]] |
| ; CHECK-NEXT: [[TMP177:%.*]] = add i64 [[TMP169]], [[OFFSET]] |
| ; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[ADD]], 3 |
| ; CHECK-NEXT: [[TMP17:%.*]] = mul i64 [[TMP9]], 3 |
| ; CHECK-NEXT: [[TMP18:%.*]] = mul i64 [[TMP10]], 3 |
| ; CHECK-NEXT: [[TMP19:%.*]] = mul i64 [[TMP11]], 3 |
| ; CHECK-NEXT: [[TMP20:%.*]] = mul i64 [[TMP12]], 3 |
| ; CHECK-NEXT: [[TMP21:%.*]] = mul i64 [[TMP13]], 3 |
| ; CHECK-NEXT: [[TMP22:%.*]] = mul i64 [[TMP14]], 3 |
| ; CHECK-NEXT: [[TMP23:%.*]] = mul i64 [[TMP15]], 3 |
| ; CHECK-NEXT: [[TMP178:%.*]] = mul i64 [[TMP170]], 3 |
| ; CHECK-NEXT: [[TMP195:%.*]] = mul i64 [[TMP171]], 3 |
| ; CHECK-NEXT: [[TMP196:%.*]] = mul i64 [[TMP172]], 3 |
| ; CHECK-NEXT: [[TMP199:%.*]] = mul i64 [[TMP173]], 3 |
| ; CHECK-NEXT: [[TMP200:%.*]] = mul i64 [[TMP174]], 3 |
| ; CHECK-NEXT: [[TMP203:%.*]] = mul i64 [[TMP175]], 3 |
| ; CHECK-NEXT: [[TMP204:%.*]] = mul i64 [[TMP176]], 3 |
| ; CHECK-NEXT: [[TMP207:%.*]] = mul i64 [[TMP177]], 3 |
| ; CHECK-NEXT: [[GEP_SRC_DATA:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[MUL]] |
| ; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP17]] |
| ; CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP18]] |
| ; CHECK-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP19]] |
| ; CHECK-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP20]] |
| ; CHECK-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP21]] |
| ; CHECK-NEXT: [[TMP30:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP22]] |
| ; CHECK-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP23]] |
| ; CHECK-NEXT: [[TMP208:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP178]] |
| ; CHECK-NEXT: [[TMP211:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP195]] |
| ; CHECK-NEXT: [[TMP212:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP196]] |
| ; CHECK-NEXT: [[TMP215:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP199]] |
| ; CHECK-NEXT: [[TMP216:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP200]] |
| ; CHECK-NEXT: [[TMP217:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP203]] |
| ; CHECK-NEXT: [[TMP218:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP204]] |
| ; CHECK-NEXT: [[TMP219:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP207]] |
| ; CHECK-NEXT: [[TMP0:%.*]] = load float, ptr [[GEP_SRC_DATA]], align 4 |
| ; CHECK-NEXT: [[TMP33:%.*]] = load float, ptr [[TMP25]], align 4 |
| ; CHECK-NEXT: [[TMP34:%.*]] = load float, ptr [[TMP26]], align 4 |
| ; CHECK-NEXT: [[TMP35:%.*]] = load float, ptr [[TMP27]], align 4 |
| ; CHECK-NEXT: [[TMP36:%.*]] = insertelement <4 x float> poison, float [[TMP0]], i64 0 |
| ; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x float> [[TMP36]], float [[TMP33]], i64 1 |
| ; CHECK-NEXT: [[TMP38:%.*]] = insertelement <4 x float> [[TMP37]], float [[TMP34]], i64 2 |
| ; CHECK-NEXT: [[TMP39:%.*]] = insertelement <4 x float> [[TMP38]], float [[TMP35]], i64 3 |
| ; CHECK-NEXT: [[TMP40:%.*]] = load float, ptr [[TMP28]], align 4 |
| ; CHECK-NEXT: [[TMP41:%.*]] = load float, ptr [[TMP29]], align 4 |
| ; CHECK-NEXT: [[TMP42:%.*]] = load float, ptr [[TMP30]], align 4 |
| ; CHECK-NEXT: [[TMP43:%.*]] = load float, ptr [[TMP31]], align 4 |
| ; CHECK-NEXT: [[TMP44:%.*]] = insertelement <4 x float> poison, float [[TMP40]], i64 0 |
| ; CHECK-NEXT: [[TMP45:%.*]] = insertelement <4 x float> [[TMP44]], float [[TMP41]], i64 1 |
| ; CHECK-NEXT: [[TMP46:%.*]] = insertelement <4 x float> [[TMP45]], float [[TMP42]], i64 2 |
| ; CHECK-NEXT: [[TMP47:%.*]] = insertelement <4 x float> [[TMP46]], float [[TMP43]], i64 3 |
| ; CHECK-NEXT: [[TMP220:%.*]] = load float, ptr [[TMP208]], align 4 |
| ; CHECK-NEXT: [[TMP221:%.*]] = load float, ptr [[TMP211]], align 4 |
| ; CHECK-NEXT: [[TMP222:%.*]] = load float, ptr [[TMP212]], align 4 |
| ; CHECK-NEXT: [[TMP231:%.*]] = load float, ptr [[TMP215]], align 4 |
| ; CHECK-NEXT: [[TMP232:%.*]] = insertelement <4 x float> poison, float [[TMP220]], i64 0 |
| ; CHECK-NEXT: [[TMP233:%.*]] = insertelement <4 x float> [[TMP232]], float [[TMP221]], i64 1 |
| ; CHECK-NEXT: [[TMP234:%.*]] = insertelement <4 x float> [[TMP233]], float [[TMP222]], i64 2 |
| ; CHECK-NEXT: [[TMP235:%.*]] = insertelement <4 x float> [[TMP234]], float [[TMP231]], i64 3 |
| ; CHECK-NEXT: [[TMP236:%.*]] = load float, ptr [[TMP216]], align 4 |
| ; CHECK-NEXT: [[TMP237:%.*]] = load float, ptr [[TMP217]], align 4 |
| ; CHECK-NEXT: [[TMP238:%.*]] = load float, ptr [[TMP218]], align 4 |
| ; CHECK-NEXT: [[TMP247:%.*]] = load float, ptr [[TMP219]], align 4 |
| ; CHECK-NEXT: [[TMP248:%.*]] = insertelement <4 x float> poison, float [[TMP236]], i64 0 |
| ; CHECK-NEXT: [[TMP249:%.*]] = insertelement <4 x float> [[TMP248]], float [[TMP237]], i64 1 |
| ; CHECK-NEXT: [[TMP250:%.*]] = insertelement <4 x float> [[TMP249]], float [[TMP238]], i64 2 |
| ; CHECK-NEXT: [[TMP251:%.*]] = insertelement <4 x float> [[TMP250]], float [[TMP247]], i64 3 |
| ; CHECK-NEXT: [[GEP_KERNEL:%.*]] = getelementptr inbounds [512 x float], ptr @kernel, i64 0, i64 [[INDEX]] |
| ; CHECK-NEXT: [[TMP49:%.*]] = getelementptr inbounds float, ptr [[GEP_KERNEL]], i64 4 |
| ; CHECK-NEXT: [[TMP252:%.*]] = getelementptr inbounds float, ptr [[GEP_KERNEL]], i64 8 |
| ; CHECK-NEXT: [[TMP253:%.*]] = getelementptr inbounds float, ptr [[GEP_KERNEL]], i64 12 |
| ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[GEP_KERNEL]], align 4 |
| ; CHECK-NEXT: [[WIDE_LOAD6:%.*]] = load <4 x float>, ptr [[TMP49]], align 4 |
| ; CHECK-NEXT: [[WIDE_LOAD14:%.*]] = load <4 x float>, ptr [[TMP252]], align 4 |
| ; CHECK-NEXT: [[WIDE_LOAD15:%.*]] = load <4 x float>, ptr [[TMP253]], align 4 |
| ; CHECK-NEXT: [[TMP50:%.*]] = fmul fast <4 x float> [[TMP39]], [[WIDE_LOAD]] |
| ; CHECK-NEXT: [[TMP51:%.*]] = fmul fast <4 x float> [[TMP47]], [[WIDE_LOAD6]] |
| ; CHECK-NEXT: [[TMP254:%.*]] = fmul fast <4 x float> [[TMP235]], [[WIDE_LOAD14]] |
| ; CHECK-NEXT: [[TMP255:%.*]] = fmul fast <4 x float> [[TMP251]], [[WIDE_LOAD15]] |
| ; CHECK-NEXT: [[TMP52:%.*]] = getelementptr inbounds [512 x float], ptr @kernel2, i64 0, i64 [[INDEX]] |
| ; CHECK-NEXT: [[TMP53:%.*]] = getelementptr inbounds float, ptr [[TMP52]], i64 4 |
| ; CHECK-NEXT: [[TMP256:%.*]] = getelementptr inbounds float, ptr [[TMP52]], i64 8 |
| ; CHECK-NEXT: [[TMP257:%.*]] = getelementptr inbounds float, ptr [[TMP52]], i64 12 |
| ; CHECK-NEXT: [[WIDE_LOAD7:%.*]] = load <4 x float>, ptr [[TMP52]], align 4 |
| ; CHECK-NEXT: [[WIDE_LOAD8:%.*]] = load <4 x float>, ptr [[TMP53]], align 4 |
| ; CHECK-NEXT: [[WIDE_LOAD18:%.*]] = load <4 x float>, ptr [[TMP256]], align 4 |
| ; CHECK-NEXT: [[WIDE_LOAD19:%.*]] = load <4 x float>, ptr [[TMP257]], align 4 |
| ; CHECK-NEXT: [[TMP54:%.*]] = fmul fast <4 x float> [[TMP50]], [[WIDE_LOAD7]] |
| ; CHECK-NEXT: [[TMP55:%.*]] = fmul fast <4 x float> [[TMP51]], [[WIDE_LOAD8]] |
| ; CHECK-NEXT: [[TMP258:%.*]] = fmul fast <4 x float> [[TMP254]], [[WIDE_LOAD18]] |
| ; CHECK-NEXT: [[TMP259:%.*]] = fmul fast <4 x float> [[TMP255]], [[WIDE_LOAD19]] |
| ; CHECK-NEXT: [[TMP56:%.*]] = getelementptr inbounds [512 x float], ptr @kernel3, i64 0, i64 [[INDEX]] |
| ; CHECK-NEXT: [[TMP57:%.*]] = getelementptr inbounds float, ptr [[TMP56]], i64 4 |
| ; CHECK-NEXT: [[TMP260:%.*]] = getelementptr inbounds float, ptr [[TMP56]], i64 8 |
| ; CHECK-NEXT: [[TMP261:%.*]] = getelementptr inbounds float, ptr [[TMP56]], i64 12 |
| ; CHECK-NEXT: [[WIDE_LOAD9:%.*]] = load <4 x float>, ptr [[TMP56]], align 4 |
| ; CHECK-NEXT: [[WIDE_LOAD10:%.*]] = load <4 x float>, ptr [[TMP57]], align 4 |
| ; CHECK-NEXT: [[WIDE_LOAD22:%.*]] = load <4 x float>, ptr [[TMP260]], align 4 |
| ; CHECK-NEXT: [[WIDE_LOAD23:%.*]] = load <4 x float>, ptr [[TMP261]], align 4 |
| ; CHECK-NEXT: [[TMP58:%.*]] = fmul fast <4 x float> [[TMP54]], [[WIDE_LOAD9]] |
| ; CHECK-NEXT: [[TMP59:%.*]] = fmul fast <4 x float> [[TMP55]], [[WIDE_LOAD10]] |
| ; CHECK-NEXT: [[TMP262:%.*]] = fmul fast <4 x float> [[TMP258]], [[WIDE_LOAD22]] |
| ; CHECK-NEXT: [[TMP279:%.*]] = fmul fast <4 x float> [[TMP259]], [[WIDE_LOAD23]] |
| ; CHECK-NEXT: [[TMP60:%.*]] = getelementptr inbounds [512 x float], ptr @kernel4, i64 0, i64 [[INDEX]] |
| ; CHECK-NEXT: [[TMP61:%.*]] = getelementptr inbounds float, ptr [[TMP60]], i64 4 |
| ; CHECK-NEXT: [[TMP280:%.*]] = getelementptr inbounds float, ptr [[TMP60]], i64 8 |
| ; CHECK-NEXT: [[TMP283:%.*]] = getelementptr inbounds float, ptr [[TMP60]], i64 12 |
| ; CHECK-NEXT: [[WIDE_LOAD11:%.*]] = load <4 x float>, ptr [[TMP60]], align 4 |
| ; CHECK-NEXT: [[WIDE_LOAD12:%.*]] = load <4 x float>, ptr [[TMP61]], align 4 |
| ; CHECK-NEXT: [[WIDE_LOAD26:%.*]] = load <4 x float>, ptr [[TMP280]], align 4 |
| ; CHECK-NEXT: [[WIDE_LOAD27:%.*]] = load <4 x float>, ptr [[TMP283]], align 4 |
| ; CHECK-NEXT: [[TMP62:%.*]] = fmul fast <4 x float> [[TMP58]], [[WIDE_LOAD11]] |
| ; CHECK-NEXT: [[TMP63:%.*]] = fmul fast <4 x float> [[TMP59]], [[WIDE_LOAD12]] |
| ; CHECK-NEXT: [[TMP284:%.*]] = fmul fast <4 x float> [[TMP262]], [[WIDE_LOAD26]] |
| ; CHECK-NEXT: [[TMP287:%.*]] = fmul fast <4 x float> [[TMP279]], [[WIDE_LOAD27]] |
| ; CHECK-NEXT: [[TMP64]] = fadd fast <4 x float> [[VEC_PHI]], [[TMP62]] |
| ; CHECK-NEXT: [[TMP65]] = fadd fast <4 x float> [[VEC_PHI1]], [[TMP63]] |
| ; CHECK-NEXT: [[TMP151]] = fadd fast <4 x float> [[VEC_PHI6]], [[TMP284]] |
| ; CHECK-NEXT: [[TMP152]] = fadd fast <4 x float> [[VEC_PHI9]], [[TMP287]] |
| ; CHECK-NEXT: [[TMP66:%.*]] = add i64 [[MUL]], 1 |
| ; CHECK-NEXT: [[TMP67:%.*]] = add i64 [[TMP17]], 1 |
| ; CHECK-NEXT: [[TMP68:%.*]] = add i64 [[TMP18]], 1 |
| ; CHECK-NEXT: [[TMP69:%.*]] = add i64 [[TMP19]], 1 |
| ; CHECK-NEXT: [[TMP70:%.*]] = add i64 [[TMP20]], 1 |
| ; CHECK-NEXT: [[TMP71:%.*]] = add i64 [[TMP21]], 1 |
| ; CHECK-NEXT: [[TMP72:%.*]] = add i64 [[TMP22]], 1 |
| ; CHECK-NEXT: [[TMP73:%.*]] = add i64 [[TMP23]], 1 |
| ; CHECK-NEXT: [[TMP288:%.*]] = add i64 [[TMP178]], 1 |
| ; CHECK-NEXT: [[TMP291:%.*]] = add i64 [[TMP195]], 1 |
| ; CHECK-NEXT: [[TMP292:%.*]] = add i64 [[TMP196]], 1 |
| ; CHECK-NEXT: [[TMP295:%.*]] = add i64 [[TMP199]], 1 |
| ; CHECK-NEXT: [[TMP296:%.*]] = add i64 [[TMP200]], 1 |
| ; CHECK-NEXT: [[TMP299:%.*]] = add i64 [[TMP203]], 1 |
| ; CHECK-NEXT: [[TMP309:%.*]] = add i64 [[TMP204]], 1 |
| ; CHECK-NEXT: [[TMP313:%.*]] = add i64 [[TMP207]], 1 |
| ; CHECK-NEXT: [[TMP74:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP66]] |
| ; CHECK-NEXT: [[TMP75:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP67]] |
| ; CHECK-NEXT: [[TMP76:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP68]] |
| ; CHECK-NEXT: [[TMP77:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP69]] |
| ; CHECK-NEXT: [[TMP78:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP70]] |
| ; CHECK-NEXT: [[TMP79:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP71]] |
| ; CHECK-NEXT: [[TMP80:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP72]] |
| ; CHECK-NEXT: [[TMP81:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP73]] |
| ; CHECK-NEXT: [[TMP317:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP288]] |
| ; CHECK-NEXT: [[TMP156:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP291]] |
| ; CHECK-NEXT: [[TMP157:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP292]] |
| ; CHECK-NEXT: [[TMP158:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP295]] |
| ; CHECK-NEXT: [[TMP159:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP296]] |
| ; CHECK-NEXT: [[TMP160:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP299]] |
| ; CHECK-NEXT: [[TMP161:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP309]] |
| ; CHECK-NEXT: [[TMP162:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP313]] |
| ; CHECK-NEXT: [[TMP82:%.*]] = load float, ptr [[TMP74]], align 4 |
| ; CHECK-NEXT: [[TMP83:%.*]] = load float, ptr [[TMP75]], align 4 |
| ; CHECK-NEXT: [[TMP84:%.*]] = load float, ptr [[TMP76]], align 4 |
| ; CHECK-NEXT: [[TMP85:%.*]] = load float, ptr [[TMP77]], align 4 |
| ; CHECK-NEXT: [[TMP86:%.*]] = insertelement <4 x float> poison, float [[TMP82]], i64 0 |
| ; CHECK-NEXT: [[TMP87:%.*]] = insertelement <4 x float> [[TMP86]], float [[TMP83]], i64 1 |
| ; CHECK-NEXT: [[TMP88:%.*]] = insertelement <4 x float> [[TMP87]], float [[TMP84]], i64 2 |
| ; CHECK-NEXT: [[TMP89:%.*]] = insertelement <4 x float> [[TMP88]], float [[TMP85]], i64 3 |
| ; CHECK-NEXT: [[TMP90:%.*]] = load float, ptr [[TMP78]], align 4 |
| ; CHECK-NEXT: [[TMP91:%.*]] = load float, ptr [[TMP79]], align 4 |
| ; CHECK-NEXT: [[TMP92:%.*]] = load float, ptr [[TMP80]], align 4 |
| ; CHECK-NEXT: [[TMP93:%.*]] = load float, ptr [[TMP81]], align 4 |
| ; CHECK-NEXT: [[TMP94:%.*]] = insertelement <4 x float> poison, float [[TMP90]], i64 0 |
| ; CHECK-NEXT: [[TMP95:%.*]] = insertelement <4 x float> [[TMP94]], float [[TMP91]], i64 1 |
| ; CHECK-NEXT: [[TMP96:%.*]] = insertelement <4 x float> [[TMP95]], float [[TMP92]], i64 2 |
| ; CHECK-NEXT: [[TMP97:%.*]] = insertelement <4 x float> [[TMP96]], float [[TMP93]], i64 3 |
| ; CHECK-NEXT: [[TMP179:%.*]] = load float, ptr [[TMP317]], align 4 |
| ; CHECK-NEXT: [[TMP180:%.*]] = load float, ptr [[TMP156]], align 4 |
| ; CHECK-NEXT: [[TMP181:%.*]] = load float, ptr [[TMP157]], align 4 |
| ; CHECK-NEXT: [[TMP182:%.*]] = load float, ptr [[TMP158]], align 4 |
| ; CHECK-NEXT: [[TMP183:%.*]] = insertelement <4 x float> poison, float [[TMP179]], i64 0 |
| ; CHECK-NEXT: [[TMP184:%.*]] = insertelement <4 x float> [[TMP183]], float [[TMP180]], i64 1 |
| ; CHECK-NEXT: [[TMP185:%.*]] = insertelement <4 x float> [[TMP184]], float [[TMP181]], i64 2 |
| ; CHECK-NEXT: [[TMP186:%.*]] = insertelement <4 x float> [[TMP185]], float [[TMP182]], i64 3 |
| ; CHECK-NEXT: [[TMP187:%.*]] = load float, ptr [[TMP159]], align 4 |
| ; CHECK-NEXT: [[TMP188:%.*]] = load float, ptr [[TMP160]], align 4 |
| ; CHECK-NEXT: [[TMP189:%.*]] = load float, ptr [[TMP161]], align 4 |
| ; CHECK-NEXT: [[TMP190:%.*]] = load float, ptr [[TMP162]], align 4 |
| ; CHECK-NEXT: [[TMP191:%.*]] = insertelement <4 x float> poison, float [[TMP187]], i64 0 |
| ; CHECK-NEXT: [[TMP192:%.*]] = insertelement <4 x float> [[TMP191]], float [[TMP188]], i64 1 |
| ; CHECK-NEXT: [[TMP193:%.*]] = insertelement <4 x float> [[TMP192]], float [[TMP189]], i64 2 |
| ; CHECK-NEXT: [[TMP194:%.*]] = insertelement <4 x float> [[TMP193]], float [[TMP190]], i64 3 |
| ; CHECK-NEXT: [[TMP98:%.*]] = fmul fast <4 x float> [[WIDE_LOAD]], [[TMP89]] |
| ; CHECK-NEXT: [[TMP99:%.*]] = fmul fast <4 x float> [[WIDE_LOAD6]], [[TMP97]] |
| ; CHECK-NEXT: [[TMP197:%.*]] = fmul fast <4 x float> [[WIDE_LOAD14]], [[TMP186]] |
| ; CHECK-NEXT: [[TMP198:%.*]] = fmul fast <4 x float> [[WIDE_LOAD15]], [[TMP194]] |
| ; CHECK-NEXT: [[TMP100:%.*]] = fmul fast <4 x float> [[WIDE_LOAD7]], [[TMP98]] |
| ; CHECK-NEXT: [[TMP101:%.*]] = fmul fast <4 x float> [[WIDE_LOAD8]], [[TMP99]] |
| ; CHECK-NEXT: [[TMP201:%.*]] = fmul fast <4 x float> [[WIDE_LOAD18]], [[TMP197]] |
| ; CHECK-NEXT: [[TMP202:%.*]] = fmul fast <4 x float> [[WIDE_LOAD19]], [[TMP198]] |
| ; CHECK-NEXT: [[TMP102:%.*]] = fmul fast <4 x float> [[WIDE_LOAD9]], [[TMP100]] |
| ; CHECK-NEXT: [[TMP103:%.*]] = fmul fast <4 x float> [[WIDE_LOAD10]], [[TMP101]] |
| ; CHECK-NEXT: [[TMP205:%.*]] = fmul fast <4 x float> [[WIDE_LOAD22]], [[TMP201]] |
| ; CHECK-NEXT: [[TMP206:%.*]] = fmul fast <4 x float> [[WIDE_LOAD23]], [[TMP202]] |
| ; CHECK-NEXT: [[TMP104:%.*]] = fmul fast <4 x float> [[WIDE_LOAD11]], [[TMP102]] |
| ; CHECK-NEXT: [[TMP105:%.*]] = fmul fast <4 x float> [[WIDE_LOAD12]], [[TMP103]] |
| ; CHECK-NEXT: [[TMP209:%.*]] = fmul fast <4 x float> [[WIDE_LOAD26]], [[TMP205]] |
| ; CHECK-NEXT: [[TMP210:%.*]] = fmul fast <4 x float> [[WIDE_LOAD27]], [[TMP206]] |
| ; CHECK-NEXT: [[TMP106]] = fadd fast <4 x float> [[VEC_PHI2]], [[TMP104]] |
| ; CHECK-NEXT: [[TMP107]] = fadd fast <4 x float> [[VEC_PHI3]], [[TMP105]] |
| ; CHECK-NEXT: [[TMP213]] = fadd fast <4 x float> [[VEC_PHI7]], [[TMP209]] |
| ; CHECK-NEXT: [[TMP214]] = fadd fast <4 x float> [[VEC_PHI8]], [[TMP210]] |
| ; CHECK-NEXT: [[TMP108:%.*]] = add i64 [[MUL]], 2 |
| ; CHECK-NEXT: [[TMP109:%.*]] = add i64 [[TMP17]], 2 |
| ; CHECK-NEXT: [[TMP110:%.*]] = add i64 [[TMP18]], 2 |
| ; CHECK-NEXT: [[TMP111:%.*]] = add i64 [[TMP19]], 2 |
| ; CHECK-NEXT: [[TMP112:%.*]] = add i64 [[TMP20]], 2 |
| ; CHECK-NEXT: [[TMP113:%.*]] = add i64 [[TMP21]], 2 |
| ; CHECK-NEXT: [[TMP114:%.*]] = add i64 [[TMP22]], 2 |
| ; CHECK-NEXT: [[TMP115:%.*]] = add i64 [[TMP23]], 2 |
| ; CHECK-NEXT: [[TMP223:%.*]] = add i64 [[TMP178]], 2 |
| ; CHECK-NEXT: [[TMP224:%.*]] = add i64 [[TMP195]], 2 |
| ; CHECK-NEXT: [[TMP225:%.*]] = add i64 [[TMP196]], 2 |
| ; CHECK-NEXT: [[TMP226:%.*]] = add i64 [[TMP199]], 2 |
| ; CHECK-NEXT: [[TMP227:%.*]] = add i64 [[TMP200]], 2 |
| ; CHECK-NEXT: [[TMP228:%.*]] = add i64 [[TMP203]], 2 |
| ; CHECK-NEXT: [[TMP229:%.*]] = add i64 [[TMP204]], 2 |
| ; CHECK-NEXT: [[TMP230:%.*]] = add i64 [[TMP207]], 2 |
| ; CHECK-NEXT: [[TMP116:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP108]] |
| ; CHECK-NEXT: [[TMP117:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP109]] |
| ; CHECK-NEXT: [[TMP118:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP110]] |
| ; CHECK-NEXT: [[TMP119:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP111]] |
| ; CHECK-NEXT: [[TMP120:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP112]] |
| ; CHECK-NEXT: [[TMP121:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP113]] |
| ; CHECK-NEXT: [[TMP122:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP114]] |
| ; CHECK-NEXT: [[TMP123:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP115]] |
| ; CHECK-NEXT: [[TMP239:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP223]] |
| ; CHECK-NEXT: [[TMP240:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP224]] |
| ; CHECK-NEXT: [[TMP241:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP225]] |
| ; CHECK-NEXT: [[TMP242:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP226]] |
| ; CHECK-NEXT: [[TMP243:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP227]] |
| ; CHECK-NEXT: [[TMP244:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP228]] |
| ; CHECK-NEXT: [[TMP245:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP229]] |
| ; CHECK-NEXT: [[TMP246:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP230]] |
| ; CHECK-NEXT: [[TMP124:%.*]] = load float, ptr [[TMP116]], align 4 |
| ; CHECK-NEXT: [[TMP125:%.*]] = load float, ptr [[TMP117]], align 4 |
| ; CHECK-NEXT: [[TMP126:%.*]] = load float, ptr [[TMP118]], align 4 |
| ; CHECK-NEXT: [[TMP127:%.*]] = load float, ptr [[TMP119]], align 4 |
| ; CHECK-NEXT: [[TMP128:%.*]] = insertelement <4 x float> poison, float [[TMP124]], i64 0 |
| ; CHECK-NEXT: [[TMP129:%.*]] = insertelement <4 x float> [[TMP128]], float [[TMP125]], i64 1 |
| ; CHECK-NEXT: [[TMP130:%.*]] = insertelement <4 x float> [[TMP129]], float [[TMP126]], i64 2 |
| ; CHECK-NEXT: [[TMP131:%.*]] = insertelement <4 x float> [[TMP130]], float [[TMP127]], i64 3 |
| ; CHECK-NEXT: [[TMP132:%.*]] = load float, ptr [[TMP120]], align 4 |
| ; CHECK-NEXT: [[TMP133:%.*]] = load float, ptr [[TMP121]], align 4 |
| ; CHECK-NEXT: [[TMP134:%.*]] = load float, ptr [[TMP122]], align 4 |
| ; CHECK-NEXT: [[TMP135:%.*]] = load float, ptr [[TMP123]], align 4 |
| ; CHECK-NEXT: [[TMP136:%.*]] = insertelement <4 x float> poison, float [[TMP132]], i64 0 |
| ; CHECK-NEXT: [[TMP137:%.*]] = insertelement <4 x float> [[TMP136]], float [[TMP133]], i64 1 |
| ; CHECK-NEXT: [[TMP138:%.*]] = insertelement <4 x float> [[TMP137]], float [[TMP134]], i64 2 |
| ; CHECK-NEXT: [[TMP139:%.*]] = insertelement <4 x float> [[TMP138]], float [[TMP135]], i64 3 |
| ; CHECK-NEXT: [[TMP263:%.*]] = load float, ptr [[TMP239]], align 4 |
| ; CHECK-NEXT: [[TMP264:%.*]] = load float, ptr [[TMP240]], align 4 |
| ; CHECK-NEXT: [[TMP265:%.*]] = load float, ptr [[TMP241]], align 4 |
| ; CHECK-NEXT: [[TMP266:%.*]] = load float, ptr [[TMP242]], align 4 |
| ; CHECK-NEXT: [[TMP267:%.*]] = insertelement <4 x float> poison, float [[TMP263]], i64 0 |
| ; CHECK-NEXT: [[TMP268:%.*]] = insertelement <4 x float> [[TMP267]], float [[TMP264]], i64 1 |
| ; CHECK-NEXT: [[TMP269:%.*]] = insertelement <4 x float> [[TMP268]], float [[TMP265]], i64 2 |
| ; CHECK-NEXT: [[TMP270:%.*]] = insertelement <4 x float> [[TMP269]], float [[TMP266]], i64 3 |
| ; CHECK-NEXT: [[TMP271:%.*]] = load float, ptr [[TMP243]], align 4 |
| ; CHECK-NEXT: [[TMP272:%.*]] = load float, ptr [[TMP244]], align 4 |
| ; CHECK-NEXT: [[TMP273:%.*]] = load float, ptr [[TMP245]], align 4 |
| ; CHECK-NEXT: [[TMP274:%.*]] = load float, ptr [[TMP246]], align 4 |
| ; CHECK-NEXT: [[TMP275:%.*]] = insertelement <4 x float> poison, float [[TMP271]], i64 0 |
| ; CHECK-NEXT: [[TMP276:%.*]] = insertelement <4 x float> [[TMP275]], float [[TMP272]], i64 1 |
| ; CHECK-NEXT: [[TMP277:%.*]] = insertelement <4 x float> [[TMP276]], float [[TMP273]], i64 2 |
| ; CHECK-NEXT: [[TMP278:%.*]] = insertelement <4 x float> [[TMP277]], float [[TMP274]], i64 3 |
| ; CHECK-NEXT: [[TMP140:%.*]] = fmul fast <4 x float> [[WIDE_LOAD]], [[TMP131]] |
| ; CHECK-NEXT: [[TMP141:%.*]] = fmul fast <4 x float> [[WIDE_LOAD6]], [[TMP139]] |
| ; CHECK-NEXT: [[TMP281:%.*]] = fmul fast <4 x float> [[WIDE_LOAD14]], [[TMP270]] |
| ; CHECK-NEXT: [[TMP282:%.*]] = fmul fast <4 x float> [[WIDE_LOAD15]], [[TMP278]] |
| ; CHECK-NEXT: [[TMP142:%.*]] = fmul fast <4 x float> [[WIDE_LOAD7]], [[TMP140]] |
| ; CHECK-NEXT: [[TMP143:%.*]] = fmul fast <4 x float> [[WIDE_LOAD8]], [[TMP141]] |
| ; CHECK-NEXT: [[TMP285:%.*]] = fmul fast <4 x float> [[WIDE_LOAD18]], [[TMP281]] |
| ; CHECK-NEXT: [[TMP286:%.*]] = fmul fast <4 x float> [[WIDE_LOAD19]], [[TMP282]] |
| ; CHECK-NEXT: [[TMP144:%.*]] = fmul fast <4 x float> [[WIDE_LOAD9]], [[TMP142]] |
| ; CHECK-NEXT: [[TMP145:%.*]] = fmul fast <4 x float> [[WIDE_LOAD10]], [[TMP143]] |
| ; CHECK-NEXT: [[TMP289:%.*]] = fmul fast <4 x float> [[WIDE_LOAD22]], [[TMP285]] |
| ; CHECK-NEXT: [[TMP290:%.*]] = fmul fast <4 x float> [[WIDE_LOAD23]], [[TMP286]] |
| ; CHECK-NEXT: [[TMP146:%.*]] = fmul fast <4 x float> [[WIDE_LOAD11]], [[TMP144]] |
| ; CHECK-NEXT: [[TMP147:%.*]] = fmul fast <4 x float> [[WIDE_LOAD12]], [[TMP145]] |
| ; CHECK-NEXT: [[TMP293:%.*]] = fmul fast <4 x float> [[WIDE_LOAD26]], [[TMP289]] |
| ; CHECK-NEXT: [[TMP294:%.*]] = fmul fast <4 x float> [[WIDE_LOAD27]], [[TMP290]] |
| ; CHECK-NEXT: [[TMP148]] = fadd fast <4 x float> [[VEC_PHI4]], [[TMP146]] |
| ; CHECK-NEXT: [[TMP149]] = fadd fast <4 x float> [[VEC_PHI5]], [[TMP147]] |
| ; CHECK-NEXT: [[TMP297]] = fadd fast <4 x float> [[VEC_PHI11]], [[TMP293]] |
| ; CHECK-NEXT: [[TMP298]] = fadd fast <4 x float> [[VEC_PHI12]], [[TMP294]] |
| ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 16 |
| ; CHECK-NEXT: [[TMP150:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; CHECK-NEXT: br i1 [[TMP150]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] |
| ; CHECK: [[MIDDLE_BLOCK]]: |
| ; CHECK-NEXT: [[BIN_RDX:%.*]] = fadd fast <4 x float> [[TMP65]], [[TMP64]] |
| ; CHECK-NEXT: [[BIN_RDX28:%.*]] = fadd fast <4 x float> [[TMP151]], [[BIN_RDX]] |
| ; CHECK-NEXT: [[BIN_RDX29:%.*]] = fadd fast <4 x float> [[TMP152]], [[BIN_RDX28]] |
| ; CHECK-NEXT: [[TMP300:%.*]] = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> [[BIN_RDX29]]) |
| ; CHECK-NEXT: [[BIN_RDX13:%.*]] = fadd fast <4 x float> [[TMP107]], [[TMP106]] |
| ; CHECK-NEXT: [[BIN_RDX31:%.*]] = fadd fast <4 x float> [[TMP213]], [[BIN_RDX13]] |
| ; CHECK-NEXT: [[BIN_RDX32:%.*]] = fadd fast <4 x float> [[TMP214]], [[BIN_RDX31]] |
| ; CHECK-NEXT: [[TMP301:%.*]] = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> [[BIN_RDX32]]) |
| ; CHECK-NEXT: [[BIN_RDX14:%.*]] = fadd fast <4 x float> [[TMP149]], [[TMP148]] |
| ; CHECK-NEXT: [[BIN_RDX34:%.*]] = fadd fast <4 x float> [[TMP297]], [[BIN_RDX14]] |
| ; CHECK-NEXT: [[BIN_RDX35:%.*]] = fadd fast <4 x float> [[TMP298]], [[BIN_RDX34]] |
| ; CHECK-NEXT: [[TMP302:%.*]] = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> [[BIN_RDX35]]) |
| ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SIZE]], [[N_VEC]] |
| ; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[VEC_EPILOG_ITER_CHECK:.*]] |
| ; CHECK: [[VEC_EPILOG_ITER_CHECK]]: |
| ; CHECK-NEXT: [[MIN_EPILOG_ITERS_CHECK:%.*]] = icmp ult i64 [[N_MOD_VF]], 4 |
| ; CHECK-NEXT: br i1 [[MIN_EPILOG_ITERS_CHECK]], label %[[SCALAR_PH]], label %[[VEC_EPILOG_PH]], !prof [[PROF3:![0-9]+]] |
| ; CHECK: [[VEC_EPILOG_PH]]: |
| ; CHECK-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_PH]] ] |
| ; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi float [ [[TMP300]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0.000000e+00, %[[VECTOR_PH]] ] |
| ; CHECK-NEXT: [[BC_MERGE_RDX36:%.*]] = phi float [ [[TMP301]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0.000000e+00, %[[VECTOR_PH]] ] |
| ; CHECK-NEXT: [[BC_MERGE_RDX37:%.*]] = phi float [ [[TMP302]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0.000000e+00, %[[VECTOR_PH]] ] |
| ; CHECK-NEXT: [[N_MOD_VF38:%.*]] = and i64 [[SIZE]], 3 |
| ; CHECK-NEXT: [[N_VEC39:%.*]] = sub i64 [[SIZE]], [[N_MOD_VF38]] |
| ; CHECK-NEXT: [[TMP303:%.*]] = insertelement <4 x float> zeroinitializer, float [[BC_MERGE_RDX]], i64 0 |
| ; CHECK-NEXT: [[TMP304:%.*]] = insertelement <4 x float> zeroinitializer, float [[BC_MERGE_RDX36]], i64 0 |
| ; CHECK-NEXT: [[TMP305:%.*]] = insertelement <4 x float> zeroinitializer, float [[BC_MERGE_RDX37]], i64 0 |
| ; CHECK-NEXT: br label %[[LOOP:.*]] |
| ; CHECK: [[LOOP]]: |
| ; CHECK-NEXT: [[IV1:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], %[[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT48:%.*]], %[[LOOP]] ] |
| ; CHECK-NEXT: [[VEC_PHI41:%.*]] = phi <4 x float> [ [[TMP303]], %[[VEC_EPILOG_PH]] ], [ [[TMP337:%.*]], %[[LOOP]] ] |
| ; CHECK-NEXT: [[VEC_PHI42:%.*]] = phi <4 x float> [ [[TMP304]], %[[VEC_EPILOG_PH]] ], [ [[TMP358:%.*]], %[[LOOP]] ] |
| ; CHECK-NEXT: [[VEC_PHI43:%.*]] = phi <4 x float> [ [[TMP305]], %[[VEC_EPILOG_PH]] ], [ [[TMP379:%.*]], %[[LOOP]] ] |
| ; CHECK-NEXT: [[TMP306:%.*]] = add i64 [[IV1]], 1 |
| ; CHECK-NEXT: [[TMP307:%.*]] = add i64 [[IV1]], 2 |
| ; CHECK-NEXT: [[TMP308:%.*]] = add i64 [[IV1]], 3 |
| ; CHECK-NEXT: [[ADD1:%.*]] = add i64 [[IV1]], [[OFFSET]] |
| ; CHECK-NEXT: [[TMP310:%.*]] = add i64 [[TMP306]], [[OFFSET]] |
| ; CHECK-NEXT: [[TMP311:%.*]] = add i64 [[TMP307]], [[OFFSET]] |
| ; CHECK-NEXT: [[TMP312:%.*]] = add i64 [[TMP308]], [[OFFSET]] |
| ; CHECK-NEXT: [[MUL1:%.*]] = mul i64 [[ADD1]], 3 |
| ; CHECK-NEXT: [[TMP314:%.*]] = mul i64 [[TMP310]], 3 |
| ; CHECK-NEXT: [[TMP315:%.*]] = mul i64 [[TMP311]], 3 |
| ; CHECK-NEXT: [[TMP316:%.*]] = mul i64 [[TMP312]], 3 |
| ; CHECK-NEXT: [[GEP_SRC_DATA1:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[MUL1]] |
| ; CHECK-NEXT: [[TMP318:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP314]] |
| ; CHECK-NEXT: [[TMP319:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP315]] |
| ; CHECK-NEXT: [[TMP320:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP316]] |
| ; CHECK-NEXT: [[TMP321:%.*]] = load float, ptr [[GEP_SRC_DATA1]], align 4 |
| ; CHECK-NEXT: [[TMP322:%.*]] = load float, ptr [[TMP318]], align 4 |
| ; CHECK-NEXT: [[TMP323:%.*]] = load float, ptr [[TMP319]], align 4 |
| ; CHECK-NEXT: [[TMP324:%.*]] = load float, ptr [[TMP320]], align 4 |
| ; CHECK-NEXT: [[TMP325:%.*]] = insertelement <4 x float> poison, float [[TMP321]], i64 0 |
| ; CHECK-NEXT: [[TMP326:%.*]] = insertelement <4 x float> [[TMP325]], float [[TMP322]], i64 1 |
| ; CHECK-NEXT: [[TMP327:%.*]] = insertelement <4 x float> [[TMP326]], float [[TMP323]], i64 2 |
| ; CHECK-NEXT: [[TMP328:%.*]] = insertelement <4 x float> [[TMP327]], float [[TMP324]], i64 3 |
| ; CHECK-NEXT: [[GEP_KERNEL1:%.*]] = getelementptr inbounds [512 x float], ptr @kernel, i64 0, i64 [[IV1]] |
| ; CHECK-NEXT: [[WIDE_LOAD44:%.*]] = load <4 x float>, ptr [[GEP_KERNEL1]], align 4 |
| ; CHECK-NEXT: [[TMP330:%.*]] = fmul fast <4 x float> [[TMP328]], [[WIDE_LOAD44]] |
| ; CHECK-NEXT: [[TMP331:%.*]] = getelementptr inbounds [512 x float], ptr @kernel2, i64 0, i64 [[IV1]] |
| ; CHECK-NEXT: [[WIDE_LOAD45:%.*]] = load <4 x float>, ptr [[TMP331]], align 4 |
| ; CHECK-NEXT: [[TMP332:%.*]] = fmul fast <4 x float> [[TMP330]], [[WIDE_LOAD45]] |
| ; CHECK-NEXT: [[TMP333:%.*]] = getelementptr inbounds [512 x float], ptr @kernel3, i64 0, i64 [[IV1]] |
| ; CHECK-NEXT: [[WIDE_LOAD46:%.*]] = load <4 x float>, ptr [[TMP333]], align 4 |
| ; CHECK-NEXT: [[TMP334:%.*]] = fmul fast <4 x float> [[TMP332]], [[WIDE_LOAD46]] |
| ; CHECK-NEXT: [[TMP335:%.*]] = getelementptr inbounds [512 x float], ptr @kernel4, i64 0, i64 [[IV1]] |
| ; CHECK-NEXT: [[WIDE_LOAD47:%.*]] = load <4 x float>, ptr [[TMP335]], align 4 |
| ; CHECK-NEXT: [[TMP336:%.*]] = fmul fast <4 x float> [[TMP334]], [[WIDE_LOAD47]] |
| ; CHECK-NEXT: [[TMP337]] = fadd fast <4 x float> [[VEC_PHI41]], [[TMP336]] |
| ; CHECK-NEXT: [[TMP338:%.*]] = add i64 [[MUL1]], 1 |
| ; CHECK-NEXT: [[TMP339:%.*]] = add i64 [[TMP314]], 1 |
| ; CHECK-NEXT: [[TMP340:%.*]] = add i64 [[TMP315]], 1 |
| ; CHECK-NEXT: [[TMP341:%.*]] = add i64 [[TMP316]], 1 |
| ; CHECK-NEXT: [[TMP342:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP338]] |
| ; CHECK-NEXT: [[TMP343:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP339]] |
| ; CHECK-NEXT: [[TMP344:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP340]] |
| ; CHECK-NEXT: [[TMP345:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP341]] |
| ; CHECK-NEXT: [[TMP346:%.*]] = load float, ptr [[TMP342]], align 4 |
| ; CHECK-NEXT: [[TMP347:%.*]] = load float, ptr [[TMP343]], align 4 |
| ; CHECK-NEXT: [[TMP348:%.*]] = load float, ptr [[TMP344]], align 4 |
| ; CHECK-NEXT: [[TMP349:%.*]] = load float, ptr [[TMP345]], align 4 |
| ; CHECK-NEXT: [[TMP350:%.*]] = insertelement <4 x float> poison, float [[TMP346]], i64 0 |
| ; CHECK-NEXT: [[TMP351:%.*]] = insertelement <4 x float> [[TMP350]], float [[TMP347]], i64 1 |
| ; CHECK-NEXT: [[TMP352:%.*]] = insertelement <4 x float> [[TMP351]], float [[TMP348]], i64 2 |
| ; CHECK-NEXT: [[TMP353:%.*]] = insertelement <4 x float> [[TMP352]], float [[TMP349]], i64 3 |
| ; CHECK-NEXT: [[TMP354:%.*]] = fmul fast <4 x float> [[WIDE_LOAD44]], [[TMP353]] |
| ; CHECK-NEXT: [[TMP355:%.*]] = fmul fast <4 x float> [[WIDE_LOAD45]], [[TMP354]] |
| ; CHECK-NEXT: [[TMP356:%.*]] = fmul fast <4 x float> [[WIDE_LOAD46]], [[TMP355]] |
| ; CHECK-NEXT: [[TMP357:%.*]] = fmul fast <4 x float> [[WIDE_LOAD47]], [[TMP356]] |
| ; CHECK-NEXT: [[TMP358]] = fadd fast <4 x float> [[VEC_PHI42]], [[TMP357]] |
| ; CHECK-NEXT: [[TMP359:%.*]] = add i64 [[MUL1]], 2 |
| ; CHECK-NEXT: [[TMP360:%.*]] = add i64 [[TMP314]], 2 |
| ; CHECK-NEXT: [[TMP361:%.*]] = add i64 [[TMP315]], 2 |
| ; CHECK-NEXT: [[TMP362:%.*]] = add i64 [[TMP316]], 2 |
| ; CHECK-NEXT: [[TMP363:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP359]] |
| ; CHECK-NEXT: [[TMP364:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP360]] |
| ; CHECK-NEXT: [[TMP365:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP361]] |
| ; CHECK-NEXT: [[TMP366:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[TMP362]] |
| ; CHECK-NEXT: [[TMP367:%.*]] = load float, ptr [[TMP363]], align 4 |
| ; CHECK-NEXT: [[TMP368:%.*]] = load float, ptr [[TMP364]], align 4 |
| ; CHECK-NEXT: [[TMP369:%.*]] = load float, ptr [[TMP365]], align 4 |
| ; CHECK-NEXT: [[TMP370:%.*]] = load float, ptr [[TMP366]], align 4 |
| ; CHECK-NEXT: [[TMP371:%.*]] = insertelement <4 x float> poison, float [[TMP367]], i64 0 |
| ; CHECK-NEXT: [[TMP372:%.*]] = insertelement <4 x float> [[TMP371]], float [[TMP368]], i64 1 |
| ; CHECK-NEXT: [[TMP373:%.*]] = insertelement <4 x float> [[TMP372]], float [[TMP369]], i64 2 |
| ; CHECK-NEXT: [[TMP374:%.*]] = insertelement <4 x float> [[TMP373]], float [[TMP370]], i64 3 |
| ; CHECK-NEXT: [[TMP375:%.*]] = fmul fast <4 x float> [[WIDE_LOAD44]], [[TMP374]] |
| ; CHECK-NEXT: [[TMP376:%.*]] = fmul fast <4 x float> [[WIDE_LOAD45]], [[TMP375]] |
| ; CHECK-NEXT: [[TMP377:%.*]] = fmul fast <4 x float> [[WIDE_LOAD46]], [[TMP376]] |
| ; CHECK-NEXT: [[TMP378:%.*]] = fmul fast <4 x float> [[WIDE_LOAD47]], [[TMP377]] |
| ; CHECK-NEXT: [[TMP379]] = fadd fast <4 x float> [[VEC_PHI43]], [[TMP378]] |
| ; CHECK-NEXT: [[INDEX_NEXT48]] = add nuw i64 [[IV1]], 4 |
| ; CHECK-NEXT: [[TMP380:%.*]] = icmp eq i64 [[INDEX_NEXT48]], [[N_VEC39]] |
| ; CHECK-NEXT: br i1 [[TMP380]], label %[[VEC_EPILOG_MIDDLE_BLOCK:.*]], label %[[LOOP]], !llvm.loop [[LOOP4:![0-9]+]] |
| ; CHECK: [[VEC_EPILOG_MIDDLE_BLOCK]]: |
| ; CHECK-NEXT: [[TMP381:%.*]] = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> [[TMP337]]) |
| ; CHECK-NEXT: [[TMP382:%.*]] = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> [[TMP358]]) |
| ; CHECK-NEXT: [[TMP383:%.*]] = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.000000e+00, <4 x float> [[TMP379]]) |
| ; CHECK-NEXT: [[CMP_N49:%.*]] = icmp eq i64 [[SIZE]], [[N_VEC39]] |
| ; CHECK-NEXT: br i1 [[CMP_N49]], label %[[EXIT]], label %[[SCALAR_PH]] |
| ; CHECK: [[SCALAR_PH]]: |
| ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC39]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ENTRY]] ] |
| ; CHECK-NEXT: [[BC_MERGE_RDX49:%.*]] = phi float [ [[TMP381]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[TMP300]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0.000000e+00, %[[ENTRY]] ] |
| ; CHECK-NEXT: [[BC_MERGE_RDX50:%.*]] = phi float [ [[TMP382]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[TMP301]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0.000000e+00, %[[ENTRY]] ] |
| ; CHECK-NEXT: [[BC_MERGE_RDX51:%.*]] = phi float [ [[TMP383]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[TMP302]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0.000000e+00, %[[ENTRY]] ] |
| ; CHECK-NEXT: br label %[[LOOP1:.*]] |
| ; CHECK: [[LOOP1]]: |
| ; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP1]] ] |
| ; CHECK-NEXT: [[RDX_0:%.*]] = phi float [ [[BC_MERGE_RDX49]], %[[SCALAR_PH]] ], [ [[RDX_0_NEXT:%.*]], %[[LOOP1]] ] |
| ; CHECK-NEXT: [[RDX_1:%.*]] = phi float [ [[BC_MERGE_RDX50]], %[[SCALAR_PH]] ], [ [[RDX_1_NEXT:%.*]], %[[LOOP1]] ] |
| ; CHECK-NEXT: [[RED_2:%.*]] = phi float [ [[BC_MERGE_RDX51]], %[[SCALAR_PH]] ], [ [[RDX_2_NEXT:%.*]], %[[LOOP1]] ] |
| ; CHECK-NEXT: [[ADD2:%.*]] = add i64 [[IV]], [[OFFSET]] |
| ; CHECK-NEXT: [[MUL2:%.*]] = mul i64 [[ADD2]], 3 |
| ; CHECK-NEXT: [[GEP_SRC_DATA2:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[MUL2]] |
| ; CHECK-NEXT: [[TMP154:%.*]] = load float, ptr [[GEP_SRC_DATA2]], align 4 |
| ; CHECK-NEXT: [[GEP_KERNEL5:%.*]] = getelementptr inbounds [512 x float], ptr @kernel, i64 0, i64 [[IV]] |
| ; CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[GEP_KERNEL5]], align 4 |
| ; CHECK-NEXT: [[MUL3:%.*]] = fmul fast float [[TMP154]], [[TMP1]] |
| ; CHECK-NEXT: [[GEP_KERNEL2:%.*]] = getelementptr inbounds [512 x float], ptr @kernel2, i64 0, i64 [[IV]] |
| ; CHECK-NEXT: [[TMP2:%.*]] = load float, ptr [[GEP_KERNEL2]], align 4 |
| ; CHECK-NEXT: [[MUL5:%.*]] = fmul fast float [[MUL3]], [[TMP2]] |
| ; CHECK-NEXT: [[GEP_KERNEL3:%.*]] = getelementptr inbounds [512 x float], ptr @kernel3, i64 0, i64 [[IV]] |
| ; CHECK-NEXT: [[TMP3:%.*]] = load float, ptr [[GEP_KERNEL3]], align 4 |
| ; CHECK-NEXT: [[MUL7:%.*]] = fmul fast float [[MUL5]], [[TMP3]] |
| ; CHECK-NEXT: [[GEP_KERNEL4:%.*]] = getelementptr inbounds [512 x float], ptr @kernel4, i64 0, i64 [[IV]] |
| ; CHECK-NEXT: [[TMP4:%.*]] = load float, ptr [[GEP_KERNEL4]], align 4 |
| ; CHECK-NEXT: [[MUL9:%.*]] = fmul fast float [[MUL7]], [[TMP4]] |
| ; CHECK-NEXT: [[RDX_0_NEXT]] = fadd fast float [[RDX_0]], [[MUL9]] |
| ; CHECK-NEXT: [[GEP_SRC_DATA_SUM:%.*]] = add i64 [[MUL2]], 1 |
| ; CHECK-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[GEP_SRC_DATA_SUM]] |
| ; CHECK-NEXT: [[TMP5:%.*]] = load float, ptr [[ARRAYIDX11]], align 4 |
| ; CHECK-NEXT: [[MUL13:%.*]] = fmul fast float [[TMP1]], [[TMP5]] |
| ; CHECK-NEXT: [[MUL15:%.*]] = fmul fast float [[TMP2]], [[MUL13]] |
| ; CHECK-NEXT: [[MUL17:%.*]] = fmul fast float [[TMP3]], [[MUL15]] |
| ; CHECK-NEXT: [[MUL19:%.*]] = fmul fast float [[TMP4]], [[MUL17]] |
| ; CHECK-NEXT: [[RDX_1_NEXT]] = fadd fast float [[RDX_1]], [[MUL19]] |
| ; CHECK-NEXT: [[GEP_SRC_DATA_SUM52:%.*]] = add i64 [[MUL2]], 2 |
| ; CHECK-NEXT: [[ARRAYIDX21:%.*]] = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 [[GEP_SRC_DATA_SUM52]] |
| ; CHECK-NEXT: [[TMP6:%.*]] = load float, ptr [[ARRAYIDX21]], align 4 |
| ; CHECK-NEXT: [[MUL23:%.*]] = fmul fast float [[TMP1]], [[TMP6]] |
| ; CHECK-NEXT: [[MUL25:%.*]] = fmul fast float [[TMP2]], [[MUL23]] |
| ; CHECK-NEXT: [[MUL27:%.*]] = fmul fast float [[TMP3]], [[MUL25]] |
| ; CHECK-NEXT: [[MUL29:%.*]] = fmul fast float [[TMP4]], [[MUL27]] |
| ; CHECK-NEXT: [[RDX_2_NEXT]] = fadd fast float [[RED_2]], [[MUL29]] |
| ; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 |
| ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[IV_NEXT]], [[SIZE]] |
| ; CHECK-NEXT: br i1 [[EXITCOND]], label %[[LOOP1]], label %[[EXIT]], !llvm.loop [[LOOP5:![0-9]+]] |
| ; CHECK: [[EXIT]]: |
| ; CHECK-NEXT: [[RDX_0_NEXT_LCSSA:%.*]] = phi float [ [[RDX_0_NEXT]], %[[LOOP1]] ], [ [[TMP300]], %[[MIDDLE_BLOCK]] ], [ [[TMP381]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ] |
| ; CHECK-NEXT: [[RDX_1_NEXT_LCSSA:%.*]] = phi float [ [[RDX_1_NEXT]], %[[LOOP1]] ], [ [[TMP301]], %[[MIDDLE_BLOCK]] ], [ [[TMP382]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ] |
| ; CHECK-NEXT: [[RDX_2_NEXT_LCSSA:%.*]] = phi float [ [[RDX_2_NEXT]], %[[LOOP1]] ], [ [[TMP302]], %[[MIDDLE_BLOCK]] ], [ [[TMP383]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ] |
| ; CHECK-NEXT: [[RES_0:%.*]] = fadd float [[RDX_0_NEXT_LCSSA]], [[RDX_1_NEXT_LCSSA]] |
| ; CHECK-NEXT: [[RES_1:%.*]] = fadd float [[RES_0]], [[RDX_2_NEXT_LCSSA]] |
| ; CHECK-NEXT: ret float [[RES_1]] |
| ; |
| entry: |
| br label %loop |
| |
| loop: |
| %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] |
| %rdx.0 = phi float [ 0.000000e+00, %entry ], [ %rdx.0.next, %loop ] |
| %rdx.1 = phi float [ 0.000000e+00, %entry ], [ %rdx.1.next, %loop ] |
| %red.2 = phi float [ 0.000000e+00, %entry ], [ %rdx.2.next, %loop ] |
| %add = add i64 %iv, %offset |
| %mul = mul i64 %add, 3 |
| %gep.src_data = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 %mul |
| %0 = load float, ptr %gep.src_data, align 4 |
| %gep.kernel = getelementptr inbounds [512 x float], ptr @kernel, i64 0, i64 %iv |
| %1 = load float, ptr %gep.kernel, align 4 |
| %mul3 = fmul fast float %0, %1 |
| %gep.kernel2 = getelementptr inbounds [512 x float], ptr @kernel2, i64 0, i64 %iv |
| %2 = load float, ptr %gep.kernel2, align 4 |
| %mul5 = fmul fast float %mul3, %2 |
| %gep.kernel3 = getelementptr inbounds [512 x float], ptr @kernel3, i64 0, i64 %iv |
| %3 = load float, ptr %gep.kernel3, align 4 |
| %mul7 = fmul fast float %mul5, %3 |
| %gep.kernel4 = getelementptr inbounds [512 x float], ptr @kernel4, i64 0, i64 %iv |
| %4 = load float, ptr %gep.kernel4, align 4 |
| %mul9 = fmul fast float %mul7, %4 |
| %rdx.0.next = fadd fast float %rdx.0, %mul9 |
| %gep.src_data.sum = add i64 %mul, 1 |
| %arrayidx11 = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 %gep.src_data.sum |
| %5 = load float, ptr %arrayidx11, align 4 |
| %mul13 = fmul fast float %1, %5 |
| %mul15 = fmul fast float %2, %mul13 |
| %mul17 = fmul fast float %3, %mul15 |
| %mul19 = fmul fast float %4, %mul17 |
| %rdx.1.next = fadd fast float %rdx.1, %mul19 |
| %gep.src_data.sum52 = add i64 %mul, 2 |
| %arrayidx21 = getelementptr inbounds [1536 x float], ptr @src_data, i64 0, i64 %gep.src_data.sum52 |
| %6 = load float, ptr %arrayidx21, align 4 |
| %mul23 = fmul fast float %1, %6 |
| %mul25 = fmul fast float %2, %mul23 |
| %mul27 = fmul fast float %3, %mul25 |
| %mul29 = fmul fast float %4, %mul27 |
| %rdx.2.next = fadd fast float %red.2, %mul29 |
| %iv.next = add i64 %iv, 1 |
| %exitcond = icmp ne i64 %iv.next, %size |
| br i1 %exitcond, label %loop, label %exit |
| |
| exit: |
| %res.0 = fadd float %rdx.0.next, %rdx.1.next |
| %res.1 = fadd float %res.0, %rdx.2.next |
| ret float %res.1 |
| } |
| ;. |
| ; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]} |
| ; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1} |
| ; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"} |
| ; CHECK: [[PROF3]] = !{!"branch_weights", i32 4, i32 12} |
| ; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]} |
| ; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META2]], [[META1]]} |
| ;. |
