| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| ; RUN: llc -mtriple=thumbv6m-eabi -mattr=+strict-align %s -o - | FileCheck %s -check-prefix=CHECK-V6M-MINSIZE |
| ; RUN: llc -mtriple=thumbv6m-eabi -mattr=+strict-align %s -o - | FileCheck %s -check-prefix=CHECK-V6M-OPTSIZE |
| ; RUN: llc -mtriple=thumbv7m-eabi -mattr=+strict-align %s -o - | FileCheck %s -check-prefix=CHECK-V7M-MINSIZE |
| ; RUN: llc -mtriple=thumbv7m-eabi -mattr=+strict-align %s -o - | FileCheck %s -check-prefix=CHECK-V7M-OPTSIZE |
| ; RUN: llc -mtriple=thumbv7m-eabi -mattr=-strict-align %s -o - | FileCheck %s -check-prefix=CHECK-ALIGNED-MINSIZE |
| ; RUN: llc -mtriple=thumbv7m-eabi -mattr=-strict-align %s -o - | FileCheck %s -check-prefix=CHECK-ALIGNED-OPTSIZE |
| |
| define void @loadstore4_align1_minsize(i32* %a, i32* %b) nounwind minsize { |
| ; CHECK-V6M-MINSIZE-LABEL: loadstore4_align1_minsize: |
| ; CHECK-V6M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-MINSIZE-NEXT: .save {r4, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: push {r4, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: mov r4, r1 |
| ; CHECK-V6M-MINSIZE-NEXT: bl __aeabi_uread4 |
| ; CHECK-V6M-MINSIZE-NEXT: mov r1, r4 |
| ; CHECK-V6M-MINSIZE-NEXT: bl __aeabi_uwrite4 |
| ; CHECK-V6M-MINSIZE-NEXT: pop {r4, pc} |
| ; |
| ; CHECK-V7M-MINSIZE-LABEL: loadstore4_align1_minsize: |
| ; CHECK-V7M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-MINSIZE-NEXT: .save {r4, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: push {r4, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: mov r4, r1 |
| ; CHECK-V7M-MINSIZE-NEXT: bl __aeabi_uread4 |
| ; CHECK-V7M-MINSIZE-NEXT: mov r1, r4 |
| ; CHECK-V7M-MINSIZE-NEXT: bl __aeabi_uwrite4 |
| ; CHECK-V7M-MINSIZE-NEXT: pop {r4, pc} |
| ; |
| ; CHECK-ALIGNED-MINSIZE-LABEL: loadstore4_align1_minsize: |
| ; CHECK-ALIGNED-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-ALIGNED-MINSIZE-NEXT: ldr r0, [r0] |
| ; CHECK-ALIGNED-MINSIZE-NEXT: str r0, [r1] |
| ; CHECK-ALIGNED-MINSIZE-NEXT: bx lr |
| entry: |
| %tmp = load i32, i32* %a, align 1 |
| store i32 %tmp, i32* %b, align 1 |
| ret void |
| } |
| |
| define void @loadstore4_align1_optsize(i32* %a, i32* %b) nounwind optsize { |
| ; CHECK-V6M-OPTSIZE-LABEL: loadstore4_align1_optsize: |
| ; CHECK-V6M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-OPTSIZE: .save {r4, lr} |
| ; CHECK-V6M-OPTSIZE: push {r4, lr} |
| ; CHECK-V6M-OPTSIZE-NOT: bl __aeabi_uread4 |
| ; CHECK-V6M-OPTSIZE-NOT: bl __aeabi_uwrite4 |
| ; CHECK-V6M-OPTSIZE: pop {r4, pc} |
| ; |
| ; CHECK-V7M-OPTSIZE-LABEL: loadstore4_align1_optsize: |
| ; CHECK-V7M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-OPTSIZE-NOT: bl __aeabi_uread4 |
| ; CHECK-V7M-OPTSIZE-NOT: bl __aeabi_uwrite4 |
| ; CHECK-V7M-OPTSIZE: bx lr |
| ; |
| ; CHECK-ALIGNED-OPTSIZE-LABEL: loadstore4_align1_optsize: |
| ; CHECK-ALIGNED-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-ALIGNED-OPTSIZE-NEXT: ldr r0, [r0] |
| ; CHECK-ALIGNED-OPTSIZE-NEXT: str r0, [r1] |
| ; CHECK-ALIGNED-OPTSIZE-NEXT: bx lr |
| entry: |
| %tmp = load i32, i32* %a, align 1 |
| store i32 %tmp, i32* %b, align 1 |
| ret void |
| } |
| |
| define i32 @load4_align1_minsize(i32* %a) nounwind minsize { |
| ; CHECK-V6M-MINSIZE-LABEL: load4_align1_minsize: |
| ; CHECK-V6M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-MINSIZE-NEXT: .save {r7, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: push {r7, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: bl __aeabi_uread4 |
| ; CHECK-V6M-MINSIZE-NEXT: pop {r7, pc} |
| ; |
| ; CHECK-V7M-MINSIZE-LABEL: load4_align1_minsize: |
| ; CHECK-V7M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-MINSIZE-NEXT: .save {r7, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: push {r7, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: bl __aeabi_uread4 |
| ; CHECK-V7M-MINSIZE-NEXT: pop {r7, pc} |
| ; |
| ; CHECK-ALIGNED-MINSIZE-LABEL: load4_align1_minsize: |
| ; CHECK-ALIGNED-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-ALIGNED-MINSIZE-NEXT: ldr r0, [r0] |
| ; CHECK-ALIGNED-MINSIZE-NEXT: bx lr |
| entry: |
| %tmp = load i32, i32* %a, align 1 |
| ret i32 %tmp |
| } |
| |
| define i32 @load4_align1_optsize(i32* %a) nounwind optsize { |
| ; CHECK-V6M-OPTSIZE-LABEL: load4_align1_optsize: |
| ; CHECK-V6M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-OPTSIZE-NOT: bl __aeabi_uread4 |
| ; CHECK-V6M-OPTSIZE: bx lr |
| ; |
| ; CHECK-V7M-OPTSIZE-LABEL: load4_align1_optsize: |
| ; CHECK-V7M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-OPTSIZE-NOT: bl __aeabi_uread4 |
| ; CHECK-V7M-OPTSIZE: bx lr |
| ; |
| ; CHECK-ALIGNED-OPTSIZE-LABEL: load4_align1_optsize: |
| ; CHECK-ALIGNED-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-ALIGNED-OPTSIZE-NEXT: ldr r0, [r0] |
| ; CHECK-ALIGNED-OPTSIZE-NEXT: bx lr |
| entry: |
| %tmp = load i32, i32* %a, align 1 |
| ret i32 %tmp |
| } |
| |
| define i64 @load4_align1_zext_minsize(i32* %a) nounwind minsize { |
| ; CHECK-V6M-MINSIZE-LABEL: load4_align1_zext_minsize: |
| ; CHECK-V6M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-MINSIZE-NEXT: .save {r7, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: push {r7, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: bl __aeabi_uread4 |
| ; CHECK-V6M-MINSIZE-NEXT: movs r1, #0 |
| ; CHECK-V6M-MINSIZE-NEXT: pop {r7, pc} |
| ; |
| ; CHECK-V7M-MINSIZE-LABEL: load4_align1_zext_minsize: |
| ; CHECK-V7M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-MINSIZE-NEXT: .save {r7, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: push {r7, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: bl __aeabi_uread4 |
| ; CHECK-V7M-MINSIZE-NEXT: movs r1, #0 |
| ; CHECK-V7M-MINSIZE-NEXT: pop {r7, pc} |
| ; |
| ; CHECK-ALIGNED-MINSIZE-LABEL: load4_align1_zext_minsize: |
| ; CHECK-ALIGNED-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-ALIGNED-MINSIZE-NEXT: ldr r0, [r0] |
| ; CHECK-ALIGNED-MINSIZE-NEXT: movs r1, #0 |
| ; CHECK-ALIGNED-MINSIZE-NEXT: bx lr |
| entry: |
| %tmp = load i32, i32* %a, align 1 |
| %ext = zext i32 %tmp to i64 |
| ret i64 %ext |
| } |
| |
| define i64 @load4_align1_zext_optsize(i32* %a) nounwind optsize { |
| ; CHECK-V6M-OPTSIZE-LABEL: load4_align1_zext_optsize: |
| ; CHECK-V6M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-OPTSIZE-NOT: bl __aeabi_uread4 |
| ; CHECK-V6M-OPTSIZE: bx lr |
| ; |
| ; CHECK-V7M-OPTSIZE-LABEL: load4_align1_zext_optsize: |
| ; CHECK-V7M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-OPTSIZE-NOT: bl __aeabi_uread4 |
| ; CHECK-V7M-OPTSIZE: bx lr |
| ; |
| ; CHECK-ALIGNED-OPTSIZE-LABEL: load4_align1_zext_optsize: |
| ; CHECK-ALIGNED-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-ALIGNED-OPTSIZE-NEXT: ldr r0, [r0] |
| ; CHECK-ALIGNED-OPTSIZE-NEXT: movs r1, #0 |
| ; CHECK-ALIGNED-OPTSIZE-NEXT: bx lr |
| entry: |
| %tmp = load i32, i32* %a, align 1 |
| %ext = zext i32 %tmp to i64 |
| ret i64 %ext |
| } |
| |
| define i64 @load4_align1_sext_minsize(i32* %a) nounwind minsize { |
| ; CHECK-V6M-MINSIZE-LABEL: load4_align1_sext_minsize: |
| ; CHECK-V6M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-MINSIZE-NEXT: .save {r7, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: push {r7, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: bl __aeabi_uread4 |
| ; CHECK-V6M-MINSIZE-NEXT: asrs r1, r0, #31 |
| ; CHECK-V6M-MINSIZE-NEXT: pop {r7, pc} |
| ; |
| ; CHECK-V7M-MINSIZE-LABEL: load4_align1_sext_minsize: |
| ; CHECK-V7M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-MINSIZE-NEXT: .save {r7, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: push {r7, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: bl __aeabi_uread4 |
| ; CHECK-V7M-MINSIZE-NEXT: asrs r1, r0, #31 |
| ; CHECK-V7M-MINSIZE-NEXT: pop {r7, pc} |
| ; |
| ; CHECK-ALIGNED-MINSIZE-LABEL: load4_align1_sext_minsize: |
| ; CHECK-ALIGNED-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-ALIGNED-MINSIZE-NEXT: ldr r0, [r0] |
| ; CHECK-ALIGNED-MINSIZE-NEXT: asrs r1, r0, #31 |
| ; CHECK-ALIGNED-MINSIZE-NEXT: bx lr |
| entry: |
| %tmp = load i32, i32* %a, align 1 |
| %ext = sext i32 %tmp to i64 |
| ret i64 %ext |
| } |
| |
| define i64 @load4_align1_sext_optsize(i32* %a) nounwind optsize { |
| ; CHECK-V6M-OPTSIZE-LABEL: load4_align1_sext_optsize: |
| ; CHECK-V6M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-OPTSIZE-NOT: bl __aeabi_uread4 |
| ; CHECK-V6M-OPTSIZE: bx lr |
| ; |
| ; CHECK-V7M-OPTSIZE-LABEL: load4_align1_sext_optsize: |
| ; CHECK-V7M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-OPTSIZE-NOT: bl __aeabi_uread4 |
| ; CHECK-V7M-OPTSIZE: bx lr |
| ; |
| ; CHECK-ALIGNED-OPTSIZE-LABEL: load4_align1_sext_optsize: |
| ; CHECK-ALIGNED-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-ALIGNED-OPTSIZE-NEXT: ldr r0, [r0] |
| ; CHECK-ALIGNED-OPTSIZE-NEXT: asrs r1, r0, #31 |
| ; CHECK-ALIGNED-OPTSIZE-NEXT: bx lr |
| entry: |
| %tmp = load i32, i32* %a, align 1 |
| %ext = sext i32 %tmp to i64 |
| ret i64 %ext |
| } |
| |
| define void @store4_align1_minsize(i32* %a, i32 %b) nounwind minsize { |
| ; CHECK-V6M-MINSIZE-LABEL: store4_align1_minsize: |
| ; CHECK-V6M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-MINSIZE-NEXT: .save {r7, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: push {r7, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: mov r2, r0 |
| ; CHECK-V6M-MINSIZE-NEXT: mov r0, r1 |
| ; CHECK-V6M-MINSIZE-NEXT: mov r1, r2 |
| ; CHECK-V6M-MINSIZE-NEXT: bl __aeabi_uwrite4 |
| ; CHECK-V6M-MINSIZE-NEXT: pop {r7, pc} |
| ; |
| ; CHECK-V7M-MINSIZE-LABEL: store4_align1_minsize: |
| ; CHECK-V7M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-MINSIZE-NEXT: .save {r7, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: push {r7, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: mov r2, r0 |
| ; CHECK-V7M-MINSIZE-NEXT: mov r0, r1 |
| ; CHECK-V7M-MINSIZE-NEXT: mov r1, r2 |
| ; CHECK-V7M-MINSIZE-NEXT: bl __aeabi_uwrite4 |
| ; CHECK-V7M-MINSIZE-NEXT: pop {r7, pc} |
| ; |
| ; CHECK-ALIGNED-MINSIZE-LABEL: store4_align1_minsize: |
| ; CHECK-ALIGNED-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-ALIGNED-MINSIZE-NEXT: str r1, [r0] |
| ; CHECK-ALIGNED-MINSIZE-NEXT: bx lr |
| entry: |
| store i32 %b, i32* %a, align 1 |
| ret void |
| } |
| |
| define void @store4_align1_optsize(i32* %a, i32 %b) nounwind optsize { |
| ; CHECK-V6M-OPTSIZE-LABEL: store4_align1_optsize: |
| ; CHECK-V6M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-OPTSIZE-NOT: bl __aeabi_uwrite4 |
| ; CHECK-V6M-OPTSIZE: bx lr |
| ; |
| ; CHECK-V7M-OPTSIZE-LABEL: store4_align1_optsize: |
| ; CHECK-V7M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-OPTSIZE-NOT: bl __aeabi_uwrite4 |
| ; CHECK-V7M-OPTSIZE: bx lr |
| ; |
| ; CHECK-ALIGNED-OPTSIZE-LABEL: store4_align1_optsize: |
| ; CHECK-ALIGNED-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-ALIGNED-OPTSIZE-NEXT: str r1, [r0] |
| ; CHECK-ALIGNED-OPTSIZE-NEXT: bx lr |
| entry: |
| store i32 %b, i32* %a, align 1 |
| ret void |
| } |
| |
| define i32 @load4_align2_minsize(i32* %a) nounwind minsize { |
| ; CHECK-V6M-MINSIZE-LABEL: load4_align2_minsize: |
| ; CHECK-V6M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-MINSIZE-NEXT: .save {r7, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: push {r7, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: bl __aeabi_uread4 |
| ; CHECK-V6M-MINSIZE-NEXT: pop {r7, pc} |
| ; |
| ; CHECK-V7M-MINSIZE-LABEL: load4_align2_minsize: |
| ; CHECK-V7M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-MINSIZE-NEXT: .save {r7, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: push {r7, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: bl __aeabi_uread4 |
| ; CHECK-V7M-MINSIZE-NEXT: pop {r7, pc} |
| ; |
| ; CHECK-ALIGNED-MINSIZE-LABEL: load4_align2_minsize: |
| ; CHECK-ALIGNED-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-ALIGNED-MINSIZE-NEXT: ldr r0, [r0] |
| ; CHECK-ALIGNED-MINSIZE-NEXT: bx lr |
| entry: |
| %tmp = load i32, i32* %a, align 2 |
| ret i32 %tmp |
| } |
| |
| define i32 @load4_align2_optsize(i32* %a) nounwind optsize { |
| ; CHECK-V6M-OPTSIZE-LABEL: load4_align2_optsize: |
| ; CHECK-V6M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-OPTSIZE-NOT: bl __aeabi_uread4 |
| ; CHECK-V6M-OPTSIZE: bx lr |
| ; |
| ; CHECK-V7M-OPTSIZE-LABEL: load4_align2_optsize: |
| ; CHECK-V7M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-OPTSIZE-NOT: bl __aeabi_uread4 |
| ; CHECK-V7M-OPTSIZE: bx lr |
| ; |
| ; CHECK-ALIGNED-OPTSIZE-LABEL: load4_align2_optsize: |
| ; CHECK-ALIGNED-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-ALIGNED-OPTSIZE-NEXT: ldr r0, [r0] |
| ; CHECK-ALIGNED-OPTSIZE-NEXT: bx lr |
| entry: |
| %tmp = load i32, i32* %a, align 2 |
| ret i32 %tmp |
| } |
| |
| define i64 @load6_align1_zext_minsize(i48* %a) nounwind minsize { |
| ; CHECK-V6M-MINSIZE-LABEL: load6_align1_zext_minsize: |
| ; CHECK-V6M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-MINSIZE-NEXT: .save {r4, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: push {r4, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: ldrb r1, [r0, #4] |
| ; CHECK-V6M-MINSIZE-NEXT: ldrb r2, [r0, #5] |
| ; CHECK-V6M-MINSIZE-NEXT: lsls r2, r2, #8 |
| ; CHECK-V6M-MINSIZE-NEXT: adds r4, r2, r1 |
| ; CHECK-V6M-MINSIZE-NEXT: bl __aeabi_uread4 |
| ; CHECK-V6M-MINSIZE-NEXT: mov r1, r4 |
| ; CHECK-V6M-MINSIZE-NEXT: pop {r4, pc} |
| ; |
| ; CHECK-V7M-MINSIZE-LABEL: load6_align1_zext_minsize: |
| ; CHECK-V7M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-MINSIZE-NEXT: .save {r4, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: push {r4, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: mov r4, r0 |
| ; CHECK-V7M-MINSIZE-NEXT: bl __aeabi_uread4 |
| ; CHECK-V7M-MINSIZE-NEXT: ldrb r2, [r4, #5] |
| ; CHECK-V7M-MINSIZE-NEXT: ldrb r1, [r4, #4] |
| ; CHECK-V7M-MINSIZE-NEXT: orr.w r1, r1, r2, lsl #8 |
| ; CHECK-V7M-MINSIZE-NEXT: pop {r4, pc} |
| ; |
| ; CHECK-ALIGNED-MINSIZE-LABEL: load6_align1_zext_minsize: |
| ; CHECK-ALIGNED-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-ALIGNED-MINSIZE-NEXT: ldr r2, [r0] |
| ; CHECK-ALIGNED-MINSIZE-NEXT: ldrh r1, [r0, #4] |
| ; CHECK-ALIGNED-MINSIZE-NEXT: mov r0, r2 |
| ; CHECK-ALIGNED-MINSIZE-NEXT: bx lr |
| entry: |
| %tmp = load i48, i48* %a, align 1 |
| %ext = zext i48 %tmp to i64 |
| ret i64 %ext |
| } |
| |
| define i64 @load6_align1_zext_optsize(i48* %a) nounwind optsize { |
| ; CHECK-V6M-OPTSIZE-LABEL: load6_align1_zext_optsize: |
| ; CHECK-V6M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-OPTSIZE-NOT: bl __aeabi_uread4 |
| ; CHECK-V6M-OPTSIZE: bx lr |
| ; |
| ; CHECK-V7M-OPTSIZE-LABEL: load6_align1_zext_optsize: |
| ; CHECK-V7M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-OPTSIZE-NOT: bl __aeabi_uread4 |
| ; CHECK-V7M-OPTSIZE: bx lr |
| ; |
| ; CHECK-ALIGNED-MINSIZE-LABEL: load6_align1_zext_optsize: |
| ; CHECK-ALIGNED-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-ALIGNED-MINSIZE-NEXT: ldr r2, [r0] |
| ; CHECK-ALIGNED-MINSIZE-NEXT: ldrh r1, [r0, #4] |
| ; CHECK-ALIGNED-MINSIZE-NEXT: mov r0, r2 |
| ; CHECK-ALIGNED-MINSIZE-NEXT: bx lr |
| entry: |
| %tmp = load i48, i48* %a, align 1 |
| %ext = zext i48 %tmp to i64 |
| ret i64 %ext |
| } |
| |
| define i64 @load6_align1_sext_minsize(i48* %a) nounwind minsize { |
| ; CHECK-V6M-MINSIZE-LABEL: load6_align1_sext_minsize: |
| ; CHECK-V6M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-MINSIZE-NEXT: .save {r4, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: push {r4, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: movs r1, #5 |
| ; CHECK-V6M-MINSIZE-NEXT: ldrsb r1, [r0, r1] |
| ; CHECK-V6M-MINSIZE-NEXT: lsls r1, r1, #8 |
| ; CHECK-V6M-MINSIZE-NEXT: ldrb r2, [r0, #4] |
| ; CHECK-V6M-MINSIZE-NEXT: adds r4, r1, r2 |
| ; CHECK-V6M-MINSIZE-NEXT: bl __aeabi_uread4 |
| ; CHECK-V6M-MINSIZE-NEXT: mov r1, r4 |
| ; CHECK-V6M-MINSIZE-NEXT: pop {r4, pc} |
| ; |
| ; CHECK-V7M-MINSIZE-LABEL: load6_align1_sext_minsize: |
| ; CHECK-V7M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-MINSIZE-NEXT: .save {r4, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: push {r4, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: ldrsb.w r1, [r0, #5] |
| ; CHECK-V7M-MINSIZE-NEXT: ldrb r2, [r0, #4] |
| ; CHECK-V7M-MINSIZE-NEXT: orr.w r4, r2, r1, lsl #8 |
| ; CHECK-V7M-MINSIZE-NEXT: bl __aeabi_uread4 |
| ; CHECK-V7M-MINSIZE-NEXT: mov r1, r4 |
| ; CHECK-V7M-MINSIZE-NEXT: pop {r4, pc} |
| ; |
| ; CHECK-ALIGNED-MINSIZE-LABEL: load6_align1_sext_minsize: |
| ; CHECK-ALIGNED-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-ALIGNED-MINSIZE-NEXT: ldr r2, [r0] |
| ; CHECK-ALIGNED-MINSIZE-NEXT: ldrsh.w r1, [r0, #4] |
| ; CHECK-ALIGNED-MINSIZE-NEXT: mov r0, r2 |
| ; CHECK-ALIGNED-MINSIZE-NEXT: bx lr |
| entry: |
| %tmp = load i48, i48* %a, align 1 |
| %ext = sext i48 %tmp to i64 |
| ret i64 %ext |
| } |
| |
| define i64 @load6_align1_sext_optsize(i48* %a) nounwind optsize { |
| ; CHECK-V6M-OPTSIZE-LABEL: load6_align1_sext_optsize: |
| ; CHECK-V6M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-OPTSIZE-NOT: bl __aeabi_uread4 |
| ; CHECK-V6M-OPTSIZE: bx lr |
| ; |
| ; CHECK-V7M-OPTSIZE-LABEL: load6_align1_sext_optsize: |
| ; CHECK-V7M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-OPTSIZE-NOT: bl __aeabi_uread4 |
| ; CHECK-V7M-OPTSIZE: bx lr |
| ; |
| ; CHECK-ALIGNED-OPTSIZE-LABEL: load6_align1_sext_optsize: |
| ; CHECK-ALIGNED-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-ALIGNED-OPTSIZE-NEXT: ldr r2, [r0] |
| ; CHECK-ALIGNED-OPTSIZE-NEXT: ldrsh.w r1, [r0, #4] |
| ; CHECK-ALIGNED-OPTSIZE-NEXT: mov r0, r2 |
| ; CHECK-ALIGNED-OPTSIZE-NEXT: bx lr |
| entry: |
| %tmp = load i48, i48* %a, align 1 |
| %ext = sext i48 %tmp to i64 |
| ret i64 %ext |
| } |
| |
| define void @store6_align1_minsize(i48* %a, i48 %b) nounwind minsize { |
| ; CHECK-V6M-MINSIZE-LABEL: store6_align1_minsize: |
| ; CHECK-V6M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-MINSIZE-NEXT: .save {r7, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: push {r7, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: mov r1, r0 |
| ; CHECK-V6M-MINSIZE-NEXT: strb r3, [r0, #4] |
| ; CHECK-V6M-MINSIZE-NEXT: lsrs r0, r3, #8 |
| ; CHECK-V6M-MINSIZE-NEXT: strb r0, [r1, #5] |
| ; CHECK-V6M-MINSIZE-NEXT: mov r0, r2 |
| ; CHECK-V6M-MINSIZE-NEXT: bl __aeabi_uwrite4 |
| ; CHECK-V6M-MINSIZE-NEXT: pop {r7, pc} |
| ; |
| ; CHECK-V7M-MINSIZE-LABEL: store6_align1_minsize: |
| ; CHECK-V7M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-MINSIZE-NEXT: .save {r7, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: push {r7, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: mov r1, r0 |
| ; CHECK-V7M-MINSIZE-NEXT: strb r3, [r0, #4] |
| ; CHECK-V7M-MINSIZE-NEXT: lsrs r0, r3, #8 |
| ; CHECK-V7M-MINSIZE-NEXT: strb r0, [r1, #5] |
| ; CHECK-V7M-MINSIZE-NEXT: mov r0, r2 |
| ; CHECK-V7M-MINSIZE-NEXT: bl __aeabi_uwrite4 |
| ; CHECK-V7M-MINSIZE-NEXT: pop {r7, pc} |
| ; |
| ; CHECK-ALIGNED-MINSIZE-LABEL: store6_align1_minsize: |
| ; CHECK-ALIGNED-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-ALIGNED-MINSIZE-NEXT: strh r3, [r0, #4] |
| ; CHECK-ALIGNED-MINSIZE-NEXT: str r2, [r0] |
| ; CHECK-ALIGNED-MINSIZE-NEXT: bx lr |
| entry: |
| store i48 %b, i48* %a, align 1 |
| ret void |
| } |
| |
| define void @store6_align1_optsize(i48* %a, i48 %b) nounwind optsize { |
| ; CHECK-V6M-OPTSIZE-LABEL: store6_align1_optsize: |
| ; CHECK-V6M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-OPTSIZE-NOT: bl __aeabi_uwrite4 |
| ; CHECK-V6M-OPTSIZE: bx lr |
| ; |
| ; CHECK-V7M-OPTSIZE-LABEL: store6_align1_optsize: |
| ; CHECK-V7M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-OPTSIZE-NOT: bl __aeabi_uwrite4 |
| ; CHECK-V7M-OPTSIZE: bx lr |
| ; |
| ; CHECK-ALIGNED-OPTSIZE-LABEL: store6_align1_optsize: |
| ; CHECK-ALIGNED-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-ALIGNED-OPTSIZE-NEXT: strh r3, [r0, #4] |
| ; CHECK-ALIGNED-OPTSIZE-NEXT: str r2, [r0] |
| ; CHECK-ALIGNED-OPTSIZE-NEXT: bx lr |
| entry: |
| store i48 %b, i48* %a, align 1 |
| ret void |
| } |
| |
| define void @loadstore8_align4_minsize(double* %a, double* %b) nounwind minsize { |
| ; CHECK-V6M-MINSIZE-LABEL: loadstore8_align4_minsize: |
| ; CHECK-V6M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-MINSIZE-NEXT: .save {r4, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: push {r4, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: mov r4, r1 |
| ; CHECK-V6M-MINSIZE-NEXT: bl __aeabi_uread8 |
| ; CHECK-V6M-MINSIZE-NEXT: mov r2, r4 |
| ; CHECK-V6M-MINSIZE-NEXT: bl __aeabi_uwrite8 |
| ; CHECK-V6M-MINSIZE-NEXT: pop {r4, pc} |
| ; |
| ; CHECK-V7M-MINSIZE-LABEL: loadstore8_align4_minsize: |
| ; CHECK-V7M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-MINSIZE-NEXT: .save {r4, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: push {r4, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: mov r4, r1 |
| ; CHECK-V7M-MINSIZE-NEXT: bl __aeabi_uread8 |
| ; CHECK-V7M-MINSIZE-NEXT: mov r2, r4 |
| ; CHECK-V7M-MINSIZE-NEXT: bl __aeabi_uwrite8 |
| ; CHECK-V7M-MINSIZE-NEXT: pop {r4, pc} |
| ; |
| entry: |
| %tmp = load double, double* %a, align 1 |
| store double %tmp, double* %b, align 1 |
| ret void |
| } |
| |
| define void @loadstore8_align4_optsize(double* %a, double* %b) nounwind optsize { |
| ; CHECK-V6M-OPTSIZE-LABEL: loadstore8_align4_optsize: |
| ; CHECK-V6M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-OPTSIZE-NEXT: .save {r4, r5, r6, r7, lr} |
| ; CHECK-V6M-OPTSIZE-NEXT: push {r4, r5, r6, r7, lr} |
| ; CHECK-V6M-OPTSIZE-NOT: bl __aeabi_uread8 |
| ; CHECK-V6M-OPTSIZE-NOT: bl __aeabi_uwrite8 |
| ; CHECK-V6M-OPTSIZE: pop {r4, r5, r6, r7, pc} |
| ; |
| ; CHECK-V7M-OPTSIZE-LABEL: loadstore8_align4_optsize: |
| ; CHECK-V7M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-OPTSIZE-NEXT: .save {r4, r5, r6, lr} |
| ; CHECK-V7M-OPTSIZE-NEXT: push {r4, r5, r6, lr} |
| ; CHECK-V7M-OPTSIZE-NOT: bl __aeabi_uread8 |
| ; CHECK-V7M-OPTSIZE-NOT: bl __aeabi_uwrite8 |
| ; CHECK-V7M-OPTSIZE: pop {r4, r5, r6, pc} |
| entry: |
| %tmp = load double, double* %a, align 1 |
| store double %tmp, double* %b, align 1 |
| ret void |
| } |
| |
| define double @load8_align1_minsize(double* %a) nounwind minsize { |
| ; CHECK-V6M-MINSIZE-LABEL: load8_align1_minsize: |
| ; CHECK-V6M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-MINSIZE-NEXT: .save {r7, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: push {r7, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: bl __aeabi_uread8 |
| ; CHECK-V6M-MINSIZE-NEXT: pop {r7, pc} |
| ; |
| ; CHECK-V7M-MINSIZE-LABEL: load8_align1_minsize: |
| ; CHECK-V7M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-MINSIZE-NEXT: .save {r7, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: push {r7, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: bl __aeabi_uread8 |
| ; CHECK-V7M-MINSIZE-NEXT: pop {r7, pc} |
| ; |
| entry: |
| %tmp = load double, double* %a, align 1 |
| ret double %tmp |
| } |
| |
| define double @load8_align1_optsize(double* %a) nounwind optsize { |
| ; CHECK-V6M-OPTSIZE-LABEL: load8_align1_optsize: |
| ; CHECK-V6M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-OPTSIZE-NOT: bl __aeabi_uread8 |
| ; CHECK-V6M-OPTSIZE: bx lr |
| ; |
| ; CHECK-V7M-OPTSIZE-LABEL: load8_align1_optsize: |
| ; CHECK-V7M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-OPTSIZE-NOT: bl __aeabi_uread8 |
| ; CHECK-V7M-OPTSIZE: bx lr |
| ; |
| entry: |
| %tmp = load double, double* %a, align 1 |
| ret double %tmp |
| } |
| |
| define void @store8_align1_minsize(double* %a, double %b) nounwind minsize { |
| ; CHECK-V6M-MINSIZE-LABEL: store8_align1_minsize: |
| ; CHECK-V6M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-MINSIZE-NEXT: .save {r7, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: push {r7, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: mov r1, r3 |
| ; CHECK-V6M-MINSIZE-NEXT: mov r3, r0 |
| ; CHECK-V6M-MINSIZE-NEXT: mov r0, r2 |
| ; CHECK-V6M-MINSIZE-NEXT: mov r2, r3 |
| ; CHECK-V6M-MINSIZE-NEXT: bl __aeabi_uwrite8 |
| ; CHECK-V6M-MINSIZE-NEXT: pop {r7, pc} |
| ; |
| ; CHECK-V7M-MINSIZE-LABEL: store8_align1_minsize: |
| ; CHECK-V7M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-MINSIZE-NEXT: .save {r7, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: push {r7, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: mov r1, r3 |
| ; CHECK-V7M-MINSIZE-NEXT: mov r3, r0 |
| ; CHECK-V7M-MINSIZE-NEXT: mov r0, r2 |
| ; CHECK-V7M-MINSIZE-NEXT: mov r2, r3 |
| ; CHECK-V7M-MINSIZE-NEXT: bl __aeabi_uwrite8 |
| ; CHECK-V7M-MINSIZE-NEXT: pop {r7, pc} |
| entry: |
| store double %b, double* %a, align 1 |
| ret void |
| } |
| |
| define void @store8_align1_optsize(double* %a, double %b) nounwind optsize { |
| ; CHECK-V6M-OPTSIZE-LABEL: store8_align1_optsize: |
| ; CHECK-V6M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-OPTSIZE-NOT: bl __aeabi_uwrite8 |
| ; CHECK-V6M-OPTSIZE: bx lr |
| ; |
| ; CHECK-V7M-OPTSIZE-LABEL: store8_align1_optsize: |
| ; CHECK-V7M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-OPTSIZE-NOT: bl __aeabi_uwrite8 |
| ; CHECK-V7M-OPTSIZE: bx lr |
| entry: |
| store double %b, double* %a, align 1 |
| ret void |
| } |
| |
| define double @load8_align2_minsize(double* %a) nounwind minsize { |
| ; CHECK-V6M-MINSIZE-LABEL: load8_align2_minsize: |
| ; CHECK-V6M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-MINSIZE-NEXT: .save {r7, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: push {r7, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: bl __aeabi_uread8 |
| ; CHECK-V6M-MINSIZE-NEXT: pop {r7, pc} |
| ; |
| ; CHECK-V7M-MINSIZE-LABEL: load8_align2_minsize: |
| ; CHECK-V7M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-MINSIZE-NEXT: .save {r7, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: push {r7, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: bl __aeabi_uread8 |
| ; CHECK-V7M-MINSIZE-NEXT: pop {r7, pc} |
| entry: |
| %tmp = load double, double* %a, align 2 |
| ret double %tmp |
| } |
| |
| define double @load8_align2_optsize(double* %a) nounwind optsize { |
| ; CHECK-V6M-OPTSIZE-LABEL: load8_align2_optsize: |
| ; CHECK-V6M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-OPTSIZE-NOT: bl __aeabi_uread8 |
| ; CHECK-V6M-OPTSIZE: bx lr |
| ; |
| ; CHECK-V7M-OPTSIZE-LABEL: load8_align2_optsize: |
| ; CHECK-V7M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-OPTSIZE-NOT: bl __aeabi_uread8 |
| ; CHECK-V7M-OPTSIZE: bx lr |
| entry: |
| %tmp = load double, double* %a, align 2 |
| ret double %tmp |
| } |
| |
| define i64 @load12_align1_trunc_minsize(i96* %a) nounwind minsize { |
| ; CHECK-V6M-MINSIZE-LABEL: load12_align1_trunc_minsize: |
| ; CHECK-V6M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-MINSIZE-NEXT: .save {r7, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: push {r7, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: bl __aeabi_uread8 |
| ; CHECK-V6M-MINSIZE-NEXT: pop {r7, pc} |
| ; |
| ; CHECK-V7M-MINSIZE-LABEL: load12_align1_trunc_minsize: |
| ; CHECK-V7M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-MINSIZE-NEXT: .save {r7, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: push {r7, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: bl __aeabi_uread8 |
| ; CHECK-V7M-MINSIZE-NEXT: pop {r7, pc} |
| entry: |
| %tmp = load i96, i96* %a, align 1 |
| %ext = trunc i96 %tmp to i64 |
| ret i64 %ext |
| } |
| |
| define i64 @load12_align1_trunc_optsize(i96* %a) nounwind optsize { |
| ; CHECK-V6M-OPTSIZE-LABEL: load12_align1_trunc_optsize: |
| ; CHECK-V6M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-OPTSIZE-NOT: bl __aeabi_uread8 |
| ; CHECK-V6M-OPTSIZE: bx lr |
| ; |
| ; CHECK-V7M-OPTSIZE-LABEL: load12_align1_trunc_optsize: |
| ; CHECK-V7M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-OPTSIZE-NOT: bx __aeabi_uread8 |
| ; CHECK-V7M-OPTSIZE: bx lr |
| entry: |
| %tmp = load i96, i96* %a, align 1 |
| %ext = trunc i96 %tmp to i64 |
| ret i64 %ext |
| } |
| |
| define void @store12_align4_trunc_minsize(i96* %a, i96 %b) nounwind minsize { |
| ; CHECK-V6M-MINSIZE-LABEL: store12_align4_trunc_minsize: |
| ; CHECK-V6M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-MINSIZE-NEXT: .save {r4, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: push {r4, lr} |
| ; CHECK-V6M-MINSIZE-NEXT: mov r1, r3 |
| ; CHECK-V6M-MINSIZE-NEXT: mov r4, r0 |
| ; CHECK-V6M-MINSIZE-NEXT: mov r0, r2 |
| ; CHECK-V6M-MINSIZE-NEXT: mov r2, r4 |
| ; CHECK-V6M-MINSIZE-NEXT: bl __aeabi_uwrite8 |
| ; CHECK-V6M-MINSIZE-NEXT: adds r4, #8 |
| ; CHECK-V6M-MINSIZE-NEXT: ldr r0, [sp, #8] |
| ; CHECK-V6M-MINSIZE-NEXT: mov r1, r4 |
| ; CHECK-V6M-MINSIZE-NEXT: bl __aeabi_uwrite4 |
| ; CHECK-V6M-MINSIZE-NEXT: pop {r4, pc} |
| ; |
| ; CHECK-V7M-MINSIZE-LABEL: store12_align4_trunc_minsize: |
| ; CHECK-V7M-MINSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-MINSIZE-NEXT: .save {r4, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: push {r4, lr} |
| ; CHECK-V7M-MINSIZE-NEXT: mov r4, r0 |
| ; CHECK-V7M-MINSIZE-NEXT: mov r0, r2 |
| ; CHECK-V7M-MINSIZE-NEXT: mov r1, r3 |
| ; CHECK-V7M-MINSIZE-NEXT: mov r2, r4 |
| ; CHECK-V7M-MINSIZE-NEXT: bl __aeabi_uwrite8 |
| ; CHECK-V7M-MINSIZE-NEXT: ldr r0, [sp, #8] |
| ; CHECK-V7M-MINSIZE-NEXT: add.w r1, r4, #8 |
| ; CHECK-V7M-MINSIZE-NEXT: bl __aeabi_uwrite4 |
| ; CHECK-V7M-MINSIZE-NEXT: pop {r4, pc} |
| entry: |
| store i96 %b, i96* %a, align 1 |
| ret void |
| } |
| |
| define void @store12_align4_trunc_optsize(i96* %a, i96 %b) nounwind optsize { |
| ; CHECK-V6M-OPTSIZE-LABEL: store12_align4_trunc_optsize: |
| ; CHECK-V6M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V6M-OPTSIZE-NEXT: .save {r4, lr} |
| ; CHECK-V6M-OPTSIZE-NEXT: push {r4, lr} |
| ; CHECK-V6M-OPTSIZE-NOT: bl __aeabi_uwrite8 |
| ; CHECK-V6M-OPTSIZE-NOT: bl __aeabi_uwrite4 |
| ; CHECK-V6M-OPTSIZE: pop {r4, pc} |
| ; |
| ; CHECK-V7M-OPTSIZE-LABEL: store12_align4_trunc_optsize: |
| ; CHECK-V7M-OPTSIZE: @ %bb.0: @ %entry |
| ; CHECK-V7M-OPTSIZE-NOT: bl __aeabi_uwrite8 |
| ; CHECK-V7M-OPTSIZE-NOT: bl __aeabi_uwrite4 |
| ; CHECK-V7M-OPTSIZE: bx lr |
| entry: |
| store i96 %b, i96* %a, align 1 |
| ret void |
| } |
