| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| ; RUN: llc -mtriple=amdgpu11.00-amd-amdhsa -mattr=+wavefrontsize64 --global-isel=0 < %s | FileCheck -check-prefixes=CHECK %s |
| |
| define amdgpu_kernel void @ballot_test(half %x, half %y) { |
| ; CHECK-LABEL: ballot_test: |
| ; CHECK: ; %bb.0: |
| ; CHECK-NEXT: s_load_b32 s0, s[4:5], 0x0 |
| ; CHECK-NEXT: v_mov_b32_e32 v2, 0 |
| ; CHECK-NEXT: s_waitcnt lgkmcnt(0) |
| ; CHECK-NEXT: s_lshr_b32 s1, s0, 16 |
| ; CHECK-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) |
| ; CHECK-NEXT: v_cmp_eq_f16_e64 s[0:1], s0, s1 |
| ; CHECK-NEXT: v_mov_b32_e32 v0, s0 |
| ; CHECK-NEXT: s_delay_alu instid0(VALU_DEP_2) |
| ; CHECK-NEXT: v_mov_b32_e32 v1, s1 |
| ; CHECK-NEXT: ds_store_b64 v2, v[0:1] |
| ; CHECK-NEXT: s_endpgm |
| %cmp = fcmp oeq half %x, %y |
| %ballot = tail call i64 @llvm.amdgcn.ballot.i64(i1 %cmp) |
| store i64 %ballot, ptr addrspace(3) zeroinitializer, align 2147483648 |
| ret void |
| } |
| |
| declare i64 @llvm.amdgcn.ballot.i64(i1) #0 |
| |
| attributes #0 = { convergent nounwind readnone willreturn } |
