llvm/test/CodeGen/AMDGPU/do-not-fold-copy.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple=amdgpu9.00 -run-pass=si-fold-operands -o - %s | FileCheck %s

---
liveins:
name:            do_not_fold_copy_with_implicit_exec
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: do_not_fold_copy_with_implicit_exec
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 0
  ; CHECK-NEXT:   [[S_MOV_B64_1:%[0-9]+]]:sreg_64 = S_MOV_B64 0
  ; CHECK-NEXT:   [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0, implicit $exec
  ; CHECK-NEXT:   S_BRANCH %bb.1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[PHI:%[0-9]+]]:sreg_64 = PHI [[S_MOV_B64_1]], %bb.0, %4, %bb.1
  ; CHECK-NEXT:   [[PHI1:%[0-9]+]]:sreg_32 = PHI [[S_MOV_B32_]], %bb.0, %6, %bb.1
  ; CHECK-NEXT:   [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[PHI1]], 1, implicit-def dead $scc
  ; CHECK-NEXT:   [[SI_IF_BREAK:%[0-9]+]]:sreg_64 = SI_IF_BREAK [[S_MOV_B64_]], [[PHI]], implicit-def dead $scc
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY [[S_ADD_I32_]], implicit $exec
  ; CHECK-NEXT:   SI_LOOP [[SI_IF_BREAK]], %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
  ; CHECK-NEXT:   S_BRANCH %bb.2
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   SI_END_CF [[SI_IF_BREAK]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:sreg_64_xexec = IMPLICIT_DEF
  ; CHECK-NEXT:   [[V_SET_INACTIVE_B32_:%[0-9]+]]:vgpr_32 = V_SET_INACTIVE_B32 0, [[COPY]], 0, 0, killed [[DEF]], implicit $exec
  ; CHECK-NEXT:   S_ENDPGM 0

  bb.0:
    %0:sreg_64 = S_MOV_B64 0
    %1:sreg_64 = S_MOV_B64 0
    %2:sreg_32 = S_MOV_B32 0, implicit $exec
    S_BRANCH %bb.1

  bb.1:
    %3:sreg_64 = PHI %1, %bb.0, %4, %bb.1
    %5:sreg_32 = PHI %2, %bb.0, %6, %bb.1
    %6:sreg_32 = S_ADD_I32 %5, 1, implicit-def dead $scc
    %4:sreg_64 = SI_IF_BREAK %0, %3, implicit-def dead $scc
    %7:vgpr_32 = COPY %6, implicit $exec
    SI_LOOP %4, %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
    S_BRANCH %bb.2

  bb.2:
    SI_END_CF %4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
    %8:vgpr_32 = COPY %7
    %9:sreg_64_xexec = IMPLICIT_DEF
    %10:vgpr_32 = V_SET_INACTIVE_B32 0, %8, 0, 0, killed %9, implicit $exec
    S_ENDPGM 0
...

# An SGPR->VGPR copy with no implicit $exec read, inserted in a divergent loop
# to latch a per-lane value, is read after the loop. SIFoldOperands must not
# fold the scalar source into that exit use: it escapes the loop, so the fold
# would drop the per-lane snapshot.
---
name:            do_not_fold_sgpr_to_vgpr_copy_escaping_loop
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: do_not_fold_sgpr_to_vgpr_copy_escaping_loop
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT:   liveins: $sgpr0, $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
  ; CHECK-NEXT:   [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 0
  ; CHECK-NEXT:   [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.2(0x04000000), %bb.1(0x7c000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[PHI:%[0-9]+]]:sreg_64 = PHI [[S_MOV_B64_]], %bb.0, %5, %bb.1
  ; CHECK-NEXT:   [[PHI1:%[0-9]+]]:sreg_32 = PHI [[S_MOV_B32_]], %bb.0, %7, %bb.1
  ; CHECK-NEXT:   [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[PHI1]], implicit-def dead $scc
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
  ; CHECK-NEXT:   [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[PHI1]], 1, implicit-def dead $scc
  ; CHECK-NEXT:   [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_EQ_U32_e64 [[COPY1]], [[S_ADD_I32_]], implicit $exec
  ; CHECK-NEXT:   [[SI_IF_BREAK:%[0-9]+]]:sreg_64 = SI_IF_BREAK [[V_CMP_EQ_U32_e64_]], [[PHI]], implicit-def dead $scc
  ; CHECK-NEXT:   SI_LOOP [[SI_IF_BREAK]], %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
  ; CHECK-NEXT:   S_BRANCH %bb.2
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   SI_END_CF [[SI_IF_BREAK]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
  ; CHECK-NEXT:   [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY2]], 1, 0, implicit $exec
  ; CHECK-NEXT:   $vgpr0 = COPY [[V_ADD_U32_e64_]]
  ; CHECK-NEXT:   SI_RETURN implicit $vgpr0
  bb.0:
    successors: %bb.1
    liveins: $sgpr0, $vgpr0

    %0:sreg_32 = COPY $sgpr0
    %1:vgpr_32 = COPY $vgpr0
    %2:sreg_64 = S_MOV_B64 0
    %3:sreg_32 = S_MOV_B32 0

  bb.1:
    successors: %bb.2(0x04000000), %bb.1(0x7c000000)

    %4:sreg_64 = PHI %2, %bb.0, %5, %bb.1
    %6:sreg_32 = PHI %3, %bb.0, %7, %bb.1
    %8:sreg_32 = S_XOR_B32 %0, %6, implicit-def dead $scc
    %9:vgpr_32 = COPY %8
    %7:sreg_32 = S_ADD_I32 %6, 1, implicit-def dead $scc
    %10:sreg_64 = V_CMP_EQ_U32_e64 %1, %7, implicit $exec
    %5:sreg_64 = SI_IF_BREAK %10, %4, implicit-def dead $scc
    SI_LOOP %5, %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
    S_BRANCH %bb.2

  bb.2:
    SI_END_CF %5, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
    %11:vgpr_32 = V_ADD_U32_e64 %9, 1, 0, implicit $exec
    $vgpr0 = COPY %11
    SI_RETURN implicit $vgpr0
...

# Same latch, but the loop-exit use is itself a COPY. The scalar source must
# not be propagated through that exit copy either (separate fold path).
---
name:            do_not_fold_sgpr_to_vgpr_copy_escaping_loop_via_copy_use
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: do_not_fold_sgpr_to_vgpr_copy_escaping_loop_via_copy_use
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT:   liveins: $sgpr0, $vgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
  ; CHECK-NEXT:   [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 0
  ; CHECK-NEXT:   [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.2(0x04000000), %bb.1(0x7c000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[PHI:%[0-9]+]]:sreg_64 = PHI [[S_MOV_B64_]], %bb.0, %5, %bb.1
  ; CHECK-NEXT:   [[PHI1:%[0-9]+]]:sreg_32 = PHI [[S_MOV_B32_]], %bb.0, %7, %bb.1
  ; CHECK-NEXT:   [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[PHI1]], implicit-def dead $scc
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
  ; CHECK-NEXT:   [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[PHI1]], 1, implicit-def dead $scc
  ; CHECK-NEXT:   [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_EQ_U32_e64 [[COPY1]], [[S_ADD_I32_]], implicit $exec
  ; CHECK-NEXT:   [[SI_IF_BREAK:%[0-9]+]]:sreg_64 = SI_IF_BREAK [[V_CMP_EQ_U32_e64_]], [[PHI]], implicit-def dead $scc
  ; CHECK-NEXT:   SI_LOOP [[SI_IF_BREAK]], %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
  ; CHECK-NEXT:   S_BRANCH %bb.2
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   SI_END_CF [[SI_IF_BREAK]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
  ; CHECK-NEXT:   [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY2]], 1, 0, implicit $exec
  ; CHECK-NEXT:   $vgpr0 = COPY [[V_ADD_U32_e64_]]
  ; CHECK-NEXT:   SI_RETURN implicit $vgpr0
  bb.0:
    successors: %bb.1
    liveins: $sgpr0, $vgpr0

    %0:sreg_32 = COPY $sgpr0
    %1:vgpr_32 = COPY $vgpr0
    %2:sreg_64 = S_MOV_B64 0
    %3:sreg_32 = S_MOV_B32 0

  bb.1:
    successors: %bb.2(0x04000000), %bb.1(0x7c000000)

    %4:sreg_64 = PHI %2, %bb.0, %5, %bb.1
    %6:sreg_32 = PHI %3, %bb.0, %7, %bb.1
    %8:sreg_32 = S_XOR_B32 %0, %6, implicit-def dead $scc
    %9:vgpr_32 = COPY %8
    %7:sreg_32 = S_ADD_I32 %6, 1, implicit-def dead $scc
    %10:sreg_64 = V_CMP_EQ_U32_e64 %1, %7, implicit $exec
    %5:sreg_64 = SI_IF_BREAK %10, %4, implicit-def dead $scc
    SI_LOOP %5, %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
    S_BRANCH %bb.2

  bb.2:
    SI_END_CF %5, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
    %11:vgpr_32 = COPY %9
    %12:vgpr_32 = V_ADD_U32_e64 %11, 1, 0, implicit $exec
    $vgpr0 = COPY %12
    SI_RETURN implicit $vgpr0
...

# Same SGPR->VGPR copy escaping a loop, but the loop does not modify $exec, so
# there is no temporal divergence and the fold is allowed.
---
name:            fold_from_loop_allowed_because_loop_does_not_modify_exec
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: fold_from_loop_allowed_because_loop_does_not_modify_exec
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.2(0x04000000), %bb.1(0x7c000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[PHI:%[0-9]+]]:sreg_32 = PHI [[S_MOV_B32_]], %bb.0, %2, %bb.1
  ; CHECK-NEXT:   [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[PHI]], 1, implicit-def $scc
  ; CHECK-NEXT:   S_CBRANCH_SCC1 %bb.1, implicit $scc
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[PHI]], 1, 0, implicit $exec
  ; CHECK-NEXT:   $vgpr0 = COPY [[V_ADD_U32_e64_]]
  ; CHECK-NEXT:   SI_RETURN implicit $vgpr0
  bb.0:
    successors: %bb.1

    %0:sreg_32 = S_MOV_B32 0

  bb.1:
    successors: %bb.2(0x04000000), %bb.1(0x7c000000)

    %1:sreg_32 = PHI %0, %bb.0, %2, %bb.1
    %3:vgpr_32 = COPY %1
    %2:sreg_32 = S_ADD_I32 %1, 1, implicit-def $scc
    S_CBRANCH_SCC1 %bb.1, implicit $scc

  bb.2:
    %4:vgpr_32 = V_ADD_U32_e64 %3, 1, 0, implicit $exec
    $vgpr0 = COPY %4
    SI_RETURN implicit $vgpr0
...