llvm/test/CodeGen/X86/phielim-undef.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=x86_64-- -verify-machineinstrs -o - %s -run-pass=livevars,phi-node-elimination,twoaddressinstruction | FileCheck %s

--- |
  @b114 = external global i16, align 1

  define void @f245() {
  entry:
    unreachable
  }
...
---
name: f245
tracksRegLiveness: true
body: |
  ; CHECK-LABEL: name: f245
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.5(0x40000000), %bb.1(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm $rip, 1, $noreg, target-flags(x86-gotpcrel) @b114, $noreg
  ; CHECK-NEXT:   [[MOV16rm:%[0-9]+]]:gr16 = MOV16rm killed [[MOV64rm]], 1, $noreg, 0, $noreg :: (load (s16) from @b114, align 1)
  ; CHECK-NEXT:   TEST8ri undef %2:gr8, 1, implicit-def $eflags
  ; CHECK-NEXT:   JCC_1 %bb.5, 5, implicit killed $eflags
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gr16 = COPY killed [[MOV16rm]]
  ; CHECK-NEXT:   JMP_1 %bb.2
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   successors: %bb.4(0x40000000), %bb.3(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   dead %5:gr16 = IMPLICIT_DEF
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:gr16 = COPY killed [[COPY]]
  ; CHECK-NEXT:   TEST8ri undef %7:gr8, 1, implicit-def $eflags
  ; CHECK-NEXT:   JCC_1 %bb.4, 5, implicit killed $eflags
  ; CHECK-NEXT:   JMP_1 %bb.3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.3:
  ; CHECK-NEXT:   successors: %bb.6(0x40000000), %bb.4(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def dead $eflags
  ; CHECK-NEXT:   dead %9:gr16 = COPY killed [[MOV32r0_]].sub_16bit
  ; CHECK-NEXT:   CMP16ri8 killed [[COPY1]], 0, implicit-def $eflags
  ; CHECK-NEXT:   JCC_1 %bb.6, 5, implicit killed $eflags
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.4:
  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:gr16 = IMPLICIT_DEF
  ; CHECK-NEXT:   JMP_1 %bb.2
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.5:
  ; CHECK-NEXT:   RET64
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.6:
  bb.0:
    successors: %bb.6(0x40000000), %bb.1(0x40000000)

    %5:gr64 = MOV64rm $rip, 1, $noreg, target-flags(x86-gotpcrel) @b114, $noreg
    %6:gr16 = MOV16rm killed %5, 1, $noreg, 0, $noreg :: (load (s16) from @b114, align 1)
    TEST8ri undef %4:gr8, 1, implicit-def $eflags
    JCC_1 %bb.6, 5, implicit killed $eflags

  bb.1:
    successors: %bb.2(0x80000000)

    JMP_1 %bb.2

  bb.2:
    successors: %bb.5(0x40000000), %bb.4(0x40000000)

    %1:gr16 = PHI %6, %bb.1, undef %10:gr16, %bb.5
    dead %2:gr16 = PHI undef %6, %bb.1, undef %3:gr16, %bb.5
    TEST8ri undef %7:gr8, 1, implicit-def $eflags
    JCC_1 %bb.5, 5, implicit killed $eflags
    JMP_1 %bb.4

  bb.4:
    successors: %bb.7(0x40000000), %bb.5(0x40000000)

    %8:gr32 = MOV32r0 implicit-def dead $eflags
    %9:gr16 = COPY killed %8.sub_16bit
    CMP16ri8 killed %1, 0, implicit-def $eflags
    JCC_1 %bb.7, 5, implicit killed $eflags

  bb.5:
    successors: %bb.2(0x80000000)

    JMP_1 %bb.2

  bb.6:
    RET64

  bb.7:
...