llvm/test/CodeGen/MIR/X86/named-registers.mir

# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
# This test ensures that the MIR parser parses X86 registers correctly.

--- |

  define i32 @foo() {
  entry:
    ret i32 0
  }

...
---
# CHECK: name: foo
name:            foo
body: |
  bb.0.entry:
    ; CHECK:      $eax = MOV32r0
    ; CHECK-NEXT: RET64 $eax
    $eax = MOV32r0 implicit-def $eflags
    RET64 $eax
...