| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX6 %s |
| # RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX8 %s |
| # RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX9 %s |
| # RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX10 %s |
| |
| --- |
| name: uaddo_s32_s1_sss |
| legalized: true |
| regBankSelected: true |
| |
| body: | |
| bb.0: |
| liveins: $sgpr0, $sgpr1 |
| |
| ; GFX6-LABEL: name: uaddo_s32_s1_sss |
| ; GFX6: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 |
| ; GFX6: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 |
| ; GFX6: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY1]], implicit-def $scc |
| ; GFX6: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc |
| ; GFX6: $scc = COPY [[COPY2]] |
| ; GFX6: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 [[COPY]], [[COPY1]], implicit $scc |
| ; GFX6: S_ENDPGM 0, implicit [[S_ADD_U32_]], implicit [[S_CSELECT_B32_]] |
| ; GFX8-LABEL: name: uaddo_s32_s1_sss |
| ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 |
| ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 |
| ; GFX8: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY1]], implicit-def $scc |
| ; GFX8: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc |
| ; GFX8: $scc = COPY [[COPY2]] |
| ; GFX8: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 [[COPY]], [[COPY1]], implicit $scc |
| ; GFX8: S_ENDPGM 0, implicit [[S_ADD_U32_]], implicit [[S_CSELECT_B32_]] |
| ; GFX9-LABEL: name: uaddo_s32_s1_sss |
| ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 |
| ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 |
| ; GFX9: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY1]], implicit-def $scc |
| ; GFX9: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc |
| ; GFX9: $scc = COPY [[COPY2]] |
| ; GFX9: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 [[COPY]], [[COPY1]], implicit $scc |
| ; GFX9: S_ENDPGM 0, implicit [[S_ADD_U32_]], implicit [[S_CSELECT_B32_]] |
| ; GFX10-LABEL: name: uaddo_s32_s1_sss |
| ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 |
| ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 |
| ; GFX10: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY1]], implicit-def $scc |
| ; GFX10: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc |
| ; GFX10: $scc = COPY [[COPY2]] |
| ; GFX10: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 [[COPY]], [[COPY1]], implicit $scc |
| ; GFX10: S_ENDPGM 0, implicit [[S_ADD_U32_]], implicit [[S_CSELECT_B32_]] |
| %0:sgpr(s32) = COPY $sgpr0 |
| %1:sgpr(s32) = COPY $sgpr1 |
| %2:sgpr(s32), %3:sgpr(s32) = G_UADDO %0, %1 |
| %4:sgpr(s32) = G_SELECT %3, %0, %1 |
| S_ENDPGM 0, implicit %2, implicit %4 |
| ... |
| |
| --- |
| name: uaddo_s32_s1_vvv |
| legalized: true |
| regBankSelected: true |
| |
| body: | |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; GFX6-LABEL: name: uaddo_s32_s1_vvv |
| ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| ; GFX6: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec |
| ; GFX6: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY1]], 0, [[COPY]], [[V_ADD_CO_U32_e64_1]], implicit $exec |
| ; GFX6: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]] |
| ; GFX8-LABEL: name: uaddo_s32_s1_vvv |
| ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| ; GFX8: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec |
| ; GFX8: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY1]], 0, [[COPY]], [[V_ADD_CO_U32_e64_1]], implicit $exec |
| ; GFX8: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]] |
| ; GFX9-LABEL: name: uaddo_s32_s1_vvv |
| ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| ; GFX9: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec |
| ; GFX9: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY1]], 0, [[COPY]], [[V_ADD_CO_U32_e64_1]], implicit $exec |
| ; GFX9: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]] |
| ; GFX10-LABEL: name: uaddo_s32_s1_vvv |
| ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| ; GFX10: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec |
| ; GFX10: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY1]], 0, [[COPY]], [[V_ADD_CO_U32_e64_1]], implicit $exec |
| ; GFX10: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]] |
| %0:vgpr(s32) = COPY $vgpr0 |
| %1:vgpr(s32) = COPY $vgpr1 |
| %2:vgpr(s32), %3:vcc(s1) = G_UADDO %0, %1 |
| %4:vgpr(s32) = G_SELECT %3, %0, %1 |
| S_ENDPGM 0, implicit %2, implicit %4 |
| ... |
| |
| --- |
| name: uaddo_s32_s1_vsv |
| legalized: true |
| regBankSelected: true |
| |
| body: | |
| bb.0: |
| liveins: $sgpr0, $vgpr0 |
| |
| ; GFX6-LABEL: name: uaddo_s32_s1_vsv |
| ; GFX6: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 |
| ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GFX6: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec |
| ; GFX6: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec |
| ; GFX6: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec |
| ; GFX6: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[V_MOV_B32_e32_1]], 0, [[V_MOV_B32_e32_]], [[V_ADD_CO_U32_e64_1]], implicit $exec |
| ; GFX6: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]] |
| ; GFX8-LABEL: name: uaddo_s32_s1_vsv |
| ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 |
| ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GFX8: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec |
| ; GFX8: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec |
| ; GFX8: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec |
| ; GFX8: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[V_MOV_B32_e32_1]], 0, [[V_MOV_B32_e32_]], [[V_ADD_CO_U32_e64_1]], implicit $exec |
| ; GFX8: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]] |
| ; GFX9-LABEL: name: uaddo_s32_s1_vsv |
| ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 |
| ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GFX9: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec |
| ; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec |
| ; GFX9: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec |
| ; GFX9: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[V_MOV_B32_e32_1]], 0, [[V_MOV_B32_e32_]], [[V_ADD_CO_U32_e64_1]], implicit $exec |
| ; GFX9: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]] |
| ; GFX10-LABEL: name: uaddo_s32_s1_vsv |
| ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 |
| ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GFX10: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec |
| ; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec |
| ; GFX10: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec |
| ; GFX10: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[V_MOV_B32_e32_1]], 0, [[V_MOV_B32_e32_]], [[V_ADD_CO_U32_e64_1]], implicit $exec |
| ; GFX10: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]] |
| %0:sgpr(s32) = COPY $sgpr0 |
| %1:vgpr(s32) = COPY $vgpr0 |
| %2:vgpr(s32), %3:vcc(s1) = G_UADDO %0, %1 |
| %4:vgpr(s32) = G_CONSTANT i32 0 |
| %5:vgpr(s32) = G_CONSTANT i32 1 |
| %6:vgpr(s32) = G_SELECT %3, %4, %5 |
| S_ENDPGM 0, implicit %2, implicit %6 |
| ... |
| |
| --- |
| name: uaddo_s32_s1_vvs |
| legalized: true |
| regBankSelected: true |
| |
| body: | |
| bb.0: |
| liveins: $sgpr0, $vgpr0 |
| |
| ; GFX6-LABEL: name: uaddo_s32_s1_vvs |
| ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GFX6: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0 |
| ; GFX6: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec |
| ; GFX6: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec |
| ; GFX6: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec |
| ; GFX6: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[V_MOV_B32_e32_1]], 0, [[V_MOV_B32_e32_]], [[V_ADD_CO_U32_e64_1]], implicit $exec |
| ; GFX6: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]] |
| ; GFX8-LABEL: name: uaddo_s32_s1_vvs |
| ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0 |
| ; GFX8: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec |
| ; GFX8: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec |
| ; GFX8: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec |
| ; GFX8: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[V_MOV_B32_e32_1]], 0, [[V_MOV_B32_e32_]], [[V_ADD_CO_U32_e64_1]], implicit $exec |
| ; GFX8: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]] |
| ; GFX9-LABEL: name: uaddo_s32_s1_vvs |
| ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0 |
| ; GFX9: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec |
| ; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec |
| ; GFX9: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec |
| ; GFX9: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[V_MOV_B32_e32_1]], 0, [[V_MOV_B32_e32_]], [[V_ADD_CO_U32_e64_1]], implicit $exec |
| ; GFX9: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]] |
| ; GFX10-LABEL: name: uaddo_s32_s1_vvs |
| ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0 |
| ; GFX10: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec |
| ; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec |
| ; GFX10: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec |
| ; GFX10: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[V_MOV_B32_e32_1]], 0, [[V_MOV_B32_e32_]], [[V_ADD_CO_U32_e64_1]], implicit $exec |
| ; GFX10: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]] |
| %0:vgpr(s32) = COPY $vgpr0 |
| %1:sgpr(s32) = COPY $sgpr0 |
| %2:vgpr(s32), %3:vcc(s1) = G_UADDO %0, %1 |
| %4:vgpr(s32) = G_CONSTANT i32 0 |
| %5:vgpr(s32) = G_CONSTANT i32 1 |
| %6:vgpr(s32) = G_SELECT %3, %4, %5 |
| S_ENDPGM 0, implicit %2, implicit %6 |
| ... |