| ============================ | 
 | AMDGPU Instructions Notation | 
 | ============================ | 
 |  | 
 | .. contents:: | 
 |    :local: | 
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 | .. _amdgpu_syn_instruction_notation: | 
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 | Introduction | 
 | ============ | 
 |  | 
 | This is an overview of notation used to describe the syntax of AMDGPU assembler instructions. | 
 |  | 
 | This notation looks a lot like the :ref:`syntax of assembler instructions<amdgpu_syn_instructions>`, | 
 | except that instead of real operands and modifiers, it uses references to their descriptions. | 
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 | Instructions | 
 | ============ | 
 |  | 
 | Notation | 
 | ~~~~~~~~ | 
 |  | 
 | This is the notation used to describe AMDGPU instructions: | 
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 |   | ``<``\ :ref:`opcode description<amdgpu_syn_opcode_notation>`\ ``> | 
 |       <``\ :ref:`operands description<amdgpu_syn_instruction_operands_notation>`\ ``> | 
 |       <``\ :ref:`modifiers description<amdgpu_syn_instruction_modifiers_notation>`\ ``>`` | 
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 | .. _amdgpu_syn_opcode_notation: | 
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 | Opcode | 
 | ====== | 
 |  | 
 | Notation | 
 | ~~~~~~~~ | 
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 | TBD | 
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 | .. _amdgpu_syn_instruction_operands_notation: | 
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 | Operands | 
 | ======== | 
 |  | 
 | An instruction may have zero or more *operands*. They are comma-separated in the description: | 
 |  | 
 |   | ``<``\ :ref:`description of operand 0<amdgpu_syn_instruction_operand_notation>`\ ``>, | 
 |       <``\ :ref:`description of operand 1<amdgpu_syn_instruction_operand_notation>`\ ``>, ...`` | 
 |  | 
 | The order of *operands* is fixed. *Operands* cannot be omitted | 
 | except for special cases described below. | 
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 | .. _amdgpu_syn_instruction_operand_notation: | 
 |  | 
 | Notation | 
 | ~~~~~~~~ | 
 |  | 
 | An operand is described using the following notation: | 
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 |     *<kind><name><tag0><tag1>...* | 
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 | Where: | 
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 | * *kind* is an optional prefix describing operand :ref:`kind<amdgpu_syn_instruction_operand_kinds>`. | 
 | * *name* is a link to a description of the operand. | 
 | * *tags* are optional. They are used to indicate | 
 |   :ref:`special operand properties<amdgpu_syn_instruction_operand_tags>`. | 
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 | .. _amdgpu_syn_instruction_operand_kinds: | 
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 | Operand Kinds | 
 | ^^^^^^^^^^^^^ | 
 |  | 
 | Operand kind indicates which values are accepted by the operand. | 
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 | * Operands which only accept *vector* registers are labelled with 'v' prefix. | 
 | * Operands which only accept *scalar* registers and values are labelled with 's' prefix. | 
 | * Operands which accept any registers and values have no prefix. | 
 |  | 
 | Examples: | 
 |  | 
 | .. parsed-literal:: | 
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 |     vdata          // operand only accepts vector registers | 
 |     sdst           // operand only accepts scalar registers | 
 |     src1           // operand accepts vector registers, scalar registers, and scalar values | 
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 | .. _amdgpu_syn_instruction_operand_tags: | 
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 | Operand Tags | 
 | ^^^^^^^^^^^^ | 
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 | Operand tags indicate special operand properties. | 
 |  | 
 |     ============== ================================================================================= | 
 |     Operand tag    Meaning | 
 |     ============== ================================================================================= | 
 |     :opt           An optional operand. | 
 |     :m             An operand which may be used with operand modifiers | 
 |                    :ref:`abs<amdgpu_synid_abs>`, :ref:`neg<amdgpu_synid_neg>` or | 
 |                    :ref:`sext<amdgpu_synid_sext>`. | 
 |     :dst           An input operand which is also used as a destination | 
 |                    if :ref:`glc<amdgpu_synid_glc>` modifier is specified. | 
 |     :fx            This is a *f32* or *f16* operand, depending on | 
 |                    :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` modifier. | 
 |     :<type>        The operand *type* differs from the *type* | 
 |                    :ref:`implied by the opcode name<amdgpu_syn_instruction_type>`. | 
 |                    This tag specifies the actual operand *type*. | 
 |     ============== ================================================================================= | 
 |  | 
 | Examples: | 
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 | .. parsed-literal:: | 
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 |     src1:m             // src1 operand may be used with operand modifiers | 
 |     vdata:dst          // vdata operand may be used as both source and destination | 
 |     vdst:u32           // vdst operand has u32 type | 
 |  | 
 | .. _amdgpu_syn_instruction_modifiers_notation: | 
 |  | 
 | Modifiers | 
 | ========= | 
 |  | 
 | An instruction may have zero or more optional *modifiers*. They are space-separated in the description: | 
 |  | 
 |   | ``<``\ :ref:`description of modifier 0<amdgpu_syn_instruction_modifier_notation>`\ ``> | 
 |       <``\ :ref:`description of modifier 1<amdgpu_syn_instruction_modifier_notation>`\ ``> ...`` | 
 |  | 
 | The order of *modifiers* is fixed. | 
 |  | 
 | .. _amdgpu_syn_instruction_modifier_notation: | 
 |  | 
 | Notation | 
 | ~~~~~~~~ | 
 |  | 
 | A *modifier* is described using the following notation: | 
 |  | 
 |     *<name>* | 
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 | Where the *name* is a link to a description of the *modifier*. |