Sign in
llvm
/
llvm-project
/
2ec91a5ec41c93e79a16ddca02de14b07d593c2c
/
.
/
llvm
/
test
/
CodeGen
/
ARM
/
ret_arg5.ll
blob: 680e89f9aa40c18012243b25f0528e91db7fd407 [
file
] [
log
] [
blame
]
; RUN: llc -mtriple=arm-eabi %s -o /dev/null
define
i32
@test
(
i32
%a1
,
i32
%a2
,
i32
%a3
,
i32
%a4
,
i32
%a5
)
{
ret
i32
%a5
}