| // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ |
| // RUN: %clang_cc1 -x c++ -O1 -disable-llvm-optzns -verify -fopenmp -internal-isystem %S/../Headers/Inputs/include -internal-isystem %S/../../lib/Headers/openmp_wrappers -include __clang_openmp_device_functions.h -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc |
| // RUN: %clang_cc1 -x c++ -O1 -disable-llvm-optzns -verify -fopenmp -internal-isystem %S/../Headers/Inputs/include -internal-isystem %S/../../lib/Headers/openmp_wrappers -include __clang_openmp_device_functions.h -triple nvptx64-unknown-unknown -aux-triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK1 |
| // RUN: %clang_cc1 -x c++ -O1 -disable-llvm-optzns -verify -fopenmp -internal-isystem %S/../Headers/Inputs/include -internal-isystem %S/../../lib/Headers/openmp_wrappers -include __clang_openmp_device_functions.h -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc |
| // RUN: %clang_cc1 -x c++ -O1 -disable-llvm-optzns -verify -fopenmp -internal-isystem %S/../Headers/Inputs/include -internal-isystem %S/../../lib/Headers/openmp_wrappers -include __clang_openmp_device_functions.h -triple nvptx64-unknown-unknown -aux-triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK2 |
| // RUN: %clang_cc1 -x c++ -O1 -disable-llvm-optzns -verify -fopenmp -internal-isystem %S/../Headers/Inputs/include -internal-isystem %S/../../lib/Headers/openmp_wrappers -include __clang_openmp_device_functions.h -fexceptions -fcxx-exceptions -aux-triple powerpc64le-unknown-unknown -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK3 |
| // expected-no-diagnostics |
| #ifndef HEADER |
| #define HEADER |
| |
| #include <complex> |
| |
| // Verify we do not add tbaa metadata to type punned memory operations: |
| |
| |
| |
| template <typename T> |
| void complex_reduction() { |
| #pragma omp target teams distribute |
| for (int ib = 0; ib < 100; ib++) { |
| std::complex<T> partial_sum; |
| const int istart = ib * 4; |
| const int iend = (ib + 1) * 4; |
| #pragma omp parallel for reduction(+ \ |
| : partial_sum) |
| for (int i = istart; i < iend; i++) |
| partial_sum += std::complex<T>(i, i); |
| } |
| } |
| |
| void test() { |
| complex_reduction<float>(); |
| complex_reduction<double>(); |
| } |
| #endif |
| // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIfEvv_l19_worker |
| // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[WORK_FN:%.*]] = alloca i8*, align 8 |
| // CHECK1-NEXT: [[EXEC_STATUS:%.*]] = alloca i8, align 1 |
| // CHECK1-NEXT: store i8* null, i8** [[WORK_FN]], align 8 |
| // CHECK1-NEXT: store i8 0, i8* [[EXEC_STATUS]], align 1 |
| // CHECK1-NEXT: br label [[DOTAWAIT_WORK:%.*]] |
| // CHECK1: .await.work: |
| // CHECK1-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) |
| // CHECK1-NEXT: [[TMP0:%.*]] = call i1 @__kmpc_kernel_parallel(i8** [[WORK_FN]]) |
| // CHECK1-NEXT: [[TMP1:%.*]] = zext i1 [[TMP0]] to i8 |
| // CHECK1-NEXT: store i8 [[TMP1]], i8* [[EXEC_STATUS]], align 1 |
| // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[WORK_FN]], align 8 |
| // CHECK1-NEXT: [[SHOULD_TERMINATE:%.*]] = icmp eq i8* [[TMP2]], null |
| // CHECK1-NEXT: br i1 [[SHOULD_TERMINATE]], label [[DOTEXIT:%.*]], label [[DOTSELECT_WORKERS:%.*]] |
| // CHECK1: .select.workers: |
| // CHECK1-NEXT: [[TMP3:%.*]] = load i8, i8* [[EXEC_STATUS]], align 1 |
| // CHECK1-NEXT: [[IS_ACTIVE:%.*]] = icmp ne i8 [[TMP3]], 0 |
| // CHECK1-NEXT: br i1 [[IS_ACTIVE]], label [[DOTEXECUTE_PARALLEL:%.*]], label [[DOTBARRIER_PARALLEL:%.*]] |
| // CHECK1: .execute.parallel: |
| // CHECK1-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) |
| // CHECK1-NEXT: [[TMP5:%.*]] = load i8*, i8** [[WORK_FN]], align 8 |
| // CHECK1-NEXT: [[WORK_MATCH:%.*]] = icmp eq i8* [[TMP5]], bitcast (void (i16, i32)* @__omp_outlined__1_wrapper to i8*) |
| // CHECK1-NEXT: br i1 [[WORK_MATCH]], label [[DOTEXECUTE_FN:%.*]], label [[DOTCHECK_NEXT:%.*]] |
| // CHECK1: .execute.fn: |
| // CHECK1-NEXT: call void @__omp_outlined__1_wrapper(i16 0, i32 [[TMP4]]) #[[ATTR5:[0-9]+]] |
| // CHECK1-NEXT: br label [[DOTTERMINATE_PARALLEL:%.*]] |
| // CHECK1: .check.next: |
| // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP2]] to void (i16, i32)* |
| // CHECK1-NEXT: call void [[TMP6]](i16 0, i32 [[TMP4]]) |
| // CHECK1-NEXT: br label [[DOTTERMINATE_PARALLEL]] |
| // CHECK1: .terminate.parallel: |
| // CHECK1-NEXT: call void @__kmpc_kernel_end_parallel() |
| // CHECK1-NEXT: br label [[DOTBARRIER_PARALLEL]] |
| // CHECK1: .barrier.parallel: |
| // CHECK1-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) |
| // CHECK1-NEXT: br label [[DOTAWAIT_WORK]] |
| // CHECK1: .exit: |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIfEvv_l19 |
| // CHECK1-SAME: () #[[ATTR0]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 |
| // CHECK1-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() |
| // CHECK1-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() |
| // CHECK1-NEXT: [[THREAD_LIMIT:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS]], [[NVPTX_WARP_SIZE]] |
| // CHECK1-NEXT: [[TMP0:%.*]] = icmp ult i32 [[NVPTX_TID]], [[THREAD_LIMIT]] |
| // CHECK1-NEXT: br i1 [[TMP0]], label [[DOTWORKER:%.*]], label [[DOTMASTERCHECK:%.*]] |
| // CHECK1: .worker: |
| // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIfEvv_l19_worker() #[[ATTR5]] |
| // CHECK1-NEXT: br label [[DOTEXIT:%.*]] |
| // CHECK1: .mastercheck: |
| // CHECK1-NEXT: [[NVPTX_TID1:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK1-NEXT: [[NVPTX_NUM_THREADS2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() |
| // CHECK1-NEXT: [[NVPTX_WARP_SIZE3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() |
| // CHECK1-NEXT: [[TMP1:%.*]] = sub nuw i32 [[NVPTX_WARP_SIZE3]], 1 |
| // CHECK1-NEXT: [[TMP2:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS2]], 1 |
| // CHECK1-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], -1 |
| // CHECK1-NEXT: [[MASTER_TID:%.*]] = and i32 [[TMP2]], [[TMP3]] |
| // CHECK1-NEXT: [[TMP4:%.*]] = icmp eq i32 [[NVPTX_TID1]], [[MASTER_TID]] |
| // CHECK1-NEXT: br i1 [[TMP4]], label [[DOTMASTER:%.*]], label [[DOTEXIT]] |
| // CHECK1: .master: |
| // CHECK1-NEXT: [[NVPTX_NUM_THREADS4:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() |
| // CHECK1-NEXT: [[NVPTX_WARP_SIZE5:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() |
| // CHECK1-NEXT: [[THREAD_LIMIT6:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS4]], [[NVPTX_WARP_SIZE5]] |
| // CHECK1-NEXT: call void @__kmpc_kernel_init(i32 [[THREAD_LIMIT6]], i16 1) |
| // CHECK1-NEXT: call void @__kmpc_data_sharing_init_stack() |
| // CHECK1-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) |
| // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA6:![0-9]+]] |
| // CHECK1-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR5]] |
| // CHECK1-NEXT: br label [[DOTTERMINATION_NOTIFIER:%.*]] |
| // CHECK1: .termination.notifier: |
| // CHECK1-NEXT: call void @__kmpc_kernel_deinit(i16 1) |
| // CHECK1-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) |
| // CHECK1-NEXT: br label [[DOTEXIT]] |
| // CHECK1: .exit: |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__ |
| // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[IB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca float, align 4 |
| // CHECK1-NEXT: [[REF_TMP2:%.*]] = alloca float, align 4 |
| // CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8, !tbaa [[TBAA10:![0-9]+]] |
| // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP0:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2, !tbaa [[TBAA12:![0-9]+]] |
| // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* @"_openmp_static_kernel$size", align 8, !tbaa [[TBAA14:![0-9]+]] |
| // CHECK1-NEXT: call void @__kmpc_get_team_static_memory(i16 0, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i64 [[TMP1]], i16 [[TMP0]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**)) |
| // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 8 |
| // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, i8* [[TMP2]], i64 0 |
| // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to %struct._globalized_locals_ty* |
| // CHECK1-NEXT: [[ISTART:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP4]], i32 0, i32 0 |
| // CHECK1-NEXT: [[IEND:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY]], %struct._globalized_locals_ty* [[TMP4]], i32 0, i32 1 |
| // CHECK1-NEXT: [[PARTIAL_SUM:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY]], %struct._globalized_locals_ty* [[TMP4]], i32 0, i32 2 |
| // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP5]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP6]]) #[[ATTR5]] |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP7:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP7]]) #[[ATTR5]] |
| // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) #[[ATTR5]] |
| // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP9:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP9]]) #[[ATTR5]] |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i32* [[IB]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP10]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP12]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 99 |
| // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK1: cond.true: |
| // CHECK1-NEXT: br label [[COND_END:%.*]] |
| // CHECK1: cond.false: |
| // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: br label [[COND_END]] |
| // CHECK1: cond.end: |
| // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] |
| // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK1: omp.inner.for.cond: |
| // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] |
| // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] |
| // CHECK1: omp.inner.for.cond.cleanup: |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK1: omp.inner.for.body: |
| // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 |
| // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK1-NEXT: store i32 [[ADD]], i32* [[IB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP19:%.*]] = bitcast float* [[REF_TMP]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP19]]) #[[ATTR5]] |
| // CHECK1-NEXT: store float 0.000000e+00, float* [[REF_TMP]], align 4, !tbaa [[TBAA16:![0-9]+]] |
| // CHECK1-NEXT: [[TMP20:%.*]] = bitcast float* [[REF_TMP2]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP20]]) #[[ATTR5]] |
| // CHECK1-NEXT: store float 0.000000e+00, float* [[REF_TMP2]], align 4, !tbaa [[TBAA16]] |
| // CHECK1-NEXT: call void @_ZNSt7complexIfEC1ERKfS2_(%"class.std::complex"* nonnull dereferenceable(8) [[PARTIAL_SUM]], float* nonnull align 4 dereferenceable(4) [[REF_TMP]], float* nonnull align 4 dereferenceable(4) [[REF_TMP2]]) #[[ATTR8:[0-9]+]] |
| // CHECK1-NEXT: [[TMP21:%.*]] = bitcast float* [[REF_TMP2]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP21]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP22:%.*]] = bitcast float* [[REF_TMP]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP22]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[IB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP23]], 4 |
| // CHECK1-NEXT: store i32 [[MUL3]], i32* [[ISTART]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[IB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], 1 |
| // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[ADD4]], 4 |
| // CHECK1-NEXT: store i32 [[MUL5]], i32* [[IEND]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 |
| // CHECK1-NEXT: [[TMP26:%.*]] = bitcast i32* [[ISTART]] to i8* |
| // CHECK1-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 |
| // CHECK1-NEXT: [[TMP28:%.*]] = bitcast i32* [[IEND]] to i8* |
| // CHECK1-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 |
| // CHECK1-NEXT: [[TMP30:%.*]] = bitcast %"class.std::complex"* [[PARTIAL_SUM]] to i8* |
| // CHECK1-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP31:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** |
| // CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32*, i32*, %"class.std::complex"*)* @__omp_outlined__1 to i8*), i8* bitcast (void (i16, i32)* @__omp_outlined__1_wrapper to i8*), i8** [[TMP31]], i64 3) |
| // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK1: omp.body.continue: |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK1: omp.inner.for.inc: |
| // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP32]], 1 |
| // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] |
| // CHECK1: omp.inner.for.end: |
| // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK1: omp.loop.exit: |
| // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) |
| // CHECK1-NEXT: [[TMP33:%.*]] = bitcast i32* [[IB]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP33]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP34:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP34]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP35:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP35]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP36:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP36]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP37:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP37]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP38:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP38]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP39:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2, !tbaa [[TBAA12]] |
| // CHECK1-NEXT: call void @__kmpc_restore_team_static_memory(i16 0, i16 [[TMP39]]) |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@_ZNSt7complexIfEC1ERKfS2_ |
| // CHECK1-SAME: (%"class.std::complex"* nonnull dereferenceable(8) [[THIS:%.*]], float* nonnull align 4 dereferenceable(4) [[__RE:%.*]], float* nonnull align 4 dereferenceable(4) [[__IM:%.*]]) unnamed_addr #[[ATTR3:[0-9]+]] comdat align 2 { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK1-NEXT: [[__RE_ADDR:%.*]] = alloca float*, align 8 |
| // CHECK1-NEXT: [[__IM_ADDR:%.*]] = alloca float*, align 8 |
| // CHECK1-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store float* [[__RE]], float** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store float* [[__IM]], float** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load float*, float** [[__RE_ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP1:%.*]] = load float*, float** [[__IM_ADDR]], align 8 |
| // CHECK1-NEXT: call void @_ZNSt7complexIfEC2ERKfS2_(%"class.std::complex"* nonnull dereferenceable(8) [[THIS1]], float* nonnull align 4 dereferenceable(4) [[TMP0]], float* nonnull align 4 dereferenceable(4) [[TMP1]]) #[[ATTR8]] |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__1 |
| // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ISTART:%.*]], i32* nonnull align 4 dereferenceable(4) [[IEND:%.*]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[PARTIAL_SUM:%.*]]) #[[ATTR0]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[ISTART_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[IEND_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[PARTIAL_SUM_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[PARTIAL_SUM5:%.*]] = alloca %"class.std::complex", align 4 |
| // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca float, align 4 |
| // CHECK1-NEXT: [[REF_TMP6:%.*]] = alloca float, align 4 |
| // CHECK1-NEXT: [[I7:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[REF_TMP14:%.*]] = alloca %"class.std::complex", align 4 |
| // CHECK1-NEXT: [[REF_TMP15:%.*]] = alloca float, align 4 |
| // CHECK1-NEXT: [[REF_TMP16:%.*]] = alloca float, align 4 |
| // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK1-NEXT: [[REF_TMP21:%.*]] = alloca %"class.std::complex", align 4 |
| // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store i32* [[ISTART]], i32** [[ISTART_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store i32* [[IEND]], i32** [[IEND_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store %"class.std::complex"* [[PARTIAL_SUM]], %"class.std::complex"** [[PARTIAL_SUM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ISTART_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[IEND_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP2:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[PARTIAL_SUM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP3]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_1]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP6]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP1]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_2]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[SUB:%.*]] = sub i32 [[TMP9]], [[TMP10]] |
| // CHECK1-NEXT: [[SUB3:%.*]] = sub i32 [[SUB]], 1 |
| // CHECK1-NEXT: [[ADD:%.*]] = add i32 [[SUB3]], 1 |
| // CHECK1-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 |
| // CHECK1-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 1 |
| // CHECK1-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i32* [[I]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP11]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: store i32 [[TMP12]], i32* [[I]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i32* [[I]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP13]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP14]], [[TMP15]] |
| // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK1: omp.precond.then: |
| // CHECK1-NEXT: [[TMP16:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP16]]) #[[ATTR5]] |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP17]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP19]]) #[[ATTR5]] |
| // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP20]]) #[[ATTR5]] |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP21:%.*]] = bitcast %"class.std::complex"* [[PARTIAL_SUM5]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP21]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP22:%.*]] = bitcast float* [[REF_TMP]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP22]]) #[[ATTR5]] |
| // CHECK1-NEXT: store float 0.000000e+00, float* [[REF_TMP]], align 4, !tbaa [[TBAA16]] |
| // CHECK1-NEXT: [[TMP23:%.*]] = bitcast float* [[REF_TMP6]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP23]]) #[[ATTR5]] |
| // CHECK1-NEXT: store float 0.000000e+00, float* [[REF_TMP6]], align 4, !tbaa [[TBAA16]] |
| // CHECK1-NEXT: call void @_ZNSt7complexIfEC1ERKfS2_(%"class.std::complex"* nonnull dereferenceable(8) [[PARTIAL_SUM5]], float* nonnull align 4 dereferenceable(4) [[REF_TMP]], float* nonnull align 4 dereferenceable(4) [[REF_TMP6]]) #[[ATTR8]] |
| // CHECK1-NEXT: [[TMP24:%.*]] = bitcast float* [[REF_TMP6]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP24]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP25:%.*]] = bitcast float* [[REF_TMP]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP25]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP26:%.*]] = bitcast i32* [[I7]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP26]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP28]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK1: omp.dispatch.cond: |
| // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[CMP8:%.*]] = icmp ugt i32 [[TMP29]], [[TMP30]] |
| // CHECK1-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK1: cond.true: |
| // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: br label [[COND_END:%.*]] |
| // CHECK1: cond.false: |
| // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: br label [[COND_END]] |
| // CHECK1: cond.end: |
| // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE]] ], [ [[TMP32]], [[COND_FALSE]] ] |
| // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[ADD9:%.*]] = add i32 [[TMP35]], 1 |
| // CHECK1-NEXT: [[CMP10:%.*]] = icmp ult i32 [[TMP34]], [[ADD9]] |
| // CHECK1-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_CLEANUP:%.*]] |
| // CHECK1: omp.dispatch.cleanup: |
| // CHECK1-NEXT: br label [[OMP_DISPATCH_END:%.*]] |
| // CHECK1: omp.dispatch.body: |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK1: omp.inner.for.cond: |
| // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[ADD11:%.*]] = add i32 [[TMP37]], 1 |
| // CHECK1-NEXT: [[CMP12:%.*]] = icmp ult i32 [[TMP36]], [[ADD11]] |
| // CHECK1-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] |
| // CHECK1: omp.inner.for.cond.cleanup: |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK1: omp.inner.for.body: |
| // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[MUL:%.*]] = mul i32 [[TMP39]], 1 |
| // CHECK1-NEXT: [[ADD13:%.*]] = add i32 [[TMP38]], [[MUL]] |
| // CHECK1-NEXT: store i32 [[ADD13]], i32* [[I7]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP40:%.*]] = bitcast %"class.std::complex"* [[REF_TMP14]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP40]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP41:%.*]] = bitcast float* [[REF_TMP15]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP41]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP42:%.*]] = load i32, i32* [[I7]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP42]] to float |
| // CHECK1-NEXT: store float [[CONV]], float* [[REF_TMP15]], align 4, !tbaa [[TBAA16]] |
| // CHECK1-NEXT: [[TMP43:%.*]] = bitcast float* [[REF_TMP16]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP43]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP44:%.*]] = load i32, i32* [[I7]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[CONV17:%.*]] = sitofp i32 [[TMP44]] to float |
| // CHECK1-NEXT: store float [[CONV17]], float* [[REF_TMP16]], align 4, !tbaa [[TBAA16]] |
| // CHECK1-NEXT: call void @_ZNSt7complexIfEC1ERKfS2_(%"class.std::complex"* nonnull dereferenceable(8) [[REF_TMP14]], float* nonnull align 4 dereferenceable(4) [[REF_TMP15]], float* nonnull align 4 dereferenceable(4) [[REF_TMP16]]) #[[ATTR8]] |
| // CHECK1-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(8) %"class.std::complex"* @_ZNSt7complexIfEpLIfEERS0_RKS_IT_E(%"class.std::complex"* nonnull dereferenceable(8) [[PARTIAL_SUM5]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[REF_TMP14]]) #[[ATTR8]] |
| // CHECK1-NEXT: [[TMP45:%.*]] = bitcast float* [[REF_TMP16]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP45]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP46:%.*]] = bitcast float* [[REF_TMP15]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP46]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP47:%.*]] = bitcast %"class.std::complex"* [[REF_TMP14]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP47]]) #[[ATTR5]] |
| // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK1: omp.body.continue: |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK1: omp.inner.for.inc: |
| // CHECK1-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[ADD18:%.*]] = add i32 [[TMP48]], 1 |
| // CHECK1-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] |
| // CHECK1: omp.inner.for.end: |
| // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK1: omp.dispatch.inc: |
| // CHECK1-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[ADD19:%.*]] = add i32 [[TMP49]], [[TMP50]] |
| // CHECK1-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[ADD20:%.*]] = add i32 [[TMP51]], [[TMP52]] |
| // CHECK1-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK1: omp.dispatch.end: |
| // CHECK1-NEXT: [[TMP53:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP54:%.*]] = load i32, i32* [[TMP53]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP54]]) |
| // CHECK1-NEXT: [[TMP55:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP56:%.*]] = load i32, i32* [[TMP55]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP57:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 |
| // CHECK1-NEXT: [[TMP58:%.*]] = bitcast %"class.std::complex"* [[PARTIAL_SUM5]] to i8* |
| // CHECK1-NEXT: store i8* [[TMP58]], i8** [[TMP57]], align 8 |
| // CHECK1-NEXT: [[TMP59:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* |
| // CHECK1-NEXT: [[TMP60:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(%struct.ident_t* @[[GLOB3]], i32 [[TMP56]], i32 1, i64 8, i8* [[TMP59]], void (i8*, i16, i16, i16)* @_omp_reduction_shuffle_and_reduce_func, void (i8*, i32)* @_omp_reduction_inter_warp_copy_func) |
| // CHECK1-NEXT: [[TMP61:%.*]] = icmp eq i32 [[TMP60]], 1 |
| // CHECK1-NEXT: br i1 [[TMP61]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]] |
| // CHECK1: .omp.reduction.then: |
| // CHECK1-NEXT: [[TMP62:%.*]] = bitcast %"class.std::complex"* [[REF_TMP21]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP62]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[CALL22:%.*]] = call %"class.std::complex" @_ZStplIfESt7complexIT_ERKS2_S4_(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[TMP2]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[PARTIAL_SUM5]]) #[[ATTR8]] |
| // CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[REF_TMP21]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP64:%.*]] = extractvalue %"class.std::complex" [[CALL22]], 0 |
| // CHECK1-NEXT: store float [[TMP64]], float* [[TMP63]], align 4 |
| // CHECK1-NEXT: [[TMP65:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[REF_TMP21]], i32 0, i32 1 |
| // CHECK1-NEXT: [[TMP66:%.*]] = extractvalue %"class.std::complex" [[CALL22]], 1 |
| // CHECK1-NEXT: store float [[TMP66]], float* [[TMP65]], align 4 |
| // CHECK1-NEXT: [[TMP67:%.*]] = bitcast %"class.std::complex"* [[TMP2]] to i8* |
| // CHECK1-NEXT: [[TMP68:%.*]] = bitcast %"class.std::complex"* [[REF_TMP21]] to i8* |
| // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP67]], i8* align 4 [[TMP68]], i64 8, i1 false), !tbaa.struct !18 |
| // CHECK1-NEXT: [[TMP69:%.*]] = bitcast %"class.std::complex"* [[REF_TMP21]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP69]]) #[[ATTR5]] |
| // CHECK1-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP56]]) |
| // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DONE]] |
| // CHECK1: .omp.reduction.done: |
| // CHECK1-NEXT: [[TMP70:%.*]] = bitcast i32* [[I7]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP70]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP71:%.*]] = bitcast %"class.std::complex"* [[PARTIAL_SUM5]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP71]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP72:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP72]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP73:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP73]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP74:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP74]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP75:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP75]]) #[[ATTR5]] |
| // CHECK1-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK1: omp.precond.end: |
| // CHECK1-NEXT: [[TMP76:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_2]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP76]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP77:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_1]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP77]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP78:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP78]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP79:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP79]]) #[[ATTR5]] |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@_ZNSt7complexIfEpLIfEERS0_RKS_IT_E |
| // CHECK1-SAME: (%"class.std::complex"* nonnull dereferenceable(8) [[THIS:%.*]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[__C:%.*]]) #[[ATTR4:[0-9]+]] comdat align 2 { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK1-NEXT: [[__C_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK1-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store %"class.std::complex"* [[__C]], %"class.std::complex"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[CALL:%.*]] = call float @_ZNKSt7complexIfE4realEv(%"class.std::complex"* nonnull dereferenceable(8) [[TMP0]]) #[[ATTR8]] |
| // CHECK1-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP1:%.*]] = load float, float* [[__RE_]], align 4, !tbaa [[TBAA19:![0-9]+]] |
| // CHECK1-NEXT: [[ADD:%.*]] = fadd float [[TMP1]], [[CALL]] |
| // CHECK1-NEXT: store float [[ADD]], float* [[__RE_]], align 4, !tbaa [[TBAA19]] |
| // CHECK1-NEXT: [[TMP2:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[CALL2:%.*]] = call float @_ZNKSt7complexIfE4imagEv(%"class.std::complex"* nonnull dereferenceable(8) [[TMP2]]) #[[ATTR8]] |
| // CHECK1-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 1 |
| // CHECK1-NEXT: [[TMP3:%.*]] = load float, float* [[__IM_]], align 4, !tbaa [[TBAA21:![0-9]+]] |
| // CHECK1-NEXT: [[ADD3:%.*]] = fadd float [[TMP3]], [[CALL2]] |
| // CHECK1-NEXT: store float [[ADD3]], float* [[__IM_]], align 4, !tbaa [[TBAA21]] |
| // CHECK1-NEXT: ret %"class.std::complex"* [[THIS1]] |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@_ZStplIfESt7complexIT_ERKS2_S4_ |
| // CHECK1-SAME: (%"class.std::complex"* nonnull align 4 dereferenceable(8) [[__X:%.*]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[__Y:%.*]]) #[[ATTR6:[0-9]+]] comdat { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[RETVAL:%.*]] = alloca %"class.std::complex", align 4 |
| // CHECK1-NEXT: [[__T2:%.*]] = alloca %"class.std::complex", align 4 |
| // CHECK1-NEXT: [[__X_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK1-NEXT: [[__Y_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB5:[0-9]+]]) |
| // CHECK1-NEXT: [[TMP1:%.*]] = call i16 @__kmpc_parallel_level(%struct.ident_t* @[[GLOB5]], i32 [[TMP0]]) |
| // CHECK1-NEXT: [[TMP2:%.*]] = icmp eq i16 [[TMP1]], 0 |
| // CHECK1-NEXT: [[TMP3:%.*]] = call i8 @__kmpc_is_spmd_exec_mode() #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP4:%.*]] = icmp ne i8 [[TMP3]], 0 |
| // CHECK1-NEXT: br i1 [[TMP4]], label [[DOTSPMD:%.*]], label [[DOTNON_SPMD:%.*]] |
| // CHECK1: .spmd: |
| // CHECK1-NEXT: br label [[DOTEXIT:%.*]] |
| // CHECK1: .non-spmd: |
| // CHECK1-NEXT: [[TMP5:%.*]] = select i1 [[TMP2]], i64 8, i64 256 |
| // CHECK1-NEXT: [[TMP6:%.*]] = call i8* @__kmpc_data_sharing_coalesced_push_stack(i64 [[TMP5]], i16 0) |
| // CHECK1-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to %struct._globalized_locals_ty.2* |
| // CHECK1-NEXT: br label [[DOTEXIT]] |
| // CHECK1: .exit: |
| // CHECK1-NEXT: [[_SELECT_STACK:%.*]] = phi %struct._globalized_locals_ty.2* [ null, [[DOTSPMD]] ], [ [[TMP7]], [[DOTNON_SPMD]] ] |
| // CHECK1-NEXT: [[TMP8:%.*]] = bitcast %struct._globalized_locals_ty.2* [[_SELECT_STACK]] to %struct._globalized_locals_ty.3* |
| // CHECK1-NEXT: [[__T:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_2:%.*]], %struct._globalized_locals_ty.2* [[_SELECT_STACK]], i32 0, i32 0 |
| // CHECK1-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK1-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID]], 31 |
| // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [32 x %"class.std::complex"], [32 x %"class.std::complex"]* [[__T]], i32 0, i32 [[NVPTX_LANE_ID]] |
| // CHECK1-NEXT: [[__T1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_3:%.*]], %struct._globalized_locals_ty.3* [[TMP8]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP10:%.*]] = select i1 [[TMP2]], %"class.std::complex"* [[__T1]], %"class.std::complex"* [[TMP9]] |
| // CHECK1-NEXT: [[TMP11:%.*]] = select i1 [[TMP4]], %"class.std::complex"* [[__T2]], %"class.std::complex"* [[TMP10]] |
| // CHECK1-NEXT: store %"class.std::complex"* [[__X]], %"class.std::complex"** [[__X_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store %"class.std::complex"* [[__Y]], %"class.std::complex"** [[__Y_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP12:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[__X_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP13:%.*]] = bitcast %"class.std::complex"* [[TMP11]] to i8* |
| // CHECK1-NEXT: [[TMP14:%.*]] = bitcast %"class.std::complex"* [[TMP12]] to i8* |
| // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 8, i1 false), !tbaa.struct !18 |
| // CHECK1-NEXT: [[TMP15:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[__Y_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(8) %"class.std::complex"* @_ZNSt7complexIfEpLIfEERS0_RKS_IT_E(%"class.std::complex"* nonnull dereferenceable(8) [[TMP11]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[TMP15]]) #[[ATTR8]] |
| // CHECK1-NEXT: [[TMP16:%.*]] = bitcast %"class.std::complex"* [[RETVAL]] to i8* |
| // CHECK1-NEXT: [[TMP17:%.*]] = bitcast %"class.std::complex"* [[TMP11]] to i8* |
| // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i64 8, i1 false), !tbaa.struct !18 |
| // CHECK1-NEXT: br i1 [[TMP4]], label [[DOTEXIT4:%.*]], label [[DOTNON_SPMD3:%.*]] |
| // CHECK1: .non-spmd3: |
| // CHECK1-NEXT: [[TMP18:%.*]] = bitcast %struct._globalized_locals_ty.2* [[_SELECT_STACK]] to i8* |
| // CHECK1-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP18]]) |
| // CHECK1-NEXT: br label [[DOTEXIT4]] |
| // CHECK1: .exit4: |
| // CHECK1-NEXT: [[TMP19:%.*]] = load %"class.std::complex", %"class.std::complex"* [[RETVAL]], align 4 |
| // CHECK1-NEXT: ret %"class.std::complex" [[TMP19]] |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func |
| // CHECK1-SAME: (i8* [[TMP0:%.*]], i16 signext [[TMP1:%.*]], i16 signext [[TMP2:%.*]], i16 signext [[TMP3:%.*]]) #[[ATTR0]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 |
| // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2 |
| // CHECK1-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2 |
| // CHECK1-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2 |
| // CHECK1-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK1-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca %"class.std::complex", align 4 |
| // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store i16 [[TMP1]], i16* [[DOTADDR1]], align 2, !tbaa [[TBAA12]] |
| // CHECK1-NEXT: store i16 [[TMP2]], i16* [[DOTADDR2]], align 2, !tbaa [[TBAA12]] |
| // CHECK1-NEXT: store i16 [[TMP3]], i16* [[DOTADDR3]], align 2, !tbaa [[TBAA12]] |
| // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* |
| // CHECK1-NEXT: [[TMP6:%.*]] = load i16, i16* [[DOTADDR1]], align 2, !tbaa [[TBAA12]] |
| // CHECK1-NEXT: [[TMP7:%.*]] = load i16, i16* [[DOTADDR2]], align 2, !tbaa [[TBAA12]] |
| // CHECK1-NEXT: [[TMP8:%.*]] = load i16, i16* [[DOTADDR3]], align 2, !tbaa [[TBAA12]] |
| // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 |
| // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 |
| // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 |
| // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP10]] to %"class.std::complex"* |
| // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr %"class.std::complex", %"class.std::complex"* [[TMP12]], i64 1 |
| // CHECK1-NEXT: [[TMP14:%.*]] = bitcast %"class.std::complex"* [[TMP13]] to i8* |
| // CHECK1-NEXT: [[TMP15:%.*]] = bitcast %"class.std::complex"* [[TMP12]] to i64* |
| // CHECK1-NEXT: [[TMP16:%.*]] = bitcast %"class.std::complex"* [[DOTOMP_REDUCTION_ELEMENT]] to i64* |
| // CHECK1-NEXT: [[TMP17:%.*]] = load i64, i64* [[TMP15]], align 4 |
| // CHECK1-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() |
| // CHECK1-NEXT: [[TMP18:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16 |
| // CHECK1-NEXT: [[TMP19:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP17]], i16 [[TMP7]], i16 [[TMP18]]) |
| // CHECK1-NEXT: store i64 [[TMP19]], i64* [[TMP16]], align 4 |
| // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr i64, i64* [[TMP15]], i64 1 |
| // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr i64, i64* [[TMP16]], i64 1 |
| // CHECK1-NEXT: [[TMP22:%.*]] = bitcast %"class.std::complex"* [[DOTOMP_REDUCTION_ELEMENT]] to i8* |
| // CHECK1-NEXT: store i8* [[TMP22]], i8** [[TMP11]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP23:%.*]] = icmp eq i16 [[TMP8]], 0 |
| // CHECK1-NEXT: [[TMP24:%.*]] = icmp eq i16 [[TMP8]], 1 |
| // CHECK1-NEXT: [[TMP25:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]] |
| // CHECK1-NEXT: [[TMP26:%.*]] = and i1 [[TMP24]], [[TMP25]] |
| // CHECK1-NEXT: [[TMP27:%.*]] = icmp eq i16 [[TMP8]], 2 |
| // CHECK1-NEXT: [[TMP28:%.*]] = and i16 [[TMP6]], 1 |
| // CHECK1-NEXT: [[TMP29:%.*]] = icmp eq i16 [[TMP28]], 0 |
| // CHECK1-NEXT: [[TMP30:%.*]] = and i1 [[TMP27]], [[TMP29]] |
| // CHECK1-NEXT: [[TMP31:%.*]] = icmp sgt i16 [[TMP7]], 0 |
| // CHECK1-NEXT: [[TMP32:%.*]] = and i1 [[TMP30]], [[TMP31]] |
| // CHECK1-NEXT: [[TMP33:%.*]] = or i1 [[TMP23]], [[TMP26]] |
| // CHECK1-NEXT: [[TMP34:%.*]] = or i1 [[TMP33]], [[TMP32]] |
| // CHECK1-NEXT: br i1 [[TMP34]], label [[THEN:%.*]], label [[ELSE:%.*]] |
| // CHECK1: then: |
| // CHECK1-NEXT: [[TMP35:%.*]] = bitcast [1 x i8*]* [[TMP5]] to i8* |
| // CHECK1-NEXT: [[TMP36:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8* |
| // CHECK1-NEXT: call void @"_omp$reduction$reduction_func"(i8* [[TMP35]], i8* [[TMP36]]) #[[ATTR5]] |
| // CHECK1-NEXT: br label [[IFCONT:%.*]] |
| // CHECK1: else: |
| // CHECK1-NEXT: br label [[IFCONT]] |
| // CHECK1: ifcont: |
| // CHECK1-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 1 |
| // CHECK1-NEXT: [[TMP38:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]] |
| // CHECK1-NEXT: [[TMP39:%.*]] = and i1 [[TMP37]], [[TMP38]] |
| // CHECK1-NEXT: br i1 [[TMP39]], label [[THEN4:%.*]], label [[ELSE5:%.*]] |
| // CHECK1: then4: |
| // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 |
| // CHECK1-NEXT: [[TMP41:%.*]] = load i8*, i8** [[TMP40]], align 8 |
| // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 |
| // CHECK1-NEXT: [[TMP43:%.*]] = load i8*, i8** [[TMP42]], align 8 |
| // CHECK1-NEXT: [[TMP44:%.*]] = bitcast i8* [[TMP41]] to %"class.std::complex"* |
| // CHECK1-NEXT: [[TMP45:%.*]] = bitcast i8* [[TMP43]] to %"class.std::complex"* |
| // CHECK1-NEXT: [[TMP46:%.*]] = bitcast %"class.std::complex"* [[TMP45]] to i8* |
| // CHECK1-NEXT: [[TMP47:%.*]] = bitcast %"class.std::complex"* [[TMP44]] to i8* |
| // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP46]], i8* align 4 [[TMP47]], i64 8, i1 false), !tbaa.struct !18 |
| // CHECK1-NEXT: br label [[IFCONT6:%.*]] |
| // CHECK1: else5: |
| // CHECK1-NEXT: br label [[IFCONT6]] |
| // CHECK1: ifcont6: |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func |
| // CHECK1-SAME: (i8* [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 |
| // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTCNT_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) |
| // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK1-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK1-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31 |
| // CHECK1-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK1-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5 |
| // CHECK1-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8 |
| // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [1 x i8*]* |
| // CHECK1-NEXT: store i32 0, i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: br label [[PRECOND:%.*]] |
| // CHECK1: precond: |
| // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP6:%.*]] = icmp ult i32 [[TMP5]], 2 |
| // CHECK1-NEXT: br i1 [[TMP6]], label [[BODY:%.*]], label [[EXIT:%.*]] |
| // CHECK1: body: |
| // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP2]]) |
| // CHECK1-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 |
| // CHECK1-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]] |
| // CHECK1: then: |
| // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0 |
| // CHECK1-NEXT: [[TMP8:%.*]] = load i8*, i8** [[TMP7]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i32* |
| // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr i32, i32* [[TMP9]], i32 [[TMP5]] |
| // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] |
| // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]], align 4 |
| // CHECK1-NEXT: store volatile i32 [[TMP12]], i32 addrspace(3)* [[TMP11]], align 4 |
| // CHECK1-NEXT: br label [[IFCONT:%.*]] |
| // CHECK1: else: |
| // CHECK1-NEXT: br label [[IFCONT]] |
| // CHECK1: ifcont: |
| // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]]) |
| // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP13]] |
| // CHECK1-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]] |
| // CHECK1: then4: |
| // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]] |
| // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0 |
| // CHECK1-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* |
| // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr i32, i32* [[TMP17]], i32 [[TMP5]] |
| // CHECK1-NEXT: [[TMP19:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: store i32 [[TMP19]], i32* [[TMP18]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: br label [[IFCONT6:%.*]] |
| // CHECK1: else5: |
| // CHECK1-NEXT: br label [[IFCONT6]] |
| // CHECK1: ifcont6: |
| // CHECK1-NEXT: [[TMP20:%.*]] = add nsw i32 [[TMP5]], 1 |
| // CHECK1-NEXT: store i32 [[TMP20]], i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: br label [[PRECOND]] |
| // CHECK1: exit: |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper |
| // CHECK1-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2 |
| // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 |
| // CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 |
| // CHECK1-NEXT: store i16 [[TMP0]], i16* [[DOTADDR]], align 2, !tbaa [[TBAA12]] |
| // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) |
| // CHECK1-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8 |
| // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 0 |
| // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32** |
| // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP4]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 1 |
| // CHECK1-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32** |
| // CHECK1-NEXT: [[TMP8:%.*]] = load i32*, i32** [[TMP7]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 2 |
| // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %"class.std::complex"** |
| // CHECK1-NEXT: [[TMP11:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[TMP10]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: call void @__omp_outlined__1(i32* [[DOTADDR1]], i32* [[DOTZERO_ADDR]], i32* [[TMP5]], i32* [[TMP8]], %"class.std::complex"* [[TMP11]]) #[[ATTR5]] |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIdEvv_l19_worker |
| // CHECK1-SAME: () #[[ATTR0]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[WORK_FN:%.*]] = alloca i8*, align 8 |
| // CHECK1-NEXT: [[EXEC_STATUS:%.*]] = alloca i8, align 1 |
| // CHECK1-NEXT: store i8* null, i8** [[WORK_FN]], align 8 |
| // CHECK1-NEXT: store i8 0, i8* [[EXEC_STATUS]], align 1 |
| // CHECK1-NEXT: br label [[DOTAWAIT_WORK:%.*]] |
| // CHECK1: .await.work: |
| // CHECK1-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) |
| // CHECK1-NEXT: [[TMP0:%.*]] = call i1 @__kmpc_kernel_parallel(i8** [[WORK_FN]]) |
| // CHECK1-NEXT: [[TMP1:%.*]] = zext i1 [[TMP0]] to i8 |
| // CHECK1-NEXT: store i8 [[TMP1]], i8* [[EXEC_STATUS]], align 1 |
| // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[WORK_FN]], align 8 |
| // CHECK1-NEXT: [[SHOULD_TERMINATE:%.*]] = icmp eq i8* [[TMP2]], null |
| // CHECK1-NEXT: br i1 [[SHOULD_TERMINATE]], label [[DOTEXIT:%.*]], label [[DOTSELECT_WORKERS:%.*]] |
| // CHECK1: .select.workers: |
| // CHECK1-NEXT: [[TMP3:%.*]] = load i8, i8* [[EXEC_STATUS]], align 1 |
| // CHECK1-NEXT: [[IS_ACTIVE:%.*]] = icmp ne i8 [[TMP3]], 0 |
| // CHECK1-NEXT: br i1 [[IS_ACTIVE]], label [[DOTEXECUTE_PARALLEL:%.*]], label [[DOTBARRIER_PARALLEL:%.*]] |
| // CHECK1: .execute.parallel: |
| // CHECK1-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) |
| // CHECK1-NEXT: [[TMP5:%.*]] = load i8*, i8** [[WORK_FN]], align 8 |
| // CHECK1-NEXT: [[WORK_MATCH:%.*]] = icmp eq i8* [[TMP5]], bitcast (void (i16, i32)* @__omp_outlined__5_wrapper to i8*) |
| // CHECK1-NEXT: br i1 [[WORK_MATCH]], label [[DOTEXECUTE_FN:%.*]], label [[DOTCHECK_NEXT:%.*]] |
| // CHECK1: .execute.fn: |
| // CHECK1-NEXT: call void @__omp_outlined__5_wrapper(i16 0, i32 [[TMP4]]) #[[ATTR5]] |
| // CHECK1-NEXT: br label [[DOTTERMINATE_PARALLEL:%.*]] |
| // CHECK1: .check.next: |
| // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP2]] to void (i16, i32)* |
| // CHECK1-NEXT: call void [[TMP6]](i16 0, i32 [[TMP4]]) |
| // CHECK1-NEXT: br label [[DOTTERMINATE_PARALLEL]] |
| // CHECK1: .terminate.parallel: |
| // CHECK1-NEXT: call void @__kmpc_kernel_end_parallel() |
| // CHECK1-NEXT: br label [[DOTBARRIER_PARALLEL]] |
| // CHECK1: .barrier.parallel: |
| // CHECK1-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) |
| // CHECK1-NEXT: br label [[DOTAWAIT_WORK]] |
| // CHECK1: .exit: |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIdEvv_l19 |
| // CHECK1-SAME: () #[[ATTR0]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 |
| // CHECK1-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() |
| // CHECK1-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() |
| // CHECK1-NEXT: [[THREAD_LIMIT:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS]], [[NVPTX_WARP_SIZE]] |
| // CHECK1-NEXT: [[TMP0:%.*]] = icmp ult i32 [[NVPTX_TID]], [[THREAD_LIMIT]] |
| // CHECK1-NEXT: br i1 [[TMP0]], label [[DOTWORKER:%.*]], label [[DOTMASTERCHECK:%.*]] |
| // CHECK1: .worker: |
| // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIdEvv_l19_worker() #[[ATTR5]] |
| // CHECK1-NEXT: br label [[DOTEXIT:%.*]] |
| // CHECK1: .mastercheck: |
| // CHECK1-NEXT: [[NVPTX_TID1:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK1-NEXT: [[NVPTX_NUM_THREADS2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() |
| // CHECK1-NEXT: [[NVPTX_WARP_SIZE3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() |
| // CHECK1-NEXT: [[TMP1:%.*]] = sub nuw i32 [[NVPTX_WARP_SIZE3]], 1 |
| // CHECK1-NEXT: [[TMP2:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS2]], 1 |
| // CHECK1-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], -1 |
| // CHECK1-NEXT: [[MASTER_TID:%.*]] = and i32 [[TMP2]], [[TMP3]] |
| // CHECK1-NEXT: [[TMP4:%.*]] = icmp eq i32 [[NVPTX_TID1]], [[MASTER_TID]] |
| // CHECK1-NEXT: br i1 [[TMP4]], label [[DOTMASTER:%.*]], label [[DOTEXIT]] |
| // CHECK1: .master: |
| // CHECK1-NEXT: [[NVPTX_NUM_THREADS4:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() |
| // CHECK1-NEXT: [[NVPTX_WARP_SIZE5:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() |
| // CHECK1-NEXT: [[THREAD_LIMIT6:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS4]], [[NVPTX_WARP_SIZE5]] |
| // CHECK1-NEXT: call void @__kmpc_kernel_init(i32 [[THREAD_LIMIT6]], i16 1) |
| // CHECK1-NEXT: call void @__kmpc_data_sharing_init_stack() |
| // CHECK1-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) |
| // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR5]] |
| // CHECK1-NEXT: br label [[DOTTERMINATION_NOTIFIER:%.*]] |
| // CHECK1: .termination.notifier: |
| // CHECK1-NEXT: call void @__kmpc_kernel_deinit(i16 1) |
| // CHECK1-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) |
| // CHECK1-NEXT: br label [[DOTEXIT]] |
| // CHECK1: .exit: |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__2 |
| // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[IB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca double, align 8 |
| // CHECK1-NEXT: [[REF_TMP2:%.*]] = alloca double, align 8 |
| // CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP0:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared3", align 2, !tbaa [[TBAA12]] |
| // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* @"_openmp_static_kernel$size4", align 8, !tbaa [[TBAA14]] |
| // CHECK1-NEXT: call void @__kmpc_get_team_static_memory(i16 0, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i64 [[TMP1]], i16 [[TMP0]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**)) |
| // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 8 |
| // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, i8* [[TMP2]], i64 0 |
| // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to %struct._globalized_locals_ty.0* |
| // CHECK1-NEXT: [[ISTART:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_0:%.*]], %struct._globalized_locals_ty.0* [[TMP4]], i32 0, i32 1 |
| // CHECK1-NEXT: [[IEND:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_0]], %struct._globalized_locals_ty.0* [[TMP4]], i32 0, i32 2 |
| // CHECK1-NEXT: [[PARTIAL_SUM:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_0]], %struct._globalized_locals_ty.0* [[TMP4]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP5]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP6]]) #[[ATTR5]] |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP7:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP7]]) #[[ATTR5]] |
| // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) #[[ATTR5]] |
| // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP9:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP9]]) #[[ATTR5]] |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i32* [[IB]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP10]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 99 |
| // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK1: cond.true: |
| // CHECK1-NEXT: br label [[COND_END:%.*]] |
| // CHECK1: cond.false: |
| // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: br label [[COND_END]] |
| // CHECK1: cond.end: |
| // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] |
| // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK1: omp.inner.for.cond: |
| // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] |
| // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] |
| // CHECK1: omp.inner.for.cond.cleanup: |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK1: omp.inner.for.body: |
| // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 |
| // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK1-NEXT: store i32 [[ADD]], i32* [[IB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP19:%.*]] = bitcast double* [[REF_TMP]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP19]]) #[[ATTR5]] |
| // CHECK1-NEXT: store double 0.000000e+00, double* [[REF_TMP]], align 8, !tbaa [[TBAA22:![0-9]+]] |
| // CHECK1-NEXT: [[TMP20:%.*]] = bitcast double* [[REF_TMP2]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP20]]) #[[ATTR5]] |
| // CHECK1-NEXT: store double 0.000000e+00, double* [[REF_TMP2]], align 8, !tbaa [[TBAA22]] |
| // CHECK1-NEXT: call void @_ZNSt7complexIdEC1ERKdS2_(%"class.std::complex.1"* nonnull dereferenceable(16) [[PARTIAL_SUM]], double* nonnull align 8 dereferenceable(8) [[REF_TMP]], double* nonnull align 8 dereferenceable(8) [[REF_TMP2]]) #[[ATTR8]] |
| // CHECK1-NEXT: [[TMP21:%.*]] = bitcast double* [[REF_TMP2]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP21]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP22:%.*]] = bitcast double* [[REF_TMP]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP22]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[IB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP23]], 4 |
| // CHECK1-NEXT: store i32 [[MUL3]], i32* [[ISTART]], align 8, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[IB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], 1 |
| // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[ADD4]], 4 |
| // CHECK1-NEXT: store i32 [[MUL5]], i32* [[IEND]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 |
| // CHECK1-NEXT: [[TMP26:%.*]] = bitcast i32* [[ISTART]] to i8* |
| // CHECK1-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 |
| // CHECK1-NEXT: [[TMP28:%.*]] = bitcast i32* [[IEND]] to i8* |
| // CHECK1-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 |
| // CHECK1-NEXT: [[TMP30:%.*]] = bitcast %"class.std::complex.1"* [[PARTIAL_SUM]] to i8* |
| // CHECK1-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP31:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** |
| // CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32*, i32*, %"class.std::complex.1"*)* @__omp_outlined__5 to i8*), i8* bitcast (void (i16, i32)* @__omp_outlined__5_wrapper to i8*), i8** [[TMP31]], i64 3) |
| // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK1: omp.body.continue: |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK1: omp.inner.for.inc: |
| // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP32]], 1 |
| // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] |
| // CHECK1: omp.inner.for.end: |
| // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK1: omp.loop.exit: |
| // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) |
| // CHECK1-NEXT: [[TMP33:%.*]] = bitcast i32* [[IB]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP33]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP34:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP34]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP35:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP35]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP36:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP36]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP37:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP37]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP38:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP38]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP39:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared3", align 2, !tbaa [[TBAA12]] |
| // CHECK1-NEXT: call void @__kmpc_restore_team_static_memory(i16 0, i16 [[TMP39]]) |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@_ZNSt7complexIdEC1ERKdS2_ |
| // CHECK1-SAME: (%"class.std::complex.1"* nonnull dereferenceable(16) [[THIS:%.*]], double* nonnull align 8 dereferenceable(8) [[__RE:%.*]], double* nonnull align 8 dereferenceable(8) [[__IM:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK1-NEXT: [[__RE_ADDR:%.*]] = alloca double*, align 8 |
| // CHECK1-NEXT: [[__IM_ADDR:%.*]] = alloca double*, align 8 |
| // CHECK1-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store double* [[__RE]], double** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store double* [[__IM]], double** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[__RE_ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP1:%.*]] = load double*, double** [[__IM_ADDR]], align 8 |
| // CHECK1-NEXT: call void @_ZNSt7complexIdEC2ERKdS2_(%"class.std::complex.1"* nonnull dereferenceable(16) [[THIS1]], double* nonnull align 8 dereferenceable(8) [[TMP0]], double* nonnull align 8 dereferenceable(8) [[TMP1]]) #[[ATTR8]] |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__5 |
| // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ISTART:%.*]], i32* nonnull align 4 dereferenceable(4) [[IEND:%.*]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[PARTIAL_SUM:%.*]]) #[[ATTR0]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[ISTART_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[IEND_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK1-NEXT: [[PARTIAL_SUM_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[PARTIAL_SUM5:%.*]] = alloca %"class.std::complex.1", align 8 |
| // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca double, align 8 |
| // CHECK1-NEXT: [[REF_TMP6:%.*]] = alloca double, align 8 |
| // CHECK1-NEXT: [[I7:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[REF_TMP14:%.*]] = alloca %"class.std::complex.1", align 8 |
| // CHECK1-NEXT: [[REF_TMP15:%.*]] = alloca double, align 8 |
| // CHECK1-NEXT: [[REF_TMP16:%.*]] = alloca double, align 8 |
| // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK1-NEXT: [[REF_TMP21:%.*]] = alloca %"class.std::complex.1", align 8 |
| // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store i32* [[ISTART]], i32** [[ISTART_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store i32* [[IEND]], i32** [[IEND_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store %"class.std::complex.1"* [[PARTIAL_SUM]], %"class.std::complex.1"** [[PARTIAL_SUM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ISTART_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[IEND_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP2:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[PARTIAL_SUM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP3]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_1]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP6]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP1]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_2]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[SUB:%.*]] = sub i32 [[TMP9]], [[TMP10]] |
| // CHECK1-NEXT: [[SUB3:%.*]] = sub i32 [[SUB]], 1 |
| // CHECK1-NEXT: [[ADD:%.*]] = add i32 [[SUB3]], 1 |
| // CHECK1-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 |
| // CHECK1-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 1 |
| // CHECK1-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i32* [[I]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP11]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: store i32 [[TMP12]], i32* [[I]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i32* [[I]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP13]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP14]], [[TMP15]] |
| // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK1: omp.precond.then: |
| // CHECK1-NEXT: [[TMP16:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP16]]) #[[ATTR5]] |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP17]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP19]]) #[[ATTR5]] |
| // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP20]]) #[[ATTR5]] |
| // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP21:%.*]] = bitcast %"class.std::complex.1"* [[PARTIAL_SUM5]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* [[TMP21]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP22:%.*]] = bitcast double* [[REF_TMP]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP22]]) #[[ATTR5]] |
| // CHECK1-NEXT: store double 0.000000e+00, double* [[REF_TMP]], align 8, !tbaa [[TBAA22]] |
| // CHECK1-NEXT: [[TMP23:%.*]] = bitcast double* [[REF_TMP6]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP23]]) #[[ATTR5]] |
| // CHECK1-NEXT: store double 0.000000e+00, double* [[REF_TMP6]], align 8, !tbaa [[TBAA22]] |
| // CHECK1-NEXT: call void @_ZNSt7complexIdEC1ERKdS2_(%"class.std::complex.1"* nonnull dereferenceable(16) [[PARTIAL_SUM5]], double* nonnull align 8 dereferenceable(8) [[REF_TMP]], double* nonnull align 8 dereferenceable(8) [[REF_TMP6]]) #[[ATTR8]] |
| // CHECK1-NEXT: [[TMP24:%.*]] = bitcast double* [[REF_TMP6]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP24]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP25:%.*]] = bitcast double* [[REF_TMP]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP25]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP26:%.*]] = bitcast i32* [[I7]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP26]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB2]], i32 [[TMP28]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK1: omp.dispatch.cond: |
| // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[CMP8:%.*]] = icmp ugt i32 [[TMP29]], [[TMP30]] |
| // CHECK1-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK1: cond.true: |
| // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: br label [[COND_END:%.*]] |
| // CHECK1: cond.false: |
| // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: br label [[COND_END]] |
| // CHECK1: cond.end: |
| // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE]] ], [ [[TMP32]], [[COND_FALSE]] ] |
| // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[ADD9:%.*]] = add i32 [[TMP35]], 1 |
| // CHECK1-NEXT: [[CMP10:%.*]] = icmp ult i32 [[TMP34]], [[ADD9]] |
| // CHECK1-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_CLEANUP:%.*]] |
| // CHECK1: omp.dispatch.cleanup: |
| // CHECK1-NEXT: br label [[OMP_DISPATCH_END:%.*]] |
| // CHECK1: omp.dispatch.body: |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK1: omp.inner.for.cond: |
| // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[ADD11:%.*]] = add i32 [[TMP37]], 1 |
| // CHECK1-NEXT: [[CMP12:%.*]] = icmp ult i32 [[TMP36]], [[ADD11]] |
| // CHECK1-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] |
| // CHECK1: omp.inner.for.cond.cleanup: |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK1: omp.inner.for.body: |
| // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[MUL:%.*]] = mul i32 [[TMP39]], 1 |
| // CHECK1-NEXT: [[ADD13:%.*]] = add i32 [[TMP38]], [[MUL]] |
| // CHECK1-NEXT: store i32 [[ADD13]], i32* [[I7]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP40:%.*]] = bitcast %"class.std::complex.1"* [[REF_TMP14]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* [[TMP40]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP41:%.*]] = bitcast double* [[REF_TMP15]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP41]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP42:%.*]] = load i32, i32* [[I7]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP42]] to double |
| // CHECK1-NEXT: store double [[CONV]], double* [[REF_TMP15]], align 8, !tbaa [[TBAA22]] |
| // CHECK1-NEXT: [[TMP43:%.*]] = bitcast double* [[REF_TMP16]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP43]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP44:%.*]] = load i32, i32* [[I7]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[CONV17:%.*]] = sitofp i32 [[TMP44]] to double |
| // CHECK1-NEXT: store double [[CONV17]], double* [[REF_TMP16]], align 8, !tbaa [[TBAA22]] |
| // CHECK1-NEXT: call void @_ZNSt7complexIdEC1ERKdS2_(%"class.std::complex.1"* nonnull dereferenceable(16) [[REF_TMP14]], double* nonnull align 8 dereferenceable(8) [[REF_TMP15]], double* nonnull align 8 dereferenceable(8) [[REF_TMP16]]) #[[ATTR8]] |
| // CHECK1-NEXT: [[CALL:%.*]] = call nonnull align 8 dereferenceable(16) %"class.std::complex.1"* @_ZNSt7complexIdEpLIdEERS0_RKS_IT_E(%"class.std::complex.1"* nonnull dereferenceable(16) [[PARTIAL_SUM5]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[REF_TMP14]]) #[[ATTR8]] |
| // CHECK1-NEXT: [[TMP45:%.*]] = bitcast double* [[REF_TMP16]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP45]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP46:%.*]] = bitcast double* [[REF_TMP15]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP46]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP47:%.*]] = bitcast %"class.std::complex.1"* [[REF_TMP14]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* [[TMP47]]) #[[ATTR5]] |
| // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK1: omp.body.continue: |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK1: omp.inner.for.inc: |
| // CHECK1-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[ADD18:%.*]] = add i32 [[TMP48]], 1 |
| // CHECK1-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] |
| // CHECK1: omp.inner.for.end: |
| // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK1: omp.dispatch.inc: |
| // CHECK1-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[ADD19:%.*]] = add i32 [[TMP49]], [[TMP50]] |
| // CHECK1-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[ADD20:%.*]] = add i32 [[TMP51]], [[TMP52]] |
| // CHECK1-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK1: omp.dispatch.end: |
| // CHECK1-NEXT: [[TMP53:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP54:%.*]] = load i32, i32* [[TMP53]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP54]]) |
| // CHECK1-NEXT: [[TMP55:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP56:%.*]] = load i32, i32* [[TMP55]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP57:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 |
| // CHECK1-NEXT: [[TMP58:%.*]] = bitcast %"class.std::complex.1"* [[PARTIAL_SUM5]] to i8* |
| // CHECK1-NEXT: store i8* [[TMP58]], i8** [[TMP57]], align 8 |
| // CHECK1-NEXT: [[TMP59:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* |
| // CHECK1-NEXT: [[TMP60:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(%struct.ident_t* @[[GLOB3]], i32 [[TMP56]], i32 1, i64 8, i8* [[TMP59]], void (i8*, i16, i16, i16)* @_omp_reduction_shuffle_and_reduce_func7, void (i8*, i32)* @_omp_reduction_inter_warp_copy_func8) |
| // CHECK1-NEXT: [[TMP61:%.*]] = icmp eq i32 [[TMP60]], 1 |
| // CHECK1-NEXT: br i1 [[TMP61]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]] |
| // CHECK1: .omp.reduction.then: |
| // CHECK1-NEXT: [[TMP62:%.*]] = bitcast %"class.std::complex.1"* [[REF_TMP21]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* [[TMP62]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[CALL22:%.*]] = call %"class.std::complex.1" @_ZStplIdESt7complexIT_ERKS2_S4_(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[TMP2]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[PARTIAL_SUM5]]) #[[ATTR8]] |
| // CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[REF_TMP21]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP64:%.*]] = extractvalue %"class.std::complex.1" [[CALL22]], 0 |
| // CHECK1-NEXT: store double [[TMP64]], double* [[TMP63]], align 8 |
| // CHECK1-NEXT: [[TMP65:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[REF_TMP21]], i32 0, i32 1 |
| // CHECK1-NEXT: [[TMP66:%.*]] = extractvalue %"class.std::complex.1" [[CALL22]], 1 |
| // CHECK1-NEXT: store double [[TMP66]], double* [[TMP65]], align 8 |
| // CHECK1-NEXT: [[TMP67:%.*]] = bitcast %"class.std::complex.1"* [[TMP2]] to i8* |
| // CHECK1-NEXT: [[TMP68:%.*]] = bitcast %"class.std::complex.1"* [[REF_TMP21]] to i8* |
| // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP67]], i8* align 8 [[TMP68]], i64 16, i1 false), !tbaa.struct !24 |
| // CHECK1-NEXT: [[TMP69:%.*]] = bitcast %"class.std::complex.1"* [[REF_TMP21]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* [[TMP69]]) #[[ATTR5]] |
| // CHECK1-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP56]]) |
| // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DONE]] |
| // CHECK1: .omp.reduction.done: |
| // CHECK1-NEXT: [[TMP70:%.*]] = bitcast i32* [[I7]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP70]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP71:%.*]] = bitcast %"class.std::complex.1"* [[PARTIAL_SUM5]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* [[TMP71]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP72:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP72]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP73:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP73]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP74:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP74]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP75:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP75]]) #[[ATTR5]] |
| // CHECK1-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK1: omp.precond.end: |
| // CHECK1-NEXT: [[TMP76:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_2]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP76]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP77:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_1]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP77]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP78:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP78]]) #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP79:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* |
| // CHECK1-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP79]]) #[[ATTR5]] |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@_ZNSt7complexIdEpLIdEERS0_RKS_IT_E |
| // CHECK1-SAME: (%"class.std::complex.1"* nonnull dereferenceable(16) [[THIS:%.*]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[__C:%.*]]) #[[ATTR4]] comdat align 2 { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK1-NEXT: [[__C_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK1-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store %"class.std::complex.1"* [[__C]], %"class.std::complex.1"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[CALL:%.*]] = call double @_ZNKSt7complexIdE4realEv(%"class.std::complex.1"* nonnull dereferenceable(16) [[TMP0]]) #[[ATTR8]] |
| // CHECK1-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP1:%.*]] = load double, double* [[__RE_]], align 8, !tbaa [[TBAA25:![0-9]+]] |
| // CHECK1-NEXT: [[ADD:%.*]] = fadd double [[TMP1]], [[CALL]] |
| // CHECK1-NEXT: store double [[ADD]], double* [[__RE_]], align 8, !tbaa [[TBAA25]] |
| // CHECK1-NEXT: [[TMP2:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[CALL2:%.*]] = call double @_ZNKSt7complexIdE4imagEv(%"class.std::complex.1"* nonnull dereferenceable(16) [[TMP2]]) #[[ATTR8]] |
| // CHECK1-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 1 |
| // CHECK1-NEXT: [[TMP3:%.*]] = load double, double* [[__IM_]], align 8, !tbaa [[TBAA27:![0-9]+]] |
| // CHECK1-NEXT: [[ADD3:%.*]] = fadd double [[TMP3]], [[CALL2]] |
| // CHECK1-NEXT: store double [[ADD3]], double* [[__IM_]], align 8, !tbaa [[TBAA27]] |
| // CHECK1-NEXT: ret %"class.std::complex.1"* [[THIS1]] |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@_ZStplIdESt7complexIT_ERKS2_S4_ |
| // CHECK1-SAME: (%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[__X:%.*]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[__Y:%.*]]) #[[ATTR6]] comdat { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[RETVAL:%.*]] = alloca %"class.std::complex.1", align 8 |
| // CHECK1-NEXT: [[__T2:%.*]] = alloca %"class.std::complex.1", align 8 |
| // CHECK1-NEXT: [[__X_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK1-NEXT: [[__Y_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB5]]) |
| // CHECK1-NEXT: [[TMP1:%.*]] = call i16 @__kmpc_parallel_level(%struct.ident_t* @[[GLOB5]], i32 [[TMP0]]) |
| // CHECK1-NEXT: [[TMP2:%.*]] = icmp eq i16 [[TMP1]], 0 |
| // CHECK1-NEXT: [[TMP3:%.*]] = call i8 @__kmpc_is_spmd_exec_mode() #[[ATTR5]] |
| // CHECK1-NEXT: [[TMP4:%.*]] = icmp ne i8 [[TMP3]], 0 |
| // CHECK1-NEXT: br i1 [[TMP4]], label [[DOTSPMD:%.*]], label [[DOTNON_SPMD:%.*]] |
| // CHECK1: .spmd: |
| // CHECK1-NEXT: br label [[DOTEXIT:%.*]] |
| // CHECK1: .non-spmd: |
| // CHECK1-NEXT: [[TMP5:%.*]] = select i1 [[TMP2]], i64 16, i64 512 |
| // CHECK1-NEXT: [[TMP6:%.*]] = call i8* @__kmpc_data_sharing_coalesced_push_stack(i64 [[TMP5]], i16 0) |
| // CHECK1-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to %struct._globalized_locals_ty.4* |
| // CHECK1-NEXT: br label [[DOTEXIT]] |
| // CHECK1: .exit: |
| // CHECK1-NEXT: [[_SELECT_STACK:%.*]] = phi %struct._globalized_locals_ty.4* [ null, [[DOTSPMD]] ], [ [[TMP7]], [[DOTNON_SPMD]] ] |
| // CHECK1-NEXT: [[TMP8:%.*]] = bitcast %struct._globalized_locals_ty.4* [[_SELECT_STACK]] to %struct._globalized_locals_ty.5* |
| // CHECK1-NEXT: [[__T:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_4:%.*]], %struct._globalized_locals_ty.4* [[_SELECT_STACK]], i32 0, i32 0 |
| // CHECK1-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK1-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID]], 31 |
| // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [32 x %"class.std::complex.1"], [32 x %"class.std::complex.1"]* [[__T]], i32 0, i32 [[NVPTX_LANE_ID]] |
| // CHECK1-NEXT: [[__T1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_5:%.*]], %struct._globalized_locals_ty.5* [[TMP8]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP10:%.*]] = select i1 [[TMP2]], %"class.std::complex.1"* [[__T1]], %"class.std::complex.1"* [[TMP9]] |
| // CHECK1-NEXT: [[TMP11:%.*]] = select i1 [[TMP4]], %"class.std::complex.1"* [[__T2]], %"class.std::complex.1"* [[TMP10]] |
| // CHECK1-NEXT: store %"class.std::complex.1"* [[__X]], %"class.std::complex.1"** [[__X_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store %"class.std::complex.1"* [[__Y]], %"class.std::complex.1"** [[__Y_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP12:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[__X_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP13:%.*]] = bitcast %"class.std::complex.1"* [[TMP11]] to i8* |
| // CHECK1-NEXT: [[TMP14:%.*]] = bitcast %"class.std::complex.1"* [[TMP12]] to i8* |
| // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP13]], i8* align 8 [[TMP14]], i64 16, i1 false), !tbaa.struct !24 |
| // CHECK1-NEXT: [[TMP15:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[__Y_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[CALL:%.*]] = call nonnull align 8 dereferenceable(16) %"class.std::complex.1"* @_ZNSt7complexIdEpLIdEERS0_RKS_IT_E(%"class.std::complex.1"* nonnull dereferenceable(16) [[TMP11]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[TMP15]]) #[[ATTR8]] |
| // CHECK1-NEXT: [[TMP16:%.*]] = bitcast %"class.std::complex.1"* [[RETVAL]] to i8* |
| // CHECK1-NEXT: [[TMP17:%.*]] = bitcast %"class.std::complex.1"* [[TMP11]] to i8* |
| // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP16]], i8* align 8 [[TMP17]], i64 16, i1 false), !tbaa.struct !24 |
| // CHECK1-NEXT: br i1 [[TMP4]], label [[DOTEXIT4:%.*]], label [[DOTNON_SPMD3:%.*]] |
| // CHECK1: .non-spmd3: |
| // CHECK1-NEXT: [[TMP18:%.*]] = bitcast %struct._globalized_locals_ty.4* [[_SELECT_STACK]] to i8* |
| // CHECK1-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP18]]) |
| // CHECK1-NEXT: br label [[DOTEXIT4]] |
| // CHECK1: .exit4: |
| // CHECK1-NEXT: [[TMP19:%.*]] = load %"class.std::complex.1", %"class.std::complex.1"* [[RETVAL]], align 8 |
| // CHECK1-NEXT: ret %"class.std::complex.1" [[TMP19]] |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func7 |
| // CHECK1-SAME: (i8* [[TMP0:%.*]], i16 signext [[TMP1:%.*]], i16 signext [[TMP2:%.*]], i16 signext [[TMP3:%.*]]) #[[ATTR0]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 |
| // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2 |
| // CHECK1-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2 |
| // CHECK1-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2 |
| // CHECK1-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK1-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca %"class.std::complex.1", align 8 |
| // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store i16 [[TMP1]], i16* [[DOTADDR1]], align 2, !tbaa [[TBAA12]] |
| // CHECK1-NEXT: store i16 [[TMP2]], i16* [[DOTADDR2]], align 2, !tbaa [[TBAA12]] |
| // CHECK1-NEXT: store i16 [[TMP3]], i16* [[DOTADDR3]], align 2, !tbaa [[TBAA12]] |
| // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* |
| // CHECK1-NEXT: [[TMP6:%.*]] = load i16, i16* [[DOTADDR1]], align 2, !tbaa [[TBAA12]] |
| // CHECK1-NEXT: [[TMP7:%.*]] = load i16, i16* [[DOTADDR2]], align 2, !tbaa [[TBAA12]] |
| // CHECK1-NEXT: [[TMP8:%.*]] = load i16, i16* [[DOTADDR3]], align 2, !tbaa [[TBAA12]] |
| // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 |
| // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 |
| // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 |
| // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP10]] to %"class.std::complex.1"* |
| // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr %"class.std::complex.1", %"class.std::complex.1"* [[TMP12]], i64 1 |
| // CHECK1-NEXT: [[TMP14:%.*]] = bitcast %"class.std::complex.1"* [[TMP13]] to i8* |
| // CHECK1-NEXT: [[TMP15:%.*]] = bitcast %"class.std::complex.1"* [[TMP12]] to i64* |
| // CHECK1-NEXT: [[TMP16:%.*]] = bitcast %"class.std::complex.1"* [[DOTOMP_REDUCTION_ELEMENT]] to i64* |
| // CHECK1-NEXT: br label [[DOTSHUFFLE_PRE_COND:%.*]] |
| // CHECK1: .shuffle.pre_cond: |
| // CHECK1-NEXT: [[TMP17:%.*]] = phi i64* [ [[TMP15]], [[ENTRY:%.*]] ], [ [[TMP28:%.*]], [[DOTSHUFFLE_THEN:%.*]] ] |
| // CHECK1-NEXT: [[TMP18:%.*]] = phi i64* [ [[TMP16]], [[ENTRY]] ], [ [[TMP29:%.*]], [[DOTSHUFFLE_THEN]] ] |
| // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i64* [[TMP17]] to i8* |
| // CHECK1-NEXT: [[TMP20:%.*]] = ptrtoint i8* [[TMP14]] to i64 |
| // CHECK1-NEXT: [[TMP21:%.*]] = ptrtoint i8* [[TMP19]] to i64 |
| // CHECK1-NEXT: [[TMP22:%.*]] = sub i64 [[TMP20]], [[TMP21]] |
| // CHECK1-NEXT: [[TMP23:%.*]] = sdiv exact i64 [[TMP22]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64) |
| // CHECK1-NEXT: [[TMP24:%.*]] = icmp sgt i64 [[TMP23]], 7 |
| // CHECK1-NEXT: br i1 [[TMP24]], label [[DOTSHUFFLE_THEN]], label [[DOTSHUFFLE_EXIT:%.*]] |
| // CHECK1: .shuffle.then: |
| // CHECK1-NEXT: [[TMP25:%.*]] = load i64, i64* [[TMP17]], align 8 |
| // CHECK1-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() |
| // CHECK1-NEXT: [[TMP26:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16 |
| // CHECK1-NEXT: [[TMP27:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP25]], i16 [[TMP7]], i16 [[TMP26]]) |
| // CHECK1-NEXT: store i64 [[TMP27]], i64* [[TMP18]], align 8 |
| // CHECK1-NEXT: [[TMP28]] = getelementptr i64, i64* [[TMP17]], i64 1 |
| // CHECK1-NEXT: [[TMP29]] = getelementptr i64, i64* [[TMP18]], i64 1 |
| // CHECK1-NEXT: br label [[DOTSHUFFLE_PRE_COND]] |
| // CHECK1: .shuffle.exit: |
| // CHECK1-NEXT: [[TMP30:%.*]] = bitcast %"class.std::complex.1"* [[DOTOMP_REDUCTION_ELEMENT]] to i8* |
| // CHECK1-NEXT: store i8* [[TMP30]], i8** [[TMP11]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP31:%.*]] = icmp eq i16 [[TMP8]], 0 |
| // CHECK1-NEXT: [[TMP32:%.*]] = icmp eq i16 [[TMP8]], 1 |
| // CHECK1-NEXT: [[TMP33:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]] |
| // CHECK1-NEXT: [[TMP34:%.*]] = and i1 [[TMP32]], [[TMP33]] |
| // CHECK1-NEXT: [[TMP35:%.*]] = icmp eq i16 [[TMP8]], 2 |
| // CHECK1-NEXT: [[TMP36:%.*]] = and i16 [[TMP6]], 1 |
| // CHECK1-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP36]], 0 |
| // CHECK1-NEXT: [[TMP38:%.*]] = and i1 [[TMP35]], [[TMP37]] |
| // CHECK1-NEXT: [[TMP39:%.*]] = icmp sgt i16 [[TMP7]], 0 |
| // CHECK1-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]] |
| // CHECK1-NEXT: [[TMP41:%.*]] = or i1 [[TMP31]], [[TMP34]] |
| // CHECK1-NEXT: [[TMP42:%.*]] = or i1 [[TMP41]], [[TMP40]] |
| // CHECK1-NEXT: br i1 [[TMP42]], label [[THEN:%.*]], label [[ELSE:%.*]] |
| // CHECK1: then: |
| // CHECK1-NEXT: [[TMP43:%.*]] = bitcast [1 x i8*]* [[TMP5]] to i8* |
| // CHECK1-NEXT: [[TMP44:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8* |
| // CHECK1-NEXT: call void @"_omp$reduction$reduction_func6"(i8* [[TMP43]], i8* [[TMP44]]) #[[ATTR5]] |
| // CHECK1-NEXT: br label [[IFCONT:%.*]] |
| // CHECK1: else: |
| // CHECK1-NEXT: br label [[IFCONT]] |
| // CHECK1: ifcont: |
| // CHECK1-NEXT: [[TMP45:%.*]] = icmp eq i16 [[TMP8]], 1 |
| // CHECK1-NEXT: [[TMP46:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]] |
| // CHECK1-NEXT: [[TMP47:%.*]] = and i1 [[TMP45]], [[TMP46]] |
| // CHECK1-NEXT: br i1 [[TMP47]], label [[THEN4:%.*]], label [[ELSE5:%.*]] |
| // CHECK1: then4: |
| // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 |
| // CHECK1-NEXT: [[TMP49:%.*]] = load i8*, i8** [[TMP48]], align 8 |
| // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 |
| // CHECK1-NEXT: [[TMP51:%.*]] = load i8*, i8** [[TMP50]], align 8 |
| // CHECK1-NEXT: [[TMP52:%.*]] = bitcast i8* [[TMP49]] to %"class.std::complex.1"* |
| // CHECK1-NEXT: [[TMP53:%.*]] = bitcast i8* [[TMP51]] to %"class.std::complex.1"* |
| // CHECK1-NEXT: [[TMP54:%.*]] = bitcast %"class.std::complex.1"* [[TMP53]] to i8* |
| // CHECK1-NEXT: [[TMP55:%.*]] = bitcast %"class.std::complex.1"* [[TMP52]] to i8* |
| // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP54]], i8* align 8 [[TMP55]], i64 16, i1 false), !tbaa.struct !24 |
| // CHECK1-NEXT: br label [[IFCONT6:%.*]] |
| // CHECK1: else5: |
| // CHECK1-NEXT: br label [[IFCONT6]] |
| // CHECK1: ifcont6: |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func8 |
| // CHECK1-SAME: (i8* [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 |
| // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTCNT_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) |
| // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK1-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK1-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31 |
| // CHECK1-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK1-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5 |
| // CHECK1-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8 |
| // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [1 x i8*]* |
| // CHECK1-NEXT: store i32 0, i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: br label [[PRECOND:%.*]] |
| // CHECK1: precond: |
| // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[TMP6:%.*]] = icmp ult i32 [[TMP5]], 4 |
| // CHECK1-NEXT: br i1 [[TMP6]], label [[BODY:%.*]], label [[EXIT:%.*]] |
| // CHECK1: body: |
| // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]]) |
| // CHECK1-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 |
| // CHECK1-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]] |
| // CHECK1: then: |
| // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0 |
| // CHECK1-NEXT: [[TMP8:%.*]] = load i8*, i8** [[TMP7]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i32* |
| // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr i32, i32* [[TMP9]], i32 [[TMP5]] |
| // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] |
| // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]], align 4 |
| // CHECK1-NEXT: store volatile i32 [[TMP12]], i32 addrspace(3)* [[TMP11]], align 4 |
| // CHECK1-NEXT: br label [[IFCONT:%.*]] |
| // CHECK1: else: |
| // CHECK1-NEXT: br label [[IFCONT]] |
| // CHECK1: ifcont: |
| // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]]) |
| // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP13]] |
| // CHECK1-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]] |
| // CHECK1: then4: |
| // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]] |
| // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0 |
| // CHECK1-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* |
| // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr i32, i32* [[TMP17]], i32 [[TMP5]] |
| // CHECK1-NEXT: [[TMP19:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: store i32 [[TMP19]], i32* [[TMP18]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: br label [[IFCONT6:%.*]] |
| // CHECK1: else5: |
| // CHECK1-NEXT: br label [[IFCONT6]] |
| // CHECK1: ifcont6: |
| // CHECK1-NEXT: [[TMP20:%.*]] = add nsw i32 [[TMP5]], 1 |
| // CHECK1-NEXT: store i32 [[TMP20]], i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: br label [[PRECOND]] |
| // CHECK1: exit: |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__5_wrapper |
| // CHECK1-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2 |
| // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK1-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 |
| // CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 |
| // CHECK1-NEXT: store i16 [[TMP0]], i16* [[DOTADDR]], align 2, !tbaa [[TBAA12]] |
| // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] |
| // CHECK1-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) |
| // CHECK1-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8 |
| // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 0 |
| // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32** |
| // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP4]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 1 |
| // CHECK1-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32** |
| // CHECK1-NEXT: [[TMP8:%.*]] = load i32*, i32** [[TMP7]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 2 |
| // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %"class.std::complex.1"** |
| // CHECK1-NEXT: [[TMP11:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[TMP10]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: call void @__omp_outlined__5(i32* [[DOTADDR1]], i32* [[DOTZERO_ADDR]], i32* [[TMP5]], i32* [[TMP8]], %"class.std::complex.1"* [[TMP11]]) #[[ATTR5]] |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@_ZNSt7complexIfEC2ERKfS2_ |
| // CHECK1-SAME: (%"class.std::complex"* nonnull dereferenceable(8) [[THIS:%.*]], float* nonnull align 4 dereferenceable(4) [[__RE:%.*]], float* nonnull align 4 dereferenceable(4) [[__IM:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK1-NEXT: [[__RE_ADDR:%.*]] = alloca float*, align 8 |
| // CHECK1-NEXT: [[__IM_ADDR:%.*]] = alloca float*, align 8 |
| // CHECK1-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store float* [[__RE]], float** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store float* [[__IM]], float** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load float*, float** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP1:%.*]] = load float, float* [[TMP0]], align 4, !tbaa [[TBAA16]] |
| // CHECK1-NEXT: store float [[TMP1]], float* [[__RE_]], align 4, !tbaa [[TBAA19]] |
| // CHECK1-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 1 |
| // CHECK1-NEXT: [[TMP2:%.*]] = load float*, float** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP3:%.*]] = load float, float* [[TMP2]], align 4, !tbaa [[TBAA16]] |
| // CHECK1-NEXT: store float [[TMP3]], float* [[__IM_]], align 4, !tbaa [[TBAA21]] |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@_ZNKSt7complexIfE4realEv |
| // CHECK1-SAME: (%"class.std::complex"* nonnull dereferenceable(8) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK1-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* [[__RE_]], align 4, !tbaa [[TBAA19]] |
| // CHECK1-NEXT: ret float [[TMP0]] |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@_ZNKSt7complexIfE4imagEv |
| // CHECK1-SAME: (%"class.std::complex"* nonnull dereferenceable(8) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK1-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 1 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* [[__IM_]], align 4, !tbaa [[TBAA21]] |
| // CHECK1-NEXT: ret float [[TMP0]] |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@_ZNSt7complexIdEC2ERKdS2_ |
| // CHECK1-SAME: (%"class.std::complex.1"* nonnull dereferenceable(16) [[THIS:%.*]], double* nonnull align 8 dereferenceable(8) [[__RE:%.*]], double* nonnull align 8 dereferenceable(8) [[__IM:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK1-NEXT: [[__RE_ADDR:%.*]] = alloca double*, align 8 |
| // CHECK1-NEXT: [[__IM_ADDR:%.*]] = alloca double*, align 8 |
| // CHECK1-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store double* [[__RE]], double** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: store double* [[__IM]], double** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP1:%.*]] = load double, double* [[TMP0]], align 8, !tbaa [[TBAA22]] |
| // CHECK1-NEXT: store double [[TMP1]], double* [[__RE_]], align 8, !tbaa [[TBAA25]] |
| // CHECK1-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 1 |
| // CHECK1-NEXT: [[TMP2:%.*]] = load double*, double** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[TMP3:%.*]] = load double, double* [[TMP2]], align 8, !tbaa [[TBAA22]] |
| // CHECK1-NEXT: store double [[TMP3]], double* [[__IM_]], align 8, !tbaa [[TBAA27]] |
| // CHECK1-NEXT: ret void |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@_ZNKSt7complexIdE4realEv |
| // CHECK1-SAME: (%"class.std::complex.1"* nonnull dereferenceable(16) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK1-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 0 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load double, double* [[__RE_]], align 8, !tbaa [[TBAA25]] |
| // CHECK1-NEXT: ret double [[TMP0]] |
| // |
| // |
| // CHECK1-LABEL: define {{[^@]+}}@_ZNKSt7complexIdE4imagEv |
| // CHECK1-SAME: (%"class.std::complex.1"* nonnull dereferenceable(16) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 { |
| // CHECK1-NEXT: entry: |
| // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK1-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK1-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 |
| // CHECK1-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 1 |
| // CHECK1-NEXT: [[TMP0:%.*]] = load double, double* [[__IM_]], align 8, !tbaa [[TBAA27]] |
| // CHECK1-NEXT: ret double [[TMP0]] |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIfEvv_l19_worker |
| // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[WORK_FN:%.*]] = alloca i8*, align 8 |
| // CHECK2-NEXT: [[EXEC_STATUS:%.*]] = alloca i8, align 1 |
| // CHECK2-NEXT: store i8* null, i8** [[WORK_FN]], align 8 |
| // CHECK2-NEXT: store i8 0, i8* [[EXEC_STATUS]], align 1 |
| // CHECK2-NEXT: br label [[DOTAWAIT_WORK:%.*]] |
| // CHECK2: .await.work: |
| // CHECK2-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) |
| // CHECK2-NEXT: [[TMP0:%.*]] = call i1 @__kmpc_kernel_parallel(i8** [[WORK_FN]]) |
| // CHECK2-NEXT: [[TMP1:%.*]] = zext i1 [[TMP0]] to i8 |
| // CHECK2-NEXT: store i8 [[TMP1]], i8* [[EXEC_STATUS]], align 1 |
| // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[WORK_FN]], align 8 |
| // CHECK2-NEXT: [[SHOULD_TERMINATE:%.*]] = icmp eq i8* [[TMP2]], null |
| // CHECK2-NEXT: br i1 [[SHOULD_TERMINATE]], label [[DOTEXIT:%.*]], label [[DOTSELECT_WORKERS:%.*]] |
| // CHECK2: .select.workers: |
| // CHECK2-NEXT: [[TMP3:%.*]] = load i8, i8* [[EXEC_STATUS]], align 1 |
| // CHECK2-NEXT: [[IS_ACTIVE:%.*]] = icmp ne i8 [[TMP3]], 0 |
| // CHECK2-NEXT: br i1 [[IS_ACTIVE]], label [[DOTEXECUTE_PARALLEL:%.*]], label [[DOTBARRIER_PARALLEL:%.*]] |
| // CHECK2: .execute.parallel: |
| // CHECK2-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) |
| // CHECK2-NEXT: [[TMP5:%.*]] = load i8*, i8** [[WORK_FN]], align 8 |
| // CHECK2-NEXT: [[WORK_MATCH:%.*]] = icmp eq i8* [[TMP5]], bitcast (void (i16, i32)* @__omp_outlined__1_wrapper to i8*) |
| // CHECK2-NEXT: br i1 [[WORK_MATCH]], label [[DOTEXECUTE_FN:%.*]], label [[DOTCHECK_NEXT:%.*]] |
| // CHECK2: .execute.fn: |
| // CHECK2-NEXT: call void @__omp_outlined__1_wrapper(i16 0, i32 [[TMP4]]) #[[ATTR5:[0-9]+]] |
| // CHECK2-NEXT: br label [[DOTTERMINATE_PARALLEL:%.*]] |
| // CHECK2: .check.next: |
| // CHECK2-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP2]] to void (i16, i32)* |
| // CHECK2-NEXT: call void [[TMP6]](i16 0, i32 [[TMP4]]) |
| // CHECK2-NEXT: br label [[DOTTERMINATE_PARALLEL]] |
| // CHECK2: .terminate.parallel: |
| // CHECK2-NEXT: call void @__kmpc_kernel_end_parallel() |
| // CHECK2-NEXT: br label [[DOTBARRIER_PARALLEL]] |
| // CHECK2: .barrier.parallel: |
| // CHECK2-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) |
| // CHECK2-NEXT: br label [[DOTAWAIT_WORK]] |
| // CHECK2: .exit: |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIfEvv_l19 |
| // CHECK2-SAME: () #[[ATTR0]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 |
| // CHECK2-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() |
| // CHECK2-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() |
| // CHECK2-NEXT: [[THREAD_LIMIT:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS]], [[NVPTX_WARP_SIZE]] |
| // CHECK2-NEXT: [[TMP0:%.*]] = icmp ult i32 [[NVPTX_TID]], [[THREAD_LIMIT]] |
| // CHECK2-NEXT: br i1 [[TMP0]], label [[DOTWORKER:%.*]], label [[DOTMASTERCHECK:%.*]] |
| // CHECK2: .worker: |
| // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIfEvv_l19_worker() #[[ATTR5]] |
| // CHECK2-NEXT: br label [[DOTEXIT:%.*]] |
| // CHECK2: .mastercheck: |
| // CHECK2-NEXT: [[NVPTX_TID1:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK2-NEXT: [[NVPTX_NUM_THREADS2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() |
| // CHECK2-NEXT: [[NVPTX_WARP_SIZE3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() |
| // CHECK2-NEXT: [[TMP1:%.*]] = sub nuw i32 [[NVPTX_WARP_SIZE3]], 1 |
| // CHECK2-NEXT: [[TMP2:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS2]], 1 |
| // CHECK2-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], -1 |
| // CHECK2-NEXT: [[MASTER_TID:%.*]] = and i32 [[TMP2]], [[TMP3]] |
| // CHECK2-NEXT: [[TMP4:%.*]] = icmp eq i32 [[NVPTX_TID1]], [[MASTER_TID]] |
| // CHECK2-NEXT: br i1 [[TMP4]], label [[DOTMASTER:%.*]], label [[DOTEXIT]] |
| // CHECK2: .master: |
| // CHECK2-NEXT: [[NVPTX_NUM_THREADS4:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() |
| // CHECK2-NEXT: [[NVPTX_WARP_SIZE5:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() |
| // CHECK2-NEXT: [[THREAD_LIMIT6:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS4]], [[NVPTX_WARP_SIZE5]] |
| // CHECK2-NEXT: call void @__kmpc_kernel_init(i32 [[THREAD_LIMIT6]], i16 1) |
| // CHECK2-NEXT: call void @__kmpc_data_sharing_init_stack() |
| // CHECK2-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) |
| // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA6:![0-9]+]] |
| // CHECK2-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR5]] |
| // CHECK2-NEXT: br label [[DOTTERMINATION_NOTIFIER:%.*]] |
| // CHECK2: .termination.notifier: |
| // CHECK2-NEXT: call void @__kmpc_kernel_deinit(i16 1) |
| // CHECK2-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) |
| // CHECK2-NEXT: br label [[DOTEXIT]] |
| // CHECK2: .exit: |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__ |
| // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[IB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca float, align 4 |
| // CHECK2-NEXT: [[REF_TMP2:%.*]] = alloca float, align 4 |
| // CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8, !tbaa [[TBAA10:![0-9]+]] |
| // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP0:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2, !tbaa [[TBAA12:![0-9]+]] |
| // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* @"_openmp_static_kernel$size", align 8, !tbaa [[TBAA14:![0-9]+]] |
| // CHECK2-NEXT: call void @__kmpc_get_team_static_memory(i16 0, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i64 [[TMP1]], i16 [[TMP0]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**)) |
| // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 8 |
| // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, i8* [[TMP2]], i64 0 |
| // CHECK2-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to %struct._globalized_locals_ty* |
| // CHECK2-NEXT: [[ISTART:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP4]], i32 0, i32 0 |
| // CHECK2-NEXT: [[IEND:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY]], %struct._globalized_locals_ty* [[TMP4]], i32 0, i32 1 |
| // CHECK2-NEXT: [[PARTIAL_SUM:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY]], %struct._globalized_locals_ty* [[TMP4]], i32 0, i32 2 |
| // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP5]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP6]]) #[[ATTR5]] |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP7:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP7]]) #[[ATTR5]] |
| // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) #[[ATTR5]] |
| // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP9:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP9]]) #[[ATTR5]] |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i32* [[IB]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP10]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP12]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 99 |
| // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK2: cond.true: |
| // CHECK2-NEXT: br label [[COND_END:%.*]] |
| // CHECK2: cond.false: |
| // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: br label [[COND_END]] |
| // CHECK2: cond.end: |
| // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] |
| // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK2: omp.inner.for.cond: |
| // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] |
| // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] |
| // CHECK2: omp.inner.for.cond.cleanup: |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK2: omp.inner.for.body: |
| // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 |
| // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK2-NEXT: store i32 [[ADD]], i32* [[IB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP19:%.*]] = bitcast float* [[REF_TMP]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP19]]) #[[ATTR5]] |
| // CHECK2-NEXT: store float 0.000000e+00, float* [[REF_TMP]], align 4, !tbaa [[TBAA16:![0-9]+]] |
| // CHECK2-NEXT: [[TMP20:%.*]] = bitcast float* [[REF_TMP2]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP20]]) #[[ATTR5]] |
| // CHECK2-NEXT: store float 0.000000e+00, float* [[REF_TMP2]], align 4, !tbaa [[TBAA16]] |
| // CHECK2-NEXT: call void @_ZNSt7complexIfEC1ERKfS2_(%"class.std::complex"* nonnull dereferenceable(8) [[PARTIAL_SUM]], float* nonnull align 4 dereferenceable(4) [[REF_TMP]], float* nonnull align 4 dereferenceable(4) [[REF_TMP2]]) #[[ATTR8:[0-9]+]] |
| // CHECK2-NEXT: [[TMP21:%.*]] = bitcast float* [[REF_TMP2]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP21]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP22:%.*]] = bitcast float* [[REF_TMP]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP22]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[IB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP23]], 4 |
| // CHECK2-NEXT: store i32 [[MUL3]], i32* [[ISTART]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[IB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], 1 |
| // CHECK2-NEXT: [[MUL5:%.*]] = mul nsw i32 [[ADD4]], 4 |
| // CHECK2-NEXT: store i32 [[MUL5]], i32* [[IEND]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 |
| // CHECK2-NEXT: [[TMP26:%.*]] = bitcast i32* [[ISTART]] to i8* |
| // CHECK2-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 |
| // CHECK2-NEXT: [[TMP28:%.*]] = bitcast i32* [[IEND]] to i8* |
| // CHECK2-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 |
| // CHECK2-NEXT: [[TMP30:%.*]] = bitcast %"class.std::complex"* [[PARTIAL_SUM]] to i8* |
| // CHECK2-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP31:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** |
| // CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32*, i32*, %"class.std::complex"*)* @__omp_outlined__1 to i8*), i8* bitcast (void (i16, i32)* @__omp_outlined__1_wrapper to i8*), i8** [[TMP31]], i64 3) |
| // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK2: omp.body.continue: |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK2: omp.inner.for.inc: |
| // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP32]], 1 |
| // CHECK2-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] |
| // CHECK2: omp.inner.for.end: |
| // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK2: omp.loop.exit: |
| // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) |
| // CHECK2-NEXT: [[TMP33:%.*]] = bitcast i32* [[IB]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP33]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP34:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP34]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP35:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP35]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP36:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP36]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP37:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP37]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP38:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP38]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP39:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2, !tbaa [[TBAA12]] |
| // CHECK2-NEXT: call void @__kmpc_restore_team_static_memory(i16 0, i16 [[TMP39]]) |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@_ZNSt7complexIfEC1ERKfS2_ |
| // CHECK2-SAME: (%"class.std::complex"* nonnull dereferenceable(8) [[THIS:%.*]], float* nonnull align 4 dereferenceable(4) [[__RE:%.*]], float* nonnull align 4 dereferenceable(4) [[__IM:%.*]]) unnamed_addr #[[ATTR3:[0-9]+]] comdat align 2 { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK2-NEXT: [[__RE_ADDR:%.*]] = alloca float*, align 8 |
| // CHECK2-NEXT: [[__IM_ADDR:%.*]] = alloca float*, align 8 |
| // CHECK2-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store float* [[__RE]], float** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store float* [[__IM]], float** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load float*, float** [[__RE_ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP1:%.*]] = load float*, float** [[__IM_ADDR]], align 8 |
| // CHECK2-NEXT: call void @_ZNSt7complexIfEC2ERKfS2_(%"class.std::complex"* nonnull dereferenceable(8) [[THIS1]], float* nonnull align 4 dereferenceable(4) [[TMP0]], float* nonnull align 4 dereferenceable(4) [[TMP1]]) #[[ATTR8]] |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__1 |
| // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ISTART:%.*]], i32* nonnull align 4 dereferenceable(4) [[IEND:%.*]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[PARTIAL_SUM:%.*]]) #[[ATTR0]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[ISTART_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[IEND_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[PARTIAL_SUM_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[PARTIAL_SUM5:%.*]] = alloca %"class.std::complex", align 4 |
| // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca float, align 4 |
| // CHECK2-NEXT: [[REF_TMP6:%.*]] = alloca float, align 4 |
| // CHECK2-NEXT: [[I7:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[REF_TMP14:%.*]] = alloca %"class.std::complex", align 4 |
| // CHECK2-NEXT: [[REF_TMP15:%.*]] = alloca float, align 4 |
| // CHECK2-NEXT: [[REF_TMP16:%.*]] = alloca float, align 4 |
| // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK2-NEXT: [[REF_TMP21:%.*]] = alloca %"class.std::complex", align 4 |
| // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store i32* [[ISTART]], i32** [[ISTART_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store i32* [[IEND]], i32** [[IEND_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store %"class.std::complex"* [[PARTIAL_SUM]], %"class.std::complex"** [[PARTIAL_SUM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ISTART_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[IEND_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP2:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[PARTIAL_SUM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP3]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP4:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_1]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP6]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP1]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_2]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[SUB:%.*]] = sub i32 [[TMP9]], [[TMP10]] |
| // CHECK2-NEXT: [[SUB3:%.*]] = sub i32 [[SUB]], 1 |
| // CHECK2-NEXT: [[ADD:%.*]] = add i32 [[SUB3]], 1 |
| // CHECK2-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 |
| // CHECK2-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 1 |
| // CHECK2-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i32* [[I]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP11]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: store i32 [[TMP12]], i32* [[I]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP13:%.*]] = bitcast i32* [[I]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP13]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP14]], [[TMP15]] |
| // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK2: omp.precond.then: |
| // CHECK2-NEXT: [[TMP16:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP16]]) #[[ATTR5]] |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP17]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP19:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP19]]) #[[ATTR5]] |
| // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP20:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP20]]) #[[ATTR5]] |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP21:%.*]] = bitcast %"class.std::complex"* [[PARTIAL_SUM5]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP21]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP22:%.*]] = bitcast float* [[REF_TMP]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP22]]) #[[ATTR5]] |
| // CHECK2-NEXT: store float 0.000000e+00, float* [[REF_TMP]], align 4, !tbaa [[TBAA16]] |
| // CHECK2-NEXT: [[TMP23:%.*]] = bitcast float* [[REF_TMP6]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP23]]) #[[ATTR5]] |
| // CHECK2-NEXT: store float 0.000000e+00, float* [[REF_TMP6]], align 4, !tbaa [[TBAA16]] |
| // CHECK2-NEXT: call void @_ZNSt7complexIfEC1ERKfS2_(%"class.std::complex"* nonnull dereferenceable(8) [[PARTIAL_SUM5]], float* nonnull align 4 dereferenceable(4) [[REF_TMP]], float* nonnull align 4 dereferenceable(4) [[REF_TMP6]]) #[[ATTR8]] |
| // CHECK2-NEXT: [[TMP24:%.*]] = bitcast float* [[REF_TMP6]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP24]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP25:%.*]] = bitcast float* [[REF_TMP]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP25]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP26:%.*]] = bitcast i32* [[I7]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP26]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP28]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK2: omp.dispatch.cond: |
| // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[CMP8:%.*]] = icmp ugt i32 [[TMP29]], [[TMP30]] |
| // CHECK2-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK2: cond.true: |
| // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: br label [[COND_END:%.*]] |
| // CHECK2: cond.false: |
| // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: br label [[COND_END]] |
| // CHECK2: cond.end: |
| // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE]] ], [ [[TMP32]], [[COND_FALSE]] ] |
| // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[ADD9:%.*]] = add i32 [[TMP35]], 1 |
| // CHECK2-NEXT: [[CMP10:%.*]] = icmp ult i32 [[TMP34]], [[ADD9]] |
| // CHECK2-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_CLEANUP:%.*]] |
| // CHECK2: omp.dispatch.cleanup: |
| // CHECK2-NEXT: br label [[OMP_DISPATCH_END:%.*]] |
| // CHECK2: omp.dispatch.body: |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK2: omp.inner.for.cond: |
| // CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[ADD11:%.*]] = add i32 [[TMP37]], 1 |
| // CHECK2-NEXT: [[CMP12:%.*]] = icmp ult i32 [[TMP36]], [[ADD11]] |
| // CHECK2-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] |
| // CHECK2: omp.inner.for.cond.cleanup: |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK2: omp.inner.for.body: |
| // CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[MUL:%.*]] = mul i32 [[TMP39]], 1 |
| // CHECK2-NEXT: [[ADD13:%.*]] = add i32 [[TMP38]], [[MUL]] |
| // CHECK2-NEXT: store i32 [[ADD13]], i32* [[I7]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP40:%.*]] = bitcast %"class.std::complex"* [[REF_TMP14]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP40]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP41:%.*]] = bitcast float* [[REF_TMP15]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP41]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP42:%.*]] = load i32, i32* [[I7]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP42]] to float |
| // CHECK2-NEXT: store float [[CONV]], float* [[REF_TMP15]], align 4, !tbaa [[TBAA16]] |
| // CHECK2-NEXT: [[TMP43:%.*]] = bitcast float* [[REF_TMP16]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP43]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP44:%.*]] = load i32, i32* [[I7]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[CONV17:%.*]] = sitofp i32 [[TMP44]] to float |
| // CHECK2-NEXT: store float [[CONV17]], float* [[REF_TMP16]], align 4, !tbaa [[TBAA16]] |
| // CHECK2-NEXT: call void @_ZNSt7complexIfEC1ERKfS2_(%"class.std::complex"* nonnull dereferenceable(8) [[REF_TMP14]], float* nonnull align 4 dereferenceable(4) [[REF_TMP15]], float* nonnull align 4 dereferenceable(4) [[REF_TMP16]]) #[[ATTR8]] |
| // CHECK2-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(8) %"class.std::complex"* @_ZNSt7complexIfEpLIfEERS0_RKS_IT_E(%"class.std::complex"* nonnull dereferenceable(8) [[PARTIAL_SUM5]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[REF_TMP14]]) #[[ATTR8]] |
| // CHECK2-NEXT: [[TMP45:%.*]] = bitcast float* [[REF_TMP16]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP45]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP46:%.*]] = bitcast float* [[REF_TMP15]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP46]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP47:%.*]] = bitcast %"class.std::complex"* [[REF_TMP14]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP47]]) #[[ATTR5]] |
| // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK2: omp.body.continue: |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK2: omp.inner.for.inc: |
| // CHECK2-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[ADD18:%.*]] = add i32 [[TMP48]], 1 |
| // CHECK2-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] |
| // CHECK2: omp.inner.for.end: |
| // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK2: omp.dispatch.inc: |
| // CHECK2-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[ADD19:%.*]] = add i32 [[TMP49]], [[TMP50]] |
| // CHECK2-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[ADD20:%.*]] = add i32 [[TMP51]], [[TMP52]] |
| // CHECK2-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK2: omp.dispatch.end: |
| // CHECK2-NEXT: [[TMP53:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP54:%.*]] = load i32, i32* [[TMP53]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP54]]) |
| // CHECK2-NEXT: [[TMP55:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP56:%.*]] = load i32, i32* [[TMP55]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP57:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 |
| // CHECK2-NEXT: [[TMP58:%.*]] = bitcast %"class.std::complex"* [[PARTIAL_SUM5]] to i8* |
| // CHECK2-NEXT: store i8* [[TMP58]], i8** [[TMP57]], align 8 |
| // CHECK2-NEXT: [[TMP59:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* |
| // CHECK2-NEXT: [[TMP60:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(%struct.ident_t* @[[GLOB3]], i32 [[TMP56]], i32 1, i64 8, i8* [[TMP59]], void (i8*, i16, i16, i16)* @_omp_reduction_shuffle_and_reduce_func, void (i8*, i32)* @_omp_reduction_inter_warp_copy_func) |
| // CHECK2-NEXT: [[TMP61:%.*]] = icmp eq i32 [[TMP60]], 1 |
| // CHECK2-NEXT: br i1 [[TMP61]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]] |
| // CHECK2: .omp.reduction.then: |
| // CHECK2-NEXT: [[TMP62:%.*]] = bitcast %"class.std::complex"* [[REF_TMP21]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP62]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[CALL22:%.*]] = call %"class.std::complex" @_ZStplIfESt7complexIT_ERKS2_S4_(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[TMP2]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[PARTIAL_SUM5]]) #[[ATTR8]] |
| // CHECK2-NEXT: [[TMP63:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[REF_TMP21]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP64:%.*]] = extractvalue %"class.std::complex" [[CALL22]], 0 |
| // CHECK2-NEXT: store float [[TMP64]], float* [[TMP63]], align 4 |
| // CHECK2-NEXT: [[TMP65:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[REF_TMP21]], i32 0, i32 1 |
| // CHECK2-NEXT: [[TMP66:%.*]] = extractvalue %"class.std::complex" [[CALL22]], 1 |
| // CHECK2-NEXT: store float [[TMP66]], float* [[TMP65]], align 4 |
| // CHECK2-NEXT: [[TMP67:%.*]] = bitcast %"class.std::complex"* [[TMP2]] to i8* |
| // CHECK2-NEXT: [[TMP68:%.*]] = bitcast %"class.std::complex"* [[REF_TMP21]] to i8* |
| // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP67]], i8* align 4 [[TMP68]], i64 8, i1 false), !tbaa.struct !18 |
| // CHECK2-NEXT: [[TMP69:%.*]] = bitcast %"class.std::complex"* [[REF_TMP21]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP69]]) #[[ATTR5]] |
| // CHECK2-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP56]]) |
| // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DONE]] |
| // CHECK2: .omp.reduction.done: |
| // CHECK2-NEXT: [[TMP70:%.*]] = bitcast i32* [[I7]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP70]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP71:%.*]] = bitcast %"class.std::complex"* [[PARTIAL_SUM5]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP71]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP72:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP72]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP73:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP73]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP74:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP74]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP75:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP75]]) #[[ATTR5]] |
| // CHECK2-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK2: omp.precond.end: |
| // CHECK2-NEXT: [[TMP76:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_2]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP76]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP77:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_1]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP77]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP78:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP78]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP79:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP79]]) #[[ATTR5]] |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@_ZNSt7complexIfEpLIfEERS0_RKS_IT_E |
| // CHECK2-SAME: (%"class.std::complex"* nonnull dereferenceable(8) [[THIS:%.*]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[__C:%.*]]) #[[ATTR4:[0-9]+]] comdat align 2 { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK2-NEXT: [[__C_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK2-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store %"class.std::complex"* [[__C]], %"class.std::complex"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[CALL:%.*]] = call float @_ZNKSt7complexIfE4realEv(%"class.std::complex"* nonnull dereferenceable(8) [[TMP0]]) #[[ATTR8]] |
| // CHECK2-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP1:%.*]] = load float, float* [[__RE_]], align 4, !tbaa [[TBAA19:![0-9]+]] |
| // CHECK2-NEXT: [[ADD:%.*]] = fadd float [[TMP1]], [[CALL]] |
| // CHECK2-NEXT: store float [[ADD]], float* [[__RE_]], align 4, !tbaa [[TBAA19]] |
| // CHECK2-NEXT: [[TMP2:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[CALL2:%.*]] = call float @_ZNKSt7complexIfE4imagEv(%"class.std::complex"* nonnull dereferenceable(8) [[TMP2]]) #[[ATTR8]] |
| // CHECK2-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 1 |
| // CHECK2-NEXT: [[TMP3:%.*]] = load float, float* [[__IM_]], align 4, !tbaa [[TBAA21:![0-9]+]] |
| // CHECK2-NEXT: [[ADD3:%.*]] = fadd float [[TMP3]], [[CALL2]] |
| // CHECK2-NEXT: store float [[ADD3]], float* [[__IM_]], align 4, !tbaa [[TBAA21]] |
| // CHECK2-NEXT: ret %"class.std::complex"* [[THIS1]] |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@_ZStplIfESt7complexIT_ERKS2_S4_ |
| // CHECK2-SAME: (%"class.std::complex"* nonnull align 4 dereferenceable(8) [[__X:%.*]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[__Y:%.*]]) #[[ATTR6:[0-9]+]] comdat { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[RETVAL:%.*]] = alloca %"class.std::complex", align 4 |
| // CHECK2-NEXT: [[__T2:%.*]] = alloca %"class.std::complex", align 4 |
| // CHECK2-NEXT: [[__X_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK2-NEXT: [[__Y_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB5:[0-9]+]]) |
| // CHECK2-NEXT: [[TMP1:%.*]] = call i16 @__kmpc_parallel_level(%struct.ident_t* @[[GLOB5]], i32 [[TMP0]]) |
| // CHECK2-NEXT: [[TMP2:%.*]] = icmp eq i16 [[TMP1]], 0 |
| // CHECK2-NEXT: [[TMP3:%.*]] = call i8 @__kmpc_is_spmd_exec_mode() #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP4:%.*]] = icmp ne i8 [[TMP3]], 0 |
| // CHECK2-NEXT: br i1 [[TMP4]], label [[DOTSPMD:%.*]], label [[DOTNON_SPMD:%.*]] |
| // CHECK2: .spmd: |
| // CHECK2-NEXT: br label [[DOTEXIT:%.*]] |
| // CHECK2: .non-spmd: |
| // CHECK2-NEXT: [[TMP5:%.*]] = select i1 [[TMP2]], i64 8, i64 256 |
| // CHECK2-NEXT: [[TMP6:%.*]] = call i8* @__kmpc_data_sharing_coalesced_push_stack(i64 [[TMP5]], i16 0) |
| // CHECK2-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to %struct._globalized_locals_ty.2* |
| // CHECK2-NEXT: br label [[DOTEXIT]] |
| // CHECK2: .exit: |
| // CHECK2-NEXT: [[_SELECT_STACK:%.*]] = phi %struct._globalized_locals_ty.2* [ null, [[DOTSPMD]] ], [ [[TMP7]], [[DOTNON_SPMD]] ] |
| // CHECK2-NEXT: [[TMP8:%.*]] = bitcast %struct._globalized_locals_ty.2* [[_SELECT_STACK]] to %struct._globalized_locals_ty.3* |
| // CHECK2-NEXT: [[__T:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_2:%.*]], %struct._globalized_locals_ty.2* [[_SELECT_STACK]], i32 0, i32 0 |
| // CHECK2-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK2-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID]], 31 |
| // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [32 x %"class.std::complex"], [32 x %"class.std::complex"]* [[__T]], i32 0, i32 [[NVPTX_LANE_ID]] |
| // CHECK2-NEXT: [[__T1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_3:%.*]], %struct._globalized_locals_ty.3* [[TMP8]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP10:%.*]] = select i1 [[TMP2]], %"class.std::complex"* [[__T1]], %"class.std::complex"* [[TMP9]] |
| // CHECK2-NEXT: [[TMP11:%.*]] = select i1 [[TMP4]], %"class.std::complex"* [[__T2]], %"class.std::complex"* [[TMP10]] |
| // CHECK2-NEXT: store %"class.std::complex"* [[__X]], %"class.std::complex"** [[__X_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store %"class.std::complex"* [[__Y]], %"class.std::complex"** [[__Y_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP12:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[__X_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP13:%.*]] = bitcast %"class.std::complex"* [[TMP11]] to i8* |
| // CHECK2-NEXT: [[TMP14:%.*]] = bitcast %"class.std::complex"* [[TMP12]] to i8* |
| // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 8, i1 false), !tbaa.struct !18 |
| // CHECK2-NEXT: [[TMP15:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[__Y_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(8) %"class.std::complex"* @_ZNSt7complexIfEpLIfEERS0_RKS_IT_E(%"class.std::complex"* nonnull dereferenceable(8) [[TMP11]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[TMP15]]) #[[ATTR8]] |
| // CHECK2-NEXT: [[TMP16:%.*]] = bitcast %"class.std::complex"* [[RETVAL]] to i8* |
| // CHECK2-NEXT: [[TMP17:%.*]] = bitcast %"class.std::complex"* [[TMP11]] to i8* |
| // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i64 8, i1 false), !tbaa.struct !18 |
| // CHECK2-NEXT: br i1 [[TMP4]], label [[DOTEXIT4:%.*]], label [[DOTNON_SPMD3:%.*]] |
| // CHECK2: .non-spmd3: |
| // CHECK2-NEXT: [[TMP18:%.*]] = bitcast %struct._globalized_locals_ty.2* [[_SELECT_STACK]] to i8* |
| // CHECK2-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP18]]) |
| // CHECK2-NEXT: br label [[DOTEXIT4]] |
| // CHECK2: .exit4: |
| // CHECK2-NEXT: [[TMP19:%.*]] = load %"class.std::complex", %"class.std::complex"* [[RETVAL]], align 4 |
| // CHECK2-NEXT: ret %"class.std::complex" [[TMP19]] |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func |
| // CHECK2-SAME: (i8* [[TMP0:%.*]], i16 signext [[TMP1:%.*]], i16 signext [[TMP2:%.*]], i16 signext [[TMP3:%.*]]) #[[ATTR0]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 |
| // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2 |
| // CHECK2-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2 |
| // CHECK2-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2 |
| // CHECK2-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK2-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca %"class.std::complex", align 4 |
| // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store i16 [[TMP1]], i16* [[DOTADDR1]], align 2, !tbaa [[TBAA12]] |
| // CHECK2-NEXT: store i16 [[TMP2]], i16* [[DOTADDR2]], align 2, !tbaa [[TBAA12]] |
| // CHECK2-NEXT: store i16 [[TMP3]], i16* [[DOTADDR3]], align 2, !tbaa [[TBAA12]] |
| // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* |
| // CHECK2-NEXT: [[TMP6:%.*]] = load i16, i16* [[DOTADDR1]], align 2, !tbaa [[TBAA12]] |
| // CHECK2-NEXT: [[TMP7:%.*]] = load i16, i16* [[DOTADDR2]], align 2, !tbaa [[TBAA12]] |
| // CHECK2-NEXT: [[TMP8:%.*]] = load i16, i16* [[DOTADDR3]], align 2, !tbaa [[TBAA12]] |
| // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 |
| // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 |
| // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 |
| // CHECK2-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP10]] to %"class.std::complex"* |
| // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr %"class.std::complex", %"class.std::complex"* [[TMP12]], i64 1 |
| // CHECK2-NEXT: [[TMP14:%.*]] = bitcast %"class.std::complex"* [[TMP13]] to i8* |
| // CHECK2-NEXT: [[TMP15:%.*]] = bitcast %"class.std::complex"* [[TMP12]] to i64* |
| // CHECK2-NEXT: [[TMP16:%.*]] = bitcast %"class.std::complex"* [[DOTOMP_REDUCTION_ELEMENT]] to i64* |
| // CHECK2-NEXT: [[TMP17:%.*]] = load i64, i64* [[TMP15]], align 4 |
| // CHECK2-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() |
| // CHECK2-NEXT: [[TMP18:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16 |
| // CHECK2-NEXT: [[TMP19:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP17]], i16 [[TMP7]], i16 [[TMP18]]) |
| // CHECK2-NEXT: store i64 [[TMP19]], i64* [[TMP16]], align 4 |
| // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr i64, i64* [[TMP15]], i64 1 |
| // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr i64, i64* [[TMP16]], i64 1 |
| // CHECK2-NEXT: [[TMP22:%.*]] = bitcast %"class.std::complex"* [[DOTOMP_REDUCTION_ELEMENT]] to i8* |
| // CHECK2-NEXT: store i8* [[TMP22]], i8** [[TMP11]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP23:%.*]] = icmp eq i16 [[TMP8]], 0 |
| // CHECK2-NEXT: [[TMP24:%.*]] = icmp eq i16 [[TMP8]], 1 |
| // CHECK2-NEXT: [[TMP25:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]] |
| // CHECK2-NEXT: [[TMP26:%.*]] = and i1 [[TMP24]], [[TMP25]] |
| // CHECK2-NEXT: [[TMP27:%.*]] = icmp eq i16 [[TMP8]], 2 |
| // CHECK2-NEXT: [[TMP28:%.*]] = and i16 [[TMP6]], 1 |
| // CHECK2-NEXT: [[TMP29:%.*]] = icmp eq i16 [[TMP28]], 0 |
| // CHECK2-NEXT: [[TMP30:%.*]] = and i1 [[TMP27]], [[TMP29]] |
| // CHECK2-NEXT: [[TMP31:%.*]] = icmp sgt i16 [[TMP7]], 0 |
| // CHECK2-NEXT: [[TMP32:%.*]] = and i1 [[TMP30]], [[TMP31]] |
| // CHECK2-NEXT: [[TMP33:%.*]] = or i1 [[TMP23]], [[TMP26]] |
| // CHECK2-NEXT: [[TMP34:%.*]] = or i1 [[TMP33]], [[TMP32]] |
| // CHECK2-NEXT: br i1 [[TMP34]], label [[THEN:%.*]], label [[ELSE:%.*]] |
| // CHECK2: then: |
| // CHECK2-NEXT: [[TMP35:%.*]] = bitcast [1 x i8*]* [[TMP5]] to i8* |
| // CHECK2-NEXT: [[TMP36:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8* |
| // CHECK2-NEXT: call void @"_omp$reduction$reduction_func"(i8* [[TMP35]], i8* [[TMP36]]) #[[ATTR5]] |
| // CHECK2-NEXT: br label [[IFCONT:%.*]] |
| // CHECK2: else: |
| // CHECK2-NEXT: br label [[IFCONT]] |
| // CHECK2: ifcont: |
| // CHECK2-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 1 |
| // CHECK2-NEXT: [[TMP38:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]] |
| // CHECK2-NEXT: [[TMP39:%.*]] = and i1 [[TMP37]], [[TMP38]] |
| // CHECK2-NEXT: br i1 [[TMP39]], label [[THEN4:%.*]], label [[ELSE5:%.*]] |
| // CHECK2: then4: |
| // CHECK2-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 |
| // CHECK2-NEXT: [[TMP41:%.*]] = load i8*, i8** [[TMP40]], align 8 |
| // CHECK2-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 |
| // CHECK2-NEXT: [[TMP43:%.*]] = load i8*, i8** [[TMP42]], align 8 |
| // CHECK2-NEXT: [[TMP44:%.*]] = bitcast i8* [[TMP41]] to %"class.std::complex"* |
| // CHECK2-NEXT: [[TMP45:%.*]] = bitcast i8* [[TMP43]] to %"class.std::complex"* |
| // CHECK2-NEXT: [[TMP46:%.*]] = bitcast %"class.std::complex"* [[TMP45]] to i8* |
| // CHECK2-NEXT: [[TMP47:%.*]] = bitcast %"class.std::complex"* [[TMP44]] to i8* |
| // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP46]], i8* align 4 [[TMP47]], i64 8, i1 false), !tbaa.struct !18 |
| // CHECK2-NEXT: br label [[IFCONT6:%.*]] |
| // CHECK2: else5: |
| // CHECK2-NEXT: br label [[IFCONT6]] |
| // CHECK2: ifcont6: |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func |
| // CHECK2-SAME: (i8* [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 |
| // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTCNT_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) |
| // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK2-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK2-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31 |
| // CHECK2-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK2-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5 |
| // CHECK2-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8 |
| // CHECK2-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [1 x i8*]* |
| // CHECK2-NEXT: store i32 0, i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: br label [[PRECOND:%.*]] |
| // CHECK2: precond: |
| // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP6:%.*]] = icmp ult i32 [[TMP5]], 2 |
| // CHECK2-NEXT: br i1 [[TMP6]], label [[BODY:%.*]], label [[EXIT:%.*]] |
| // CHECK2: body: |
| // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP2]]) |
| // CHECK2-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 |
| // CHECK2-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]] |
| // CHECK2: then: |
| // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0 |
| // CHECK2-NEXT: [[TMP8:%.*]] = load i8*, i8** [[TMP7]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i32* |
| // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr i32, i32* [[TMP9]], i32 [[TMP5]] |
| // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] |
| // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]], align 4 |
| // CHECK2-NEXT: store volatile i32 [[TMP12]], i32 addrspace(3)* [[TMP11]], align 4 |
| // CHECK2-NEXT: br label [[IFCONT:%.*]] |
| // CHECK2: else: |
| // CHECK2-NEXT: br label [[IFCONT]] |
| // CHECK2: ifcont: |
| // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]]) |
| // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP13]] |
| // CHECK2-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]] |
| // CHECK2: then4: |
| // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]] |
| // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0 |
| // CHECK2-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* |
| // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr i32, i32* [[TMP17]], i32 [[TMP5]] |
| // CHECK2-NEXT: [[TMP19:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: store i32 [[TMP19]], i32* [[TMP18]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: br label [[IFCONT6:%.*]] |
| // CHECK2: else5: |
| // CHECK2-NEXT: br label [[IFCONT6]] |
| // CHECK2: ifcont6: |
| // CHECK2-NEXT: [[TMP20:%.*]] = add nsw i32 [[TMP5]], 1 |
| // CHECK2-NEXT: store i32 [[TMP20]], i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: br label [[PRECOND]] |
| // CHECK2: exit: |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper |
| // CHECK2-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2 |
| // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 |
| // CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 |
| // CHECK2-NEXT: store i16 [[TMP0]], i16* [[DOTADDR]], align 2, !tbaa [[TBAA12]] |
| // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) |
| // CHECK2-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8 |
| // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 0 |
| // CHECK2-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32** |
| // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP4]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 1 |
| // CHECK2-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32** |
| // CHECK2-NEXT: [[TMP8:%.*]] = load i32*, i32** [[TMP7]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 2 |
| // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %"class.std::complex"** |
| // CHECK2-NEXT: [[TMP11:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[TMP10]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: call void @__omp_outlined__1(i32* [[DOTADDR1]], i32* [[DOTZERO_ADDR]], i32* [[TMP5]], i32* [[TMP8]], %"class.std::complex"* [[TMP11]]) #[[ATTR5]] |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIdEvv_l19_worker |
| // CHECK2-SAME: () #[[ATTR0]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[WORK_FN:%.*]] = alloca i8*, align 8 |
| // CHECK2-NEXT: [[EXEC_STATUS:%.*]] = alloca i8, align 1 |
| // CHECK2-NEXT: store i8* null, i8** [[WORK_FN]], align 8 |
| // CHECK2-NEXT: store i8 0, i8* [[EXEC_STATUS]], align 1 |
| // CHECK2-NEXT: br label [[DOTAWAIT_WORK:%.*]] |
| // CHECK2: .await.work: |
| // CHECK2-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) |
| // CHECK2-NEXT: [[TMP0:%.*]] = call i1 @__kmpc_kernel_parallel(i8** [[WORK_FN]]) |
| // CHECK2-NEXT: [[TMP1:%.*]] = zext i1 [[TMP0]] to i8 |
| // CHECK2-NEXT: store i8 [[TMP1]], i8* [[EXEC_STATUS]], align 1 |
| // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[WORK_FN]], align 8 |
| // CHECK2-NEXT: [[SHOULD_TERMINATE:%.*]] = icmp eq i8* [[TMP2]], null |
| // CHECK2-NEXT: br i1 [[SHOULD_TERMINATE]], label [[DOTEXIT:%.*]], label [[DOTSELECT_WORKERS:%.*]] |
| // CHECK2: .select.workers: |
| // CHECK2-NEXT: [[TMP3:%.*]] = load i8, i8* [[EXEC_STATUS]], align 1 |
| // CHECK2-NEXT: [[IS_ACTIVE:%.*]] = icmp ne i8 [[TMP3]], 0 |
| // CHECK2-NEXT: br i1 [[IS_ACTIVE]], label [[DOTEXECUTE_PARALLEL:%.*]], label [[DOTBARRIER_PARALLEL:%.*]] |
| // CHECK2: .execute.parallel: |
| // CHECK2-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) |
| // CHECK2-NEXT: [[TMP5:%.*]] = load i8*, i8** [[WORK_FN]], align 8 |
| // CHECK2-NEXT: [[WORK_MATCH:%.*]] = icmp eq i8* [[TMP5]], bitcast (void (i16, i32)* @__omp_outlined__5_wrapper to i8*) |
| // CHECK2-NEXT: br i1 [[WORK_MATCH]], label [[DOTEXECUTE_FN:%.*]], label [[DOTCHECK_NEXT:%.*]] |
| // CHECK2: .execute.fn: |
| // CHECK2-NEXT: call void @__omp_outlined__5_wrapper(i16 0, i32 [[TMP4]]) #[[ATTR5]] |
| // CHECK2-NEXT: br label [[DOTTERMINATE_PARALLEL:%.*]] |
| // CHECK2: .check.next: |
| // CHECK2-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP2]] to void (i16, i32)* |
| // CHECK2-NEXT: call void [[TMP6]](i16 0, i32 [[TMP4]]) |
| // CHECK2-NEXT: br label [[DOTTERMINATE_PARALLEL]] |
| // CHECK2: .terminate.parallel: |
| // CHECK2-NEXT: call void @__kmpc_kernel_end_parallel() |
| // CHECK2-NEXT: br label [[DOTBARRIER_PARALLEL]] |
| // CHECK2: .barrier.parallel: |
| // CHECK2-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) |
| // CHECK2-NEXT: br label [[DOTAWAIT_WORK]] |
| // CHECK2: .exit: |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIdEvv_l19 |
| // CHECK2-SAME: () #[[ATTR0]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 |
| // CHECK2-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() |
| // CHECK2-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() |
| // CHECK2-NEXT: [[THREAD_LIMIT:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS]], [[NVPTX_WARP_SIZE]] |
| // CHECK2-NEXT: [[TMP0:%.*]] = icmp ult i32 [[NVPTX_TID]], [[THREAD_LIMIT]] |
| // CHECK2-NEXT: br i1 [[TMP0]], label [[DOTWORKER:%.*]], label [[DOTMASTERCHECK:%.*]] |
| // CHECK2: .worker: |
| // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIdEvv_l19_worker() #[[ATTR5]] |
| // CHECK2-NEXT: br label [[DOTEXIT:%.*]] |
| // CHECK2: .mastercheck: |
| // CHECK2-NEXT: [[NVPTX_TID1:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK2-NEXT: [[NVPTX_NUM_THREADS2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() |
| // CHECK2-NEXT: [[NVPTX_WARP_SIZE3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() |
| // CHECK2-NEXT: [[TMP1:%.*]] = sub nuw i32 [[NVPTX_WARP_SIZE3]], 1 |
| // CHECK2-NEXT: [[TMP2:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS2]], 1 |
| // CHECK2-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], -1 |
| // CHECK2-NEXT: [[MASTER_TID:%.*]] = and i32 [[TMP2]], [[TMP3]] |
| // CHECK2-NEXT: [[TMP4:%.*]] = icmp eq i32 [[NVPTX_TID1]], [[MASTER_TID]] |
| // CHECK2-NEXT: br i1 [[TMP4]], label [[DOTMASTER:%.*]], label [[DOTEXIT]] |
| // CHECK2: .master: |
| // CHECK2-NEXT: [[NVPTX_NUM_THREADS4:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() |
| // CHECK2-NEXT: [[NVPTX_WARP_SIZE5:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() |
| // CHECK2-NEXT: [[THREAD_LIMIT6:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS4]], [[NVPTX_WARP_SIZE5]] |
| // CHECK2-NEXT: call void @__kmpc_kernel_init(i32 [[THREAD_LIMIT6]], i16 1) |
| // CHECK2-NEXT: call void @__kmpc_data_sharing_init_stack() |
| // CHECK2-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) |
| // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR5]] |
| // CHECK2-NEXT: br label [[DOTTERMINATION_NOTIFIER:%.*]] |
| // CHECK2: .termination.notifier: |
| // CHECK2-NEXT: call void @__kmpc_kernel_deinit(i16 1) |
| // CHECK2-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) |
| // CHECK2-NEXT: br label [[DOTEXIT]] |
| // CHECK2: .exit: |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__2 |
| // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[IB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca double, align 8 |
| // CHECK2-NEXT: [[REF_TMP2:%.*]] = alloca double, align 8 |
| // CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP0:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared3", align 2, !tbaa [[TBAA12]] |
| // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* @"_openmp_static_kernel$size4", align 8, !tbaa [[TBAA14]] |
| // CHECK2-NEXT: call void @__kmpc_get_team_static_memory(i16 0, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i64 [[TMP1]], i16 [[TMP0]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**)) |
| // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 8 |
| // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, i8* [[TMP2]], i64 0 |
| // CHECK2-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to %struct._globalized_locals_ty.0* |
| // CHECK2-NEXT: [[ISTART:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_0:%.*]], %struct._globalized_locals_ty.0* [[TMP4]], i32 0, i32 1 |
| // CHECK2-NEXT: [[IEND:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_0]], %struct._globalized_locals_ty.0* [[TMP4]], i32 0, i32 2 |
| // CHECK2-NEXT: [[PARTIAL_SUM:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_0]], %struct._globalized_locals_ty.0* [[TMP4]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP5]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP6]]) #[[ATTR5]] |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP7:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP7]]) #[[ATTR5]] |
| // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) #[[ATTR5]] |
| // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP9:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP9]]) #[[ATTR5]] |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i32* [[IB]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP10]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 99 |
| // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK2: cond.true: |
| // CHECK2-NEXT: br label [[COND_END:%.*]] |
| // CHECK2: cond.false: |
| // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: br label [[COND_END]] |
| // CHECK2: cond.end: |
| // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] |
| // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK2: omp.inner.for.cond: |
| // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] |
| // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] |
| // CHECK2: omp.inner.for.cond.cleanup: |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK2: omp.inner.for.body: |
| // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 |
| // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK2-NEXT: store i32 [[ADD]], i32* [[IB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP19:%.*]] = bitcast double* [[REF_TMP]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP19]]) #[[ATTR5]] |
| // CHECK2-NEXT: store double 0.000000e+00, double* [[REF_TMP]], align 8, !tbaa [[TBAA22:![0-9]+]] |
| // CHECK2-NEXT: [[TMP20:%.*]] = bitcast double* [[REF_TMP2]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP20]]) #[[ATTR5]] |
| // CHECK2-NEXT: store double 0.000000e+00, double* [[REF_TMP2]], align 8, !tbaa [[TBAA22]] |
| // CHECK2-NEXT: call void @_ZNSt7complexIdEC1ERKdS2_(%"class.std::complex.1"* nonnull dereferenceable(16) [[PARTIAL_SUM]], double* nonnull align 8 dereferenceable(8) [[REF_TMP]], double* nonnull align 8 dereferenceable(8) [[REF_TMP2]]) #[[ATTR8]] |
| // CHECK2-NEXT: [[TMP21:%.*]] = bitcast double* [[REF_TMP2]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP21]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP22:%.*]] = bitcast double* [[REF_TMP]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP22]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[IB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP23]], 4 |
| // CHECK2-NEXT: store i32 [[MUL3]], i32* [[ISTART]], align 8, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[IB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], 1 |
| // CHECK2-NEXT: [[MUL5:%.*]] = mul nsw i32 [[ADD4]], 4 |
| // CHECK2-NEXT: store i32 [[MUL5]], i32* [[IEND]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 |
| // CHECK2-NEXT: [[TMP26:%.*]] = bitcast i32* [[ISTART]] to i8* |
| // CHECK2-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 |
| // CHECK2-NEXT: [[TMP28:%.*]] = bitcast i32* [[IEND]] to i8* |
| // CHECK2-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 |
| // CHECK2-NEXT: [[TMP30:%.*]] = bitcast %"class.std::complex.1"* [[PARTIAL_SUM]] to i8* |
| // CHECK2-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP31:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** |
| // CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32*, i32*, %"class.std::complex.1"*)* @__omp_outlined__5 to i8*), i8* bitcast (void (i16, i32)* @__omp_outlined__5_wrapper to i8*), i8** [[TMP31]], i64 3) |
| // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK2: omp.body.continue: |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK2: omp.inner.for.inc: |
| // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP32]], 1 |
| // CHECK2-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] |
| // CHECK2: omp.inner.for.end: |
| // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK2: omp.loop.exit: |
| // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) |
| // CHECK2-NEXT: [[TMP33:%.*]] = bitcast i32* [[IB]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP33]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP34:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP34]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP35:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP35]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP36:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP36]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP37:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP37]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP38:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP38]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP39:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared3", align 2, !tbaa [[TBAA12]] |
| // CHECK2-NEXT: call void @__kmpc_restore_team_static_memory(i16 0, i16 [[TMP39]]) |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@_ZNSt7complexIdEC1ERKdS2_ |
| // CHECK2-SAME: (%"class.std::complex.1"* nonnull dereferenceable(16) [[THIS:%.*]], double* nonnull align 8 dereferenceable(8) [[__RE:%.*]], double* nonnull align 8 dereferenceable(8) [[__IM:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK2-NEXT: [[__RE_ADDR:%.*]] = alloca double*, align 8 |
| // CHECK2-NEXT: [[__IM_ADDR:%.*]] = alloca double*, align 8 |
| // CHECK2-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store double* [[__RE]], double** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store double* [[__IM]], double** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[__RE_ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP1:%.*]] = load double*, double** [[__IM_ADDR]], align 8 |
| // CHECK2-NEXT: call void @_ZNSt7complexIdEC2ERKdS2_(%"class.std::complex.1"* nonnull dereferenceable(16) [[THIS1]], double* nonnull align 8 dereferenceable(8) [[TMP0]], double* nonnull align 8 dereferenceable(8) [[TMP1]]) #[[ATTR8]] |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__5 |
| // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ISTART:%.*]], i32* nonnull align 4 dereferenceable(4) [[IEND:%.*]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[PARTIAL_SUM:%.*]]) #[[ATTR0]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[ISTART_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[IEND_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK2-NEXT: [[PARTIAL_SUM_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[PARTIAL_SUM5:%.*]] = alloca %"class.std::complex.1", align 8 |
| // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca double, align 8 |
| // CHECK2-NEXT: [[REF_TMP6:%.*]] = alloca double, align 8 |
| // CHECK2-NEXT: [[I7:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[REF_TMP14:%.*]] = alloca %"class.std::complex.1", align 8 |
| // CHECK2-NEXT: [[REF_TMP15:%.*]] = alloca double, align 8 |
| // CHECK2-NEXT: [[REF_TMP16:%.*]] = alloca double, align 8 |
| // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK2-NEXT: [[REF_TMP21:%.*]] = alloca %"class.std::complex.1", align 8 |
| // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store i32* [[ISTART]], i32** [[ISTART_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store i32* [[IEND]], i32** [[IEND_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store %"class.std::complex.1"* [[PARTIAL_SUM]], %"class.std::complex.1"** [[PARTIAL_SUM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ISTART_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[IEND_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP2:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[PARTIAL_SUM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP3]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP4:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_1]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP6]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP1]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_2]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[SUB:%.*]] = sub i32 [[TMP9]], [[TMP10]] |
| // CHECK2-NEXT: [[SUB3:%.*]] = sub i32 [[SUB]], 1 |
| // CHECK2-NEXT: [[ADD:%.*]] = add i32 [[SUB3]], 1 |
| // CHECK2-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 |
| // CHECK2-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 1 |
| // CHECK2-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i32* [[I]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP11]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: store i32 [[TMP12]], i32* [[I]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP13:%.*]] = bitcast i32* [[I]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP13]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP14]], [[TMP15]] |
| // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK2: omp.precond.then: |
| // CHECK2-NEXT: [[TMP16:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP16]]) #[[ATTR5]] |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP17]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP19:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP19]]) #[[ATTR5]] |
| // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP20:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP20]]) #[[ATTR5]] |
| // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP21:%.*]] = bitcast %"class.std::complex.1"* [[PARTIAL_SUM5]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* [[TMP21]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP22:%.*]] = bitcast double* [[REF_TMP]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP22]]) #[[ATTR5]] |
| // CHECK2-NEXT: store double 0.000000e+00, double* [[REF_TMP]], align 8, !tbaa [[TBAA22]] |
| // CHECK2-NEXT: [[TMP23:%.*]] = bitcast double* [[REF_TMP6]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP23]]) #[[ATTR5]] |
| // CHECK2-NEXT: store double 0.000000e+00, double* [[REF_TMP6]], align 8, !tbaa [[TBAA22]] |
| // CHECK2-NEXT: call void @_ZNSt7complexIdEC1ERKdS2_(%"class.std::complex.1"* nonnull dereferenceable(16) [[PARTIAL_SUM5]], double* nonnull align 8 dereferenceable(8) [[REF_TMP]], double* nonnull align 8 dereferenceable(8) [[REF_TMP6]]) #[[ATTR8]] |
| // CHECK2-NEXT: [[TMP24:%.*]] = bitcast double* [[REF_TMP6]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP24]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP25:%.*]] = bitcast double* [[REF_TMP]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP25]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP26:%.*]] = bitcast i32* [[I7]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP26]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB2]], i32 [[TMP28]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK2: omp.dispatch.cond: |
| // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[CMP8:%.*]] = icmp ugt i32 [[TMP29]], [[TMP30]] |
| // CHECK2-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK2: cond.true: |
| // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: br label [[COND_END:%.*]] |
| // CHECK2: cond.false: |
| // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: br label [[COND_END]] |
| // CHECK2: cond.end: |
| // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE]] ], [ [[TMP32]], [[COND_FALSE]] ] |
| // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[ADD9:%.*]] = add i32 [[TMP35]], 1 |
| // CHECK2-NEXT: [[CMP10:%.*]] = icmp ult i32 [[TMP34]], [[ADD9]] |
| // CHECK2-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_CLEANUP:%.*]] |
| // CHECK2: omp.dispatch.cleanup: |
| // CHECK2-NEXT: br label [[OMP_DISPATCH_END:%.*]] |
| // CHECK2: omp.dispatch.body: |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK2: omp.inner.for.cond: |
| // CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[ADD11:%.*]] = add i32 [[TMP37]], 1 |
| // CHECK2-NEXT: [[CMP12:%.*]] = icmp ult i32 [[TMP36]], [[ADD11]] |
| // CHECK2-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] |
| // CHECK2: omp.inner.for.cond.cleanup: |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK2: omp.inner.for.body: |
| // CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[MUL:%.*]] = mul i32 [[TMP39]], 1 |
| // CHECK2-NEXT: [[ADD13:%.*]] = add i32 [[TMP38]], [[MUL]] |
| // CHECK2-NEXT: store i32 [[ADD13]], i32* [[I7]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP40:%.*]] = bitcast %"class.std::complex.1"* [[REF_TMP14]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* [[TMP40]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP41:%.*]] = bitcast double* [[REF_TMP15]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP41]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP42:%.*]] = load i32, i32* [[I7]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP42]] to double |
| // CHECK2-NEXT: store double [[CONV]], double* [[REF_TMP15]], align 8, !tbaa [[TBAA22]] |
| // CHECK2-NEXT: [[TMP43:%.*]] = bitcast double* [[REF_TMP16]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP43]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP44:%.*]] = load i32, i32* [[I7]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[CONV17:%.*]] = sitofp i32 [[TMP44]] to double |
| // CHECK2-NEXT: store double [[CONV17]], double* [[REF_TMP16]], align 8, !tbaa [[TBAA22]] |
| // CHECK2-NEXT: call void @_ZNSt7complexIdEC1ERKdS2_(%"class.std::complex.1"* nonnull dereferenceable(16) [[REF_TMP14]], double* nonnull align 8 dereferenceable(8) [[REF_TMP15]], double* nonnull align 8 dereferenceable(8) [[REF_TMP16]]) #[[ATTR8]] |
| // CHECK2-NEXT: [[CALL:%.*]] = call nonnull align 8 dereferenceable(16) %"class.std::complex.1"* @_ZNSt7complexIdEpLIdEERS0_RKS_IT_E(%"class.std::complex.1"* nonnull dereferenceable(16) [[PARTIAL_SUM5]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[REF_TMP14]]) #[[ATTR8]] |
| // CHECK2-NEXT: [[TMP45:%.*]] = bitcast double* [[REF_TMP16]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP45]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP46:%.*]] = bitcast double* [[REF_TMP15]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP46]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP47:%.*]] = bitcast %"class.std::complex.1"* [[REF_TMP14]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* [[TMP47]]) #[[ATTR5]] |
| // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK2: omp.body.continue: |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK2: omp.inner.for.inc: |
| // CHECK2-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[ADD18:%.*]] = add i32 [[TMP48]], 1 |
| // CHECK2-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] |
| // CHECK2: omp.inner.for.end: |
| // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK2: omp.dispatch.inc: |
| // CHECK2-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[ADD19:%.*]] = add i32 [[TMP49]], [[TMP50]] |
| // CHECK2-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[ADD20:%.*]] = add i32 [[TMP51]], [[TMP52]] |
| // CHECK2-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK2: omp.dispatch.end: |
| // CHECK2-NEXT: [[TMP53:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP54:%.*]] = load i32, i32* [[TMP53]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP54]]) |
| // CHECK2-NEXT: [[TMP55:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP56:%.*]] = load i32, i32* [[TMP55]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP57:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 |
| // CHECK2-NEXT: [[TMP58:%.*]] = bitcast %"class.std::complex.1"* [[PARTIAL_SUM5]] to i8* |
| // CHECK2-NEXT: store i8* [[TMP58]], i8** [[TMP57]], align 8 |
| // CHECK2-NEXT: [[TMP59:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* |
| // CHECK2-NEXT: [[TMP60:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(%struct.ident_t* @[[GLOB3]], i32 [[TMP56]], i32 1, i64 8, i8* [[TMP59]], void (i8*, i16, i16, i16)* @_omp_reduction_shuffle_and_reduce_func7, void (i8*, i32)* @_omp_reduction_inter_warp_copy_func8) |
| // CHECK2-NEXT: [[TMP61:%.*]] = icmp eq i32 [[TMP60]], 1 |
| // CHECK2-NEXT: br i1 [[TMP61]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]] |
| // CHECK2: .omp.reduction.then: |
| // CHECK2-NEXT: [[TMP62:%.*]] = bitcast %"class.std::complex.1"* [[REF_TMP21]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* [[TMP62]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[CALL22:%.*]] = call %"class.std::complex.1" @_ZStplIdESt7complexIT_ERKS2_S4_(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[TMP2]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[PARTIAL_SUM5]]) #[[ATTR8]] |
| // CHECK2-NEXT: [[TMP63:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[REF_TMP21]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP64:%.*]] = extractvalue %"class.std::complex.1" [[CALL22]], 0 |
| // CHECK2-NEXT: store double [[TMP64]], double* [[TMP63]], align 8 |
| // CHECK2-NEXT: [[TMP65:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[REF_TMP21]], i32 0, i32 1 |
| // CHECK2-NEXT: [[TMP66:%.*]] = extractvalue %"class.std::complex.1" [[CALL22]], 1 |
| // CHECK2-NEXT: store double [[TMP66]], double* [[TMP65]], align 8 |
| // CHECK2-NEXT: [[TMP67:%.*]] = bitcast %"class.std::complex.1"* [[TMP2]] to i8* |
| // CHECK2-NEXT: [[TMP68:%.*]] = bitcast %"class.std::complex.1"* [[REF_TMP21]] to i8* |
| // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP67]], i8* align 8 [[TMP68]], i64 16, i1 false), !tbaa.struct !24 |
| // CHECK2-NEXT: [[TMP69:%.*]] = bitcast %"class.std::complex.1"* [[REF_TMP21]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* [[TMP69]]) #[[ATTR5]] |
| // CHECK2-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP56]]) |
| // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DONE]] |
| // CHECK2: .omp.reduction.done: |
| // CHECK2-NEXT: [[TMP70:%.*]] = bitcast i32* [[I7]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP70]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP71:%.*]] = bitcast %"class.std::complex.1"* [[PARTIAL_SUM5]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* [[TMP71]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP72:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP72]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP73:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP73]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP74:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP74]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP75:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP75]]) #[[ATTR5]] |
| // CHECK2-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK2: omp.precond.end: |
| // CHECK2-NEXT: [[TMP76:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_2]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP76]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP77:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_1]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP77]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP78:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP78]]) #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP79:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* |
| // CHECK2-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP79]]) #[[ATTR5]] |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@_ZNSt7complexIdEpLIdEERS0_RKS_IT_E |
| // CHECK2-SAME: (%"class.std::complex.1"* nonnull dereferenceable(16) [[THIS:%.*]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[__C:%.*]]) #[[ATTR4]] comdat align 2 { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK2-NEXT: [[__C_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK2-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store %"class.std::complex.1"* [[__C]], %"class.std::complex.1"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[CALL:%.*]] = call double @_ZNKSt7complexIdE4realEv(%"class.std::complex.1"* nonnull dereferenceable(16) [[TMP0]]) #[[ATTR8]] |
| // CHECK2-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP1:%.*]] = load double, double* [[__RE_]], align 8, !tbaa [[TBAA25:![0-9]+]] |
| // CHECK2-NEXT: [[ADD:%.*]] = fadd double [[TMP1]], [[CALL]] |
| // CHECK2-NEXT: store double [[ADD]], double* [[__RE_]], align 8, !tbaa [[TBAA25]] |
| // CHECK2-NEXT: [[TMP2:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[CALL2:%.*]] = call double @_ZNKSt7complexIdE4imagEv(%"class.std::complex.1"* nonnull dereferenceable(16) [[TMP2]]) #[[ATTR8]] |
| // CHECK2-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 1 |
| // CHECK2-NEXT: [[TMP3:%.*]] = load double, double* [[__IM_]], align 8, !tbaa [[TBAA27:![0-9]+]] |
| // CHECK2-NEXT: [[ADD3:%.*]] = fadd double [[TMP3]], [[CALL2]] |
| // CHECK2-NEXT: store double [[ADD3]], double* [[__IM_]], align 8, !tbaa [[TBAA27]] |
| // CHECK2-NEXT: ret %"class.std::complex.1"* [[THIS1]] |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@_ZStplIdESt7complexIT_ERKS2_S4_ |
| // CHECK2-SAME: (%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[__X:%.*]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[__Y:%.*]]) #[[ATTR6]] comdat { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[RETVAL:%.*]] = alloca %"class.std::complex.1", align 8 |
| // CHECK2-NEXT: [[__T2:%.*]] = alloca %"class.std::complex.1", align 8 |
| // CHECK2-NEXT: [[__X_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK2-NEXT: [[__Y_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB5]]) |
| // CHECK2-NEXT: [[TMP1:%.*]] = call i16 @__kmpc_parallel_level(%struct.ident_t* @[[GLOB5]], i32 [[TMP0]]) |
| // CHECK2-NEXT: [[TMP2:%.*]] = icmp eq i16 [[TMP1]], 0 |
| // CHECK2-NEXT: [[TMP3:%.*]] = call i8 @__kmpc_is_spmd_exec_mode() #[[ATTR5]] |
| // CHECK2-NEXT: [[TMP4:%.*]] = icmp ne i8 [[TMP3]], 0 |
| // CHECK2-NEXT: br i1 [[TMP4]], label [[DOTSPMD:%.*]], label [[DOTNON_SPMD:%.*]] |
| // CHECK2: .spmd: |
| // CHECK2-NEXT: br label [[DOTEXIT:%.*]] |
| // CHECK2: .non-spmd: |
| // CHECK2-NEXT: [[TMP5:%.*]] = select i1 [[TMP2]], i64 16, i64 512 |
| // CHECK2-NEXT: [[TMP6:%.*]] = call i8* @__kmpc_data_sharing_coalesced_push_stack(i64 [[TMP5]], i16 0) |
| // CHECK2-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to %struct._globalized_locals_ty.4* |
| // CHECK2-NEXT: br label [[DOTEXIT]] |
| // CHECK2: .exit: |
| // CHECK2-NEXT: [[_SELECT_STACK:%.*]] = phi %struct._globalized_locals_ty.4* [ null, [[DOTSPMD]] ], [ [[TMP7]], [[DOTNON_SPMD]] ] |
| // CHECK2-NEXT: [[TMP8:%.*]] = bitcast %struct._globalized_locals_ty.4* [[_SELECT_STACK]] to %struct._globalized_locals_ty.5* |
| // CHECK2-NEXT: [[__T:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_4:%.*]], %struct._globalized_locals_ty.4* [[_SELECT_STACK]], i32 0, i32 0 |
| // CHECK2-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK2-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID]], 31 |
| // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [32 x %"class.std::complex.1"], [32 x %"class.std::complex.1"]* [[__T]], i32 0, i32 [[NVPTX_LANE_ID]] |
| // CHECK2-NEXT: [[__T1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_5:%.*]], %struct._globalized_locals_ty.5* [[TMP8]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP10:%.*]] = select i1 [[TMP2]], %"class.std::complex.1"* [[__T1]], %"class.std::complex.1"* [[TMP9]] |
| // CHECK2-NEXT: [[TMP11:%.*]] = select i1 [[TMP4]], %"class.std::complex.1"* [[__T2]], %"class.std::complex.1"* [[TMP10]] |
| // CHECK2-NEXT: store %"class.std::complex.1"* [[__X]], %"class.std::complex.1"** [[__X_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store %"class.std::complex.1"* [[__Y]], %"class.std::complex.1"** [[__Y_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP12:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[__X_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP13:%.*]] = bitcast %"class.std::complex.1"* [[TMP11]] to i8* |
| // CHECK2-NEXT: [[TMP14:%.*]] = bitcast %"class.std::complex.1"* [[TMP12]] to i8* |
| // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP13]], i8* align 8 [[TMP14]], i64 16, i1 false), !tbaa.struct !24 |
| // CHECK2-NEXT: [[TMP15:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[__Y_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[CALL:%.*]] = call nonnull align 8 dereferenceable(16) %"class.std::complex.1"* @_ZNSt7complexIdEpLIdEERS0_RKS_IT_E(%"class.std::complex.1"* nonnull dereferenceable(16) [[TMP11]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[TMP15]]) #[[ATTR8]] |
| // CHECK2-NEXT: [[TMP16:%.*]] = bitcast %"class.std::complex.1"* [[RETVAL]] to i8* |
| // CHECK2-NEXT: [[TMP17:%.*]] = bitcast %"class.std::complex.1"* [[TMP11]] to i8* |
| // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP16]], i8* align 8 [[TMP17]], i64 16, i1 false), !tbaa.struct !24 |
| // CHECK2-NEXT: br i1 [[TMP4]], label [[DOTEXIT4:%.*]], label [[DOTNON_SPMD3:%.*]] |
| // CHECK2: .non-spmd3: |
| // CHECK2-NEXT: [[TMP18:%.*]] = bitcast %struct._globalized_locals_ty.4* [[_SELECT_STACK]] to i8* |
| // CHECK2-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP18]]) |
| // CHECK2-NEXT: br label [[DOTEXIT4]] |
| // CHECK2: .exit4: |
| // CHECK2-NEXT: [[TMP19:%.*]] = load %"class.std::complex.1", %"class.std::complex.1"* [[RETVAL]], align 8 |
| // CHECK2-NEXT: ret %"class.std::complex.1" [[TMP19]] |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func7 |
| // CHECK2-SAME: (i8* [[TMP0:%.*]], i16 signext [[TMP1:%.*]], i16 signext [[TMP2:%.*]], i16 signext [[TMP3:%.*]]) #[[ATTR0]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 |
| // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2 |
| // CHECK2-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2 |
| // CHECK2-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2 |
| // CHECK2-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK2-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca %"class.std::complex.1", align 8 |
| // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store i16 [[TMP1]], i16* [[DOTADDR1]], align 2, !tbaa [[TBAA12]] |
| // CHECK2-NEXT: store i16 [[TMP2]], i16* [[DOTADDR2]], align 2, !tbaa [[TBAA12]] |
| // CHECK2-NEXT: store i16 [[TMP3]], i16* [[DOTADDR3]], align 2, !tbaa [[TBAA12]] |
| // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* |
| // CHECK2-NEXT: [[TMP6:%.*]] = load i16, i16* [[DOTADDR1]], align 2, !tbaa [[TBAA12]] |
| // CHECK2-NEXT: [[TMP7:%.*]] = load i16, i16* [[DOTADDR2]], align 2, !tbaa [[TBAA12]] |
| // CHECK2-NEXT: [[TMP8:%.*]] = load i16, i16* [[DOTADDR3]], align 2, !tbaa [[TBAA12]] |
| // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 |
| // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 |
| // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 |
| // CHECK2-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP10]] to %"class.std::complex.1"* |
| // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr %"class.std::complex.1", %"class.std::complex.1"* [[TMP12]], i64 1 |
| // CHECK2-NEXT: [[TMP14:%.*]] = bitcast %"class.std::complex.1"* [[TMP13]] to i8* |
| // CHECK2-NEXT: [[TMP15:%.*]] = bitcast %"class.std::complex.1"* [[TMP12]] to i64* |
| // CHECK2-NEXT: [[TMP16:%.*]] = bitcast %"class.std::complex.1"* [[DOTOMP_REDUCTION_ELEMENT]] to i64* |
| // CHECK2-NEXT: br label [[DOTSHUFFLE_PRE_COND:%.*]] |
| // CHECK2: .shuffle.pre_cond: |
| // CHECK2-NEXT: [[TMP17:%.*]] = phi i64* [ [[TMP15]], [[ENTRY:%.*]] ], [ [[TMP28:%.*]], [[DOTSHUFFLE_THEN:%.*]] ] |
| // CHECK2-NEXT: [[TMP18:%.*]] = phi i64* [ [[TMP16]], [[ENTRY]] ], [ [[TMP29:%.*]], [[DOTSHUFFLE_THEN]] ] |
| // CHECK2-NEXT: [[TMP19:%.*]] = bitcast i64* [[TMP17]] to i8* |
| // CHECK2-NEXT: [[TMP20:%.*]] = ptrtoint i8* [[TMP14]] to i64 |
| // CHECK2-NEXT: [[TMP21:%.*]] = ptrtoint i8* [[TMP19]] to i64 |
| // CHECK2-NEXT: [[TMP22:%.*]] = sub i64 [[TMP20]], [[TMP21]] |
| // CHECK2-NEXT: [[TMP23:%.*]] = sdiv exact i64 [[TMP22]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64) |
| // CHECK2-NEXT: [[TMP24:%.*]] = icmp sgt i64 [[TMP23]], 7 |
| // CHECK2-NEXT: br i1 [[TMP24]], label [[DOTSHUFFLE_THEN]], label [[DOTSHUFFLE_EXIT:%.*]] |
| // CHECK2: .shuffle.then: |
| // CHECK2-NEXT: [[TMP25:%.*]] = load i64, i64* [[TMP17]], align 8 |
| // CHECK2-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() |
| // CHECK2-NEXT: [[TMP26:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16 |
| // CHECK2-NEXT: [[TMP27:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP25]], i16 [[TMP7]], i16 [[TMP26]]) |
| // CHECK2-NEXT: store i64 [[TMP27]], i64* [[TMP18]], align 8 |
| // CHECK2-NEXT: [[TMP28]] = getelementptr i64, i64* [[TMP17]], i64 1 |
| // CHECK2-NEXT: [[TMP29]] = getelementptr i64, i64* [[TMP18]], i64 1 |
| // CHECK2-NEXT: br label [[DOTSHUFFLE_PRE_COND]] |
| // CHECK2: .shuffle.exit: |
| // CHECK2-NEXT: [[TMP30:%.*]] = bitcast %"class.std::complex.1"* [[DOTOMP_REDUCTION_ELEMENT]] to i8* |
| // CHECK2-NEXT: store i8* [[TMP30]], i8** [[TMP11]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP31:%.*]] = icmp eq i16 [[TMP8]], 0 |
| // CHECK2-NEXT: [[TMP32:%.*]] = icmp eq i16 [[TMP8]], 1 |
| // CHECK2-NEXT: [[TMP33:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]] |
| // CHECK2-NEXT: [[TMP34:%.*]] = and i1 [[TMP32]], [[TMP33]] |
| // CHECK2-NEXT: [[TMP35:%.*]] = icmp eq i16 [[TMP8]], 2 |
| // CHECK2-NEXT: [[TMP36:%.*]] = and i16 [[TMP6]], 1 |
| // CHECK2-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP36]], 0 |
| // CHECK2-NEXT: [[TMP38:%.*]] = and i1 [[TMP35]], [[TMP37]] |
| // CHECK2-NEXT: [[TMP39:%.*]] = icmp sgt i16 [[TMP7]], 0 |
| // CHECK2-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]] |
| // CHECK2-NEXT: [[TMP41:%.*]] = or i1 [[TMP31]], [[TMP34]] |
| // CHECK2-NEXT: [[TMP42:%.*]] = or i1 [[TMP41]], [[TMP40]] |
| // CHECK2-NEXT: br i1 [[TMP42]], label [[THEN:%.*]], label [[ELSE:%.*]] |
| // CHECK2: then: |
| // CHECK2-NEXT: [[TMP43:%.*]] = bitcast [1 x i8*]* [[TMP5]] to i8* |
| // CHECK2-NEXT: [[TMP44:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8* |
| // CHECK2-NEXT: call void @"_omp$reduction$reduction_func6"(i8* [[TMP43]], i8* [[TMP44]]) #[[ATTR5]] |
| // CHECK2-NEXT: br label [[IFCONT:%.*]] |
| // CHECK2: else: |
| // CHECK2-NEXT: br label [[IFCONT]] |
| // CHECK2: ifcont: |
| // CHECK2-NEXT: [[TMP45:%.*]] = icmp eq i16 [[TMP8]], 1 |
| // CHECK2-NEXT: [[TMP46:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]] |
| // CHECK2-NEXT: [[TMP47:%.*]] = and i1 [[TMP45]], [[TMP46]] |
| // CHECK2-NEXT: br i1 [[TMP47]], label [[THEN4:%.*]], label [[ELSE5:%.*]] |
| // CHECK2: then4: |
| // CHECK2-NEXT: [[TMP48:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 |
| // CHECK2-NEXT: [[TMP49:%.*]] = load i8*, i8** [[TMP48]], align 8 |
| // CHECK2-NEXT: [[TMP50:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 |
| // CHECK2-NEXT: [[TMP51:%.*]] = load i8*, i8** [[TMP50]], align 8 |
| // CHECK2-NEXT: [[TMP52:%.*]] = bitcast i8* [[TMP49]] to %"class.std::complex.1"* |
| // CHECK2-NEXT: [[TMP53:%.*]] = bitcast i8* [[TMP51]] to %"class.std::complex.1"* |
| // CHECK2-NEXT: [[TMP54:%.*]] = bitcast %"class.std::complex.1"* [[TMP53]] to i8* |
| // CHECK2-NEXT: [[TMP55:%.*]] = bitcast %"class.std::complex.1"* [[TMP52]] to i8* |
| // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP54]], i8* align 8 [[TMP55]], i64 16, i1 false), !tbaa.struct !24 |
| // CHECK2-NEXT: br label [[IFCONT6:%.*]] |
| // CHECK2: else5: |
| // CHECK2-NEXT: br label [[IFCONT6]] |
| // CHECK2: ifcont6: |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func8 |
| // CHECK2-SAME: (i8* [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 |
| // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTCNT_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) |
| // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK2-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK2-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31 |
| // CHECK2-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK2-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5 |
| // CHECK2-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8 |
| // CHECK2-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [1 x i8*]* |
| // CHECK2-NEXT: store i32 0, i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: br label [[PRECOND:%.*]] |
| // CHECK2: precond: |
| // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[TMP6:%.*]] = icmp ult i32 [[TMP5]], 4 |
| // CHECK2-NEXT: br i1 [[TMP6]], label [[BODY:%.*]], label [[EXIT:%.*]] |
| // CHECK2: body: |
| // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]]) |
| // CHECK2-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 |
| // CHECK2-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]] |
| // CHECK2: then: |
| // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0 |
| // CHECK2-NEXT: [[TMP8:%.*]] = load i8*, i8** [[TMP7]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i32* |
| // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr i32, i32* [[TMP9]], i32 [[TMP5]] |
| // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] |
| // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]], align 4 |
| // CHECK2-NEXT: store volatile i32 [[TMP12]], i32 addrspace(3)* [[TMP11]], align 4 |
| // CHECK2-NEXT: br label [[IFCONT:%.*]] |
| // CHECK2: else: |
| // CHECK2-NEXT: br label [[IFCONT]] |
| // CHECK2: ifcont: |
| // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]]) |
| // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP13]] |
| // CHECK2-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]] |
| // CHECK2: then4: |
| // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]] |
| // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0 |
| // CHECK2-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* |
| // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr i32, i32* [[TMP17]], i32 [[TMP5]] |
| // CHECK2-NEXT: [[TMP19:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: store i32 [[TMP19]], i32* [[TMP18]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: br label [[IFCONT6:%.*]] |
| // CHECK2: else5: |
| // CHECK2-NEXT: br label [[IFCONT6]] |
| // CHECK2: ifcont6: |
| // CHECK2-NEXT: [[TMP20:%.*]] = add nsw i32 [[TMP5]], 1 |
| // CHECK2-NEXT: store i32 [[TMP20]], i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: br label [[PRECOND]] |
| // CHECK2: exit: |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__5_wrapper |
| // CHECK2-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2 |
| // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK2-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 |
| // CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 |
| // CHECK2-NEXT: store i16 [[TMP0]], i16* [[DOTADDR]], align 2, !tbaa [[TBAA12]] |
| // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] |
| // CHECK2-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) |
| // CHECK2-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8 |
| // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 0 |
| // CHECK2-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32** |
| // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP4]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 1 |
| // CHECK2-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32** |
| // CHECK2-NEXT: [[TMP8:%.*]] = load i32*, i32** [[TMP7]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 2 |
| // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %"class.std::complex.1"** |
| // CHECK2-NEXT: [[TMP11:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[TMP10]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: call void @__omp_outlined__5(i32* [[DOTADDR1]], i32* [[DOTZERO_ADDR]], i32* [[TMP5]], i32* [[TMP8]], %"class.std::complex.1"* [[TMP11]]) #[[ATTR5]] |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@_ZNSt7complexIfEC2ERKfS2_ |
| // CHECK2-SAME: (%"class.std::complex"* nonnull dereferenceable(8) [[THIS:%.*]], float* nonnull align 4 dereferenceable(4) [[__RE:%.*]], float* nonnull align 4 dereferenceable(4) [[__IM:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK2-NEXT: [[__RE_ADDR:%.*]] = alloca float*, align 8 |
| // CHECK2-NEXT: [[__IM_ADDR:%.*]] = alloca float*, align 8 |
| // CHECK2-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store float* [[__RE]], float** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store float* [[__IM]], float** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load float*, float** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP1:%.*]] = load float, float* [[TMP0]], align 4, !tbaa [[TBAA16]] |
| // CHECK2-NEXT: store float [[TMP1]], float* [[__RE_]], align 4, !tbaa [[TBAA19]] |
| // CHECK2-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 1 |
| // CHECK2-NEXT: [[TMP2:%.*]] = load float*, float** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP3:%.*]] = load float, float* [[TMP2]], align 4, !tbaa [[TBAA16]] |
| // CHECK2-NEXT: store float [[TMP3]], float* [[__IM_]], align 4, !tbaa [[TBAA21]] |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@_ZNKSt7complexIfE4realEv |
| // CHECK2-SAME: (%"class.std::complex"* nonnull dereferenceable(8) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK2-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load float, float* [[__RE_]], align 4, !tbaa [[TBAA19]] |
| // CHECK2-NEXT: ret float [[TMP0]] |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@_ZNKSt7complexIfE4imagEv |
| // CHECK2-SAME: (%"class.std::complex"* nonnull dereferenceable(8) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK2-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 1 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load float, float* [[__IM_]], align 4, !tbaa [[TBAA21]] |
| // CHECK2-NEXT: ret float [[TMP0]] |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@_ZNSt7complexIdEC2ERKdS2_ |
| // CHECK2-SAME: (%"class.std::complex.1"* nonnull dereferenceable(16) [[THIS:%.*]], double* nonnull align 8 dereferenceable(8) [[__RE:%.*]], double* nonnull align 8 dereferenceable(8) [[__IM:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK2-NEXT: [[__RE_ADDR:%.*]] = alloca double*, align 8 |
| // CHECK2-NEXT: [[__IM_ADDR:%.*]] = alloca double*, align 8 |
| // CHECK2-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store double* [[__RE]], double** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: store double* [[__IM]], double** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP1:%.*]] = load double, double* [[TMP0]], align 8, !tbaa [[TBAA22]] |
| // CHECK2-NEXT: store double [[TMP1]], double* [[__RE_]], align 8, !tbaa [[TBAA25]] |
| // CHECK2-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 1 |
| // CHECK2-NEXT: [[TMP2:%.*]] = load double*, double** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[TMP3:%.*]] = load double, double* [[TMP2]], align 8, !tbaa [[TBAA22]] |
| // CHECK2-NEXT: store double [[TMP3]], double* [[__IM_]], align 8, !tbaa [[TBAA27]] |
| // CHECK2-NEXT: ret void |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@_ZNKSt7complexIdE4realEv |
| // CHECK2-SAME: (%"class.std::complex.1"* nonnull dereferenceable(16) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK2-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 0 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load double, double* [[__RE_]], align 8, !tbaa [[TBAA25]] |
| // CHECK2-NEXT: ret double [[TMP0]] |
| // |
| // |
| // CHECK2-LABEL: define {{[^@]+}}@_ZNKSt7complexIdE4imagEv |
| // CHECK2-SAME: (%"class.std::complex.1"* nonnull dereferenceable(16) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 { |
| // CHECK2-NEXT: entry: |
| // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK2-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK2-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 |
| // CHECK2-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 1 |
| // CHECK2-NEXT: [[TMP0:%.*]] = load double, double* [[__IM_]], align 8, !tbaa [[TBAA27]] |
| // CHECK2-NEXT: ret double [[TMP0]] |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIfEvv_l19_worker |
| // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[WORK_FN:%.*]] = alloca i8*, align 8 |
| // CHECK3-NEXT: [[EXEC_STATUS:%.*]] = alloca i8, align 1 |
| // CHECK3-NEXT: store i8* null, i8** [[WORK_FN]], align 8 |
| // CHECK3-NEXT: store i8 0, i8* [[EXEC_STATUS]], align 1 |
| // CHECK3-NEXT: br label [[DOTAWAIT_WORK:%.*]] |
| // CHECK3: .await.work: |
| // CHECK3-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) |
| // CHECK3-NEXT: [[TMP0:%.*]] = call i1 @__kmpc_kernel_parallel(i8** [[WORK_FN]]) |
| // CHECK3-NEXT: [[TMP1:%.*]] = zext i1 [[TMP0]] to i8 |
| // CHECK3-NEXT: store i8 [[TMP1]], i8* [[EXEC_STATUS]], align 1 |
| // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[WORK_FN]], align 8 |
| // CHECK3-NEXT: [[SHOULD_TERMINATE:%.*]] = icmp eq i8* [[TMP2]], null |
| // CHECK3-NEXT: br i1 [[SHOULD_TERMINATE]], label [[DOTEXIT:%.*]], label [[DOTSELECT_WORKERS:%.*]] |
| // CHECK3: .select.workers: |
| // CHECK3-NEXT: [[TMP3:%.*]] = load i8, i8* [[EXEC_STATUS]], align 1 |
| // CHECK3-NEXT: [[IS_ACTIVE:%.*]] = icmp ne i8 [[TMP3]], 0 |
| // CHECK3-NEXT: br i1 [[IS_ACTIVE]], label [[DOTEXECUTE_PARALLEL:%.*]], label [[DOTBARRIER_PARALLEL:%.*]] |
| // CHECK3: .execute.parallel: |
| // CHECK3-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]]) |
| // CHECK3-NEXT: [[TMP5:%.*]] = load i8*, i8** [[WORK_FN]], align 8 |
| // CHECK3-NEXT: [[WORK_MATCH:%.*]] = icmp eq i8* [[TMP5]], bitcast (void (i16, i32)* @__omp_outlined__1_wrapper to i8*) |
| // CHECK3-NEXT: br i1 [[WORK_MATCH]], label [[DOTEXECUTE_FN:%.*]], label [[DOTCHECK_NEXT:%.*]] |
| // CHECK3: .execute.fn: |
| // CHECK3-NEXT: call void @__omp_outlined__1_wrapper(i16 0, i32 [[TMP4]]) #[[ATTR5:[0-9]+]] |
| // CHECK3-NEXT: br label [[DOTTERMINATE_PARALLEL:%.*]] |
| // CHECK3: .check.next: |
| // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP2]] to void (i16, i32)* |
| // CHECK3-NEXT: call void [[TMP6]](i16 0, i32 [[TMP4]]) |
| // CHECK3-NEXT: br label [[DOTTERMINATE_PARALLEL]] |
| // CHECK3: .terminate.parallel: |
| // CHECK3-NEXT: call void @__kmpc_kernel_end_parallel() |
| // CHECK3-NEXT: br label [[DOTBARRIER_PARALLEL]] |
| // CHECK3: .barrier.parallel: |
| // CHECK3-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) |
| // CHECK3-NEXT: br label [[DOTAWAIT_WORK]] |
| // CHECK3: .exit: |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIfEvv_l19 |
| // CHECK3-SAME: () #[[ATTR0]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 |
| // CHECK3-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() |
| // CHECK3-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() |
| // CHECK3-NEXT: [[THREAD_LIMIT:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS]], [[NVPTX_WARP_SIZE]] |
| // CHECK3-NEXT: [[TMP0:%.*]] = icmp ult i32 [[NVPTX_TID]], [[THREAD_LIMIT]] |
| // CHECK3-NEXT: br i1 [[TMP0]], label [[DOTWORKER:%.*]], label [[DOTMASTERCHECK:%.*]] |
| // CHECK3: .worker: |
| // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIfEvv_l19_worker() #[[ATTR5]] |
| // CHECK3-NEXT: br label [[DOTEXIT:%.*]] |
| // CHECK3: .mastercheck: |
| // CHECK3-NEXT: [[NVPTX_TID1:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK3-NEXT: [[NVPTX_NUM_THREADS2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() |
| // CHECK3-NEXT: [[NVPTX_WARP_SIZE3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() |
| // CHECK3-NEXT: [[TMP1:%.*]] = sub nuw i32 [[NVPTX_WARP_SIZE3]], 1 |
| // CHECK3-NEXT: [[TMP2:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS2]], 1 |
| // CHECK3-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], -1 |
| // CHECK3-NEXT: [[MASTER_TID:%.*]] = and i32 [[TMP2]], [[TMP3]] |
| // CHECK3-NEXT: [[TMP4:%.*]] = icmp eq i32 [[NVPTX_TID1]], [[MASTER_TID]] |
| // CHECK3-NEXT: br i1 [[TMP4]], label [[DOTMASTER:%.*]], label [[DOTEXIT]] |
| // CHECK3: .master: |
| // CHECK3-NEXT: [[NVPTX_NUM_THREADS4:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() |
| // CHECK3-NEXT: [[NVPTX_WARP_SIZE5:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() |
| // CHECK3-NEXT: [[THREAD_LIMIT6:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS4]], [[NVPTX_WARP_SIZE5]] |
| // CHECK3-NEXT: call void @__kmpc_kernel_init(i32 [[THREAD_LIMIT6]], i16 1) |
| // CHECK3-NEXT: call void @__kmpc_data_sharing_init_stack() |
| // CHECK3-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) |
| // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA6:![0-9]+]] |
| // CHECK3-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR5]] |
| // CHECK3-NEXT: br label [[DOTTERMINATION_NOTIFIER:%.*]] |
| // CHECK3: .termination.notifier: |
| // CHECK3-NEXT: call void @__kmpc_kernel_deinit(i16 1) |
| // CHECK3-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) |
| // CHECK3-NEXT: br label [[DOTEXIT]] |
| // CHECK3: .exit: |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__ |
| // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[IB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca float, align 4 |
| // CHECK3-NEXT: [[REF_TMP2:%.*]] = alloca float, align 4 |
| // CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8, !tbaa [[TBAA10:![0-9]+]] |
| // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP0:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2, !tbaa [[TBAA12:![0-9]+]] |
| // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* @"_openmp_static_kernel$size", align 8, !tbaa [[TBAA14:![0-9]+]] |
| // CHECK3-NEXT: call void @__kmpc_get_team_static_memory(i16 0, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i64 [[TMP1]], i16 [[TMP0]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**)) |
| // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 8 |
| // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, i8* [[TMP2]], i64 0 |
| // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to %struct._globalized_locals_ty* |
| // CHECK3-NEXT: [[ISTART:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY:%.*]], %struct._globalized_locals_ty* [[TMP4]], i32 0, i32 0 |
| // CHECK3-NEXT: [[IEND:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY]], %struct._globalized_locals_ty* [[TMP4]], i32 0, i32 1 |
| // CHECK3-NEXT: [[PARTIAL_SUM:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY]], %struct._globalized_locals_ty* [[TMP4]], i32 0, i32 2 |
| // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP5]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP6]]) #[[ATTR5]] |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP7:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP7]]) #[[ATTR5]] |
| // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) #[[ATTR5]] |
| // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP9:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP9]]) #[[ATTR5]] |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i32* [[IB]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP10]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP12]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 99 |
| // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK3: cond.true: |
| // CHECK3-NEXT: br label [[COND_END:%.*]] |
| // CHECK3: cond.false: |
| // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: br label [[COND_END]] |
| // CHECK3: cond.end: |
| // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] |
| // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK3: omp.inner.for.cond: |
| // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] |
| // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] |
| // CHECK3: omp.inner.for.cond.cleanup: |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK3: omp.inner.for.body: |
| // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 |
| // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK3-NEXT: store i32 [[ADD]], i32* [[IB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP19:%.*]] = bitcast float* [[REF_TMP]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP19]]) #[[ATTR5]] |
| // CHECK3-NEXT: store float 0.000000e+00, float* [[REF_TMP]], align 4, !tbaa [[TBAA16:![0-9]+]] |
| // CHECK3-NEXT: [[TMP20:%.*]] = bitcast float* [[REF_TMP2]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP20]]) #[[ATTR5]] |
| // CHECK3-NEXT: store float 0.000000e+00, float* [[REF_TMP2]], align 4, !tbaa [[TBAA16]] |
| // CHECK3-NEXT: call void @_ZNSt7complexIfEC1ERKfS2_(%"class.std::complex"* nonnull dereferenceable(8) [[PARTIAL_SUM]], float* nonnull align 4 dereferenceable(4) [[REF_TMP]], float* nonnull align 4 dereferenceable(4) [[REF_TMP2]]) #[[ATTR8:[0-9]+]] |
| // CHECK3-NEXT: [[TMP21:%.*]] = bitcast float* [[REF_TMP2]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP21]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP22:%.*]] = bitcast float* [[REF_TMP]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP22]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[IB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP23]], 4 |
| // CHECK3-NEXT: store i32 [[MUL3]], i32* [[ISTART]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[IB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], 1 |
| // CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[ADD4]], 4 |
| // CHECK3-NEXT: store i32 [[MUL5]], i32* [[IEND]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 |
| // CHECK3-NEXT: [[TMP26:%.*]] = bitcast i32* [[ISTART]] to i8* |
| // CHECK3-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 |
| // CHECK3-NEXT: [[TMP28:%.*]] = bitcast i32* [[IEND]] to i8* |
| // CHECK3-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 |
| // CHECK3-NEXT: [[TMP30:%.*]] = bitcast %"class.std::complex"* [[PARTIAL_SUM]] to i8* |
| // CHECK3-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP31:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** |
| // CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32*, i32*, %"class.std::complex"*)* @__omp_outlined__1 to i8*), i8* bitcast (void (i16, i32)* @__omp_outlined__1_wrapper to i8*), i8** [[TMP31]], i64 3) |
| // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK3: omp.body.continue: |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK3: omp.inner.for.inc: |
| // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP32]], 1 |
| // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] |
| // CHECK3: omp.inner.for.end: |
| // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK3: omp.loop.exit: |
| // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) |
| // CHECK3-NEXT: [[TMP33:%.*]] = bitcast i32* [[IB]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP33]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP34:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP34]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP35:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP35]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP36:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP36]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP37:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP37]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP38:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP38]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP39:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared", align 2, !tbaa [[TBAA12]] |
| // CHECK3-NEXT: call void @__kmpc_restore_team_static_memory(i16 0, i16 [[TMP39]]) |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@_ZNSt7complexIfEC1ERKfS2_ |
| // CHECK3-SAME: (%"class.std::complex"* nonnull dereferenceable(8) [[THIS:%.*]], float* nonnull align 4 dereferenceable(4) [[__RE:%.*]], float* nonnull align 4 dereferenceable(4) [[__IM:%.*]]) unnamed_addr #[[ATTR3:[0-9]+]] comdat align 2 { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK3-NEXT: [[__RE_ADDR:%.*]] = alloca float*, align 8 |
| // CHECK3-NEXT: [[__IM_ADDR:%.*]] = alloca float*, align 8 |
| // CHECK3-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store float* [[__RE]], float** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store float* [[__IM]], float** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load float*, float** [[__RE_ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP1:%.*]] = load float*, float** [[__IM_ADDR]], align 8 |
| // CHECK3-NEXT: call void @_ZNSt7complexIfEC2ERKfS2_(%"class.std::complex"* nonnull dereferenceable(8) [[THIS1]], float* nonnull align 4 dereferenceable(4) [[TMP0]], float* nonnull align 4 dereferenceable(4) [[TMP1]]) #[[ATTR8]] |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__1 |
| // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ISTART:%.*]], i32* nonnull align 4 dereferenceable(4) [[IEND:%.*]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[PARTIAL_SUM:%.*]]) #[[ATTR0]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[ISTART_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[IEND_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[PARTIAL_SUM_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[PARTIAL_SUM5:%.*]] = alloca %"class.std::complex", align 4 |
| // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca float, align 4 |
| // CHECK3-NEXT: [[REF_TMP6:%.*]] = alloca float, align 4 |
| // CHECK3-NEXT: [[I7:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[REF_TMP14:%.*]] = alloca %"class.std::complex", align 4 |
| // CHECK3-NEXT: [[REF_TMP15:%.*]] = alloca float, align 4 |
| // CHECK3-NEXT: [[REF_TMP16:%.*]] = alloca float, align 4 |
| // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK3-NEXT: [[REF_TMP21:%.*]] = alloca %"class.std::complex", align 4 |
| // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store i32* [[ISTART]], i32** [[ISTART_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store i32* [[IEND]], i32** [[IEND_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store %"class.std::complex"* [[PARTIAL_SUM]], %"class.std::complex"** [[PARTIAL_SUM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ISTART_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[IEND_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP2:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[PARTIAL_SUM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP3]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_1]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP6]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP1]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_2]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[SUB:%.*]] = sub i32 [[TMP9]], [[TMP10]] |
| // CHECK3-NEXT: [[SUB3:%.*]] = sub i32 [[SUB]], 1 |
| // CHECK3-NEXT: [[ADD:%.*]] = add i32 [[SUB3]], 1 |
| // CHECK3-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 |
| // CHECK3-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 1 |
| // CHECK3-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i32* [[I]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP11]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: store i32 [[TMP12]], i32* [[I]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i32* [[I]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP13]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP14]], [[TMP15]] |
| // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK3: omp.precond.then: |
| // CHECK3-NEXT: [[TMP16:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP16]]) #[[ATTR5]] |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP17]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP19]]) #[[ATTR5]] |
| // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP20:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP20]]) #[[ATTR5]] |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP21:%.*]] = bitcast %"class.std::complex"* [[PARTIAL_SUM5]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP21]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP22:%.*]] = bitcast float* [[REF_TMP]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP22]]) #[[ATTR5]] |
| // CHECK3-NEXT: store float 0.000000e+00, float* [[REF_TMP]], align 4, !tbaa [[TBAA16]] |
| // CHECK3-NEXT: [[TMP23:%.*]] = bitcast float* [[REF_TMP6]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP23]]) #[[ATTR5]] |
| // CHECK3-NEXT: store float 0.000000e+00, float* [[REF_TMP6]], align 4, !tbaa [[TBAA16]] |
| // CHECK3-NEXT: call void @_ZNSt7complexIfEC1ERKfS2_(%"class.std::complex"* nonnull dereferenceable(8) [[PARTIAL_SUM5]], float* nonnull align 4 dereferenceable(4) [[REF_TMP]], float* nonnull align 4 dereferenceable(4) [[REF_TMP6]]) #[[ATTR8]] |
| // CHECK3-NEXT: [[TMP24:%.*]] = bitcast float* [[REF_TMP6]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP24]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP25:%.*]] = bitcast float* [[REF_TMP]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP25]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP26:%.*]] = bitcast i32* [[I7]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP26]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP28]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK3: omp.dispatch.cond: |
| // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[CMP8:%.*]] = icmp ugt i32 [[TMP29]], [[TMP30]] |
| // CHECK3-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK3: cond.true: |
| // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: br label [[COND_END:%.*]] |
| // CHECK3: cond.false: |
| // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: br label [[COND_END]] |
| // CHECK3: cond.end: |
| // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE]] ], [ [[TMP32]], [[COND_FALSE]] ] |
| // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[ADD9:%.*]] = add i32 [[TMP35]], 1 |
| // CHECK3-NEXT: [[CMP10:%.*]] = icmp ult i32 [[TMP34]], [[ADD9]] |
| // CHECK3-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_CLEANUP:%.*]] |
| // CHECK3: omp.dispatch.cleanup: |
| // CHECK3-NEXT: br label [[OMP_DISPATCH_END:%.*]] |
| // CHECK3: omp.dispatch.body: |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK3: omp.inner.for.cond: |
| // CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[ADD11:%.*]] = add i32 [[TMP37]], 1 |
| // CHECK3-NEXT: [[CMP12:%.*]] = icmp ult i32 [[TMP36]], [[ADD11]] |
| // CHECK3-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] |
| // CHECK3: omp.inner.for.cond.cleanup: |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK3: omp.inner.for.body: |
| // CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[MUL:%.*]] = mul i32 [[TMP39]], 1 |
| // CHECK3-NEXT: [[ADD13:%.*]] = add i32 [[TMP38]], [[MUL]] |
| // CHECK3-NEXT: store i32 [[ADD13]], i32* [[I7]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP40:%.*]] = bitcast %"class.std::complex"* [[REF_TMP14]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP40]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP41:%.*]] = bitcast float* [[REF_TMP15]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP41]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP42:%.*]] = load i32, i32* [[I7]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP42]] to float |
| // CHECK3-NEXT: store float [[CONV]], float* [[REF_TMP15]], align 4, !tbaa [[TBAA16]] |
| // CHECK3-NEXT: [[TMP43:%.*]] = bitcast float* [[REF_TMP16]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP43]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP44:%.*]] = load i32, i32* [[I7]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[CONV17:%.*]] = sitofp i32 [[TMP44]] to float |
| // CHECK3-NEXT: store float [[CONV17]], float* [[REF_TMP16]], align 4, !tbaa [[TBAA16]] |
| // CHECK3-NEXT: call void @_ZNSt7complexIfEC1ERKfS2_(%"class.std::complex"* nonnull dereferenceable(8) [[REF_TMP14]], float* nonnull align 4 dereferenceable(4) [[REF_TMP15]], float* nonnull align 4 dereferenceable(4) [[REF_TMP16]]) #[[ATTR8]] |
| // CHECK3-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(8) %"class.std::complex"* @_ZNSt7complexIfEpLIfEERS0_RKS_IT_E(%"class.std::complex"* nonnull dereferenceable(8) [[PARTIAL_SUM5]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[REF_TMP14]]) #[[ATTR8]] |
| // CHECK3-NEXT: [[TMP45:%.*]] = bitcast float* [[REF_TMP16]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP45]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP46:%.*]] = bitcast float* [[REF_TMP15]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP46]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP47:%.*]] = bitcast %"class.std::complex"* [[REF_TMP14]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP47]]) #[[ATTR5]] |
| // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK3: omp.body.continue: |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK3: omp.inner.for.inc: |
| // CHECK3-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[ADD18:%.*]] = add i32 [[TMP48]], 1 |
| // CHECK3-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] |
| // CHECK3: omp.inner.for.end: |
| // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK3: omp.dispatch.inc: |
| // CHECK3-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[ADD19:%.*]] = add i32 [[TMP49]], [[TMP50]] |
| // CHECK3-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[ADD20:%.*]] = add i32 [[TMP51]], [[TMP52]] |
| // CHECK3-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK3: omp.dispatch.end: |
| // CHECK3-NEXT: [[TMP53:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP54:%.*]] = load i32, i32* [[TMP53]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP54]]) |
| // CHECK3-NEXT: [[TMP55:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP56:%.*]] = load i32, i32* [[TMP55]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP57:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 |
| // CHECK3-NEXT: [[TMP58:%.*]] = bitcast %"class.std::complex"* [[PARTIAL_SUM5]] to i8* |
| // CHECK3-NEXT: store i8* [[TMP58]], i8** [[TMP57]], align 8 |
| // CHECK3-NEXT: [[TMP59:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* |
| // CHECK3-NEXT: [[TMP60:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(%struct.ident_t* @[[GLOB3]], i32 [[TMP56]], i32 1, i64 8, i8* [[TMP59]], void (i8*, i16, i16, i16)* @_omp_reduction_shuffle_and_reduce_func, void (i8*, i32)* @_omp_reduction_inter_warp_copy_func) |
| // CHECK3-NEXT: [[TMP61:%.*]] = icmp eq i32 [[TMP60]], 1 |
| // CHECK3-NEXT: br i1 [[TMP61]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]] |
| // CHECK3: .omp.reduction.then: |
| // CHECK3-NEXT: [[TMP62:%.*]] = bitcast %"class.std::complex"* [[REF_TMP21]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP62]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[CALL22:%.*]] = call %"class.std::complex" @_ZStplIfESt7complexIT_ERKS2_S4_(%"class.std::complex"* nonnull align 4 dereferenceable(8) [[TMP2]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[PARTIAL_SUM5]]) #[[ATTR8]] |
| // CHECK3-NEXT: [[TMP63:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[REF_TMP21]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP64:%.*]] = extractvalue %"class.std::complex" [[CALL22]], 0 |
| // CHECK3-NEXT: store float [[TMP64]], float* [[TMP63]], align 4 |
| // CHECK3-NEXT: [[TMP65:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[REF_TMP21]], i32 0, i32 1 |
| // CHECK3-NEXT: [[TMP66:%.*]] = extractvalue %"class.std::complex" [[CALL22]], 1 |
| // CHECK3-NEXT: store float [[TMP66]], float* [[TMP65]], align 4 |
| // CHECK3-NEXT: [[TMP67:%.*]] = bitcast %"class.std::complex"* [[TMP2]] to i8* |
| // CHECK3-NEXT: [[TMP68:%.*]] = bitcast %"class.std::complex"* [[REF_TMP21]] to i8* |
| // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP67]], i8* align 4 [[TMP68]], i64 8, i1 false), !tbaa.struct !18 |
| // CHECK3-NEXT: [[TMP69:%.*]] = bitcast %"class.std::complex"* [[REF_TMP21]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP69]]) #[[ATTR5]] |
| // CHECK3-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP56]]) |
| // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DONE]] |
| // CHECK3: .omp.reduction.done: |
| // CHECK3-NEXT: [[TMP70:%.*]] = bitcast i32* [[I7]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP70]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP71:%.*]] = bitcast %"class.std::complex"* [[PARTIAL_SUM5]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP71]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP72:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP72]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP73:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP73]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP74:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP74]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP75:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP75]]) #[[ATTR5]] |
| // CHECK3-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK3: omp.precond.end: |
| // CHECK3-NEXT: [[TMP76:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_2]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP76]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP77:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_1]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP77]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP78:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP78]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP79:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP79]]) #[[ATTR5]] |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@_ZNSt7complexIfEpLIfEERS0_RKS_IT_E |
| // CHECK3-SAME: (%"class.std::complex"* nonnull dereferenceable(8) [[THIS:%.*]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[__C:%.*]]) #[[ATTR4:[0-9]+]] comdat align 2 { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK3-NEXT: [[__C_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK3-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store %"class.std::complex"* [[__C]], %"class.std::complex"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[CALL:%.*]] = call float @_ZNKSt7complexIfE4realEv(%"class.std::complex"* nonnull dereferenceable(8) [[TMP0]]) #[[ATTR8]] |
| // CHECK3-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP1:%.*]] = load float, float* [[__RE_]], align 4, !tbaa [[TBAA19:![0-9]+]] |
| // CHECK3-NEXT: [[ADD:%.*]] = fadd float [[TMP1]], [[CALL]] |
| // CHECK3-NEXT: store float [[ADD]], float* [[__RE_]], align 4, !tbaa [[TBAA19]] |
| // CHECK3-NEXT: [[TMP2:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[CALL2:%.*]] = call float @_ZNKSt7complexIfE4imagEv(%"class.std::complex"* nonnull dereferenceable(8) [[TMP2]]) #[[ATTR8]] |
| // CHECK3-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 1 |
| // CHECK3-NEXT: [[TMP3:%.*]] = load float, float* [[__IM_]], align 4, !tbaa [[TBAA21:![0-9]+]] |
| // CHECK3-NEXT: [[ADD3:%.*]] = fadd float [[TMP3]], [[CALL2]] |
| // CHECK3-NEXT: store float [[ADD3]], float* [[__IM_]], align 4, !tbaa [[TBAA21]] |
| // CHECK3-NEXT: ret %"class.std::complex"* [[THIS1]] |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@_ZStplIfESt7complexIT_ERKS2_S4_ |
| // CHECK3-SAME: (%"class.std::complex"* nonnull align 4 dereferenceable(8) [[__X:%.*]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[__Y:%.*]]) #[[ATTR6:[0-9]+]] comdat { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[RETVAL:%.*]] = alloca %"class.std::complex", align 4 |
| // CHECK3-NEXT: [[__T2:%.*]] = alloca %"class.std::complex", align 4 |
| // CHECK3-NEXT: [[__X_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK3-NEXT: [[__Y_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB5:[0-9]+]]) |
| // CHECK3-NEXT: [[TMP1:%.*]] = call i16 @__kmpc_parallel_level(%struct.ident_t* @[[GLOB5]], i32 [[TMP0]]) |
| // CHECK3-NEXT: [[TMP2:%.*]] = icmp eq i16 [[TMP1]], 0 |
| // CHECK3-NEXT: [[TMP3:%.*]] = call i8 @__kmpc_is_spmd_exec_mode() #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP4:%.*]] = icmp ne i8 [[TMP3]], 0 |
| // CHECK3-NEXT: br i1 [[TMP4]], label [[DOTSPMD:%.*]], label [[DOTNON_SPMD:%.*]] |
| // CHECK3: .spmd: |
| // CHECK3-NEXT: br label [[DOTEXIT:%.*]] |
| // CHECK3: .non-spmd: |
| // CHECK3-NEXT: [[TMP5:%.*]] = select i1 [[TMP2]], i64 8, i64 256 |
| // CHECK3-NEXT: [[TMP6:%.*]] = call i8* @__kmpc_data_sharing_coalesced_push_stack(i64 [[TMP5]], i16 0) |
| // CHECK3-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to %struct._globalized_locals_ty.2* |
| // CHECK3-NEXT: br label [[DOTEXIT]] |
| // CHECK3: .exit: |
| // CHECK3-NEXT: [[_SELECT_STACK:%.*]] = phi %struct._globalized_locals_ty.2* [ null, [[DOTSPMD]] ], [ [[TMP7]], [[DOTNON_SPMD]] ] |
| // CHECK3-NEXT: [[TMP8:%.*]] = bitcast %struct._globalized_locals_ty.2* [[_SELECT_STACK]] to %struct._globalized_locals_ty.3* |
| // CHECK3-NEXT: [[__T:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_2:%.*]], %struct._globalized_locals_ty.2* [[_SELECT_STACK]], i32 0, i32 0 |
| // CHECK3-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK3-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID]], 31 |
| // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [32 x %"class.std::complex"], [32 x %"class.std::complex"]* [[__T]], i32 0, i32 [[NVPTX_LANE_ID]] |
| // CHECK3-NEXT: [[__T1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_3:%.*]], %struct._globalized_locals_ty.3* [[TMP8]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP10:%.*]] = select i1 [[TMP2]], %"class.std::complex"* [[__T1]], %"class.std::complex"* [[TMP9]] |
| // CHECK3-NEXT: [[TMP11:%.*]] = select i1 [[TMP4]], %"class.std::complex"* [[__T2]], %"class.std::complex"* [[TMP10]] |
| // CHECK3-NEXT: store %"class.std::complex"* [[__X]], %"class.std::complex"** [[__X_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store %"class.std::complex"* [[__Y]], %"class.std::complex"** [[__Y_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP12:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[__X_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP13:%.*]] = bitcast %"class.std::complex"* [[TMP11]] to i8* |
| // CHECK3-NEXT: [[TMP14:%.*]] = bitcast %"class.std::complex"* [[TMP12]] to i8* |
| // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 8, i1 false), !tbaa.struct !18 |
| // CHECK3-NEXT: [[TMP15:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[__Y_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(8) %"class.std::complex"* @_ZNSt7complexIfEpLIfEERS0_RKS_IT_E(%"class.std::complex"* nonnull dereferenceable(8) [[TMP11]], %"class.std::complex"* nonnull align 4 dereferenceable(8) [[TMP15]]) #[[ATTR8]] |
| // CHECK3-NEXT: [[TMP16:%.*]] = bitcast %"class.std::complex"* [[RETVAL]] to i8* |
| // CHECK3-NEXT: [[TMP17:%.*]] = bitcast %"class.std::complex"* [[TMP11]] to i8* |
| // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP16]], i8* align 4 [[TMP17]], i64 8, i1 false), !tbaa.struct !18 |
| // CHECK3-NEXT: br i1 [[TMP4]], label [[DOTEXIT4:%.*]], label [[DOTNON_SPMD3:%.*]] |
| // CHECK3: .non-spmd3: |
| // CHECK3-NEXT: [[TMP18:%.*]] = bitcast %struct._globalized_locals_ty.2* [[_SELECT_STACK]] to i8* |
| // CHECK3-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP18]]) |
| // CHECK3-NEXT: br label [[DOTEXIT4]] |
| // CHECK3: .exit4: |
| // CHECK3-NEXT: [[TMP19:%.*]] = load %"class.std::complex", %"class.std::complex"* [[RETVAL]], align 4 |
| // CHECK3-NEXT: ret %"class.std::complex" [[TMP19]] |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func |
| // CHECK3-SAME: (i8* [[TMP0:%.*]], i16 signext [[TMP1:%.*]], i16 signext [[TMP2:%.*]], i16 signext [[TMP3:%.*]]) #[[ATTR0]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 |
| // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2 |
| // CHECK3-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2 |
| // CHECK3-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2 |
| // CHECK3-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK3-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca %"class.std::complex", align 4 |
| // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store i16 [[TMP1]], i16* [[DOTADDR1]], align 2, !tbaa [[TBAA12]] |
| // CHECK3-NEXT: store i16 [[TMP2]], i16* [[DOTADDR2]], align 2, !tbaa [[TBAA12]] |
| // CHECK3-NEXT: store i16 [[TMP3]], i16* [[DOTADDR3]], align 2, !tbaa [[TBAA12]] |
| // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* |
| // CHECK3-NEXT: [[TMP6:%.*]] = load i16, i16* [[DOTADDR1]], align 2, !tbaa [[TBAA12]] |
| // CHECK3-NEXT: [[TMP7:%.*]] = load i16, i16* [[DOTADDR2]], align 2, !tbaa [[TBAA12]] |
| // CHECK3-NEXT: [[TMP8:%.*]] = load i16, i16* [[DOTADDR3]], align 2, !tbaa [[TBAA12]] |
| // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 |
| // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 |
| // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 |
| // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP10]] to %"class.std::complex"* |
| // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr %"class.std::complex", %"class.std::complex"* [[TMP12]], i64 1 |
| // CHECK3-NEXT: [[TMP14:%.*]] = bitcast %"class.std::complex"* [[TMP13]] to i8* |
| // CHECK3-NEXT: [[TMP15:%.*]] = bitcast %"class.std::complex"* [[TMP12]] to i64* |
| // CHECK3-NEXT: [[TMP16:%.*]] = bitcast %"class.std::complex"* [[DOTOMP_REDUCTION_ELEMENT]] to i64* |
| // CHECK3-NEXT: [[TMP17:%.*]] = load i64, i64* [[TMP15]], align 4 |
| // CHECK3-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() |
| // CHECK3-NEXT: [[TMP18:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16 |
| // CHECK3-NEXT: [[TMP19:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP17]], i16 [[TMP7]], i16 [[TMP18]]) |
| // CHECK3-NEXT: store i64 [[TMP19]], i64* [[TMP16]], align 4 |
| // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr i64, i64* [[TMP15]], i64 1 |
| // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr i64, i64* [[TMP16]], i64 1 |
| // CHECK3-NEXT: [[TMP22:%.*]] = bitcast %"class.std::complex"* [[DOTOMP_REDUCTION_ELEMENT]] to i8* |
| // CHECK3-NEXT: store i8* [[TMP22]], i8** [[TMP11]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP23:%.*]] = icmp eq i16 [[TMP8]], 0 |
| // CHECK3-NEXT: [[TMP24:%.*]] = icmp eq i16 [[TMP8]], 1 |
| // CHECK3-NEXT: [[TMP25:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]] |
| // CHECK3-NEXT: [[TMP26:%.*]] = and i1 [[TMP24]], [[TMP25]] |
| // CHECK3-NEXT: [[TMP27:%.*]] = icmp eq i16 [[TMP8]], 2 |
| // CHECK3-NEXT: [[TMP28:%.*]] = and i16 [[TMP6]], 1 |
| // CHECK3-NEXT: [[TMP29:%.*]] = icmp eq i16 [[TMP28]], 0 |
| // CHECK3-NEXT: [[TMP30:%.*]] = and i1 [[TMP27]], [[TMP29]] |
| // CHECK3-NEXT: [[TMP31:%.*]] = icmp sgt i16 [[TMP7]], 0 |
| // CHECK3-NEXT: [[TMP32:%.*]] = and i1 [[TMP30]], [[TMP31]] |
| // CHECK3-NEXT: [[TMP33:%.*]] = or i1 [[TMP23]], [[TMP26]] |
| // CHECK3-NEXT: [[TMP34:%.*]] = or i1 [[TMP33]], [[TMP32]] |
| // CHECK3-NEXT: br i1 [[TMP34]], label [[THEN:%.*]], label [[ELSE:%.*]] |
| // CHECK3: then: |
| // CHECK3-NEXT: [[TMP35:%.*]] = bitcast [1 x i8*]* [[TMP5]] to i8* |
| // CHECK3-NEXT: [[TMP36:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8* |
| // CHECK3-NEXT: call void @"_omp$reduction$reduction_func"(i8* [[TMP35]], i8* [[TMP36]]) #[[ATTR5]] |
| // CHECK3-NEXT: br label [[IFCONT:%.*]] |
| // CHECK3: else: |
| // CHECK3-NEXT: br label [[IFCONT]] |
| // CHECK3: ifcont: |
| // CHECK3-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 1 |
| // CHECK3-NEXT: [[TMP38:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]] |
| // CHECK3-NEXT: [[TMP39:%.*]] = and i1 [[TMP37]], [[TMP38]] |
| // CHECK3-NEXT: br i1 [[TMP39]], label [[THEN4:%.*]], label [[ELSE5:%.*]] |
| // CHECK3: then4: |
| // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 |
| // CHECK3-NEXT: [[TMP41:%.*]] = load i8*, i8** [[TMP40]], align 8 |
| // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 |
| // CHECK3-NEXT: [[TMP43:%.*]] = load i8*, i8** [[TMP42]], align 8 |
| // CHECK3-NEXT: [[TMP44:%.*]] = bitcast i8* [[TMP41]] to %"class.std::complex"* |
| // CHECK3-NEXT: [[TMP45:%.*]] = bitcast i8* [[TMP43]] to %"class.std::complex"* |
| // CHECK3-NEXT: [[TMP46:%.*]] = bitcast %"class.std::complex"* [[TMP45]] to i8* |
| // CHECK3-NEXT: [[TMP47:%.*]] = bitcast %"class.std::complex"* [[TMP44]] to i8* |
| // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP46]], i8* align 4 [[TMP47]], i64 8, i1 false), !tbaa.struct !18 |
| // CHECK3-NEXT: br label [[IFCONT6:%.*]] |
| // CHECK3: else5: |
| // CHECK3-NEXT: br label [[IFCONT6]] |
| // CHECK3: ifcont6: |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func |
| // CHECK3-SAME: (i8* [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 |
| // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTCNT_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) |
| // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK3-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK3-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31 |
| // CHECK3-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK3-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5 |
| // CHECK3-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8 |
| // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [1 x i8*]* |
| // CHECK3-NEXT: store i32 0, i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: br label [[PRECOND:%.*]] |
| // CHECK3: precond: |
| // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP6:%.*]] = icmp ult i32 [[TMP5]], 2 |
| // CHECK3-NEXT: br i1 [[TMP6]], label [[BODY:%.*]], label [[EXIT:%.*]] |
| // CHECK3: body: |
| // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP2]]) |
| // CHECK3-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 |
| // CHECK3-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]] |
| // CHECK3: then: |
| // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0 |
| // CHECK3-NEXT: [[TMP8:%.*]] = load i8*, i8** [[TMP7]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i32* |
| // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr i32, i32* [[TMP9]], i32 [[TMP5]] |
| // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] |
| // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]], align 4 |
| // CHECK3-NEXT: store volatile i32 [[TMP12]], i32 addrspace(3)* [[TMP11]], align 4 |
| // CHECK3-NEXT: br label [[IFCONT:%.*]] |
| // CHECK3: else: |
| // CHECK3-NEXT: br label [[IFCONT]] |
| // CHECK3: ifcont: |
| // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]]) |
| // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP13]] |
| // CHECK3-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]] |
| // CHECK3: then4: |
| // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]] |
| // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0 |
| // CHECK3-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* |
| // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr i32, i32* [[TMP17]], i32 [[TMP5]] |
| // CHECK3-NEXT: [[TMP19:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: store i32 [[TMP19]], i32* [[TMP18]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: br label [[IFCONT6:%.*]] |
| // CHECK3: else5: |
| // CHECK3-NEXT: br label [[IFCONT6]] |
| // CHECK3: ifcont6: |
| // CHECK3-NEXT: [[TMP20:%.*]] = add nsw i32 [[TMP5]], 1 |
| // CHECK3-NEXT: store i32 [[TMP20]], i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: br label [[PRECOND]] |
| // CHECK3: exit: |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper |
| // CHECK3-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2 |
| // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 |
| // CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 |
| // CHECK3-NEXT: store i16 [[TMP0]], i16* [[DOTADDR]], align 2, !tbaa [[TBAA12]] |
| // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) |
| // CHECK3-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8 |
| // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 0 |
| // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32** |
| // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP4]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 1 |
| // CHECK3-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32** |
| // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[TMP7]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 2 |
| // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %"class.std::complex"** |
| // CHECK3-NEXT: [[TMP11:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[TMP10]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: call void @__omp_outlined__1(i32* [[DOTADDR1]], i32* [[DOTZERO_ADDR]], i32* [[TMP5]], i32* [[TMP8]], %"class.std::complex"* [[TMP11]]) #[[ATTR5]] |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIdEvv_l19_worker |
| // CHECK3-SAME: () #[[ATTR0]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[WORK_FN:%.*]] = alloca i8*, align 8 |
| // CHECK3-NEXT: [[EXEC_STATUS:%.*]] = alloca i8, align 1 |
| // CHECK3-NEXT: store i8* null, i8** [[WORK_FN]], align 8 |
| // CHECK3-NEXT: store i8 0, i8* [[EXEC_STATUS]], align 1 |
| // CHECK3-NEXT: br label [[DOTAWAIT_WORK:%.*]] |
| // CHECK3: .await.work: |
| // CHECK3-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) |
| // CHECK3-NEXT: [[TMP0:%.*]] = call i1 @__kmpc_kernel_parallel(i8** [[WORK_FN]]) |
| // CHECK3-NEXT: [[TMP1:%.*]] = zext i1 [[TMP0]] to i8 |
| // CHECK3-NEXT: store i8 [[TMP1]], i8* [[EXEC_STATUS]], align 1 |
| // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[WORK_FN]], align 8 |
| // CHECK3-NEXT: [[SHOULD_TERMINATE:%.*]] = icmp eq i8* [[TMP2]], null |
| // CHECK3-NEXT: br i1 [[SHOULD_TERMINATE]], label [[DOTEXIT:%.*]], label [[DOTSELECT_WORKERS:%.*]] |
| // CHECK3: .select.workers: |
| // CHECK3-NEXT: [[TMP3:%.*]] = load i8, i8* [[EXEC_STATUS]], align 1 |
| // CHECK3-NEXT: [[IS_ACTIVE:%.*]] = icmp ne i8 [[TMP3]], 0 |
| // CHECK3-NEXT: br i1 [[IS_ACTIVE]], label [[DOTEXECUTE_PARALLEL:%.*]], label [[DOTBARRIER_PARALLEL:%.*]] |
| // CHECK3: .execute.parallel: |
| // CHECK3-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) |
| // CHECK3-NEXT: [[TMP5:%.*]] = load i8*, i8** [[WORK_FN]], align 8 |
| // CHECK3-NEXT: [[WORK_MATCH:%.*]] = icmp eq i8* [[TMP5]], bitcast (void (i16, i32)* @__omp_outlined__5_wrapper to i8*) |
| // CHECK3-NEXT: br i1 [[WORK_MATCH]], label [[DOTEXECUTE_FN:%.*]], label [[DOTCHECK_NEXT:%.*]] |
| // CHECK3: .execute.fn: |
| // CHECK3-NEXT: call void @__omp_outlined__5_wrapper(i16 0, i32 [[TMP4]]) #[[ATTR5]] |
| // CHECK3-NEXT: br label [[DOTTERMINATE_PARALLEL:%.*]] |
| // CHECK3: .check.next: |
| // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP2]] to void (i16, i32)* |
| // CHECK3-NEXT: call void [[TMP6]](i16 0, i32 [[TMP4]]) |
| // CHECK3-NEXT: br label [[DOTTERMINATE_PARALLEL]] |
| // CHECK3: .terminate.parallel: |
| // CHECK3-NEXT: call void @__kmpc_kernel_end_parallel() |
| // CHECK3-NEXT: br label [[DOTBARRIER_PARALLEL]] |
| // CHECK3: .barrier.parallel: |
| // CHECK3-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) |
| // CHECK3-NEXT: br label [[DOTAWAIT_WORK]] |
| // CHECK3: .exit: |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIdEvv_l19 |
| // CHECK3-SAME: () #[[ATTR0]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 |
| // CHECK3-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() |
| // CHECK3-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() |
| // CHECK3-NEXT: [[THREAD_LIMIT:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS]], [[NVPTX_WARP_SIZE]] |
| // CHECK3-NEXT: [[TMP0:%.*]] = icmp ult i32 [[NVPTX_TID]], [[THREAD_LIMIT]] |
| // CHECK3-NEXT: br i1 [[TMP0]], label [[DOTWORKER:%.*]], label [[DOTMASTERCHECK:%.*]] |
| // CHECK3: .worker: |
| // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z17complex_reductionIdEvv_l19_worker() #[[ATTR5]] |
| // CHECK3-NEXT: br label [[DOTEXIT:%.*]] |
| // CHECK3: .mastercheck: |
| // CHECK3-NEXT: [[NVPTX_TID1:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK3-NEXT: [[NVPTX_NUM_THREADS2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() |
| // CHECK3-NEXT: [[NVPTX_WARP_SIZE3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() |
| // CHECK3-NEXT: [[TMP1:%.*]] = sub nuw i32 [[NVPTX_WARP_SIZE3]], 1 |
| // CHECK3-NEXT: [[TMP2:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS2]], 1 |
| // CHECK3-NEXT: [[TMP3:%.*]] = xor i32 [[TMP1]], -1 |
| // CHECK3-NEXT: [[MASTER_TID:%.*]] = and i32 [[TMP2]], [[TMP3]] |
| // CHECK3-NEXT: [[TMP4:%.*]] = icmp eq i32 [[NVPTX_TID1]], [[MASTER_TID]] |
| // CHECK3-NEXT: br i1 [[TMP4]], label [[DOTMASTER:%.*]], label [[DOTEXIT]] |
| // CHECK3: .master: |
| // CHECK3-NEXT: [[NVPTX_NUM_THREADS4:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x() |
| // CHECK3-NEXT: [[NVPTX_WARP_SIZE5:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() |
| // CHECK3-NEXT: [[THREAD_LIMIT6:%.*]] = sub nuw i32 [[NVPTX_NUM_THREADS4]], [[NVPTX_WARP_SIZE5]] |
| // CHECK3-NEXT: call void @__kmpc_kernel_init(i32 [[THREAD_LIMIT6]], i16 1) |
| // CHECK3-NEXT: call void @__kmpc_data_sharing_init_stack() |
| // CHECK3-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) |
| // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR5]] |
| // CHECK3-NEXT: br label [[DOTTERMINATION_NOTIFIER:%.*]] |
| // CHECK3: .termination.notifier: |
| // CHECK3-NEXT: call void @__kmpc_kernel_deinit(i16 1) |
| // CHECK3-NEXT: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0) |
| // CHECK3-NEXT: br label [[DOTEXIT]] |
| // CHECK3: .exit: |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__2 |
| // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[IB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca double, align 8 |
| // CHECK3-NEXT: [[REF_TMP2:%.*]] = alloca double, align 8 |
| // CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8 |
| // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP0:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared3", align 2, !tbaa [[TBAA12]] |
| // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* @"_openmp_static_kernel$size4", align 8, !tbaa [[TBAA14]] |
| // CHECK3-NEXT: call void @__kmpc_get_team_static_memory(i16 0, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds (%"union._shared_openmp_static_memory_type_$_", %"union._shared_openmp_static_memory_type_$_" addrspace(3)* @"_openmp_shared_static_glob_rd_$_", i32 0, i32 0, i32 0) to i8*), i64 [[TMP1]], i16 [[TMP0]], i8** addrspacecast (i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr" to i8**)) |
| // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8* addrspace(3)* @"_openmp_kernel_static_glob_rd$ptr", align 8 |
| // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, i8* [[TMP2]], i64 0 |
| // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to %struct._globalized_locals_ty.0* |
| // CHECK3-NEXT: [[ISTART:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_0:%.*]], %struct._globalized_locals_ty.0* [[TMP4]], i32 0, i32 1 |
| // CHECK3-NEXT: [[IEND:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_0]], %struct._globalized_locals_ty.0* [[TMP4]], i32 0, i32 2 |
| // CHECK3-NEXT: [[PARTIAL_SUM:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_0]], %struct._globalized_locals_ty.0* [[TMP4]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP5]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP6]]) #[[ATTR5]] |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP7:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP7]]) #[[ATTR5]] |
| // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) #[[ATTR5]] |
| // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP9:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP9]]) #[[ATTR5]] |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i32* [[IB]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP10]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 99 |
| // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK3: cond.true: |
| // CHECK3-NEXT: br label [[COND_END:%.*]] |
| // CHECK3: cond.false: |
| // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: br label [[COND_END]] |
| // CHECK3: cond.end: |
| // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] |
| // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK3: omp.inner.for.cond: |
| // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] |
| // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] |
| // CHECK3: omp.inner.for.cond.cleanup: |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK3: omp.inner.for.body: |
| // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 |
| // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] |
| // CHECK3-NEXT: store i32 [[ADD]], i32* [[IB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP19:%.*]] = bitcast double* [[REF_TMP]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP19]]) #[[ATTR5]] |
| // CHECK3-NEXT: store double 0.000000e+00, double* [[REF_TMP]], align 8, !tbaa [[TBAA22:![0-9]+]] |
| // CHECK3-NEXT: [[TMP20:%.*]] = bitcast double* [[REF_TMP2]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP20]]) #[[ATTR5]] |
| // CHECK3-NEXT: store double 0.000000e+00, double* [[REF_TMP2]], align 8, !tbaa [[TBAA22]] |
| // CHECK3-NEXT: call void @_ZNSt7complexIdEC1ERKdS2_(%"class.std::complex.1"* nonnull dereferenceable(16) [[PARTIAL_SUM]], double* nonnull align 8 dereferenceable(8) [[REF_TMP]], double* nonnull align 8 dereferenceable(8) [[REF_TMP2]]) #[[ATTR8]] |
| // CHECK3-NEXT: [[TMP21:%.*]] = bitcast double* [[REF_TMP2]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP21]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP22:%.*]] = bitcast double* [[REF_TMP]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP22]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[IB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP23]], 4 |
| // CHECK3-NEXT: store i32 [[MUL3]], i32* [[ISTART]], align 8, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[IB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], 1 |
| // CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[ADD4]], 4 |
| // CHECK3-NEXT: store i32 [[MUL5]], i32* [[IEND]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 |
| // CHECK3-NEXT: [[TMP26:%.*]] = bitcast i32* [[ISTART]] to i8* |
| // CHECK3-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 |
| // CHECK3-NEXT: [[TMP28:%.*]] = bitcast i32* [[IEND]] to i8* |
| // CHECK3-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 |
| // CHECK3-NEXT: [[TMP30:%.*]] = bitcast %"class.std::complex.1"* [[PARTIAL_SUM]] to i8* |
| // CHECK3-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP31:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** |
| // CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32*, i32*, %"class.std::complex.1"*)* @__omp_outlined__5 to i8*), i8* bitcast (void (i16, i32)* @__omp_outlined__5_wrapper to i8*), i8** [[TMP31]], i64 3) |
| // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK3: omp.body.continue: |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK3: omp.inner.for.inc: |
| // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP32]], 1 |
| // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] |
| // CHECK3: omp.inner.for.end: |
| // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] |
| // CHECK3: omp.loop.exit: |
| // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) |
| // CHECK3-NEXT: [[TMP33:%.*]] = bitcast i32* [[IB]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP33]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP34:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP34]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP35:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP35]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP36:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP36]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP37:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP37]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP38:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP38]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP39:%.*]] = load i16, i16* @"_openmp_static_kernel$is_shared3", align 2, !tbaa [[TBAA12]] |
| // CHECK3-NEXT: call void @__kmpc_restore_team_static_memory(i16 0, i16 [[TMP39]]) |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@_ZNSt7complexIdEC1ERKdS2_ |
| // CHECK3-SAME: (%"class.std::complex.1"* nonnull dereferenceable(16) [[THIS:%.*]], double* nonnull align 8 dereferenceable(8) [[__RE:%.*]], double* nonnull align 8 dereferenceable(8) [[__IM:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK3-NEXT: [[__RE_ADDR:%.*]] = alloca double*, align 8 |
| // CHECK3-NEXT: [[__IM_ADDR:%.*]] = alloca double*, align 8 |
| // CHECK3-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store double* [[__RE]], double** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store double* [[__IM]], double** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[__RE_ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[__IM_ADDR]], align 8 |
| // CHECK3-NEXT: call void @_ZNSt7complexIdEC2ERKdS2_(%"class.std::complex.1"* nonnull dereferenceable(16) [[THIS1]], double* nonnull align 8 dereferenceable(8) [[TMP0]], double* nonnull align 8 dereferenceable(8) [[TMP1]]) #[[ATTR8]] |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__5 |
| // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[ISTART:%.*]], i32* nonnull align 4 dereferenceable(4) [[IEND:%.*]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[PARTIAL_SUM:%.*]]) #[[ATTR0]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[ISTART_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[IEND_ADDR:%.*]] = alloca i32*, align 8 |
| // CHECK3-NEXT: [[PARTIAL_SUM_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[PARTIAL_SUM5:%.*]] = alloca %"class.std::complex.1", align 8 |
| // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca double, align 8 |
| // CHECK3-NEXT: [[REF_TMP6:%.*]] = alloca double, align 8 |
| // CHECK3-NEXT: [[I7:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[REF_TMP14:%.*]] = alloca %"class.std::complex.1", align 8 |
| // CHECK3-NEXT: [[REF_TMP15:%.*]] = alloca double, align 8 |
| // CHECK3-NEXT: [[REF_TMP16:%.*]] = alloca double, align 8 |
| // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK3-NEXT: [[REF_TMP21:%.*]] = alloca %"class.std::complex.1", align 8 |
| // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store i32* [[ISTART]], i32** [[ISTART_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store i32* [[IEND]], i32** [[IEND_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store %"class.std::complex.1"* [[PARTIAL_SUM]], %"class.std::complex.1"** [[PARTIAL_SUM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ISTART_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[IEND_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP2:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[PARTIAL_SUM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP3]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_1]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP6]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP1]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_2]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP8]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[SUB:%.*]] = sub i32 [[TMP9]], [[TMP10]] |
| // CHECK3-NEXT: [[SUB3:%.*]] = sub i32 [[SUB]], 1 |
| // CHECK3-NEXT: [[ADD:%.*]] = add i32 [[SUB3]], 1 |
| // CHECK3-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1 |
| // CHECK3-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 1 |
| // CHECK3-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i32* [[I]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP11]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: store i32 [[TMP12]], i32* [[I]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i32* [[I]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP13]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP14]], [[TMP15]] |
| // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] |
| // CHECK3: omp.precond.then: |
| // CHECK3-NEXT: [[TMP16:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP16]]) #[[ATTR5]] |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP17]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP19]]) #[[ATTR5]] |
| // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP20:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP20]]) #[[ATTR5]] |
| // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP21:%.*]] = bitcast %"class.std::complex.1"* [[PARTIAL_SUM5]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* [[TMP21]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP22:%.*]] = bitcast double* [[REF_TMP]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP22]]) #[[ATTR5]] |
| // CHECK3-NEXT: store double 0.000000e+00, double* [[REF_TMP]], align 8, !tbaa [[TBAA22]] |
| // CHECK3-NEXT: [[TMP23:%.*]] = bitcast double* [[REF_TMP6]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP23]]) #[[ATTR5]] |
| // CHECK3-NEXT: store double 0.000000e+00, double* [[REF_TMP6]], align 8, !tbaa [[TBAA22]] |
| // CHECK3-NEXT: call void @_ZNSt7complexIdEC1ERKdS2_(%"class.std::complex.1"* nonnull dereferenceable(16) [[PARTIAL_SUM5]], double* nonnull align 8 dereferenceable(8) [[REF_TMP]], double* nonnull align 8 dereferenceable(8) [[REF_TMP6]]) #[[ATTR8]] |
| // CHECK3-NEXT: [[TMP24:%.*]] = bitcast double* [[REF_TMP6]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP24]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP25:%.*]] = bitcast double* [[REF_TMP]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP25]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP26:%.*]] = bitcast i32* [[I7]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP26]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB2]], i32 [[TMP28]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) |
| // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] |
| // CHECK3: omp.dispatch.cond: |
| // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[CMP8:%.*]] = icmp ugt i32 [[TMP29]], [[TMP30]] |
| // CHECK3-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] |
| // CHECK3: cond.true: |
| // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: br label [[COND_END:%.*]] |
| // CHECK3: cond.false: |
| // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: br label [[COND_END]] |
| // CHECK3: cond.end: |
| // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE]] ], [ [[TMP32]], [[COND_FALSE]] ] |
| // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[ADD9:%.*]] = add i32 [[TMP35]], 1 |
| // CHECK3-NEXT: [[CMP10:%.*]] = icmp ult i32 [[TMP34]], [[ADD9]] |
| // CHECK3-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_CLEANUP:%.*]] |
| // CHECK3: omp.dispatch.cleanup: |
| // CHECK3-NEXT: br label [[OMP_DISPATCH_END:%.*]] |
| // CHECK3: omp.dispatch.body: |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] |
| // CHECK3: omp.inner.for.cond: |
| // CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[ADD11:%.*]] = add i32 [[TMP37]], 1 |
| // CHECK3-NEXT: [[CMP12:%.*]] = icmp ult i32 [[TMP36]], [[ADD11]] |
| // CHECK3-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] |
| // CHECK3: omp.inner.for.cond.cleanup: |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_END:%.*]] |
| // CHECK3: omp.inner.for.body: |
| // CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[MUL:%.*]] = mul i32 [[TMP39]], 1 |
| // CHECK3-NEXT: [[ADD13:%.*]] = add i32 [[TMP38]], [[MUL]] |
| // CHECK3-NEXT: store i32 [[ADD13]], i32* [[I7]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP40:%.*]] = bitcast %"class.std::complex.1"* [[REF_TMP14]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* [[TMP40]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP41:%.*]] = bitcast double* [[REF_TMP15]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP41]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP42:%.*]] = load i32, i32* [[I7]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP42]] to double |
| // CHECK3-NEXT: store double [[CONV]], double* [[REF_TMP15]], align 8, !tbaa [[TBAA22]] |
| // CHECK3-NEXT: [[TMP43:%.*]] = bitcast double* [[REF_TMP16]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[TMP43]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP44:%.*]] = load i32, i32* [[I7]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[CONV17:%.*]] = sitofp i32 [[TMP44]] to double |
| // CHECK3-NEXT: store double [[CONV17]], double* [[REF_TMP16]], align 8, !tbaa [[TBAA22]] |
| // CHECK3-NEXT: call void @_ZNSt7complexIdEC1ERKdS2_(%"class.std::complex.1"* nonnull dereferenceable(16) [[REF_TMP14]], double* nonnull align 8 dereferenceable(8) [[REF_TMP15]], double* nonnull align 8 dereferenceable(8) [[REF_TMP16]]) #[[ATTR8]] |
| // CHECK3-NEXT: [[CALL:%.*]] = call nonnull align 8 dereferenceable(16) %"class.std::complex.1"* @_ZNSt7complexIdEpLIdEERS0_RKS_IT_E(%"class.std::complex.1"* nonnull dereferenceable(16) [[PARTIAL_SUM5]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[REF_TMP14]]) #[[ATTR8]] |
| // CHECK3-NEXT: [[TMP45:%.*]] = bitcast double* [[REF_TMP16]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP45]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP46:%.*]] = bitcast double* [[REF_TMP15]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[TMP46]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP47:%.*]] = bitcast %"class.std::complex.1"* [[REF_TMP14]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* [[TMP47]]) #[[ATTR5]] |
| // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] |
| // CHECK3: omp.body.continue: |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] |
| // CHECK3: omp.inner.for.inc: |
| // CHECK3-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[ADD18:%.*]] = add i32 [[TMP48]], 1 |
| // CHECK3-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] |
| // CHECK3: omp.inner.for.end: |
| // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] |
| // CHECK3: omp.dispatch.inc: |
| // CHECK3-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[ADD19:%.*]] = add i32 [[TMP49]], [[TMP50]] |
| // CHECK3-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[ADD20:%.*]] = add i32 [[TMP51]], [[TMP52]] |
| // CHECK3-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] |
| // CHECK3: omp.dispatch.end: |
| // CHECK3-NEXT: [[TMP53:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP54:%.*]] = load i32, i32* [[TMP53]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP54]]) |
| // CHECK3-NEXT: [[TMP55:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP56:%.*]] = load i32, i32* [[TMP55]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP57:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 |
| // CHECK3-NEXT: [[TMP58:%.*]] = bitcast %"class.std::complex.1"* [[PARTIAL_SUM5]] to i8* |
| // CHECK3-NEXT: store i8* [[TMP58]], i8** [[TMP57]], align 8 |
| // CHECK3-NEXT: [[TMP59:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* |
| // CHECK3-NEXT: [[TMP60:%.*]] = call i32 @__kmpc_nvptx_parallel_reduce_nowait_v2(%struct.ident_t* @[[GLOB3]], i32 [[TMP56]], i32 1, i64 8, i8* [[TMP59]], void (i8*, i16, i16, i16)* @_omp_reduction_shuffle_and_reduce_func7, void (i8*, i32)* @_omp_reduction_inter_warp_copy_func8) |
| // CHECK3-NEXT: [[TMP61:%.*]] = icmp eq i32 [[TMP60]], 1 |
| // CHECK3-NEXT: br i1 [[TMP61]], label [[DOTOMP_REDUCTION_THEN:%.*]], label [[DOTOMP_REDUCTION_DONE:%.*]] |
| // CHECK3: .omp.reduction.then: |
| // CHECK3-NEXT: [[TMP62:%.*]] = bitcast %"class.std::complex.1"* [[REF_TMP21]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* [[TMP62]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[CALL22:%.*]] = call %"class.std::complex.1" @_ZStplIdESt7complexIT_ERKS2_S4_(%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[TMP2]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[PARTIAL_SUM5]]) #[[ATTR8]] |
| // CHECK3-NEXT: [[TMP63:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[REF_TMP21]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP64:%.*]] = extractvalue %"class.std::complex.1" [[CALL22]], 0 |
| // CHECK3-NEXT: store double [[TMP64]], double* [[TMP63]], align 8 |
| // CHECK3-NEXT: [[TMP65:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[REF_TMP21]], i32 0, i32 1 |
| // CHECK3-NEXT: [[TMP66:%.*]] = extractvalue %"class.std::complex.1" [[CALL22]], 1 |
| // CHECK3-NEXT: store double [[TMP66]], double* [[TMP65]], align 8 |
| // CHECK3-NEXT: [[TMP67:%.*]] = bitcast %"class.std::complex.1"* [[TMP2]] to i8* |
| // CHECK3-NEXT: [[TMP68:%.*]] = bitcast %"class.std::complex.1"* [[REF_TMP21]] to i8* |
| // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP67]], i8* align 8 [[TMP68]], i64 16, i1 false), !tbaa.struct !24 |
| // CHECK3-NEXT: [[TMP69:%.*]] = bitcast %"class.std::complex.1"* [[REF_TMP21]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* [[TMP69]]) #[[ATTR5]] |
| // CHECK3-NEXT: call void @__kmpc_nvptx_end_reduce_nowait(i32 [[TMP56]]) |
| // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DONE]] |
| // CHECK3: .omp.reduction.done: |
| // CHECK3-NEXT: [[TMP70:%.*]] = bitcast i32* [[I7]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP70]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP71:%.*]] = bitcast %"class.std::complex.1"* [[PARTIAL_SUM5]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* [[TMP71]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP72:%.*]] = bitcast i32* [[DOTOMP_IS_LAST]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP72]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP73:%.*]] = bitcast i32* [[DOTOMP_STRIDE]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP73]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP74:%.*]] = bitcast i32* [[DOTOMP_UB]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP74]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP75:%.*]] = bitcast i32* [[DOTOMP_LB]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP75]]) #[[ATTR5]] |
| // CHECK3-NEXT: br label [[OMP_PRECOND_END]] |
| // CHECK3: omp.precond.end: |
| // CHECK3-NEXT: [[TMP76:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_2]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP76]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP77:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_1]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP77]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP78:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR_]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP78]]) #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP79:%.*]] = bitcast i32* [[DOTOMP_IV]] to i8* |
| // CHECK3-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP79]]) #[[ATTR5]] |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@_ZNSt7complexIdEpLIdEERS0_RKS_IT_E |
| // CHECK3-SAME: (%"class.std::complex.1"* nonnull dereferenceable(16) [[THIS:%.*]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[__C:%.*]]) #[[ATTR4]] comdat align 2 { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK3-NEXT: [[__C_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK3-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store %"class.std::complex.1"* [[__C]], %"class.std::complex.1"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[CALL:%.*]] = call double @_ZNKSt7complexIdE4realEv(%"class.std::complex.1"* nonnull dereferenceable(16) [[TMP0]]) #[[ATTR8]] |
| // CHECK3-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP1:%.*]] = load double, double* [[__RE_]], align 8, !tbaa [[TBAA25:![0-9]+]] |
| // CHECK3-NEXT: [[ADD:%.*]] = fadd double [[TMP1]], [[CALL]] |
| // CHECK3-NEXT: store double [[ADD]], double* [[__RE_]], align 8, !tbaa [[TBAA25]] |
| // CHECK3-NEXT: [[TMP2:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[__C_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[CALL2:%.*]] = call double @_ZNKSt7complexIdE4imagEv(%"class.std::complex.1"* nonnull dereferenceable(16) [[TMP2]]) #[[ATTR8]] |
| // CHECK3-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 1 |
| // CHECK3-NEXT: [[TMP3:%.*]] = load double, double* [[__IM_]], align 8, !tbaa [[TBAA27:![0-9]+]] |
| // CHECK3-NEXT: [[ADD3:%.*]] = fadd double [[TMP3]], [[CALL2]] |
| // CHECK3-NEXT: store double [[ADD3]], double* [[__IM_]], align 8, !tbaa [[TBAA27]] |
| // CHECK3-NEXT: ret %"class.std::complex.1"* [[THIS1]] |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@_ZStplIdESt7complexIT_ERKS2_S4_ |
| // CHECK3-SAME: (%"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[__X:%.*]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[__Y:%.*]]) #[[ATTR6]] comdat { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[RETVAL:%.*]] = alloca %"class.std::complex.1", align 8 |
| // CHECK3-NEXT: [[__T2:%.*]] = alloca %"class.std::complex.1", align 8 |
| // CHECK3-NEXT: [[__X_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK3-NEXT: [[__Y_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB5]]) |
| // CHECK3-NEXT: [[TMP1:%.*]] = call i16 @__kmpc_parallel_level(%struct.ident_t* @[[GLOB5]], i32 [[TMP0]]) |
| // CHECK3-NEXT: [[TMP2:%.*]] = icmp eq i16 [[TMP1]], 0 |
| // CHECK3-NEXT: [[TMP3:%.*]] = call i8 @__kmpc_is_spmd_exec_mode() #[[ATTR5]] |
| // CHECK3-NEXT: [[TMP4:%.*]] = icmp ne i8 [[TMP3]], 0 |
| // CHECK3-NEXT: br i1 [[TMP4]], label [[DOTSPMD:%.*]], label [[DOTNON_SPMD:%.*]] |
| // CHECK3: .spmd: |
| // CHECK3-NEXT: br label [[DOTEXIT:%.*]] |
| // CHECK3: .non-spmd: |
| // CHECK3-NEXT: [[TMP5:%.*]] = select i1 [[TMP2]], i64 16, i64 512 |
| // CHECK3-NEXT: [[TMP6:%.*]] = call i8* @__kmpc_data_sharing_coalesced_push_stack(i64 [[TMP5]], i16 0) |
| // CHECK3-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to %struct._globalized_locals_ty.4* |
| // CHECK3-NEXT: br label [[DOTEXIT]] |
| // CHECK3: .exit: |
| // CHECK3-NEXT: [[_SELECT_STACK:%.*]] = phi %struct._globalized_locals_ty.4* [ null, [[DOTSPMD]] ], [ [[TMP7]], [[DOTNON_SPMD]] ] |
| // CHECK3-NEXT: [[TMP8:%.*]] = bitcast %struct._globalized_locals_ty.4* [[_SELECT_STACK]] to %struct._globalized_locals_ty.5* |
| // CHECK3-NEXT: [[__T:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_4:%.*]], %struct._globalized_locals_ty.4* [[_SELECT_STACK]], i32 0, i32 0 |
| // CHECK3-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK3-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID]], 31 |
| // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [32 x %"class.std::complex.1"], [32 x %"class.std::complex.1"]* [[__T]], i32 0, i32 [[NVPTX_LANE_ID]] |
| // CHECK3-NEXT: [[__T1:%.*]] = getelementptr inbounds [[STRUCT__GLOBALIZED_LOCALS_TY_5:%.*]], %struct._globalized_locals_ty.5* [[TMP8]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP10:%.*]] = select i1 [[TMP2]], %"class.std::complex.1"* [[__T1]], %"class.std::complex.1"* [[TMP9]] |
| // CHECK3-NEXT: [[TMP11:%.*]] = select i1 [[TMP4]], %"class.std::complex.1"* [[__T2]], %"class.std::complex.1"* [[TMP10]] |
| // CHECK3-NEXT: store %"class.std::complex.1"* [[__X]], %"class.std::complex.1"** [[__X_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store %"class.std::complex.1"* [[__Y]], %"class.std::complex.1"** [[__Y_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP12:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[__X_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP13:%.*]] = bitcast %"class.std::complex.1"* [[TMP11]] to i8* |
| // CHECK3-NEXT: [[TMP14:%.*]] = bitcast %"class.std::complex.1"* [[TMP12]] to i8* |
| // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP13]], i8* align 8 [[TMP14]], i64 16, i1 false), !tbaa.struct !24 |
| // CHECK3-NEXT: [[TMP15:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[__Y_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[CALL:%.*]] = call nonnull align 8 dereferenceable(16) %"class.std::complex.1"* @_ZNSt7complexIdEpLIdEERS0_RKS_IT_E(%"class.std::complex.1"* nonnull dereferenceable(16) [[TMP11]], %"class.std::complex.1"* nonnull align 8 dereferenceable(16) [[TMP15]]) #[[ATTR8]] |
| // CHECK3-NEXT: [[TMP16:%.*]] = bitcast %"class.std::complex.1"* [[RETVAL]] to i8* |
| // CHECK3-NEXT: [[TMP17:%.*]] = bitcast %"class.std::complex.1"* [[TMP11]] to i8* |
| // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP16]], i8* align 8 [[TMP17]], i64 16, i1 false), !tbaa.struct !24 |
| // CHECK3-NEXT: br i1 [[TMP4]], label [[DOTEXIT4:%.*]], label [[DOTNON_SPMD3:%.*]] |
| // CHECK3: .non-spmd3: |
| // CHECK3-NEXT: [[TMP18:%.*]] = bitcast %struct._globalized_locals_ty.4* [[_SELECT_STACK]] to i8* |
| // CHECK3-NEXT: call void @__kmpc_data_sharing_pop_stack(i8* [[TMP18]]) |
| // CHECK3-NEXT: br label [[DOTEXIT4]] |
| // CHECK3: .exit4: |
| // CHECK3-NEXT: [[TMP19:%.*]] = load %"class.std::complex.1", %"class.std::complex.1"* [[RETVAL]], align 8 |
| // CHECK3-NEXT: ret %"class.std::complex.1" [[TMP19]] |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@_omp_reduction_shuffle_and_reduce_func7 |
| // CHECK3-SAME: (i8* [[TMP0:%.*]], i16 signext [[TMP1:%.*]], i16 signext [[TMP2:%.*]], i16 signext [[TMP3:%.*]]) #[[ATTR0]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 |
| // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i16, align 2 |
| // CHECK3-NEXT: [[DOTADDR2:%.*]] = alloca i16, align 2 |
| // CHECK3-NEXT: [[DOTADDR3:%.*]] = alloca i16, align 2 |
| // CHECK3-NEXT: [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST:%.*]] = alloca [1 x i8*], align 8 |
| // CHECK3-NEXT: [[DOTOMP_REDUCTION_ELEMENT:%.*]] = alloca %"class.std::complex.1", align 8 |
| // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store i16 [[TMP1]], i16* [[DOTADDR1]], align 2, !tbaa [[TBAA12]] |
| // CHECK3-NEXT: store i16 [[TMP2]], i16* [[DOTADDR2]], align 2, !tbaa [[TBAA12]] |
| // CHECK3-NEXT: store i16 [[TMP3]], i16* [[DOTADDR3]], align 2, !tbaa [[TBAA12]] |
| // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* |
| // CHECK3-NEXT: [[TMP6:%.*]] = load i16, i16* [[DOTADDR1]], align 2, !tbaa [[TBAA12]] |
| // CHECK3-NEXT: [[TMP7:%.*]] = load i16, i16* [[DOTADDR2]], align 2, !tbaa [[TBAA12]] |
| // CHECK3-NEXT: [[TMP8:%.*]] = load i16, i16* [[DOTADDR3]], align 2, !tbaa [[TBAA12]] |
| // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 |
| // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 |
| // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 |
| // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP10]] to %"class.std::complex.1"* |
| // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr %"class.std::complex.1", %"class.std::complex.1"* [[TMP12]], i64 1 |
| // CHECK3-NEXT: [[TMP14:%.*]] = bitcast %"class.std::complex.1"* [[TMP13]] to i8* |
| // CHECK3-NEXT: [[TMP15:%.*]] = bitcast %"class.std::complex.1"* [[TMP12]] to i64* |
| // CHECK3-NEXT: [[TMP16:%.*]] = bitcast %"class.std::complex.1"* [[DOTOMP_REDUCTION_ELEMENT]] to i64* |
| // CHECK3-NEXT: br label [[DOTSHUFFLE_PRE_COND:%.*]] |
| // CHECK3: .shuffle.pre_cond: |
| // CHECK3-NEXT: [[TMP17:%.*]] = phi i64* [ [[TMP15]], [[ENTRY:%.*]] ], [ [[TMP28:%.*]], [[DOTSHUFFLE_THEN:%.*]] ] |
| // CHECK3-NEXT: [[TMP18:%.*]] = phi i64* [ [[TMP16]], [[ENTRY]] ], [ [[TMP29:%.*]], [[DOTSHUFFLE_THEN]] ] |
| // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i64* [[TMP17]] to i8* |
| // CHECK3-NEXT: [[TMP20:%.*]] = ptrtoint i8* [[TMP14]] to i64 |
| // CHECK3-NEXT: [[TMP21:%.*]] = ptrtoint i8* [[TMP19]] to i64 |
| // CHECK3-NEXT: [[TMP22:%.*]] = sub i64 [[TMP20]], [[TMP21]] |
| // CHECK3-NEXT: [[TMP23:%.*]] = sdiv exact i64 [[TMP22]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64) |
| // CHECK3-NEXT: [[TMP24:%.*]] = icmp sgt i64 [[TMP23]], 7 |
| // CHECK3-NEXT: br i1 [[TMP24]], label [[DOTSHUFFLE_THEN]], label [[DOTSHUFFLE_EXIT:%.*]] |
| // CHECK3: .shuffle.then: |
| // CHECK3-NEXT: [[TMP25:%.*]] = load i64, i64* [[TMP17]], align 8 |
| // CHECK3-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize() |
| // CHECK3-NEXT: [[TMP26:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16 |
| // CHECK3-NEXT: [[TMP27:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP25]], i16 [[TMP7]], i16 [[TMP26]]) |
| // CHECK3-NEXT: store i64 [[TMP27]], i64* [[TMP18]], align 8 |
| // CHECK3-NEXT: [[TMP28]] = getelementptr i64, i64* [[TMP17]], i64 1 |
| // CHECK3-NEXT: [[TMP29]] = getelementptr i64, i64* [[TMP18]], i64 1 |
| // CHECK3-NEXT: br label [[DOTSHUFFLE_PRE_COND]] |
| // CHECK3: .shuffle.exit: |
| // CHECK3-NEXT: [[TMP30:%.*]] = bitcast %"class.std::complex.1"* [[DOTOMP_REDUCTION_ELEMENT]] to i8* |
| // CHECK3-NEXT: store i8* [[TMP30]], i8** [[TMP11]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP31:%.*]] = icmp eq i16 [[TMP8]], 0 |
| // CHECK3-NEXT: [[TMP32:%.*]] = icmp eq i16 [[TMP8]], 1 |
| // CHECK3-NEXT: [[TMP33:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]] |
| // CHECK3-NEXT: [[TMP34:%.*]] = and i1 [[TMP32]], [[TMP33]] |
| // CHECK3-NEXT: [[TMP35:%.*]] = icmp eq i16 [[TMP8]], 2 |
| // CHECK3-NEXT: [[TMP36:%.*]] = and i16 [[TMP6]], 1 |
| // CHECK3-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP36]], 0 |
| // CHECK3-NEXT: [[TMP38:%.*]] = and i1 [[TMP35]], [[TMP37]] |
| // CHECK3-NEXT: [[TMP39:%.*]] = icmp sgt i16 [[TMP7]], 0 |
| // CHECK3-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]] |
| // CHECK3-NEXT: [[TMP41:%.*]] = or i1 [[TMP31]], [[TMP34]] |
| // CHECK3-NEXT: [[TMP42:%.*]] = or i1 [[TMP41]], [[TMP40]] |
| // CHECK3-NEXT: br i1 [[TMP42]], label [[THEN:%.*]], label [[ELSE:%.*]] |
| // CHECK3: then: |
| // CHECK3-NEXT: [[TMP43:%.*]] = bitcast [1 x i8*]* [[TMP5]] to i8* |
| // CHECK3-NEXT: [[TMP44:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8* |
| // CHECK3-NEXT: call void @"_omp$reduction$reduction_func6"(i8* [[TMP43]], i8* [[TMP44]]) #[[ATTR5]] |
| // CHECK3-NEXT: br label [[IFCONT:%.*]] |
| // CHECK3: else: |
| // CHECK3-NEXT: br label [[IFCONT]] |
| // CHECK3: ifcont: |
| // CHECK3-NEXT: [[TMP45:%.*]] = icmp eq i16 [[TMP8]], 1 |
| // CHECK3-NEXT: [[TMP46:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]] |
| // CHECK3-NEXT: [[TMP47:%.*]] = and i1 [[TMP45]], [[TMP46]] |
| // CHECK3-NEXT: br i1 [[TMP47]], label [[THEN4:%.*]], label [[ELSE5:%.*]] |
| // CHECK3: then4: |
| // CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0 |
| // CHECK3-NEXT: [[TMP49:%.*]] = load i8*, i8** [[TMP48]], align 8 |
| // CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 |
| // CHECK3-NEXT: [[TMP51:%.*]] = load i8*, i8** [[TMP50]], align 8 |
| // CHECK3-NEXT: [[TMP52:%.*]] = bitcast i8* [[TMP49]] to %"class.std::complex.1"* |
| // CHECK3-NEXT: [[TMP53:%.*]] = bitcast i8* [[TMP51]] to %"class.std::complex.1"* |
| // CHECK3-NEXT: [[TMP54:%.*]] = bitcast %"class.std::complex.1"* [[TMP53]] to i8* |
| // CHECK3-NEXT: [[TMP55:%.*]] = bitcast %"class.std::complex.1"* [[TMP52]] to i8* |
| // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP54]], i8* align 8 [[TMP55]], i64 16, i1 false), !tbaa.struct !24 |
| // CHECK3-NEXT: br label [[IFCONT6:%.*]] |
| // CHECK3: else5: |
| // CHECK3-NEXT: br label [[IFCONT6]] |
| // CHECK3: ifcont6: |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@_omp_reduction_inter_warp_copy_func8 |
| // CHECK3-SAME: (i8* [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 |
| // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTCNT_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]]) |
| // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK3-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK3-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31 |
| // CHECK3-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x() |
| // CHECK3-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5 |
| // CHECK3-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8 |
| // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [1 x i8*]* |
| // CHECK3-NEXT: store i32 0, i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: br label [[PRECOND:%.*]] |
| // CHECK3: precond: |
| // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[TMP6:%.*]] = icmp ult i32 [[TMP5]], 4 |
| // CHECK3-NEXT: br i1 [[TMP6]], label [[BODY:%.*]], label [[EXIT:%.*]] |
| // CHECK3: body: |
| // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]]) |
| // CHECK3-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0 |
| // CHECK3-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]] |
| // CHECK3: then: |
| // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0 |
| // CHECK3-NEXT: [[TMP8:%.*]] = load i8*, i8** [[TMP7]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i32* |
| // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr i32, i32* [[TMP9]], i32 [[TMP5]] |
| // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]] |
| // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]], align 4 |
| // CHECK3-NEXT: store volatile i32 [[TMP12]], i32 addrspace(3)* [[TMP11]], align 4 |
| // CHECK3-NEXT: br label [[IFCONT:%.*]] |
| // CHECK3: else: |
| // CHECK3-NEXT: br label [[IFCONT]] |
| // CHECK3: ifcont: |
| // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]]) |
| // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP13]] |
| // CHECK3-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]] |
| // CHECK3: then4: |
| // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]] |
| // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0 |
| // CHECK3-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* |
| // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr i32, i32* [[TMP17]], i32 [[TMP5]] |
| // CHECK3-NEXT: [[TMP19:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: store i32 [[TMP19]], i32* [[TMP18]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: br label [[IFCONT6:%.*]] |
| // CHECK3: else5: |
| // CHECK3-NEXT: br label [[IFCONT6]] |
| // CHECK3: ifcont6: |
| // CHECK3-NEXT: [[TMP20:%.*]] = add nsw i32 [[TMP5]], 1 |
| // CHECK3-NEXT: store i32 [[TMP20]], i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: br label [[PRECOND]] |
| // CHECK3: exit: |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__5_wrapper |
| // CHECK3-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2 |
| // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK3-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 |
| // CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 |
| // CHECK3-NEXT: store i16 [[TMP0]], i16* [[DOTADDR]], align 2, !tbaa [[TBAA12]] |
| // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA6]] |
| // CHECK3-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) |
| // CHECK3-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8 |
| // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 0 |
| // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32** |
| // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP4]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 1 |
| // CHECK3-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32** |
| // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[TMP7]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 2 |
| // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %"class.std::complex.1"** |
| // CHECK3-NEXT: [[TMP11:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[TMP10]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: call void @__omp_outlined__5(i32* [[DOTADDR1]], i32* [[DOTZERO_ADDR]], i32* [[TMP5]], i32* [[TMP8]], %"class.std::complex.1"* [[TMP11]]) #[[ATTR5]] |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@_ZNSt7complexIfEC2ERKfS2_ |
| // CHECK3-SAME: (%"class.std::complex"* nonnull dereferenceable(8) [[THIS:%.*]], float* nonnull align 4 dereferenceable(4) [[__RE:%.*]], float* nonnull align 4 dereferenceable(4) [[__IM:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK3-NEXT: [[__RE_ADDR:%.*]] = alloca float*, align 8 |
| // CHECK3-NEXT: [[__IM_ADDR:%.*]] = alloca float*, align 8 |
| // CHECK3-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store float* [[__RE]], float** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store float* [[__IM]], float** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load float*, float** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP1:%.*]] = load float, float* [[TMP0]], align 4, !tbaa [[TBAA16]] |
| // CHECK3-NEXT: store float [[TMP1]], float* [[__RE_]], align 4, !tbaa [[TBAA19]] |
| // CHECK3-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 1 |
| // CHECK3-NEXT: [[TMP2:%.*]] = load float*, float** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP3:%.*]] = load float, float* [[TMP2]], align 4, !tbaa [[TBAA16]] |
| // CHECK3-NEXT: store float [[TMP3]], float* [[__IM_]], align 4, !tbaa [[TBAA21]] |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@_ZNKSt7complexIfE4realEv |
| // CHECK3-SAME: (%"class.std::complex"* nonnull dereferenceable(8) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK3-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load float, float* [[__RE_]], align 4, !tbaa [[TBAA19]] |
| // CHECK3-NEXT: ret float [[TMP0]] |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@_ZNKSt7complexIfE4imagEv |
| // CHECK3-SAME: (%"class.std::complex"* nonnull dereferenceable(8) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex"*, align 8 |
| // CHECK3-NEXT: store %"class.std::complex"* [[THIS]], %"class.std::complex"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[THIS1:%.*]] = load %"class.std::complex"*, %"class.std::complex"** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex", %"class.std::complex"* [[THIS1]], i32 0, i32 1 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load float, float* [[__IM_]], align 4, !tbaa [[TBAA21]] |
| // CHECK3-NEXT: ret float [[TMP0]] |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@_ZNSt7complexIdEC2ERKdS2_ |
| // CHECK3-SAME: (%"class.std::complex.1"* nonnull dereferenceable(16) [[THIS:%.*]], double* nonnull align 8 dereferenceable(8) [[__RE:%.*]], double* nonnull align 8 dereferenceable(8) [[__IM:%.*]]) unnamed_addr #[[ATTR3]] comdat align 2 { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK3-NEXT: [[__RE_ADDR:%.*]] = alloca double*, align 8 |
| // CHECK3-NEXT: [[__IM_ADDR:%.*]] = alloca double*, align 8 |
| // CHECK3-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store double* [[__RE]], double** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: store double* [[__IM]], double** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[__RE_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP1:%.*]] = load double, double* [[TMP0]], align 8, !tbaa [[TBAA22]] |
| // CHECK3-NEXT: store double [[TMP1]], double* [[__RE_]], align 8, !tbaa [[TBAA25]] |
| // CHECK3-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 1 |
| // CHECK3-NEXT: [[TMP2:%.*]] = load double*, double** [[__IM_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[TMP3:%.*]] = load double, double* [[TMP2]], align 8, !tbaa [[TBAA22]] |
| // CHECK3-NEXT: store double [[TMP3]], double* [[__IM_]], align 8, !tbaa [[TBAA27]] |
| // CHECK3-NEXT: ret void |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@_ZNKSt7complexIdE4realEv |
| // CHECK3-SAME: (%"class.std::complex.1"* nonnull dereferenceable(16) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK3-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[__RE_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 0 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load double, double* [[__RE_]], align 8, !tbaa [[TBAA25]] |
| // CHECK3-NEXT: ret double [[TMP0]] |
| // |
| // |
| // CHECK3-LABEL: define {{[^@]+}}@_ZNKSt7complexIdE4imagEv |
| // CHECK3-SAME: (%"class.std::complex.1"* nonnull dereferenceable(16) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 { |
| // CHECK3-NEXT: entry: |
| // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %"class.std::complex.1"*, align 8 |
| // CHECK3-NEXT: store %"class.std::complex.1"* [[THIS]], %"class.std::complex.1"** [[THIS_ADDR]], align 8, !tbaa [[TBAA10]] |
| // CHECK3-NEXT: [[THIS1:%.*]] = load %"class.std::complex.1"*, %"class.std::complex.1"** [[THIS_ADDR]], align 8 |
| // CHECK3-NEXT: [[__IM_:%.*]] = getelementptr inbounds %"class.std::complex.1", %"class.std::complex.1"* [[THIS1]], i32 0, i32 1 |
| // CHECK3-NEXT: [[TMP0:%.*]] = load double, double* [[__IM_]], align 8, !tbaa [[TBAA27]] |
| // CHECK3-NEXT: ret double [[TMP0]] |
| // |