[AArch64] Drop poison-generating flags in `genSubAdd2SubSub` combiner
A miscompilation issue has been addressed with improved handling.
Fixes: https://github.com/llvm/llvm-project/issues/88950.
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
index 7bf06e7..55fecc4 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -6924,19 +6924,26 @@
assert((Opcode == AArch64::SUBWrr || Opcode == AArch64::SUBXrr) &&
"Unexpected instruction opcode.");
+ uint32_t Flags = Root.mergeFlagsWith(*AddMI);
+ Flags &= ~MachineInstr::NoSWrap;
+ Flags &= ~MachineInstr::NoUWrap;
+
MachineInstrBuilder MIB1 =
BuildMI(MF, MIMetadata(Root), TII->get(Opcode), NewVR)
.addReg(RegA, getKillRegState(RegAIsKill))
- .addReg(RegB, getKillRegState(RegBIsKill));
+ .addReg(RegB, getKillRegState(RegBIsKill))
+ .setMIFlags(Flags);
MachineInstrBuilder MIB2 =
BuildMI(MF, MIMetadata(Root), TII->get(Opcode), ResultReg)
.addReg(NewVR, getKillRegState(true))
- .addReg(RegC, getKillRegState(RegCIsKill));
+ .addReg(RegC, getKillRegState(RegCIsKill))
+ .setMIFlags(Flags);
InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0));
InsInstrs.push_back(MIB1);
InsInstrs.push_back(MIB2);
DelInstrs.push_back(AddMI);
+ DelInstrs.push_back(&Root);
}
/// When getMachineCombinerPatterns() finds potential patterns,
@@ -6966,13 +6973,13 @@
// ==> (A - B) - C
genSubAdd2SubSub(MF, MRI, TII, Root, InsInstrs, DelInstrs, 1,
InstrIdxForVirtReg);
- break;
+ return;
case AArch64MachineCombinerPattern::SUBADD_OP2:
// A - (B + C)
// ==> (A - C) - B
genSubAdd2SubSub(MF, MRI, TII, Root, InsInstrs, DelInstrs, 2,
InstrIdxForVirtReg);
- break;
+ return;
case AArch64MachineCombinerPattern::MULADDW_OP1:
case AArch64MachineCombinerPattern::MULADDX_OP1:
// MUL I=A,B,0
diff --git a/llvm/test/CodeGen/AArch64/machine-combiner-subadd2.mir b/llvm/test/CodeGen/AArch64/machine-combiner-subadd2.mir
index d1770bb..0b09e8a 100644
--- a/llvm/test/CodeGen/AArch64/machine-combiner-subadd2.mir
+++ b/llvm/test/CodeGen/AArch64/machine-combiner-subadd2.mir
@@ -237,3 +237,30 @@
RET_ReallyLR implicit $w0
...
+---
+# Drop nowrap flags in SUB
+
+# CHECK-LABEL: name: test8
+# CHECK: %7:gpr64 = SUBXrr %1, %0
+# CHECK-NEXT: %4:gpr64common = SUBXrr killed %7, killed %2
+
+name: test8
+registers:
+ - { id: 0, class: gpr64 }
+ - { id: 1, class: gpr64 }
+ - { id: 2, class: gpr64common }
+ - { id: 3, class: gpr64 }
+ - { id: 4, class: gpr64common }
+ - { id: 5, class: gpr64 }
+body: |
+ bb.0:
+ %1:gpr64 = COPY $x1
+ %0:gpr64 = COPY $x0
+ %2:gpr64common = ORRXri %0:gpr64, 4096
+ %3:gpr64 = ADDXrr killed %2:gpr64common, %0:gpr64
+ %4:gpr64common = nsw SUBSXrr %1:gpr64, killed %3:gpr64, implicit-def dead $nzcv
+ %5:gpr64 = SUBSXri %4:gpr64common, 0, 0, implicit-def $nzcv
+ $x0 = COPY %5:gpr64
+ RET_ReallyLR implicit $x0
+
+...
