llvm/test/Transforms/PhaseOrdering/switch_with_geps.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
; RUN: opt -S -passes='default<O1>' < %s | FileCheck %s
; RUN: opt -S -passes='default<O2>' < %s | FileCheck %s
; RUN: opt -S -passes='default<O3>' < %s | FileCheck %s

target datalayout = "n64"

%"OpKind::Zero" = type { [1 x i32], i32 }
%"OpKind::One" = type { [1 x i32], i32, i16, [1 x i16] }
%"OpKind::Two" = type { [1 x i32], i32, i16, i16 }
%"OpKind::Three" = type { [1 x i32], i32, i16, i16, i16, [1 x i16] }

; FIXME: The switch should be optimized away.
define i32 @test(ptr %ptr) {
; CHECK-LABEL: define i32 @test(
; CHECK-SAME: ptr nocapture readonly [[PTR:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
; CHECK-NEXT:  start:
; CHECK-NEXT:    [[T:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT:    switch i32 [[T]], label [[DEFAULT:%.*]] [
; CHECK-NEXT:      i32 0, label [[BB4:%.*]]
; CHECK-NEXT:      i32 1, label [[BB5:%.*]]
; CHECK-NEXT:      i32 2, label [[BB6:%.*]]
; CHECK-NEXT:      i32 3, label [[BB7:%.*]]
; CHECK-NEXT:    ]
; CHECK:       default:
; CHECK-NEXT:    unreachable
; CHECK:       bb4:
; CHECK-NEXT:    [[GEP0:%.*]] = getelementptr inbounds %"OpKind::Zero", ptr [[PTR]], i64 0, i32 1
; CHECK-NEXT:    br label [[EXIT:%.*]]
; CHECK:       bb5:
; CHECK-NEXT:    [[GEP1:%.*]] = getelementptr inbounds %"OpKind::One", ptr [[PTR]], i64 0, i32 1
; CHECK-NEXT:    br label [[EXIT]]
; CHECK:       bb6:
; CHECK-NEXT:    [[GEP2:%.*]] = getelementptr inbounds %"OpKind::Two", ptr [[PTR]], i64 0, i32 1
; CHECK-NEXT:    br label [[EXIT]]
; CHECK:       bb7:
; CHECK-NEXT:    [[GEP3:%.*]] = getelementptr inbounds %"OpKind::Three", ptr [[PTR]], i64 0, i32 1
; CHECK-NEXT:    br label [[EXIT]]
; CHECK:       exit:
; CHECK-NEXT:    [[PHI:%.*]] = phi ptr [ [[GEP3]], [[BB7]] ], [ [[GEP2]], [[BB6]] ], [ [[GEP1]], [[BB5]] ], [ [[GEP0]], [[BB4]] ]
; CHECK-NEXT:    [[RET:%.*]] = load i32, ptr [[PHI]], align 4
; CHECK-NEXT:    ret i32 [[RET]]
;
start:
  %t = load i32, ptr %ptr, align 4
  switch i32 %t, label %default [
  i32 0, label %bb4
  i32 1, label %bb5
  i32 2, label %bb6
  i32 3, label %bb7
  ]

default:
  unreachable

bb4:
  %gep0 = getelementptr inbounds %"OpKind::Zero", ptr %ptr, i64 0, i32 1
  br label %exit

bb5:
  %gep1 = getelementptr inbounds %"OpKind::One", ptr %ptr, i64 0, i32 1
  br label %exit

bb6:
  %gep2 = getelementptr inbounds %"OpKind::Two", ptr %ptr, i64 0, i32 1
  br label %exit

bb7:
  %gep3 = getelementptr inbounds %"OpKind::Three", ptr %ptr, i64 0, i32 1
  br label %exit

exit:
  %phi = phi ptr [ %gep3, %bb7 ], [ %gep2, %bb6 ], [ %gep1, %bb5 ], [ %gep0, %bb4 ]
  %ret = load i32, ptr %phi, align 4
  ret i32 %ret
}

%X = type { i64, i64, i64, i64, i64, i64 }

; FIXME: The switch should be optimized away.
define void @test2(ptr %self, i64 %v, i64 %ix) {
; CHECK-LABEL: define void @test2(
; CHECK-SAME: ptr nocapture writeonly [[SELF:%.*]], i64 [[V:%.*]], i64 [[IX:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
; CHECK-NEXT:  start:
; CHECK-NEXT:    switch i64 [[IX]], label [[DEFAULT:%.*]] [
; CHECK-NEXT:      i64 1, label [[BB3:%.*]]
; CHECK-NEXT:      i64 2, label [[BB4:%.*]]
; CHECK-NEXT:      i64 3, label [[BB5:%.*]]
; CHECK-NEXT:      i64 4, label [[BB6:%.*]]
; CHECK-NEXT:      i64 5, label [[BB7:%.*]]
; CHECK-NEXT:    ]
; CHECK:       default:
; CHECK-NEXT:    unreachable
; CHECK:       bb3:
; CHECK-NEXT:    [[GEP1:%.*]] = getelementptr inbounds [[X:%.*]], ptr [[SELF]], i64 0, i32 1
; CHECK-NEXT:    br label [[BB8:%.*]]
; CHECK:       bb4:
; CHECK-NEXT:    [[GEP2:%.*]] = getelementptr inbounds [[X]], ptr [[SELF]], i64 0, i32 2
; CHECK-NEXT:    br label [[BB8]]
; CHECK:       bb5:
; CHECK-NEXT:    [[GEP3:%.*]] = getelementptr inbounds [[X]], ptr [[SELF]], i64 0, i32 3
; CHECK-NEXT:    br label [[BB8]]
; CHECK:       bb6:
; CHECK-NEXT:    [[GEP4:%.*]] = getelementptr inbounds [[X]], ptr [[SELF]], i64 0, i32 4
; CHECK-NEXT:    br label [[BB8]]
; CHECK:       bb7:
; CHECK-NEXT:    [[GEP5:%.*]] = getelementptr inbounds [[X]], ptr [[SELF]], i64 0, i32 5
; CHECK-NEXT:    br label [[BB8]]
; CHECK:       bb8:
; CHECK-NEXT:    [[PTR:%.*]] = phi ptr [ [[GEP5]], [[BB7]] ], [ [[GEP4]], [[BB6]] ], [ [[GEP3]], [[BB5]] ], [ [[GEP2]], [[BB4]] ], [ [[GEP1]], [[BB3]] ]
; CHECK-NEXT:    store i64 [[V]], ptr [[PTR]], align 8
; CHECK-NEXT:    ret void
;
start:
  switch i64 %ix, label %default [
  i64 1, label %bb3
  i64 2, label %bb4
  i64 3, label %bb5
  i64 4, label %bb6
  i64 5, label %bb7
  ]

default:
  unreachable

bb3:
  %gep1 = getelementptr inbounds %X, ptr %self, i64 0, i32 1
  br label %bb8

bb4:
  %gep2 = getelementptr inbounds %X, ptr %self, i64 0, i32 2
  br label %bb8

bb5:
  %gep3 = getelementptr inbounds %X, ptr %self, i64 0, i32 3
  br label %bb8

bb6:
  %gep4 = getelementptr inbounds %X, ptr %self, i64 0, i32 4
  br label %bb8

bb7:
  %gep5 = getelementptr inbounds %X, ptr %self, i64 0, i32 5
  br label %bb8

bb8:
  %ptr = phi ptr [ %gep5, %bb7 ], [ %gep4, %bb6 ], [ %gep3, %bb5 ], [ %gep2, %bb4 ], [ %gep1, %bb3 ]
  store i64 %v, ptr %ptr, align 8
  ret void
}