llvm/test/CodeGen/AMDGPU/wwm-reg-shift-down-gfx11plus.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-- -mcpu=gfx1100 -mattr=+real-true16 -run-pass=prologepilog %s -o - | FileCheck -check-prefix=GCN %s

---
name:            wwm_reg_skip_sort_16bit
tracksRegLiveness: true
machineFunctionInfo:
  isEntryFunction: true
body:             |
  bb.0:
    ; GCN-LABEL: name: wwm_reg_skip_sort_16bit
    ; GCN: renamable $sgpr0 = ENTER_STRICT_WWM -1, implicit-def $exec, implicit-def $scc, implicit $exec
    ; GCN-NEXT: $vgpr0 = IMPLICIT_DEF
    ; GCN-NEXT: renamable $sgpr1 = V_READLANE_B32 $vgpr0, 31
    ; GCN-NEXT: renamable $sgpr2 = S_MOV_B32 0
    ; GCN-NEXT: undef $vgpr0_lo16 = V_CNDMASK_B16_t16_e64 0, 0, 0, killed $sgpr1, killed $sgpr2, 0, implicit $exec
    ; GCN-NEXT: $exec_lo = EXIT_STRICT_WWM killed renamable $sgpr0
    ; GCN-NEXT: early-clobber renamable $vgpr1 = V_MOV_B32_e32 $vgpr0, implicit $exec
    ; GCN-NEXT: S_ENDPGM 0, implicit killed renamable $vgpr1
    renamable $sgpr0 = ENTER_STRICT_WWM -1, implicit-def $exec, implicit-def $scc, implicit $exec
    $vgpr0 = IMPLICIT_DEF
    renamable $sgpr1 = V_READLANE_B32 $vgpr0, 31
    renamable $sgpr2 = S_MOV_B32 0
    undef $vgpr0_lo16 = V_CNDMASK_B16_t16_e64 0, 0, 0, killed $sgpr1, killed $sgpr2, 0, implicit $exec
    $exec_lo = EXIT_STRICT_WWM killed renamable $sgpr0
    early-clobber renamable $vgpr1 = V_MOV_B32_e32 $vgpr0, implicit $exec
    S_ENDPGM 0, implicit killed renamable $vgpr1
...