| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 |
| ; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck -check-prefixes=GFX12-SDAG %s |
| ; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck -check-prefixes=GFX12-GISEL %s |
| |
| define i1 @func1() { |
| ; GFX12-SDAG-LABEL: func1: |
| ; GFX12-SDAG: ; %bb.0: |
| ; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0 |
| ; GFX12-SDAG-NEXT: s_wait_expcnt 0x0 |
| ; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0 |
| ; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0 |
| ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0 |
| ; GFX12-SDAG-NEXT: s_cmp_eq_u32 0, 0 |
| ; GFX12-SDAG-NEXT: s_wait_storecnt 0x0 |
| ; GFX12-SDAG-NEXT: s_barrier_signal_isfirst -1 |
| ; GFX12-SDAG-NEXT: s_cselect_b32 s0, -1, 0 |
| ; GFX12-SDAG-NEXT: s_wait_alu 0xfffe |
| ; GFX12-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, s0 |
| ; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0 |
| ; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX12-GISEL-LABEL: func1: |
| ; GFX12-GISEL: ; %bb.0: |
| ; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0 |
| ; GFX12-GISEL-NEXT: s_wait_expcnt 0x0 |
| ; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0 |
| ; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0 |
| ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0 |
| ; GFX12-GISEL-NEXT: s_cmp_eq_u32 0, 0 |
| ; GFX12-GISEL-NEXT: s_wait_storecnt 0x0 |
| ; GFX12-GISEL-NEXT: s_barrier_signal_isfirst -1 |
| ; GFX12-GISEL-NEXT: s_cselect_b32 s0, 1, 0 |
| ; GFX12-GISEL-NEXT: s_wait_alu 0xfffe |
| ; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0 |
| ; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0 |
| ; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31] |
| %r = call i1 @llvm.amdgcn.s.barrier.signal.isfirst(i32 -1) |
| ret i1 %r |
| } |
| |
| declare i1 @llvm.amdgcn.s.barrier.signal.isfirst(i32) |
