blob: 0616ace672965a218885442e105eaeccaa6d763e [file] [log] [blame]
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=lowerswitch -S | FileCheck %s
define i64 @f(i1 %bool, i128 %i128) {
; CHECK-LABEL: @f(
; CHECK-NEXT: BB:
; CHECK-NEXT: br label [[NODEBLOCK1:%.*]]
; CHECK: NodeBlock1:
; CHECK-NEXT: [[PIVOT2:%.*]] = icmp slt i128 [[I128:%.*]], 16201310291018008446
; CHECK-NEXT: br i1 [[PIVOT2]], label [[LEAFBLOCK:%.*]], label [[NODEBLOCK:%.*]]
; CHECK: NodeBlock:
; CHECK-NEXT: [[PIVOT:%.*]] = icmp slt i128 [[I128]], 16201310291018008447
; CHECK-NEXT: br i1 [[PIVOT]], label [[SW_C3:%.*]], label [[SW_C2:%.*]]
; CHECK: LeafBlock:
; CHECK-NEXT: [[SWITCHLEAF:%.*]] = icmp eq i128 [[I128]], 16201310291018008445
; CHECK-NEXT: br i1 [[SWITCHLEAF]], label [[SW_C4:%.*]], label [[SW_C1:%.*]]
; CHECK: BB1:
; CHECK-NEXT: unreachable
; CHECK: SW_C1:
; CHECK-NEXT: br i1 [[BOOL:%.*]], label [[BB1:%.*]], label [[SW_C1]]
; CHECK: SW_C2:
; CHECK-NEXT: ret i64 0
; CHECK: SW_C3:
; CHECK-NEXT: ret i64 1
; CHECK: SW_C4:
; CHECK-NEXT: ret i64 2
;
BB:
switch i128 %i128, label %BB1 [
i128 627, label %SW_C1
i128 16201310291018008447, label %SW_C2
i128 16201310291018008446, label %SW_C3
i128 16201310291018008445, label %SW_C4
]
BB1: ; preds = %SW_C1, %BB
unreachable
SW_C1: ; preds = %SW_C1, %BB
br i1 %bool, label %BB1, label %SW_C1
SW_C2: ; preds = %BB
ret i64 0
SW_C3: ; preds = %BB
ret i64 1
SW_C4: ; preds = %BB
ret i64 2
}
define i64 @f_empty(i1 %bool, i128 %i128) {
; CHECK-LABEL: @f_empty(
; CHECK-NEXT: BB:
; CHECK-NEXT: br label [[BB1:%.*]]
; CHECK: BB1:
; CHECK-NEXT: unreachable
;
BB:
switch i128 %i128, label %BB1 []
BB1: ; preds = %BB
unreachable
}
define void @f_i1() {
entry:
switch i1 false, label %sw.bb [
i1 false, label %sw.bb12
]
sw.bb: ; preds = %entry
unreachable
sw.bb12: ; preds = %entry
unreachable
}
define void @f_i2(i2 %cond) {
entry:
switch i2 %cond, label %sw.bb [
i2 0, label %sw.bb12
i2 1, label %sw.bb12
i2 2, label %sw.bb12
i2 3, label %sw.bb12
]
sw.bb: ; preds = %entry
unreachable
sw.bb12: ; preds = %entry
unreachable
}