| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py |
| ; Check that it doesn't crash by generating formula with zero in base register |
| ; when one of the IV factors does't fit (2^32 in this test) the formula type |
| ; see pr42770 |
| ; REQUIRES: asserts |
| ; RUN: opt < %s -loop-reduce -S | FileCheck %s |
| |
| target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:1" |
| |
| define void @foo() { |
| ; CHECK-LABEL: @foo( |
| ; CHECK-NEXT: bb: |
| ; CHECK-NEXT: br label [[BB4:%.*]] |
| ; CHECK: bb1: |
| ; CHECK-NEXT: [[T3:%.*]] = ashr i64 [[LSR_IV_NEXT:%.*]], 32 |
| ; CHECK-NEXT: ret void |
| ; CHECK: bb4: |
| ; CHECK-NEXT: [[LSR_IV1:%.*]] = phi i16 [ [[LSR_IV_NEXT2:%.*]], [[BB13:%.*]] ], [ 6, [[BB:%.*]] ] |
| ; CHECK-NEXT: [[LSR_IV:%.*]] = phi i64 [ [[LSR_IV_NEXT]], [[BB13]] ], [ 8589934593, [[BB]] ] |
| ; CHECK-NEXT: [[LSR_IV_NEXT]] = add nuw nsw i64 [[LSR_IV]], 25769803776 |
| ; CHECK-NEXT: [[LSR_IV_NEXT2]] = add nuw nsw i16 [[LSR_IV1]], 6 |
| ; CHECK-NEXT: [[T10:%.*]] = icmp eq i16 1, 0 |
| ; CHECK-NEXT: br i1 [[T10]], label [[BB11:%.*]], label [[BB13]] |
| ; CHECK: bb11: |
| ; CHECK-NEXT: [[T12:%.*]] = udiv i16 1, [[LSR_IV1]] |
| ; CHECK-NEXT: unreachable |
| ; CHECK: bb13: |
| ; CHECK-NEXT: br i1 true, label [[BB1:%.*]], label [[BB4]] |
| ; |
| bb: |
| br label %bb4 |
| bb1: ; preds = %bb13 |
| %t = shl i64 %t14, 32 |
| %t2 = add i64 %t, 1 |
| %t3 = ashr i64 %t2, 32 |
| ret void |
| bb4: ; preds = %bb13, %bb |
| %t5 = phi i64 [ 2, %bb ], [ %t14, %bb13 ] |
| %t6 = add i64 %t5, 4 |
| %t7 = trunc i64 %t6 to i16 |
| %t8 = urem i16 %t7, 3 |
| %t9 = mul i16 %t8, 2 |
| %t10 = icmp eq i16 %t9, 1 |
| br i1 %t10, label %bb11, label %bb13 |
| |
| bb11: ; preds = %bb4 |
| %t12 = udiv i16 1, %t7 |
| unreachable |
| |
| bb13: ; preds = %bb4 |
| %t14 = add nuw nsw i64 %t5, 6 |
| br i1 undef, label %bb1, label %bb4 |
| } |
