blob: c967d9486c8cfc52318b0976acbfa8d772cf8d16 [file] [log] [blame]
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
define void @inttoptr_p0_s64() { ret void }
define void @ptrtoint_s64_p0() { ret void }
define void @ptrtoint_s32_p0() { ret void }
define void @ptrtoint_s16_p0() { ret void }
define void @ptrtoint_s8_p0() { ret void }
define void @ptrtoint_s1_p0() { ret void }
define void @inttoptr_v2p0_v2s64() { ret void }
define void @ptrtoint_v2s64_v2p0() { ret void }
...
---
name: inttoptr_p0_s64
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
body: |
bb.0:
liveins: $x0
; CHECK-LABEL: name: inttoptr_p0_s64
; CHECK: [[COPY:%[0-9]+]]:gpr64all = COPY $x0
; CHECK: $x0 = COPY [[COPY]]
%0(s64) = COPY $x0
%1(p0) = G_INTTOPTR %0
$x0 = COPY %1(p0)
...
---
name: ptrtoint_s64_p0
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
body: |
bb.0:
liveins: $x0
; CHECK-LABEL: name: ptrtoint_s64_p0
; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
; CHECK: $x0 = COPY [[COPY]]
%0(p0) = COPY $x0
%1(s64) = G_PTRTOINT %0
$x0 = COPY %1(s64)
...
---
name: ptrtoint_s32_p0
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
body: |
bb.0:
liveins: $x0
; CHECK-LABEL: name: ptrtoint_s32_p0
; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]].sub_32
; CHECK: $w0 = COPY [[COPY1]]
%0(p0) = COPY $x0
%1(s32) = G_PTRTOINT %0
$w0 = COPY %1(s32)
...
---
name: ptrtoint_s16_p0
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
body: |
bb.0:
liveins: $x0
; CHECK-LABEL: name: ptrtoint_s16_p0
; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]].sub_32
; CHECK: [[COPY2:%[0-9]+]]:gpr32all = COPY [[COPY1]]
; CHECK: $w0 = COPY [[COPY2]]
%0(p0) = COPY $x0
%1(s16) = G_PTRTOINT %0
%2:gpr(s32) = G_ANYEXT %1
$w0 = COPY %2(s32)
...
---
name: ptrtoint_s8_p0
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
body: |
bb.0:
liveins: $x0
; CHECK-LABEL: name: ptrtoint_s8_p0
; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]].sub_32
; CHECK: [[COPY2:%[0-9]+]]:gpr32all = COPY [[COPY1]]
; CHECK: $w0 = COPY [[COPY2]]
%0(p0) = COPY $x0
%1(s8) = G_PTRTOINT %0
%2:gpr(s32) = G_ANYEXT %1
$w0 = COPY %2(s32)
...
---
name: ptrtoint_s1_p0
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
body: |
bb.0:
liveins: $x0
; CHECK-LABEL: name: ptrtoint_s1_p0
; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]].sub_32
; CHECK: [[COPY2:%[0-9]+]]:gpr32all = COPY [[COPY1]]
; CHECK: $w0 = COPY [[COPY2]]
%0(p0) = COPY $x0
%1(s1) = G_PTRTOINT %0
%2:gpr(s32) = G_ANYEXT %1
$w0 = COPY %2(s32)
...
---
name: inttoptr_v2p0_v2s64
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.0:
liveins: $q0, $x0
; CHECK-LABEL: name: inttoptr_v2p0_v2s64
; CHECK: liveins: $q0, $x0
; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY [[COPY]].dsub
; CHECK: $x0 = COPY [[COPY1]]
; CHECK: RET_ReallyLR implicit $x0
%1:fpr(<2 x s64>) = COPY $q0
%2:fpr(<2 x p0>) = G_INTTOPTR %1(<2 x s64>)
%4:gpr(s64) = G_CONSTANT i64 0
%3:fpr(p0) = G_EXTRACT_VECTOR_ELT %2(<2 x p0>), %4(s64)
$x0 = COPY %3(p0)
RET_ReallyLR implicit $x0
...
...
---
name: ptrtoint_v2s64_v2p0
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.0:
liveins: $q0
; CHECK-LABEL: name: ptrtoint_v2s64_v2p0
; CHECK: liveins: $q0
; CHECK: %ptr:fpr128 = COPY $q0
; CHECK: $q0 = COPY %ptr
; CHECK: RET_ReallyLR implicit $q0
%ptr:fpr(<2 x p0>) = COPY $q0
%int:fpr(<2 x s64>) = G_PTRTOINT %ptr(<2 x p0>)
$q0 = COPY %int(<2 x s64>)
RET_ReallyLR implicit $q0
...