Google Git
Sign in
llvm / llvm-project / 18308e171b5b1dd99627a4d88c7d6c5ff21b8c96 / . / llvm / test / CodeGen / AArch64 / GlobalISel / legalize-saddsat.mir
blob: de94098e2e9c64545ccaf6c792066d306f104aa9 [file] [log] [blame]
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64 -run-pass=legalizer -verify-machineinstrs -global-isel-abort=0 %s -o - | FileCheck %s
...
---
name: s32
tracksRegLiveness: true
body: |
bb.0:
liveins: $w0, $w1
; CHECK-LABEL: name: s32
; CHECK: liveins: $w0, $w1
; CHECK: %x:_(s32) = COPY $w0
; CHECK: %y:_(s32) = COPY $w1
; CHECK: [[SADDO:%[0-9]+]]:_(s32), [[SADDO1:%[0-9]+]]:_(s1) = G_SADDO %x, %y
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 31
; CHECK: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SADDO]], [[C]](s64)
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[ASHR]], [[C1]]
; CHECK: %saddsat:_(s32) = G_SELECT [[SADDO1]](s1), [[ADD]], [[SADDO]]
; CHECK: $w0 = COPY %saddsat(s32)
; CHECK: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%y:_(s32) = COPY $w1
%saddsat:_(s32) = G_SADDSAT %x, %y
$w0 = COPY %saddsat(s32)
RET_ReallyLR implicit $w0
...
---
name: s64
tracksRegLiveness: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: s64
; CHECK: liveins: $x0, $x1
; CHECK: %x:_(s64) = COPY $x0
; CHECK: %y:_(s64) = COPY $x1
; CHECK: [[SADDO:%[0-9]+]]:_(s64), [[SADDO1:%[0-9]+]]:_(s1) = G_SADDO %x, %y
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 63
; CHECK: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SADDO]], [[C]](s64)
; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808
; CHECK: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[ASHR]], [[C1]]
; CHECK: %saddsat:_(s64) = G_SELECT [[SADDO1]](s1), [[ADD]], [[SADDO]]
; CHECK: $x0 = COPY %saddsat(s64)
; CHECK: RET_ReallyLR implicit $x0
%x:_(s64) = COPY $x0
%y:_(s64) = COPY $x1
%saddsat:_(s64) = G_SADDSAT %x, %y
$x0 = COPY %saddsat(s64)
RET_ReallyLR implicit $x0
...
---
name: s16
tracksRegLiveness: true
body: |
bb.0:
liveins: $w0, $w1, $w2
; CHECK-LABEL: name: s16
; CHECK: liveins: $w0, $w1, $w2
; CHECK: %copy_1:_(s32) = COPY $w0
; CHECK: %copy_2:_(s32) = COPY $w1
; CHECK: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG %copy_1, 16
; CHECK: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG %copy_2, 16
; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[SEXT_INREG]], [[SEXT_INREG1]]
; CHECK: [[SEXT_INREG2:%[0-9]+]]:_(s32) = G_SEXT_INREG [[ADD]], 16
; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[ADD]](s32), [[SEXT_INREG2]]
; CHECK: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP]](s32)
; CHECK: [[SEXT_INREG3:%[0-9]+]]:_(s32) = G_SEXT_INREG [[ADD]], 16
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 15
; CHECK: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SEXT_INREG3]], [[C]](s64)
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
; CHECK: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[ASHR]], [[C1]]
; CHECK: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[TRUNC]](s1), [[ADD1]], [[ADD]]
; CHECK: $w0 = COPY [[SELECT]](s32)
; CHECK: RET_ReallyLR implicit $w0
%copy_1:_(s32) = COPY $w0
%x:_(s16) = G_TRUNC %copy_1(s32)
%copy_2:_(s32) = COPY $w1
%y:_(s16) = G_TRUNC %copy_2(s32)
%saddsat:_(s16) = G_SADDSAT %x, %y
%ext:_(s32) = G_ANYEXT %saddsat(s16)
$w0 = COPY %ext(s32)
RET_ReallyLR implicit $w0
...
---
name: s1
tracksRegLiveness: true
body: |
bb.0:
liveins: $w0, $w1, $w2
; CHECK-LABEL: name: s1
; CHECK: liveins: $w0, $w1, $w2
; CHECK: %copy_1:_(s32) = COPY $w0
; CHECK: %copy_2:_(s32) = COPY $w1
; CHECK: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG %copy_1, 1
; CHECK: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG %copy_2, 1
; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[SEXT_INREG]], [[SEXT_INREG1]]
; CHECK: [[SEXT_INREG2:%[0-9]+]]:_(s32) = G_SEXT_INREG [[ADD]], 1
; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[ADD]](s32), [[SEXT_INREG2]]
; CHECK: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP]](s32)
; CHECK: [[SEXT_INREG3:%[0-9]+]]:_(s32) = G_SEXT_INREG [[ADD]], 1
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SEXT_INREG3]], [[C]](s64)
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[ASHR]], [[C1]]
; CHECK: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[TRUNC]](s1), [[ADD1]], [[ADD]]
; CHECK: $w0 = COPY [[SELECT]](s32)
; CHECK: RET_ReallyLR implicit $w0
%copy_1:_(s32) = COPY $w0
%x:_(s1) = G_TRUNC %copy_1(s32)
%copy_2:_(s32) = COPY $w1
%y:_(s1) = G_TRUNC %copy_2(s32)
%saddsat:_(s1) = G_SADDSAT %x, %y
%ext:_(s32) = G_ANYEXT %saddsat(s1)
$w0 = COPY %ext(s32)
RET_ReallyLR implicit $w0
...
---
name: s3
tracksRegLiveness: true
body: |
bb.0:
liveins: $w0, $w1, $w2
; CHECK-LABEL: name: s3
; CHECK: liveins: $w0, $w1, $w2
; CHECK: %copy_1:_(s32) = COPY $w0
; CHECK: %copy_2:_(s32) = COPY $w1
; CHECK: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG %copy_1, 3
; CHECK: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG %copy_2, 3
; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[SEXT_INREG]], [[SEXT_INREG1]]
; CHECK: [[SEXT_INREG2:%[0-9]+]]:_(s32) = G_SEXT_INREG [[ADD]], 3
; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[ADD]](s32), [[SEXT_INREG2]]
; CHECK: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP]](s32)
; CHECK: [[SEXT_INREG3:%[0-9]+]]:_(s32) = G_SEXT_INREG [[ADD]], 3
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
; CHECK: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SEXT_INREG3]], [[C]](s64)
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; CHECK: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[ASHR]], [[C1]]
; CHECK: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[TRUNC]](s1), [[ADD1]], [[ADD]]
; CHECK: $w0 = COPY [[SELECT]](s32)
; CHECK: RET_ReallyLR implicit $w0
%copy_1:_(s32) = COPY $w0
%x:_(s3) = G_TRUNC %copy_1(s32)
%copy_2:_(s32) = COPY $w1
%y:_(s3) = G_TRUNC %copy_2(s32)
%saddsat:_(s3) = G_SADDSAT %x, %y
%ext:_(s32) = G_ANYEXT %saddsat(s3)
$w0 = COPY %ext(s32)
RET_ReallyLR implicit $w0
...
---
name: s36
tracksRegLiveness: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: s36
; CHECK: liveins: $x0, $x1
; CHECK: %copy_1:_(s64) = COPY $x0
; CHECK: %copy_2:_(s64) = COPY $x1
; CHECK: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG %copy_1, 36
; CHECK: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG %copy_2, 36
; CHECK: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[SEXT_INREG]], [[SEXT_INREG1]]
; CHECK: [[SEXT_INREG2:%[0-9]+]]:_(s64) = G_SEXT_INREG [[ADD]], 36
; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[ADD]](s64), [[SEXT_INREG2]]
; CHECK: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP]](s32)
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 35
; CHECK: [[SEXT_INREG3:%[0-9]+]]:_(s64) = G_SEXT_INREG [[ADD]], 36
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY [[C]](s64)
; CHECK: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SEXT_INREG3]], [[COPY]](s64)
; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 34359738368
; CHECK: [[ADD1:%[0-9]+]]:_(s64) = G_ADD [[ASHR]], [[C1]]
; CHECK: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC]](s1), [[ADD1]], [[ADD]]
; CHECK: $x0 = COPY [[SELECT]](s64)
; CHECK: RET_ReallyLR implicit $x0
%copy_1:_(s64) = COPY $x0
%x:_(s36) = G_TRUNC %copy_1(s64)
%copy_2:_(s64) = COPY $x1
%y:_(s36) = G_TRUNC %copy_2(s64)
%saddsat:_(s36) = G_SADDSAT %x, %y
%ext:_(s64) = G_ANYEXT %saddsat(s36)
$x0 = COPY %ext(s64)
RET_ReallyLR implicit $x0
...
---
name: s88
tracksRegLiveness: true
body: |
bb.0:
liveins: $q0, $q1, $x0
; CHECK-LABEL: name: s88
; CHECK: liveins: $q0, $q1, $x0
; CHECK: %copy_1:_(s128) = COPY $q0
; CHECK: %copy_2:_(s128) = COPY $q1
; CHECK: [[EXTRACT:%[0-9]+]]:_(s64) = G_EXTRACT %copy_1(s128), 0
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES %copy_1(s128)
; CHECK: [[EXTRACT1:%[0-9]+]]:_(s64) = G_EXTRACT %copy_2(s128), 0
; CHECK: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES %copy_2(s128)
; CHECK: [[UADDO:%[0-9]+]]:_(s64), [[UADDO1:%[0-9]+]]:_(s1) = G_UADDO [[EXTRACT]], [[EXTRACT1]]
; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[UV1]](s64)
; CHECK: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[TRUNC]], 24
; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[UV3]](s64)
; CHECK: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[TRUNC1]], 24
; CHECK: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[SEXT_INREG]], [[SEXT_INREG1]], [[UADDO1]]
; CHECK: [[SEXT_INREG2:%[0-9]+]]:_(s32) = G_SEXT_INREG [[UADDE]], 24
; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[UADDE]](s32), [[SEXT_INREG2]]
; CHECK: [[TRUNC2:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP]](s32)
; CHECK: [[UV4:%[0-9]+]]:_(s8), [[UV5:%[0-9]+]]:_(s8), [[UV6:%[0-9]+]]:_(s8), [[UV7:%[0-9]+]]:_(s8), [[UV8:%[0-9]+]]:_(s8), [[UV9:%[0-9]+]]:_(s8), [[UV10:%[0-9]+]]:_(s8), [[UV11:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[UADDO]](s64)
; CHECK: [[UV12:%[0-9]+]]:_(s8), [[UV13:%[0-9]+]]:_(s8), [[UV14:%[0-9]+]]:_(s8), [[UV15:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[UADDE]](s32)
; CHECK: [[DEF:%[0-9]+]]:_(s8) = G_IMPLICIT_DEF
; CHECK: [[DEF1:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
; CHECK: [[UV16:%[0-9]+]]:_(s8), [[UV17:%[0-9]+]]:_(s8), [[UV18:%[0-9]+]]:_(s8), [[UV19:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[DEF1]](s32)
; CHECK: [[UV20:%[0-9]+]]:_(s8), [[UV21:%[0-9]+]]:_(s8), [[UV22:%[0-9]+]]:_(s8), [[UV23:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[DEF1]](s32)
; CHECK: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[UV4]](s8), [[UV5]](s8), [[UV6]](s8), [[UV7]](s8)
; CHECK: [[MV1:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[UV8]](s8), [[UV9]](s8), [[UV10]](s8), [[UV11]](s8)
; CHECK: [[MV2:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[UV12]](s8), [[UV13]](s8), [[UV14]](s8), [[DEF]](s8)
; CHECK: [[MV3:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[UV16]](s8), [[UV17]](s8), [[UV18]](s8), [[UV20]](s8)
; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 40
; CHECK: [[MV4:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[MV]](s32), [[MV1]](s32)
; CHECK: [[MV5:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[MV2]](s32), [[MV3]](s32)
; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[MV5]], [[C1]](s64)
; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 24
; CHECK: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[MV4]], [[C2]](s64)
; CHECK: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR]]
; CHECK: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[OR]], [[C1]](s64)
; CHECK: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 23
; CHECK: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[ASHR]], [[C3]](s64)
; CHECK: [[UADDO2:%[0-9]+]]:_(s64), [[UADDO3:%[0-9]+]]:_(s1) = G_UADDO [[ASHR1]], [[C]]
; CHECK: [[MV6:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[MV]](s32), [[MV1]](s32)
; CHECK: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC2]](s1), [[UADDO2]], [[MV6]]
; CHECK: $x0 = COPY [[SELECT]](s64)
; CHECK: RET_ReallyLR implicit $x0
%copy_1:_(s128) = COPY $q0
%x:_(s88) = G_TRUNC %copy_1(s128)
%copy_2:_(s128) = COPY $q1
%y:_(s88) = G_TRUNC %copy_2(s128)
%saddsat:_(s88) = G_SADDSAT %x, %y
%trunc:_(s64) = G_TRUNC %saddsat(s88)
$x0 = COPY %trunc(s64)
RET_ReallyLR implicit $x0