| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 |
| ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck %s |
| |
| @_RSENC_gDcd_______________________________ = external protected addrspace(1) externally_initialized global [4096 x i8], align 16 |
| |
| define protected amdgpu_kernel void @_RSENC_PRInit__________________________________(i1 %c0) local_unnamed_addr #0 { |
| ; CHECK-LABEL: _RSENC_PRInit__________________________________: |
| ; CHECK: ; %bb.0: ; %entry |
| ; CHECK-NEXT: s_add_u32 flat_scratch_lo, s12, s17 |
| ; CHECK-NEXT: s_addc_u32 flat_scratch_hi, s13, 0 |
| ; CHECK-NEXT: flat_load_dword v0, v[0:1] |
| ; CHECK-NEXT: s_add_u32 s0, s0, s17 |
| ; CHECK-NEXT: s_mov_b32 s4, 0xf19b3 |
| ; CHECK-NEXT: s_addc_u32 s1, s1, 0 |
| ; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) |
| ; CHECK-NEXT: v_lshl_add_u32 v0, v0, 1, v0 |
| ; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, s4, v0 |
| ; CHECK-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; CHECK-NEXT: s_cbranch_execz .LBB0_12 |
| ; CHECK-NEXT: ; %bb.1: ; %if.end15 |
| ; CHECK-NEXT: s_load_dword s4, s[8:9], 0x0 |
| ; CHECK-NEXT: s_waitcnt lgkmcnt(0) |
| ; CHECK-NEXT: s_bitcmp1_b32 s4, 0 |
| ; CHECK-NEXT: s_cselect_b64 s[4:5], -1, 0 |
| ; CHECK-NEXT: s_and_b64 vcc, exec, s[4:5] |
| ; CHECK-NEXT: s_cbranch_vccnz .LBB0_12 |
| ; CHECK-NEXT: .LBB0_2: ; %while.cond.i |
| ; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1 |
| ; CHECK-NEXT: s_cbranch_scc1 .LBB0_2 |
| ; CHECK-NEXT: ; %bb.3: ; %if.end60 |
| ; CHECK-NEXT: s_mov_b64 vcc, exec |
| ; CHECK-NEXT: s_cbranch_execz .LBB0_11 |
| ; CHECK-NEXT: ; %bb.4: ; %if.end5.i |
| ; CHECK-NEXT: s_mov_b64 vcc, vcc |
| ; CHECK-NEXT: s_cbranch_vccz .LBB0_11 |
| ; CHECK-NEXT: ; %bb.5: ; %if.end5.i314 |
| ; CHECK-NEXT: s_mov_b64 vcc, exec |
| ; CHECK-NEXT: s_cbranch_execz .LBB0_11 |
| ; CHECK-NEXT: ; %bb.6: ; %if.end5.i338 |
| ; CHECK-NEXT: s_mov_b64 vcc, vcc |
| ; CHECK-NEXT: s_cbranch_vccz .LBB0_11 |
| ; CHECK-NEXT: ; %bb.7: ; %if.end5.i362 |
| ; CHECK-NEXT: v_mov_b32_e32 v0, 0 |
| ; CHECK-NEXT: s_getpc_b64 s[4:5] |
| ; CHECK-NEXT: s_add_u32 s4, s4, _RSENC_gDcd_______________________________@rel32@lo+1157 |
| ; CHECK-NEXT: s_addc_u32 s5, s5, _RSENC_gDcd_______________________________@rel32@hi+1165 |
| ; CHECK-NEXT: global_load_ubyte v1, v0, s[4:5] |
| ; CHECK-NEXT: s_nop 0 |
| ; CHECK-NEXT: buffer_store_byte v0, v0, s[0:3], 0 offen |
| ; CHECK-NEXT: s_waitcnt vmcnt(1) |
| ; CHECK-NEXT: buffer_store_byte v1, off, s[0:3], 0 offset:257 |
| ; CHECK-NEXT: s_cbranch_execz .LBB0_11 |
| ; CHECK-NEXT: ; %bb.8: ; %if.end5.i400 |
| ; CHECK-NEXT: flat_load_ubyte v0, v[0:1] |
| ; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) |
| ; CHECK-NEXT: v_cmp_eq_u16_e32 vcc, 0, v0 |
| ; CHECK-NEXT: s_and_b64 exec, exec, vcc |
| ; CHECK-NEXT: s_cbranch_execz .LBB0_11 |
| ; CHECK-NEXT: ; %bb.9: ; %if.then404 |
| ; CHECK-NEXT: s_movk_i32 s4, 0x1000 |
| ; CHECK-NEXT: .LBB0_10: ; %for.body564 |
| ; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1 |
| ; CHECK-NEXT: s_sub_i32 s4, s4, 32 |
| ; CHECK-NEXT: s_cmp_lg_u32 s4, 0 |
| ; CHECK-NEXT: s_cbranch_scc1 .LBB0_10 |
| ; CHECK-NEXT: .LBB0_11: ; %UnifiedUnreachableBlock |
| ; CHECK-NEXT: ; divergent unreachable |
| ; CHECK-NEXT: .LBB0_12: ; %UnifiedReturnBlock |
| ; CHECK-NEXT: s_endpgm |
| entry: |
| %runtimeVersionCopy = alloca [128 x i8], align 16, addrspace(5) |
| %licenseVersionCopy = alloca [128 x i8], align 16, addrspace(5) |
| %pD10 = alloca [128 x i8], align 16, addrspace(5) |
| br label %if.end |
| |
| if.end: ; preds = %entry |
| %0 = load i32, ptr poison, align 4 |
| %mul = mul i32 %0, 3 |
| %cmp13 = icmp eq i32 %mul, 989619 |
| br i1 %cmp13, label %cleanup.cont, label %if.end15 |
| |
| if.end15: ; preds = %if.end |
| br i1 %c0, label %cleanup.cont, label %lor.lhs.false17 |
| |
| lor.lhs.false17: ; preds = %if.end15 |
| br label %while.cond.i |
| |
| while.cond.i: ; preds = %while.cond.i, %lor.lhs.false17 |
| switch i32 undef, label %if.end60 [ |
| i32 0, label %while.cond.i |
| i32 3, label %if.end60.loopexit857 |
| ] |
| |
| if.end60.loopexit857: ; preds = %while.cond.i |
| br label %if.end60 |
| |
| if.end60: ; preds = %if.end60.loopexit857, %while.cond.i |
| %1 = load i8, ptr addrspace(1) getelementptr inbounds ([4096 x i8], ptr addrspace(1) @_RSENC_gDcd_______________________________, i64 0, i64 655), align 1 |
| %arrayidx144260.5 = getelementptr inbounds [128 x i8], ptr addrspace(5) %runtimeVersionCopy, i32 0, i32 5 |
| %arrayidx156258.5 = getelementptr inbounds [128 x i8], ptr addrspace(5) %licenseVersionCopy, i32 0, i32 5 |
| switch i8 0, label %if.end5.i [ |
| i8 45, label %if.then.i |
| i8 43, label %if.then3.i |
| ] |
| |
| if.then.i: ; preds = %if.end60 |
| unreachable |
| |
| if.then3.i: ; preds = %if.end60 |
| br label %if.end5.i |
| |
| if.end5.i: ; preds = %if.then3.i, %if.end60 |
| %pS.addr.0.i = phi ptr addrspace(5) [ poison, %if.then3.i ], [ %runtimeVersionCopy, %if.end60 ] |
| %2 = load i8, ptr addrspace(5) %pS.addr.0.i, align 1 |
| %conv612.i = sext i8 %2 to i32 |
| %sub13.i = add nsw i32 %conv612.i, -48 |
| %cmp714.i = icmp ugt i32 %sub13.i, 9 |
| switch i8 undef, label %if.end5.i314 [ |
| i8 45, label %if.then.i306 |
| i8 43, label %if.then3.i308 |
| ] |
| |
| if.then.i306: ; preds = %if.end5.i |
| unreachable |
| |
| if.then3.i308: ; preds = %if.end5.i |
| br label %if.end5.i314 |
| |
| if.end5.i314: ; preds = %if.then3.i308, %if.end5.i |
| %pS.addr.0.i309 = phi ptr addrspace(5) [ poison, %if.then3.i308 ], [ %licenseVersionCopy, %if.end5.i ] |
| %3 = load i8, ptr addrspace(5) %pS.addr.0.i309, align 1 |
| %conv612.i311 = sext i8 %3 to i32 |
| %sub13.i312 = add nsw i32 %conv612.i311, -48 |
| %cmp714.i313 = icmp ugt i32 %sub13.i312, 9 |
| switch i8 undef, label %if.end5.i338 [ |
| i8 45, label %if.then.i330 |
| i8 43, label %if.then3.i332 |
| ] |
| |
| if.then.i330: ; preds = %if.end5.i314 |
| unreachable |
| |
| if.then3.i332: ; preds = %if.end5.i314 |
| br label %if.end5.i338 |
| |
| if.end5.i338: ; preds = %if.then3.i332, %if.end5.i314 |
| %pS.addr.0.i333 = phi ptr addrspace(5) [ poison, %if.then3.i332 ], [ %arrayidx144260.5, %if.end5.i314 ] |
| %4 = load i8, ptr addrspace(5) %pS.addr.0.i333, align 1 |
| %conv612.i335 = sext i8 %4 to i32 |
| %sub13.i336 = add nsw i32 %conv612.i335, -48 |
| %cmp714.i337 = icmp ugt i32 %sub13.i336, 9 |
| switch i8 undef, label %if.end5.i362 [ |
| i8 45, label %if.then.i354 |
| i8 43, label %if.then3.i356 |
| ] |
| |
| if.then.i354: ; preds = %if.end5.i338 |
| unreachable |
| |
| if.then3.i356: ; preds = %if.end5.i338 |
| br label %if.end5.i362 |
| |
| if.end5.i362: ; preds = %if.then3.i356, %if.end5.i338 |
| %pS.addr.0.i357 = phi ptr addrspace(5) [ poison, %if.then3.i356 ], [ %arrayidx156258.5, %if.end5.i338 ] |
| %5 = load i8, ptr addrspace(5) %pS.addr.0.i357, align 1 |
| %conv612.i359 = sext i8 %5 to i32 |
| %sub13.i360 = add nsw i32 %conv612.i359, -48 |
| %cmp714.i361 = icmp ugt i32 %sub13.i360, 9 |
| store i8 0, ptr addrspace(5) poison, align 16 |
| %6 = load i8, ptr addrspace(1) getelementptr inbounds ([4096 x i8], ptr addrspace(1) @_RSENC_gDcd_______________________________, i64 0, i64 1153), align 1 |
| %arrayidx232250.1 = getelementptr inbounds [128 x i8], ptr addrspace(5) %pD10, i32 0, i32 1 |
| store i8 %6, ptr addrspace(5) %arrayidx232250.1, align 1 |
| switch i8 undef, label %if.end5.i400 [ |
| i8 45, label %if.then.i392 |
| i8 43, label %if.then3.i394 |
| ] |
| |
| if.then.i392: ; preds = %if.end5.i362 |
| unreachable |
| |
| if.then3.i394: ; preds = %if.end5.i362 |
| br label %if.end5.i400 |
| |
| if.end5.i400: ; preds = %if.then3.i394, %if.end5.i362 |
| %pS.addr.0.i395 = phi ptr addrspace(5) [ %arrayidx232250.1, %if.then3.i394 ], [ poison, %if.end5.i362 ] |
| %7 = load i8, ptr addrspace(5) %pS.addr.0.i395, align 1 |
| %conv612.i397 = sext i8 %7 to i32 |
| %sub13.i398 = add nsw i32 %conv612.i397, -48 |
| %cmp714.i399 = icmp ugt i32 %sub13.i398, 9 |
| %8 = load i8, ptr poison, align 1 |
| %cmp9.not.i500 = icmp eq i8 0, %8 |
| br label %land.lhs.true402.critedge |
| |
| land.lhs.true402.critedge: ; preds = %if.end5.i400 |
| br i1 %cmp9.not.i500, label %if.then404, label %if.else407 |
| |
| if.then404: ; preds = %land.lhs.true402.critedge |
| br label %for.body564 |
| |
| if.else407: ; preds = %land.lhs.true402.critedge |
| br label %if.end570 |
| |
| for.body564: ; preds = %for.body564, %if.then404 |
| %i560.0801 = phi i32 [ 0, %if.then404 ], [ %inc568.31, %for.body564 ] |
| %inc568.31 = add nuw nsw i32 %i560.0801, 32 |
| %exitcond839.not.31 = icmp eq i32 %inc568.31, 4096 |
| br i1 %exitcond839.not.31, label %if.end570, label %for.body564 |
| |
| if.end570: ; preds = %for.body564, %if.else407 |
| unreachable |
| |
| cleanup.cont: ; preds = %if.end15, %if.end |
| ret void |
| } |
| |
| attributes #0 = { "uniform-work-group-size"="true" } |