llvm/test/CodeGen/AArch64/sme-machine-licm-vg.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
# RUN: llc -mtriple=aarch64--linux-gnu -run-pass=early-machinelicm %s -verify-machineinstrs -o - | FileCheck %s
# RUN: llc -mtriple=aarch64--linux-gnu -passes=early-machinelicm %s -o - | FileCheck %s
---
name:            test_should_hoist_pfalse
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: test_should_hoist_pfalse
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT:   liveins: $x0, $x1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gpr64 = COPY $x1
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:gpr64 = COPY $x0
  ; CHECK-NEXT:   MSRpstatesvcrImm1 1, 1, csr_aarch64_smstartstop, implicit-def dead $nzcv, implicit $vg, implicit-def $vg
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:gpr64all = COPY [[COPY1]]
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:gpr64all = COPY [[COPY]]
  ; CHECK-NEXT:   [[PFALSE:%[0-9]+]]:ppr = PFALSE implicit $vg
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[PHI:%[0-9]+]]:gpr64common = PHI [[COPY2]], %bb.0, %5, %bb.1
  ; CHECK-NEXT:   [[PHI1:%[0-9]+]]:gpr64sp = PHI [[COPY3]], %bb.0, %7, %bb.1
  ; CHECK-NEXT:   STR_PXI [[PFALSE]], [[PHI]], 0
  ; CHECK-NEXT:   [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri [[PHI1]], 1, 0, implicit-def $nzcv
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:gpr64all = COPY [[SUBSXri]]
  ; CHECK-NEXT:   [[INCD_XPiI:%[0-9]+]]:gpr64 = INCD_XPiI [[PHI]], 31, 1
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:gpr64all = COPY [[INCD_XPiI]]
  ; CHECK-NEXT:   Bcc 1, %bb.1, implicit $nzcv
  ; CHECK-NEXT:   B %bb.2
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   MSRpstatesvcrImm1 1, 0, csr_aarch64_smstartstop, implicit-def dead $nzcv, implicit $vg, implicit-def $vg
  ; CHECK-NEXT:   RET_ReallyLR
  bb.0:
    successors: %bb.1
    liveins: $x0, $x1

    %5:gpr64 = COPY $x1
    %4:gpr64 = COPY $x0
    MSRpstatesvcrImm1 1, 1, csr_aarch64_smstartstop, implicit-def dead $nzcv, implicit $vg, implicit-def $vg
    %6:gpr64all = COPY %4
    %7:gpr64all = COPY %5

  bb.1:
    successors: %bb.2, %bb.1

    %0:gpr64common = PHI %6, %bb.0, %3, %bb.1
    %1:gpr64sp = PHI %7, %bb.0, %2, %bb.1
    %8:ppr = PFALSE implicit $vg
    STR_PXI killed %8, %0, 0
    %9:gpr64 = SUBSXri %1, 1, 0, implicit-def $nzcv
    %2:gpr64all = COPY %9
    %10:gpr64 = INCD_XPiI %0, 31, 1
    %3:gpr64all = COPY %10


    Bcc 1, %bb.1, implicit $nzcv
    B %bb.2

  bb.2:
    MSRpstatesvcrImm1 1, 0, csr_aarch64_smstartstop, implicit-def dead $nzcv, implicit $vg, implicit-def $vg
    RET_ReallyLR
...