llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi2.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512vbmi,+avx512vbmi2,+avx512vl | FileCheck %s --check-prefixes=VLX
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512vbmi,+avx512vbmi2,+avx512vl | FileCheck %s --check-prefixes=VLX
; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512vbmi,+avx512vbmi2 | FileCheck %s --check-prefixes=NOVLX
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512vbmi,+avx512vbmi2 | FileCheck %s --check-prefixes=NOVLX

define <16 x i8> @combine_vpshld_vpshufb(<16 x i8> %x, <16 x i8> %y) {
; VLX-LABEL: combine_vpshld_vpshufb:
; VLX:       # %bb.0:
; VLX-NEXT:    vpshldq $56, %xmm0, %xmm1, %xmm0
; VLX-NEXT:    ret{{[l|q]}}
;
; NOVLX-LABEL: combine_vpshld_vpshufb:
; NOVLX:       # %bb.0:
; NOVLX-NEXT:    # kill: def $xmm1 killed $xmm1 def $zmm1
; NOVLX-NEXT:    # kill: def $xmm0 killed $xmm0 def $zmm0
; NOVLX-NEXT:    vpshldq $56, %zmm0, %zmm1, %zmm0
; NOVLX-NEXT:    # kill: def $xmm0 killed $xmm0 killed $zmm0
; NOVLX-NEXT:    vzeroupper
; NOVLX-NEXT:    ret{{[l|q]}}
  %rx = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %x, <16 x i8> <i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>)
  %ry = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %y, <16 x i8> <i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>)
  %bx = bitcast <16 x i8> %rx to <2 x i64>
  %by = bitcast <16 x i8> %ry to <2 x i64>
  %fsh = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %bx, <2 x i64> %by, <2 x i64> splat (i64 8))
  %bf = bitcast <2 x i64> %fsh to <16 x i8>
  %r = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %bf, <16 x i8> <i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>)
  ret <16 x i8> %r
}

define <16 x i8> @combine_vpshrd_vpshufb(<16 x i8> %x, <16 x i8> %y) {
; VLX-LABEL: combine_vpshrd_vpshufb:
; VLX:       # %bb.0:
; VLX-NEXT:    vpshldd $8, %xmm0, %xmm1, %xmm0
; VLX-NEXT:    ret{{[l|q]}}
;
; NOVLX-LABEL: combine_vpshrd_vpshufb:
; NOVLX:       # %bb.0:
; NOVLX-NEXT:    # kill: def $xmm1 killed $xmm1 def $zmm1
; NOVLX-NEXT:    # kill: def $xmm0 killed $xmm0 def $zmm0
; NOVLX-NEXT:    vpshldd $8, %zmm0, %zmm1, %zmm0
; NOVLX-NEXT:    # kill: def $xmm0 killed $xmm0 killed $zmm0
; NOVLX-NEXT:    vzeroupper
; NOVLX-NEXT:    ret{{[l|q]}}
  %rx = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %x, <16 x i8> <i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>)
  %ry = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %y, <16 x i8> <i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>)
  %bx = bitcast <16 x i8> %rx to <4 x i32>
  %by = bitcast <16 x i8> %ry to <4 x i32>
  %fsh = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %bx, <4 x i32> %by, <4 x i32> splat (i32 8))
  %bf = bitcast <4 x i32> %fsh to <16 x i8>
  %r = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %bf, <16 x i8> <i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>)
  ret <16 x i8> %r
}

define <16 x i16> @combine_vpshldq_v16i16_shuffle(<16 x i16> %a, <16 x i16> %b) {
; VLX-LABEL: combine_vpshldq_v16i16_shuffle:
; VLX:       # %bb.0:
; VLX-NEXT:    vpshldq $16, %ymm1, %ymm0, %ymm0
; VLX-NEXT:    ret{{[l|q]}}
;
; NOVLX-LABEL: combine_vpshldq_v16i16_shuffle:
; NOVLX:       # %bb.0:
; NOVLX-NEXT:    # kill: def $ymm1 killed $ymm1 def $zmm1
; NOVLX-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
; NOVLX-NEXT:    vpshldq $16, %zmm1, %zmm0, %zmm0
; NOVLX-NEXT:    # kill: def $ymm0 killed $ymm0 killed $zmm0
; NOVLX-NEXT:    ret{{[l|q]}}
  %r = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 19, i32 0, i32 1, i32 2, i32 23, i32 4, i32 5, i32 6, i32 27, i32 8, i32 9, i32 10, i32 31, i32 12, i32 13, i32 14>
  ret <16 x i16> %r
}

define <8 x i32> @combine_vpshld_v8i32_shuffle(<8 x i32> %a, <8 x i32> %b) {
; VLX-LABEL: combine_vpshld_v8i32_shuffle:
; VLX:       # %bb.0:
; VLX-NEXT:    vpshldq $32, %ymm0, %ymm1, %ymm0
; VLX-NEXT:    ret{{[l|q]}}
;
; NOVLX-LABEL: combine_vpshld_v8i32_shuffle:
; NOVLX:       # %bb.0:
; NOVLX-NEXT:    # kill: def $ymm1 killed $ymm1 def $zmm1
; NOVLX-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
; NOVLX-NEXT:    vpshldq $32, %zmm0, %zmm1, %zmm0
; NOVLX-NEXT:    # kill: def $ymm0 killed $ymm0 killed $zmm0
; NOVLX-NEXT:    ret{{[l|q]}}
  %r = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 1, i32 8, i32 3, i32 10, i32 5, i32 12, i32 7, i32 14>
  ret <8 x i32> %r
}

define <8 x i8> @PR145276(<8 x i8> %a0, <8 x i8> %a1) {
; VLX-LABEL: PR145276:
; VLX:       # %bb.0:
; VLX-NEXT:    vpshldq $8, %xmm1, %xmm0, %xmm0
; VLX-NEXT:    ret{{[l|q]}}
;
; NOVLX-LABEL: PR145276:
; NOVLX:       # %bb.0:
; NOVLX-NEXT:    # kill: def $xmm1 killed $xmm1 def $zmm1
; NOVLX-NEXT:    # kill: def $xmm0 killed $xmm0 def $zmm0
; NOVLX-NEXT:    vpshldq $8, %zmm1, %zmm0, %zmm0
; NOVLX-NEXT:    # kill: def $xmm0 killed $xmm0 killed $zmm0
; NOVLX-NEXT:    vzeroupper
; NOVLX-NEXT:    ret{{[l|q]}}
  %r = shufflevector <8 x i8> %a0, <8 x i8> %a1, <8 x i32> <i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6>
  ret <8 x i8> %r
}