llvm/test/CodeGen/X86/pr123333.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s

define void @PR123333(ptr %in0, ptr %in1, ptr %in2, ptr %out0, ptr %out1) {
; CHECK-LABEL: PR123333:
; CHECK:       # %bb.0:
; CHECK-NEXT:    kmovq (%rsi), %k0
; CHECK-NEXT:    kmovq (%rdi), %k1
; CHECK-NEXT:    korq %k1, %k0, %k2
; CHECK-NEXT:    vmovdqu8 (%rdx), %zmm0 {%k2} {z}
; CHECK-NEXT:    vmovdqu64 %zmm0, (%rcx)
; CHECK-NEXT:    kandnq %k0, %k1, %k0
; CHECK-NEXT:    knotq %k0, %k1
; CHECK-NEXT:    vmovdqu8 {{.*#+}} zmm0 {%k1} {z} = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; CHECK-NEXT:    vmovdqu64 %zmm0, (%r8)
; CHECK-NEXT:    vzeroupper
; CHECK-NEXT:    retq
  %i0 = load i64, ptr %in0, align 8
  %i1 = load i64, ptr %in1, align 8
  %i2 = load <64 x i8>, ptr %in2, align 1
  %i7 = bitcast i64 %i1 to <64 x i1>
  %i9 = bitcast i64 %i0 to <64 x i1>
  %i12 = or i64 %i1, %i0
  %i13 = bitcast i64 %i12 to <64 x i1>
  %i15 = or <64 x i1> %i13, %i9
  %i17 = select <64 x i1> %i15, <64 x i8> %i2, <64 x i8> zeroinitializer
  store <64 x i8> %i17, ptr %out0, align 16
  %i21 = icmp eq <64 x i8> %i2, splat (i8 4)
  %i22 = xor <64 x i1> %i9, splat (i1 true)
  %i23 = and <64 x i1> %i22, %i7
  %i25 = select <64 x i1> %i23, <64 x i8> zeroinitializer, <64 x i8> splat (i8 15)
  store <64 x i8> %i25, ptr %out1, align 16
  ret void
}