llvm/test/CodeGen/AMDGPU/schedule-physregdeps.mir

# RUN: llc -mtriple=amdgcn -run-pass machine-scheduler -verify-machineinstrs %s -o - -debug-only=machine-scheduler 2>&1 | FileCheck %s
# REQUIRES: asserts

# CHECK:     SU(0):   $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec
# CHECK:       Successors:
# CHECK-NEXT:    SU(2): Out  Latency=1
# CHECK-NEXT:    SU(2): Data Latency=1 Reg=$vgpr0
# CHECK:     SU(1):   $vgpr1 = V_MOV_B32_e32 $sgpr0, implicit $exec
# CHECK:       Successors:
# CHECK-NEXT:    SU(3): Out  Latency=1
# CHECK-NEXT:    SU(3): Data Latency=1 Reg=$vgpr1
# CHECK:     SU(2):   $vgpr0 = V_ADD_CO_U32_e32 $sgpr2, $vgpr0, implicit-def $vcc, implicit $exec
# CHECK:       Predecessors:
# CHECK-NEXT:    SU(0): Out  Latency=1
# CHECK-NEXT:    SU(0): Data Latency=1 Reg=$vgpr0
# CHECK:       Successors:
# CHECK-NEXT:    SU(4): Out  Latency=1
# CHECK-NEXT:    SU(4): Data Latency=1 Reg=$vgpr0_vgpr1
# CHECK-NEXT:    SU(3): Out  Latency=1
# CHECK-NEXT:    SU(3): Data Latency=1 Reg=$vcc
# CHECK:     SU(3):   $vgpr1 = V_ADDC_U32_e32 0, $vgpr1, implicit-def dead $vcc, implicit $vcc, implicit $exec
# CHECK:       Predecessors:
# CHECK-NEXT:    SU(2): Out  Latency=1
# CHECK-NEXT:    SU(2): Data Latency=1 Reg=$vcc
# CHECK-NEXT:    SU(1): Out  Latency=1
# CHECK-NEXT:    SU(1): Data Latency=1 Reg=$vgpr1
# CHECK:       Successors:
# CHECK-NEXT:    SU(4): Out  Latency=1
# CHECK-NEXT:    SU(4): Data Latency=1 Reg=$vgpr0_vgpr1
# CHECK:     SU(4):   $vgpr0_vgpr1 = FLAT_LOAD_DWORDX2 renamable $vgpr0_vgpr1, 0, 0, implicit $exec, implicit $flat_scr
# CHECK:       Predecessors:
# CHECK-NEXT:    SU(3): Out  Latency=1
# CHECK-NEXT:    SU(3): Data Latency=1 Reg=$vgpr0_vgpr1
# CHECK-NEXT:    SU(2): Out  Latency=1
# CHECK-NEXT:    SU(2): Data Latency=1 Reg=$vgpr0_vgpr1
# CHECK:       Successors:
# CHECK-NEXT:    ExitSU: Ord  Latency=3 Artificial

---
name: test
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $sgpr0, $sgpr1, $sgpr2
    $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec
    $vgpr1 = V_MOV_B32_e32 $sgpr0, implicit $exec
    $vgpr0 = V_ADD_CO_U32_e32 $sgpr2, $vgpr0, implicit-def $vcc, implicit $exec
    $vgpr1 = V_ADDC_U32_e32 0, $vgpr1, implicit-def dead $vcc, implicit $vcc, implicit $exec
    $vgpr0_vgpr1 = FLAT_LOAD_DWORDX2 renamable $vgpr0_vgpr1, 0, 0, implicit $exec, implicit $flat_scr
...