llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mulhi.u24.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck %s

define i32 @basic(i32 %a, i32 %b) {
; CHECK-LABEL: basic:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT:    v_mul_hi_u32_u24_e32 v0, v0, v1
; CHECK-NEXT:    s_setpc_b64 s[30:31]
  %mul = call i32 @llvm.amdgcn.mulhi.u24(i32 %a, i32 %b)
  ret i32 %mul
}

declare i32 @llvm.amdgcn.mulhi.u24(i32, i32)