| # RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 -misched=shuffle -verify-machineinstrs -start-before=simple-register-coalescing -systemz-subreg-liveness %s -o - | FileCheck %s |
| |
| # -misched=shuffle is under !NDEBUG. |
| # REQUIRES: asserts |
| |
| # Check for successful compilation. |
| # CHECK: lhi %r0, 0 |
| |
| --- | |
| target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-v128:64-a:8:16-n32:64" |
| target triple = "s390x-unknown-linux-gnu" |
| |
| @g_54 = external dso_local unnamed_addr global i8, align 2 |
| @g_69 = external dso_local unnamed_addr global i32, align 4 |
| @g_189 = external dso_local unnamed_addr global i16, align 2 |
| @g_226 = external dso_local unnamed_addr global i8, align 2 |
| @g_314 = external dso_local global [10 x i8], align 2 |
| @g_334 = external dso_local global i32, align 4 |
| @g_352 = external dso_local unnamed_addr global i64, align 8 |
| @g_747 = external dso_local unnamed_addr global i1, align 2 |
| @0 = internal unnamed_addr global i8 74, align 2 |
| @g_1055 = external dso_local unnamed_addr global i16, align 2 |
| @g_195 = external dso_local global i64**, align 8 |
| |
| declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #0 |
| |
| declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #0 |
| |
| define dso_local fastcc void @func_32(i8 zeroext %arg, i16 zeroext %arg1) unnamed_addr #1 { |
| bb: |
| %tmp = alloca i32, align 4 |
| %tmp2 = alloca [5 x [5 x i32***]], align 8 |
| %tmp3 = bitcast [5 x [5 x i32***]]* %tmp2 to i8* |
| %tmp4 = getelementptr inbounds [5 x [5 x i32***]], [5 x [5 x i32***]]* %tmp2, i64 0, i64 2, i64 2 |
| %tmp5 = bitcast i32**** %tmp4 to i64*** |
| br label %bb6 |
| |
| bb6: ; preds = %bb40, %bb |
| %tmp7 = phi i8 [ 0, %bb ], [ %tmp43, %bb40 ] |
| %tmp8 = phi i16 [ %arg1, %bb ], [ %tmp41, %bb40 ] |
| %tmp9 = phi i8 [ %arg, %bb ], [ 0, %bb40 ] |
| %tmp10 = sext i8 %tmp7 to i64 |
| %tmp11 = add nsw i64 %tmp10, 1 |
| %tmp12 = getelementptr inbounds [10 x i8], [10 x i8]* @g_314, i64 0, i64 %tmp11 |
| %tmp13 = load volatile i8, i8* %tmp12, align 1 |
| br i1 undef, label %bb39, label %bb14 |
| |
| bb14: ; preds = %bb6 |
| %tmp15 = load i64**, i64*** @g_195, align 8 |
| %tmp16 = load volatile i8, i8* %tmp12, align 1 |
| store i32 7, i32* %tmp, align 4 |
| call void @llvm.lifetime.start.p0i8(i64 200, i8* nonnull %tmp3) |
| store i32 580868341, i32* @g_69, align 4 |
| %tmp17 = zext i8 %tmp9 to i64 |
| %tmp18 = load i64, i64* @g_352, align 8 |
| %tmp19 = and i64 %tmp18, %tmp17 |
| %tmp20 = icmp ne i64 %tmp19, 1 |
| %tmp21 = zext i1 %tmp20 to i64 |
| %tmp22 = load i64*, i64** %tmp15, align 8 |
| store i64 %tmp21, i64* %tmp22, align 8 |
| %tmp23 = load i32, i32* @g_334, align 4 |
| %tmp24 = xor i32 %tmp23, 1 |
| store i32 %tmp24, i32* @g_334, align 4 |
| %tmp25 = zext i8 %tmp9 to i16 |
| %tmp26 = mul i16 %tmp25, 26036 |
| %tmp27 = load i64**, i64*** %tmp5, align 8 |
| br label %bb28 |
| |
| bb28: ; preds = %bb14 |
| %tmp29 = mul i16 %tmp26, %tmp8 |
| %tmp30 = zext i16 %tmp29 to i32 |
| store i32 %tmp30, i32* @g_69, align 4 |
| store i8 0, i8* @g_226, align 2 |
| br label %bb32 |
| |
| bb31: ; preds = %bb35 |
| call void @llvm.lifetime.end.p0i8(i64 200, i8* nonnull %tmp3) |
| br label %bb40 |
| |
| bb32: ; preds = %bb34, %bb28 |
| store i16 1, i16* @g_1055, align 2 |
| store i64 0, i64* @g_352, align 8 |
| store i32* @g_334, i32** undef, align 8 |
| %tmp33 = or i64 0, 1 |
| store i64 %tmp33, i64* @g_352, align 8 |
| store i32* @g_334, i32** null, align 8 |
| br label %bb34 |
| |
| bb34: ; preds = %bb32 |
| br i1 false, label %bb32, label %bb35 |
| |
| bb35: ; preds = %bb34 |
| store i32* %tmp, i32** undef, align 8 |
| store i8 0, i8* @0, align 2 |
| store i16 2, i16* @g_189, align 2 |
| store i8 1, i8* @g_54, align 2 |
| store i1 true, i1* @g_747, align 2 |
| store i64 0, i64* undef, align 8 |
| %tmp36 = load i64*, i64** undef, align 8 |
| %tmp37 = load i64, i64* %tmp36, align 8 |
| %tmp38 = load i64*, i64** %tmp27, align 8 |
| store i64 %tmp37, i64* %tmp38, align 8 |
| store i16 0, i16* @g_189, align 2 |
| br label %bb31 |
| |
| bb39: ; preds = %bb6 |
| br label %bb40 |
| |
| bb40: ; preds = %bb39, %bb31 |
| %tmp41 = phi i16 [ undef, %bb39 ], [ 0, %bb31 ] |
| %tmp42 = load volatile i8, i8* %tmp12, align 1 |
| %tmp43 = add i8 %tmp7, 1 |
| br i1 false, label %bb6, label %bb44 |
| |
| bb44: ; preds = %bb40 |
| unreachable |
| } |
| |
| attributes #0 = { argmemonly nofree nosync nounwind willreturn } |
| attributes #1 = { nounwind } |
| attributes #2 = { nofree nosync nounwind willreturn } |
| |
| ... |
| --- |
| name: func_32 |
| alignment: 16 |
| tracksRegLiveness: true |
| liveins: |
| - { reg: '$r2d', virtual-reg: '%0' } |
| - { reg: '$r3d', virtual-reg: '%1' } |
| frameInfo: |
| maxAlignment: 8 |
| stack: |
| - { id: 0, name: tmp, size: 4, alignment: 4 } |
| - { id: 1, name: tmp2, size: 200, alignment: 8 } |
| body: | |
| bb.0.bb: |
| liveins: $r2d, $r3d |
| |
| %1:gr64bit = COPY killed $r3d |
| %0:gr64bit = COPY killed $r2d |
| %2:grx32bit = COPY killed %1.subreg_l32 |
| %3:grx32bit = COPY killed %0.subreg_l32 |
| %4:addr64bit = LA %stack.1.tmp2, 96, $noreg |
| %5:gr32bit = LHIMux 0 |
| %6:addr64bit = LARL @g_314 |
| %7:gr32bit = IIFMux 580868341 |
| %8:addr64bit = LARL @g_352 |
| %9:gr64bit = LGHI 0 |
| %10:addr64bit = LARL @g_334 |
| %11:gr32bit = LHIMux 1 |
| %12:addr64bit = LARL @g_226 |
| %13:gr64bit = LGHI 1 |
| %14:gr64bit = LA %stack.0.tmp, 0, $noreg |
| %15:addr64bit = LARL @0 |
| %16:gr32bit = LHIMux 2 |
| %17:addr64bit = LARL @g_54 |
| %18:addr64bit = LARL @g_747 |
| %19:grx32bit = COPY %5 |
| %20:gr32bit = COPY killed %2 |
| %21:grx32bit = COPY killed %3 |
| |
| bb.1.bb6: |
| %22:grx32bit = COPY killed %21 |
| %23:gr32bit = COPY killed %20 |
| %24:grx32bit = COPY killed %19 |
| undef %25.subreg_l32:gr64bit = COPY %24 |
| %26:addr64bit = LGBR killed %25 |
| %27:addr64bit = LA %26, 1, %6 |
| dead %28:grx32bit = LBMux killed %26, 1, %6 :: (volatile load (s8) from %ir.tmp12) |
| CHIMux %5, 0, implicit-def $cc |
| BRC 14, 6, %bb.7, implicit killed $cc |
| J %bb.2 |
| |
| bb.2.bb14: |
| %29:addr64bit = LGRL @g_195 :: (dereferenceable load (s64) from @g_195) |
| dead %30:grx32bit = LBMux %27, 0, $noreg :: (volatile load (s8) from %ir.tmp12) |
| MVHI %stack.0.tmp, 0, 7 :: (store (s32) into %ir.tmp) |
| STRL %7, @g_69 :: (store (s32) into @g_69) |
| undef %31.subreg_l32:gr64bit = COPY %22 |
| %32:gr64bit = LLGC %8, 7, $noreg :: (dereferenceable load (s8) from @g_352 + 7) |
| %33:gr64bit = COPY killed %32 |
| %33:gr64bit = RNSBG %33, killed %31, 0, 63, 0, implicit-def dead $cc |
| CGHI killed %33, 1, implicit-def $cc |
| %34:gr64bit = COPY %9 |
| %34:gr64bit = LOCGHI %34, 1, 14, 6, implicit killed $cc |
| %35:addr64bit = LG killed %29, 0, $noreg :: (load (s64) from %ir.tmp15) |
| STG killed %34, killed %35, 0, $noreg :: (store (s64) into %ir.tmp22) |
| %36:gr32bit = COPY %11 |
| %36:gr32bit = X %36, %10, 0, $noreg, implicit-def dead $cc :: (dereferenceable load (s32) from @g_334) |
| STRL killed %36, @g_334 :: (store (s32) into @g_334) |
| %37:gr32bit = LLCRMux killed %22 |
| %38:gr32bit = COPY killed %37 |
| %38:gr32bit = MHI %38, 26036 |
| %39:addr64bit = LG %4, 0, $noreg :: (dereferenceable load (s64) from %ir.tmp5) |
| |
| bb.3.bb28: |
| %40:gr32bit = COPY killed %38 |
| %40:gr32bit = MSR %40, killed %23 |
| %41:gr32bit = LLHRMux killed %40 |
| STRL killed %41, @g_69 :: (store (s32) into @g_69) |
| MVI %12, 0, 0 :: (store (s8) into @g_226, align 2) |
| J %bb.4 |
| |
| bb.4.bb32: |
| STHRL %11, @g_1055 :: (store (s16) into @g_1055) |
| STGRL %9, @g_352 :: (store (s64) into @g_352) |
| STG %10, undef %42:addr64bit, 0, $noreg :: (store (s64) into `i32** undef`) |
| STGRL %13, @g_352 :: (store (s64) into @g_352) |
| STG %10, $noreg, 0, $noreg :: (store (s64) into `i32** null`) |
| |
| bb.5.bb34: |
| successors: %bb.4(0x7c000000), %bb.6(0x04000000) |
| |
| CHIMux %5, 0, implicit-def $cc |
| BRC 14, 6, %bb.4, implicit killed $cc |
| J %bb.6 |
| |
| bb.6.bb35: |
| STG %14, undef %43:addr64bit, 0, $noreg :: (store (s64) into `i32** undef`) |
| MVI %15, 0, 0 :: (store (s8) into @0, align 2) |
| STHRL %16, @g_189 :: (store (s16) into @g_189) |
| MVI %17, 0, 1 :: (store (s8) into @g_54, align 2) |
| MVI %18, 0, 1 :: (store (s8) into @g_747, align 2) |
| MVGHI undef %44:addr64bit, 0, 0 :: (store (s64) into `i64* undef`) |
| %45:gr64bit = LG $noreg, 0, $noreg :: (load (s64) from %ir.tmp36) |
| %46:addr64bit = LG killed %39, 0, $noreg :: (load (s64) from %ir.tmp27) |
| STG killed %45, killed %46, 0, $noreg :: (store (s64) into %ir.tmp38) |
| STHRL %5, @g_189 :: (store (s16) into @g_189) |
| %47:grx32bit = LHIMux 0 |
| %48:grx32bit = COPY killed %47 |
| J %bb.8 |
| |
| bb.7.bb39: |
| %48:grx32bit = IMPLICIT_DEF |
| |
| bb.8.bb40: |
| successors: %bb.1(0x7fffffff), %bb.9(0x00000001) |
| |
| %49:grx32bit = COPY killed %48 |
| dead %50:grx32bit = LBMux killed %27, 0, $noreg :: (volatile load (s8) from %ir.tmp12) |
| %51:grx32bit = COPY killed %24 |
| %51:grx32bit = AHIMux %51, 1, implicit-def dead $cc |
| %52:grx32bit = LHIMux 0 |
| CHIMux %52, 0, implicit-def $cc |
| %19:grx32bit = COPY killed %51 |
| %20:gr32bit = COPY killed %49 |
| %21:grx32bit = COPY killed %52 |
| BRC 14, 6, %bb.1, implicit killed $cc |
| J %bb.9 |
| |
| bb.9.bb44: |
| |
| ... |
