llvm/test/CodeGen/Mips/GlobalISel/instruction-select/bswap.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=mipsel-linux-gnu -run-pass=instruction-select -mattr=+mips32r2 -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32R2
--- |

  define void @bswap_i32() { entry: ret void }

...
---
name:            bswap_i32
alignment:       4
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $a0

    ; MIPS32R2-LABEL: name: bswap_i32
    ; MIPS32R2: liveins: $a0
    ; MIPS32R2: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
    ; MIPS32R2: [[WSBH:%[0-9]+]]:gpr32 = WSBH [[COPY]]
    ; MIPS32R2: [[ROTR:%[0-9]+]]:gpr32 = ROTR [[WSBH]], 16
    ; MIPS32R2: $v0 = COPY [[ROTR]]
    ; MIPS32R2: RetRA implicit $v0
    %0:gprb(s32) = COPY $a0
    %1:gprb(s32) = G_BSWAP %0
    $v0 = COPY %1(s32)
    RetRA implicit $v0

...