| commit | 084868f2ff2128c0f66f367a5e1bda1806aa8f98 | [log] [tgz] |
|---|---|---|
| author | Duncan Sands <baldrick@free.fr> | Thu Jun 06 07:44:31 2013 +0000 |
| committer | Duncan Sands <baldrick@free.fr> | Thu Jun 06 07:44:31 2013 +0000 |
| tree | e71686f6e2a9f37a12d0623fa5aae64a91b589ba | |
| parent | f8c129801fb7ff74229051a4da0abd08d6d7aa07 [diff] |
Add missing space. llvm-svn: 183386
diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst index 501a2a6..5808e0e 100644 --- a/llvm/docs/ReleaseNotes.rst +++ b/llvm/docs/ReleaseNotes.rst
@@ -85,7 +85,7 @@ -------------- Removed support for legacy hexagonv2 and hexagonv3 processor architectures which -are no longer in use. Currently supported architectures arehexagonv4 and +are no longer in use. Currently supported architectures are hexagonv4 and hexagonv5. Mips target