llvm/test/CodeGen/X86/pr25725.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py

; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck %s --check-prefix=X64
; RUN: llc < %s -mtriple=i386-pc-linux | FileCheck %s --check-prefix=X86

%struct.s = type { [100 x i32] }

define void @f(ptr nocapture %s) #0 {
; X64-LABEL: f:
; X64:       # %bb.0: # %entry
; X64-NEXT:    xorps %xmm0, %xmm0
; X64-NEXT:    movups %xmm0, 48(%rdi)
; X64-NEXT:    movups %xmm0, 32(%rdi)
; X64-NEXT:    movups %xmm0, 16(%rdi)
; X64-NEXT:    movups %xmm0, (%rdi)
; X64-NEXT:    retq
;
; X86-LABEL: f:
; X86:       # %bb.0: # %entry
; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
; X86-NEXT:    xorps %xmm0, %xmm0
; X86-NEXT:    movups %xmm0, 48(%eax)
; X86-NEXT:    movups %xmm0, 32(%eax)
; X86-NEXT:    movups %xmm0, 16(%eax)
; X86-NEXT:    movups %xmm0, (%eax)
; X86-NEXT:    retl
entry:
  call void @llvm.memset.p0.i32(ptr noundef nonnull align 4 dereferenceable(64) %s, i8 0, i32 64, i1 false)
  ret void
}

declare void @llvm.memset.p0.i32(ptr nocapture writeonly, i8, i32, i1 immarg)

attributes #0 = { "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }