llvm/test/CodeGen/X86/opt-shuff-tstore.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux < %s  -mattr=+sse2,+sse4.1 | FileCheck %s

; A single memory write
define void @func_4_8(<4 x i8> %param, ptr %p) {
; CHECK-LABEL: func_4_8:
; CHECK:       # %bb.0:
; CHECK-NEXT:    paddb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; CHECK-NEXT:    movd %xmm0, (%rdi)
; CHECK-NEXT:    retq
  %r = add <4 x i8> %param, <i8 1, i8 2, i8 3, i8 4>
  store <4 x i8> %r, ptr %p
  ret void
}

define void @func_4_16(<4 x i16> %param, ptr %p) {
; CHECK-LABEL: func_4_16:
; CHECK:       # %bb.0:
; CHECK-NEXT:    paddw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; CHECK-NEXT:    movq %xmm0, (%rdi)
; CHECK-NEXT:    retq
  %r = add <4 x i16> %param, <i16 1, i16 2, i16 3, i16 4>
  store <4 x i16> %r, ptr %p
  ret void
}

define void @func_8_8(<8 x i8> %param, ptr %p) {
; CHECK-LABEL: func_8_8:
; CHECK:       # %bb.0:
; CHECK-NEXT:    paddb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; CHECK-NEXT:    movq %xmm0, (%rdi)
; CHECK-NEXT:    retq
  %r = add <8 x i8> %param, <i8 1, i8 2, i8 3, i8 4, i8 1, i8 2, i8 3, i8 4>
  store <8 x i8> %r, ptr %p
  ret void
}

define void @func_2_32(<2 x i32> %param, ptr %p) {
; CHECK-LABEL: func_2_32:
; CHECK:       # %bb.0:
; CHECK-NEXT:    paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; CHECK-NEXT:    movq %xmm0, (%rdi)
; CHECK-NEXT:    retq
  %r = add <2 x i32> %param, <i32 1, i32 2>
  store <2 x i32> %r, ptr %p
  ret void
}