| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -O0 -mtriple=amdgcn -mcpu=gfx1200 -verify-machineinstrs -run-pass post-RA-hazard-rec -o - %s | FileCheck -check-prefixes=GCN-O0 %s |
| # RUN: llc -O2 -mtriple=amdgcn -mcpu=gfx1200 -verify-machineinstrs -run-pass post-RA-hazard-rec -o - %s | FileCheck -check-prefixes=GCN-O2 %s |
| |
| --- | |
| @mem = internal unnamed_addr addrspace(4) constant [4 x <4 x i32>] [<4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>] |
| |
| define amdgpu_gs void @hazard_getpc1() { ret void } |
| define amdgpu_gs void @hazard_getpc2() { ret void } |
| define amdgpu_gs void @hazard_getpc3() { ret void } |
| define amdgpu_gs void @hazard_getpc4() { ret void } |
| define amdgpu_gs void @hazard_vcc1() { ret void } |
| define amdgpu_gs void @hazard_vcc2() { ret void } |
| define amdgpu_gs void @hazard_vcc3() { ret void } |
| define amdgpu_gs void @hazard_addc1() { ret void } |
| define amdgpu_gs void @hazard_addc2() { ret void } |
| define amdgpu_gs void @hazard_addc3() { ret void } |
| define amdgpu_gs void @hazard_addc4() { ret void } |
| define amdgpu_gs void @hazard_addc5() { ret void } |
| define amdgpu_gs void @hazard_addc6() { ret void } |
| define amdgpu_gs void @hazard_vaddc1() { ret void } |
| define amdgpu_gs void @hazard_gap1() { ret void } |
| define amdgpu_gs void @hazard_gap2() { ret void } |
| define amdgpu_gs void @hazard_gap3() { ret void } |
| define amdgpu_gs void @hazard_gap4_no_hazard() { ret void } |
| define amdgpu_gs void @hazard_valu_write1_no_hazard() { ret void } |
| define amdgpu_gs void @hazard_post_order1() { ret void } |
| define amdgpu_gs void @hazard_post_order2() { ret void } |
| define amdgpu_gs void @hazard_post_order_cycle() { ret void } |
| define amdgpu_cs void @hazard_calls() { ret void } |
| ... |
| |
| --- |
| name: hazard_getpc1 |
| body: | |
| bb.0: |
| ; GCN-O0-LABEL: name: hazard_getpc1 |
| ; GCN-O0: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| ; GCN-O0-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: S_ENDPGM 0 |
| ; |
| ; GCN-O2-LABEL: name: hazard_getpc1 |
| ; GCN-O2: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| ; GCN-O2-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; GCN-O2-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O2-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; GCN-O2-NEXT: S_ENDPGM 0 |
| $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| $sgpr0_sgpr1 = S_GETPC_B64 |
| $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_getpc2 |
| body: | |
| bb.0: |
| ; GCN-O0-LABEL: name: hazard_getpc2 |
| ; GCN-O0: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr1, implicit $exec |
| ; GCN-O0-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: S_ENDPGM 0 |
| ; |
| ; GCN-O2-LABEL: name: hazard_getpc2 |
| ; GCN-O2: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr1, implicit $exec |
| ; GCN-O2-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; GCN-O2-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O2-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; GCN-O2-NEXT: S_ENDPGM 0 |
| $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr1, implicit $exec |
| $sgpr0_sgpr1 = S_GETPC_B64 |
| $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_getpc3 |
| body: | |
| bb.0: |
| ; GCN-O0-LABEL: name: hazard_getpc3 |
| ; GCN-O0: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| ; GCN-O0-NEXT: BUNDLE implicit-def $sgpr0_sgpr1 { |
| ; GCN-O0-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, target-flags(amdgpu-rel32-lo) @mem + 8, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, target-flags(amdgpu-rel32-hi) @mem + 20, implicit-def $scc, implicit $scc |
| ; GCN-O0-NEXT: } |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: S_ENDPGM 0 |
| ; |
| ; GCN-O2-LABEL: name: hazard_getpc3 |
| ; GCN-O2: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| ; GCN-O2-NEXT: BUNDLE implicit-def $sgpr0_sgpr1 { |
| ; GCN-O2-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; GCN-O2-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O2-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, target-flags(amdgpu-rel32-lo) @mem + 8, implicit-def $scc |
| ; GCN-O2-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, target-flags(amdgpu-rel32-hi) @mem + 16, implicit-def $scc, implicit $scc |
| ; GCN-O2-NEXT: } |
| ; GCN-O2-NEXT: S_ENDPGM 0 |
| $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| BUNDLE implicit-def $sgpr0_sgpr1 { |
| $sgpr0_sgpr1 = S_GETPC_B64 |
| $sgpr0 = S_ADD_U32 $sgpr0, target-flags(amdgpu-rel32-lo) @mem + 4, implicit-def $scc |
| $sgpr1 = S_ADDC_U32 $sgpr1, target-flags(amdgpu-rel32-hi) @mem + 12, implicit-def $scc, implicit $scc |
| } |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_getpc4 |
| body: | |
| bb.0: |
| ; GCN-O0-LABEL: name: hazard_getpc4 |
| ; GCN-O0: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| ; GCN-O0-NEXT: BUNDLE implicit-def $sgpr0_sgpr1 { |
| ; GCN-O0-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr1 = S_SEXT_I32_I16 $sgpr1 |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, target-flags(amdgpu-rel32-lo) @mem + 16, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, target-flags(amdgpu-rel32-hi) @mem + 28, implicit-def $scc, implicit $scc |
| ; GCN-O0-NEXT: } |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: S_ENDPGM 0 |
| ; |
| ; GCN-O2-LABEL: name: hazard_getpc4 |
| ; GCN-O2: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| ; GCN-O2-NEXT: BUNDLE implicit-def $sgpr0_sgpr1 { |
| ; GCN-O2-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; GCN-O2-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O2-NEXT: $sgpr1 = S_SEXT_I32_I16 $sgpr1 |
| ; GCN-O2-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, target-flags(amdgpu-rel32-lo) @mem + 12, implicit-def $scc |
| ; GCN-O2-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O2-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, target-flags(amdgpu-rel32-hi) @mem + 24, implicit-def $scc, implicit $scc |
| ; GCN-O2-NEXT: } |
| ; GCN-O2-NEXT: S_ENDPGM 0 |
| $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| BUNDLE implicit-def $sgpr0_sgpr1 { |
| $sgpr0_sgpr1 = S_GETPC_B64 |
| $sgpr1 = S_SEXT_I32_I16 $sgpr1 |
| $sgpr0 = S_ADD_U32 $sgpr0, target-flags(amdgpu-rel32-lo) @mem + 8, implicit-def $scc |
| $sgpr1 = S_ADDC_U32 $sgpr1, target-flags(amdgpu-rel32-hi) @mem + 16, implicit-def $scc, implicit $scc |
| } |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_vcc1 |
| body: | |
| bb.0: |
| ; GCN-O0-LABEL: name: hazard_vcc1 |
| ; GCN-O0: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr2, implicit $exec |
| ; GCN-O0-NEXT: $sgpr3 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr4 = S_ADD_U32 $sgpr3, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: S_ENDPGM 0 |
| ; |
| ; GCN-O2-LABEL: name: hazard_vcc1 |
| ; GCN-O2: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr2, implicit $exec |
| ; GCN-O2-NEXT: $sgpr3 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O2-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O2-NEXT: $sgpr4 = S_ADD_U32 $sgpr3, 0, implicit-def $scc |
| ; GCN-O2-NEXT: S_ENDPGM 0 |
| $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr2, implicit $exec |
| $sgpr3 = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr4 = S_ADD_U32 $sgpr3, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_vcc2 |
| body: | |
| bb.0: |
| ; GCN-O0-LABEL: name: hazard_vcc2 |
| ; GCN-O0: $vgpr1 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc_lo, implicit $exec |
| ; GCN-O0-NEXT: $vcc_lo = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr4 = S_ADD_U32 $vcc_lo, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: S_ENDPGM 0 |
| ; |
| ; GCN-O2-LABEL: name: hazard_vcc2 |
| ; GCN-O2: $vgpr1 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc_lo, implicit $exec |
| ; GCN-O2-NEXT: $vcc_lo = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O2-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O2-NEXT: $sgpr4 = S_ADD_U32 $vcc_lo, 0, implicit-def $scc |
| ; GCN-O2-NEXT: S_ENDPGM 0 |
| $vgpr1 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc, implicit $exec |
| $vcc_lo = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr4 = S_ADD_U32 $vcc_lo, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_vcc3 |
| body: | |
| bb.0: |
| ; GCN-O0-LABEL: name: hazard_vcc3 |
| ; GCN-O0: $vgpr1 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc_lo, implicit $exec |
| ; GCN-O0-NEXT: $vcc_lo = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $vgpr3 = V_CNDMASK_B32_e32 $vgpr4, $vgpr5, implicit $vcc_lo, implicit $exec |
| ; GCN-O0-NEXT: S_ENDPGM 0 |
| ; |
| ; GCN-O2-LABEL: name: hazard_vcc3 |
| ; GCN-O2: $vgpr1 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc_lo, implicit $exec |
| ; GCN-O2-NEXT: $vcc_lo = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O2-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O2-NEXT: $vgpr3 = V_CNDMASK_B32_e32 $vgpr4, $vgpr5, implicit $vcc_lo, implicit $exec |
| ; GCN-O2-NEXT: S_ENDPGM 0 |
| $vgpr1 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc, implicit $exec |
| $vcc_lo = S_CSELECT_B32 -1, 0, implicit $scc |
| $vgpr3 = V_CNDMASK_B32_e32 $vgpr4, $vgpr5, implicit $vcc, implicit $exec |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_addc1 |
| body: | |
| bb.0: |
| ; GCN-O0-LABEL: name: hazard_addc1 |
| ; GCN-O0: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-O0-NEXT: $sgpr0 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr2 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: S_ENDPGM 0 |
| ; |
| ; GCN-O2-LABEL: name: hazard_addc1 |
| ; GCN-O2: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-O2-NEXT: $sgpr0 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O2-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O2-NEXT: $sgpr2 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; GCN-O2-NEXT: S_ENDPGM 0 |
| $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $sgpr0 = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr2 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_addc2 |
| body: | |
| bb.0: |
| ; GCN-O0-LABEL: name: hazard_addc2 |
| ; GCN-O0: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr1, 0, implicit $exec |
| ; GCN-O0-NEXT: $sgpr0 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr2 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: S_ENDPGM 0 |
| ; |
| ; GCN-O2-LABEL: name: hazard_addc2 |
| ; GCN-O2: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr1, 0, implicit $exec |
| ; GCN-O2-NEXT: $sgpr0 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O2-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O2-NEXT: $sgpr2 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; GCN-O2-NEXT: S_ENDPGM 0 |
| $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr1, 0, implicit $exec |
| $sgpr0 = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr2 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_addc3 |
| body: | |
| bb.0: |
| ; GCN-O0-LABEL: name: hazard_addc3 |
| ; GCN-O0: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-O0-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: S_ENDPGM 0 |
| ; |
| ; GCN-O2-LABEL: name: hazard_addc3 |
| ; GCN-O2: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-O2-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O2-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O2-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; GCN-O2-NEXT: S_ENDPGM 0 |
| $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_addc4 |
| body: | |
| bb.0: |
| ; GCN-O0-LABEL: name: hazard_addc4 |
| ; GCN-O0: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr3, 0, implicit $exec |
| ; GCN-O0-NEXT: $sgpr3 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr2 = S_ADD_U32 $sgpr3, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: S_ENDPGM 0 |
| ; |
| ; GCN-O2-LABEL: name: hazard_addc4 |
| ; GCN-O2: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr3, 0, implicit $exec |
| ; GCN-O2-NEXT: $sgpr3 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O2-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O2-NEXT: $sgpr2 = S_ADD_U32 $sgpr3, 0, implicit-def $scc |
| ; GCN-O2-NEXT: S_ENDPGM 0 |
| $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr3, 0, implicit $exec |
| $sgpr3 = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr2 = S_ADD_U32 $sgpr3, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_addc5 |
| body: | |
| bb.0: |
| ; GCN-O0-LABEL: name: hazard_addc5 |
| ; GCN-O0: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-O0-NEXT: $sgpr16 = S_MOV_B32 0 |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr32 = S_MOV_B32 0 |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: S_ENDPGM 0 |
| ; |
| ; GCN-O2-LABEL: name: hazard_addc5 |
| ; GCN-O2: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-O2-NEXT: $sgpr16 = S_MOV_B32 0 |
| ; GCN-O2-NEXT: $sgpr32 = S_MOV_B32 0 |
| ; GCN-O2-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O2-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O2-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; GCN-O2-NEXT: S_ENDPGM 0 |
| $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $sgpr16 = S_MOV_B32 0 |
| $sgpr32 = S_MOV_B32 0 |
| $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_addc6 |
| body: | |
| bb.0: |
| ; GCN-O0-LABEL: name: hazard_addc6 |
| ; GCN-O0: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-O0-NEXT: $sgpr16 = S_MOV_B32 0 |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr32 = S_MOV_B32 0 |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr48 = S_MOV_B32 0 |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr80 = S_MOV_B32 0 |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr96 = S_MOV_B32 0 |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: S_ENDPGM 0 |
| ; |
| ; GCN-O2-LABEL: name: hazard_addc6 |
| ; GCN-O2: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-O2-NEXT: $sgpr16 = S_MOV_B32 0 |
| ; GCN-O2-NEXT: $sgpr32 = S_MOV_B32 0 |
| ; GCN-O2-NEXT: $sgpr48 = S_MOV_B32 0 |
| ; GCN-O2-NEXT: $sgpr80 = S_MOV_B32 0 |
| ; GCN-O2-NEXT: $sgpr96 = S_MOV_B32 0 |
| ; GCN-O2-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O2-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O2-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; GCN-O2-NEXT: S_ENDPGM 0 |
| $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $sgpr16 = S_MOV_B32 0 |
| $sgpr32 = S_MOV_B32 0 |
| $sgpr48 = S_MOV_B32 0 |
| $sgpr80 = S_MOV_B32 0 |
| $sgpr96 = S_MOV_B32 0 |
| $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_vaddc1 |
| body: | |
| bb.0: |
| ; GCN-O0-LABEL: name: hazard_vaddc1 |
| ; GCN-O0: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-O0-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $vgpr2, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr1, 0, implicit $exec |
| ; GCN-O0-NEXT: S_ENDPGM 0 |
| ; |
| ; GCN-O2-LABEL: name: hazard_vaddc1 |
| ; GCN-O2: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-O2-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O2-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O2-NEXT: $vgpr2, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr1, 0, implicit $exec |
| ; GCN-O2-NEXT: S_ENDPGM 0 |
| $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| $vgpr2, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr1, 0, implicit $exec |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_gap1 |
| body: | |
| bb.0: |
| ; GCN-O0-LABEL: name: hazard_gap1 |
| ; GCN-O0: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-O0-NEXT: S_NOP 0 |
| ; GCN-O0-NEXT: S_NOP 0 |
| ; GCN-O0-NEXT: S_NOP 0 |
| ; GCN-O0-NEXT: S_NOP 0 |
| ; GCN-O0-NEXT: S_NOP 0 |
| ; GCN-O0-NEXT: S_NOP 0 |
| ; GCN-O0-NEXT: S_NOP 0 |
| ; GCN-O0-NEXT: S_NOP 0 |
| ; GCN-O0-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: S_ENDPGM 0 |
| ; |
| ; GCN-O2-LABEL: name: hazard_gap1 |
| ; GCN-O2: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-O2-NEXT: S_NOP 0 |
| ; GCN-O2-NEXT: S_NOP 0 |
| ; GCN-O2-NEXT: S_NOP 0 |
| ; GCN-O2-NEXT: S_NOP 0 |
| ; GCN-O2-NEXT: S_NOP 0 |
| ; GCN-O2-NEXT: S_NOP 0 |
| ; GCN-O2-NEXT: S_NOP 0 |
| ; GCN-O2-NEXT: S_NOP 0 |
| ; GCN-O2-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O2-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O2-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; GCN-O2-NEXT: S_ENDPGM 0 |
| $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| S_NOP 0 |
| S_NOP 0 |
| S_NOP 0 |
| S_NOP 0 |
| S_NOP 0 |
| S_NOP 0 |
| S_NOP 0 |
| S_NOP 0 |
| $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_gap2 |
| body: | |
| bb.0: |
| ; GCN-O0-LABEL: name: hazard_gap2 |
| ; GCN-O0: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-O0-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: S_NOP 0 |
| ; GCN-O0-NEXT: S_NOP 0 |
| ; GCN-O0-NEXT: S_NOP 0 |
| ; GCN-O0-NEXT: S_NOP 0 |
| ; GCN-O0-NEXT: S_NOP 0 |
| ; GCN-O0-NEXT: S_NOP 0 |
| ; GCN-O0-NEXT: S_NOP 0 |
| ; GCN-O0-NEXT: S_NOP 0 |
| ; GCN-O0-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: S_ENDPGM 0 |
| ; |
| ; GCN-O2-LABEL: name: hazard_gap2 |
| ; GCN-O2: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-O2-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O2-NEXT: S_NOP 0 |
| ; GCN-O2-NEXT: S_NOP 0 |
| ; GCN-O2-NEXT: S_NOP 0 |
| ; GCN-O2-NEXT: S_NOP 0 |
| ; GCN-O2-NEXT: S_NOP 0 |
| ; GCN-O2-NEXT: S_NOP 0 |
| ; GCN-O2-NEXT: S_NOP 0 |
| ; GCN-O2-NEXT: S_NOP 0 |
| ; GCN-O2-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O2-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; GCN-O2-NEXT: S_ENDPGM 0 |
| $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| S_NOP 0 |
| S_NOP 0 |
| S_NOP 0 |
| S_NOP 0 |
| S_NOP 0 |
| S_NOP 0 |
| S_NOP 0 |
| S_NOP 0 |
| $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_gap3 |
| body: | |
| bb.0: |
| ; GCN-O0-LABEL: name: hazard_gap3 |
| ; GCN-O0: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-O0-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr4 = S_ADD_U32 $sgpr3, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr6 = S_ADD_U32 $sgpr5, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr8 = S_ADD_U32 $sgpr7, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr10 = S_ADD_U32 $sgpr9, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr12 = S_ADD_U32 $sgpr11, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr14 = S_ADD_U32 $sgpr13, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr16 = S_ADD_U32 $sgpr15, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: S_ENDPGM 0 |
| ; |
| ; GCN-O2-LABEL: name: hazard_gap3 |
| ; GCN-O2: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-O2-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O2-NEXT: $sgpr4 = S_ADD_U32 $sgpr3, 0, implicit-def $scc |
| ; GCN-O2-NEXT: $sgpr6 = S_ADD_U32 $sgpr5, 0, implicit-def $scc |
| ; GCN-O2-NEXT: $sgpr8 = S_ADD_U32 $sgpr7, 0, implicit-def $scc |
| ; GCN-O2-NEXT: $sgpr10 = S_ADD_U32 $sgpr9, 0, implicit-def $scc |
| ; GCN-O2-NEXT: $sgpr12 = S_ADD_U32 $sgpr11, 0, implicit-def $scc |
| ; GCN-O2-NEXT: $sgpr14 = S_ADD_U32 $sgpr13, 0, implicit-def $scc |
| ; GCN-O2-NEXT: $sgpr16 = S_ADD_U32 $sgpr15, 0, implicit-def $scc |
| ; GCN-O2-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O2-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; GCN-O2-NEXT: S_ENDPGM 0 |
| $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr4 = S_ADD_U32 $sgpr3, 0, implicit-def $scc |
| $sgpr6 = S_ADD_U32 $sgpr5, 0, implicit-def $scc |
| $sgpr8 = S_ADD_U32 $sgpr7, 0, implicit-def $scc |
| $sgpr10 = S_ADD_U32 $sgpr9, 0, implicit-def $scc |
| $sgpr12 = S_ADD_U32 $sgpr11, 0, implicit-def $scc |
| $sgpr14 = S_ADD_U32 $sgpr13, 0, implicit-def $scc |
| $sgpr16 = S_ADD_U32 $sgpr15, 0, implicit-def $scc |
| $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_gap4_no_hazard |
| body: | |
| bb.0: |
| ; GCN-O0-LABEL: name: hazard_gap4_no_hazard |
| ; GCN-O0: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-O0-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr4 = S_ADD_U32 $sgpr3, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr6 = S_ADD_U32 $sgpr5, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr8 = S_ADD_U32 $sgpr7, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr10 = S_ADD_U32 $sgpr9, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr12 = S_ADD_U32 $sgpr11, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr14 = S_ADD_U32 $sgpr13, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr16 = S_ADD_U32 $sgpr15, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr18 = S_ADD_U32 $sgpr17, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr20 = S_ADD_U32 $sgpr19, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr22 = S_ADD_U32 $sgpr21, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: S_ENDPGM 0 |
| ; |
| ; GCN-O2-LABEL: name: hazard_gap4_no_hazard |
| ; GCN-O2: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-O2-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O2-NEXT: $sgpr4 = S_ADD_U32 $sgpr3, 0, implicit-def $scc |
| ; GCN-O2-NEXT: $sgpr6 = S_ADD_U32 $sgpr5, 0, implicit-def $scc |
| ; GCN-O2-NEXT: $sgpr8 = S_ADD_U32 $sgpr7, 0, implicit-def $scc |
| ; GCN-O2-NEXT: $sgpr10 = S_ADD_U32 $sgpr9, 0, implicit-def $scc |
| ; GCN-O2-NEXT: $sgpr12 = S_ADD_U32 $sgpr11, 0, implicit-def $scc |
| ; GCN-O2-NEXT: $sgpr14 = S_ADD_U32 $sgpr13, 0, implicit-def $scc |
| ; GCN-O2-NEXT: $sgpr16 = S_ADD_U32 $sgpr15, 0, implicit-def $scc |
| ; GCN-O2-NEXT: $sgpr18 = S_ADD_U32 $sgpr17, 0, implicit-def $scc |
| ; GCN-O2-NEXT: $sgpr20 = S_ADD_U32 $sgpr19, 0, implicit-def $scc |
| ; GCN-O2-NEXT: $sgpr22 = S_ADD_U32 $sgpr21, 0, implicit-def $scc |
| ; GCN-O2-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; GCN-O2-NEXT: S_ENDPGM 0 |
| $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr4 = S_ADD_U32 $sgpr3, 0, implicit-def $scc |
| $sgpr6 = S_ADD_U32 $sgpr5, 0, implicit-def $scc |
| $sgpr8 = S_ADD_U32 $sgpr7, 0, implicit-def $scc |
| $sgpr10 = S_ADD_U32 $sgpr9, 0, implicit-def $scc |
| $sgpr12 = S_ADD_U32 $sgpr11, 0, implicit-def $scc |
| $sgpr14 = S_ADD_U32 $sgpr13, 0, implicit-def $scc |
| $sgpr16 = S_ADD_U32 $sgpr15, 0, implicit-def $scc |
| $sgpr18 = S_ADD_U32 $sgpr17, 0, implicit-def $scc |
| $sgpr20 = S_ADD_U32 $sgpr19, 0, implicit-def $scc |
| $sgpr22 = S_ADD_U32 $sgpr21, 0, implicit-def $scc |
| $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_valu_write1_no_hazard |
| body: | |
| bb.0: |
| ; GCN-O0-LABEL: name: hazard_valu_write1_no_hazard |
| ; GCN-O0: $sgpr1 = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec |
| ; GCN-O0-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: S_ENDPGM 0 |
| ; |
| ; GCN-O2-LABEL: name: hazard_valu_write1_no_hazard |
| ; GCN-O2: $sgpr1 = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec |
| ; GCN-O2-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-O2-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; GCN-O2-NEXT: S_ENDPGM 0 |
| $sgpr1 = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec |
| $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_post_order1 |
| body: | |
| bb.0: |
| ; GCN-O0-LABEL: name: hazard_post_order1 |
| ; GCN-O0: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| ; GCN-O0-NEXT: S_ENDPGM 0 |
| ; |
| ; GCN-O2-LABEL: name: hazard_post_order1 |
| ; GCN-O2: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; GCN-O2-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; GCN-O2-NEXT: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| ; GCN-O2-NEXT: S_ENDPGM 0 |
| $sgpr0_sgpr1 = S_GETPC_B64 |
| $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_post_order2 |
| body: | |
| ; GCN-O0-LABEL: name: hazard_post_order2 |
| ; GCN-O0: bb.0: |
| ; GCN-O0-NEXT: successors: %bb.1(0x80000000) |
| ; GCN-O0-NEXT: {{ $}} |
| ; GCN-O0-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: S_BRANCH %bb.1 |
| ; GCN-O0-NEXT: {{ $}} |
| ; GCN-O0-NEXT: bb.1: |
| ; GCN-O0-NEXT: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| ; GCN-O0-NEXT: S_ENDPGM 0 |
| ; |
| ; GCN-O2-LABEL: name: hazard_post_order2 |
| ; GCN-O2: bb.0: |
| ; GCN-O2-NEXT: successors: %bb.1(0x80000000) |
| ; GCN-O2-NEXT: {{ $}} |
| ; GCN-O2-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; GCN-O2-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; GCN-O2-NEXT: S_BRANCH %bb.1 |
| ; GCN-O2-NEXT: {{ $}} |
| ; GCN-O2-NEXT: bb.1: |
| ; GCN-O2-NEXT: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| ; GCN-O2-NEXT: S_ENDPGM 0 |
| bb.0: |
| $sgpr0_sgpr1 = S_GETPC_B64 |
| $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| S_BRANCH %bb.1 |
| |
| bb.1: |
| $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_post_order_cycle |
| body: | |
| ; GCN-O0-LABEL: name: hazard_post_order_cycle |
| ; GCN-O0: bb.0: |
| ; GCN-O0-NEXT: successors: %bb.1(0x80000000) |
| ; GCN-O0-NEXT: {{ $}} |
| ; GCN-O0-NEXT: S_NOP 0 |
| ; GCN-O0-NEXT: {{ $}} |
| ; GCN-O0-NEXT: bb.1: |
| ; GCN-O0-NEXT: successors: %bb.2(0x80000000) |
| ; GCN-O0-NEXT: {{ $}} |
| ; GCN-O0-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: {{ $}} |
| ; GCN-O0-NEXT: bb.2: |
| ; GCN-O0-NEXT: successors: %bb.1(0x40000000), %bb.3(0x40000000) |
| ; GCN-O0-NEXT: {{ $}} |
| ; GCN-O0-NEXT: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| ; GCN-O0-NEXT: S_CBRANCH_SCC0 %bb.1, implicit $scc |
| ; GCN-O0-NEXT: {{ $}} |
| ; GCN-O0-NEXT: bb.3: |
| ; GCN-O0-NEXT: S_ENDPGM 0 |
| ; |
| ; GCN-O2-LABEL: name: hazard_post_order_cycle |
| ; GCN-O2: bb.0: |
| ; GCN-O2-NEXT: successors: %bb.1(0x80000000) |
| ; GCN-O2-NEXT: {{ $}} |
| ; GCN-O2-NEXT: S_NOP 0 |
| ; GCN-O2-NEXT: {{ $}} |
| ; GCN-O2-NEXT: bb.1: |
| ; GCN-O2-NEXT: successors: %bb.2(0x80000000) |
| ; GCN-O2-NEXT: {{ $}} |
| ; GCN-O2-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; GCN-O2-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O2-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; GCN-O2-NEXT: {{ $}} |
| ; GCN-O2-NEXT: bb.2: |
| ; GCN-O2-NEXT: successors: %bb.1(0x40000000), %bb.3(0x40000000) |
| ; GCN-O2-NEXT: {{ $}} |
| ; GCN-O2-NEXT: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| ; GCN-O2-NEXT: S_CBRANCH_SCC0 %bb.1, implicit $scc |
| ; GCN-O2-NEXT: {{ $}} |
| ; GCN-O2-NEXT: bb.3: |
| ; GCN-O2-NEXT: S_ENDPGM 0 |
| bb.0: |
| S_NOP 0 |
| |
| bb.1: |
| $sgpr0_sgpr1 = S_GETPC_B64 |
| $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| |
| bb.2: |
| $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| S_CBRANCH_SCC0 %bb.1, implicit $scc |
| |
| bb.3: |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_calls |
| frameInfo: |
| hasCalls: true |
| body: | |
| ; GCN-O0-LABEL: name: hazard_calls |
| ; GCN-O0: bb.0: |
| ; GCN-O0-NEXT: $sgpr16 = S_MOV_B32 0 |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: S_SETPC_B64 $sgpr0_sgpr1 |
| ; GCN-O0-NEXT: {{ $}} |
| ; GCN-O0-NEXT: bb.1: |
| ; GCN-O0-NEXT: $sgpr18 = S_MOV_B32 0 |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: S_SETPC_B64_return $sgpr0_sgpr1 |
| ; GCN-O0-NEXT: {{ $}} |
| ; GCN-O0-NEXT: bb.2: |
| ; GCN-O0-NEXT: successors: %bb.3(0x80000000) |
| ; GCN-O0-NEXT: {{ $}} |
| ; GCN-O0-NEXT: $sgpr20 = S_MOV_B32 0 |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr4_sgpr5 = S_SWAPPC_B64 $sgpr2_sgpr3 |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: $sgpr4 = S_ADD_U32 $sgpr4, 0, implicit-def $scc |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: {{ $}} |
| ; GCN-O0-NEXT: bb.3: |
| ; GCN-O0-NEXT: successors: %bb.4(0x80000000) |
| ; GCN-O0-NEXT: {{ $}} |
| ; GCN-O0-NEXT: $sgpr8_sgpr9 = S_CALL_B64 0 |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: {{ $}} |
| ; GCN-O0-NEXT: bb.4: |
| ; GCN-O0-NEXT: $sgpr22 = S_MOV_B32 $sgpr8 |
| ; GCN-O0-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O0-NEXT: S_ENDPGM 0 |
| ; |
| ; GCN-O2-LABEL: name: hazard_calls |
| ; GCN-O2: bb.0: |
| ; GCN-O2-NEXT: $sgpr16 = S_MOV_B32 0 |
| ; GCN-O2-NEXT: S_SETPC_B64 $sgpr0_sgpr1 |
| ; GCN-O2-NEXT: {{ $}} |
| ; GCN-O2-NEXT: bb.1: |
| ; GCN-O2-NEXT: $sgpr18 = S_MOV_B32 0 |
| ; GCN-O2-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O2-NEXT: S_SETPC_B64_return $sgpr0_sgpr1 |
| ; GCN-O2-NEXT: {{ $}} |
| ; GCN-O2-NEXT: bb.2: |
| ; GCN-O2-NEXT: successors: %bb.3(0x80000000) |
| ; GCN-O2-NEXT: {{ $}} |
| ; GCN-O2-NEXT: $sgpr20 = S_MOV_B32 0 |
| ; GCN-O2-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O2-NEXT: $sgpr4_sgpr5 = S_SWAPPC_B64 $sgpr2_sgpr3 |
| ; GCN-O2-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O2-NEXT: $sgpr4 = S_ADD_U32 $sgpr4, 0, implicit-def $scc |
| ; GCN-O2-NEXT: {{ $}} |
| ; GCN-O2-NEXT: bb.3: |
| ; GCN-O2-NEXT: successors: %bb.4(0x80000000) |
| ; GCN-O2-NEXT: {{ $}} |
| ; GCN-O2-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O2-NEXT: $sgpr8_sgpr9 = S_CALL_B64 0 |
| ; GCN-O2-NEXT: {{ $}} |
| ; GCN-O2-NEXT: bb.4: |
| ; GCN-O2-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-O2-NEXT: $sgpr22 = S_MOV_B32 $sgpr8 |
| ; GCN-O2-NEXT: S_ENDPGM 0 |
| bb.0: |
| $sgpr16 = S_MOV_B32 0 |
| S_SETPC_B64 $sgpr0_sgpr1 |
| |
| bb.1: |
| $sgpr18 = S_MOV_B32 0 |
| S_SETPC_B64_return $sgpr0_sgpr1 |
| |
| bb.2: |
| $sgpr20 = S_MOV_B32 0 |
| $sgpr4_sgpr5 = S_SWAPPC_B64 $sgpr2_sgpr3 |
| $sgpr4 = S_ADD_U32 $sgpr4, 0, implicit-def $scc |
| |
| bb.3: |
| $sgpr8_sgpr9 = S_CALL_B64 0 |
| |
| bb.4: |
| $sgpr22 = S_MOV_B32 $sgpr8 |
| S_ENDPGM 0 |
| ... |