llvm/test/CodeGen/X86/shuffle-combine-crash-5.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512bw,avx512vl | FileCheck %s

define i1 @test(ptr %q) {
; CHECK-LABEL: test:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    vmovq {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT:    vpxor %xmm0, %xmm0, %xmm0
; CHECK-NEXT:    vpbroadcastq %xmm0, %ymm0
; CHECK-NEXT:    vptest %ymm0, %ymm0
; CHECK-NEXT:    sete %al
; CHECK-NEXT:    vzeroupper
; CHECK-NEXT:    retq
entry:
  %0 = load i64, ptr %q, align 8
  %add = add nsw i64 %0, 0
  %add2 = add nsw i64 %add, 0
  %add5 = add nsw i64 %add2, 0
  %vecinit1.i.i68 = insertelement <2 x i64> poison, i64 %add5, i64 0
  %add8 = add nsw i64 %add5, 0
  %vecinit.i.i55 = insertelement <4 x i64> undef, i64 %add8, i64 0
  %1 = bitcast <2 x i64> %vecinit1.i.i68 to <4 x i32>
  %2 = shufflevector <4 x i32> %1, <4 x i32> poison, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>
  %3 = bitcast <4 x i64> %vecinit.i.i55 to <8 x i32>
  %4 = shufflevector <8 x i32> %3, <8 x i32> poison, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>
  %5 = icmp ne <8 x i32> %2, %4
  %6 = bitcast <8 x i1> %5 to i8
  %7 = icmp eq i8 %6, 0
  ret i1 %7
}