| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 |
| |
| ; RUN: llc -mtriple=amdgcn < %s | FileCheck -check-prefix=GCN %s |
| ; RUN: llc -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefixes=VI %s |
| ; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX9 %s |
| ; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 < %s | FileCheck -check-prefixes=GFX11 %s |
| |
| define <18 x float> @bitcast_v18i32_to_v18f32(<18 x i32> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v18i32_to_v18f32: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB0_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.true |
| ; GCN-NEXT: v_add_i32_e32 v17, vcc, 3, v17 |
| ; GCN-NEXT: v_add_i32_e32 v16, vcc, 3, v16 |
| ; GCN-NEXT: v_add_i32_e32 v15, vcc, 3, v15 |
| ; GCN-NEXT: v_add_i32_e32 v14, vcc, 3, v14 |
| ; GCN-NEXT: v_add_i32_e32 v13, vcc, 3, v13 |
| ; GCN-NEXT: v_add_i32_e32 v12, vcc, 3, v12 |
| ; GCN-NEXT: v_add_i32_e32 v11, vcc, 3, v11 |
| ; GCN-NEXT: v_add_i32_e32 v10, vcc, 3, v10 |
| ; GCN-NEXT: v_add_i32_e32 v9, vcc, 3, v9 |
| ; GCN-NEXT: v_add_i32_e32 v8, vcc, 3, v8 |
| ; GCN-NEXT: v_add_i32_e32 v7, vcc, 3, v7 |
| ; GCN-NEXT: v_add_i32_e32 v6, vcc, 3, v6 |
| ; GCN-NEXT: v_add_i32_e32 v5, vcc, 3, v5 |
| ; GCN-NEXT: v_add_i32_e32 v4, vcc, 3, v4 |
| ; GCN-NEXT: v_add_i32_e32 v3, vcc, 3, v3 |
| ; GCN-NEXT: v_add_i32_e32 v2, vcc, 3, v2 |
| ; GCN-NEXT: v_add_i32_e32 v1, vcc, 3, v1 |
| ; GCN-NEXT: v_add_i32_e32 v0, vcc, 3, v0 |
| ; GCN-NEXT: .LBB0_2: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v18i32_to_v18f32: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB0_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.true |
| ; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v17 |
| ; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v16 |
| ; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v15 |
| ; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v14 |
| ; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v13 |
| ; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v12 |
| ; VI-NEXT: v_add_u32_e32 v11, vcc, 3, v11 |
| ; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v10 |
| ; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v9 |
| ; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v8 |
| ; VI-NEXT: v_add_u32_e32 v7, vcc, 3, v7 |
| ; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v6 |
| ; VI-NEXT: v_add_u32_e32 v5, vcc, 3, v5 |
| ; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v4 |
| ; VI-NEXT: v_add_u32_e32 v3, vcc, 3, v3 |
| ; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v2 |
| ; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v1 |
| ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 |
| ; VI-NEXT: .LBB0_2: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v18i32_to_v18f32: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB0_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX9-NEXT: v_add_u32_e32 v17, 3, v17 |
| ; GFX9-NEXT: v_add_u32_e32 v16, 3, v16 |
| ; GFX9-NEXT: v_add_u32_e32 v15, 3, v15 |
| ; GFX9-NEXT: v_add_u32_e32 v14, 3, v14 |
| ; GFX9-NEXT: v_add_u32_e32 v13, 3, v13 |
| ; GFX9-NEXT: v_add_u32_e32 v12, 3, v12 |
| ; GFX9-NEXT: v_add_u32_e32 v11, 3, v11 |
| ; GFX9-NEXT: v_add_u32_e32 v10, 3, v10 |
| ; GFX9-NEXT: v_add_u32_e32 v9, 3, v9 |
| ; GFX9-NEXT: v_add_u32_e32 v8, 3, v8 |
| ; GFX9-NEXT: v_add_u32_e32 v7, 3, v7 |
| ; GFX9-NEXT: v_add_u32_e32 v6, 3, v6 |
| ; GFX9-NEXT: v_add_u32_e32 v5, 3, v5 |
| ; GFX9-NEXT: v_add_u32_e32 v4, 3, v4 |
| ; GFX9-NEXT: v_add_u32_e32 v3, 3, v3 |
| ; GFX9-NEXT: v_add_u32_e32 v2, 3, v2 |
| ; GFX9-NEXT: v_add_u32_e32 v1, 3, v1 |
| ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 |
| ; GFX9-NEXT: .LBB0_2: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v18i32_to_v18f32: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: s_mov_b32 s0, exec_lo |
| ; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v18 |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB0_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX11-NEXT: v_add_nc_u32_e32 v17, 3, v17 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v16, 3, v16 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v15, 3, v15 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v14, 3, v14 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v13, 3, v13 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v12, 3, v12 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v11, 3, v11 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v10, 3, v10 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v9, 3, v9 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v8, 3, v8 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v7, 3, v7 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v6, 3, v6 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v5, 3, v5 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v4, 3, v4 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v3, 3, v3 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v2, 3, v2 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v1, 3, v1 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v0, 3, v0 |
| ; GFX11-NEXT: .LBB0_2: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = add <18 x i32> %a, splat (i32 3) |
| %a2 = bitcast <18 x i32> %a1 to <18 x float> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <18 x i32> %a to <18 x float> |
| br label %end |
| |
| end: |
| %phi = phi <18 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <18 x float> %phi |
| } |
| |
| define <18 x i32> @bitcast_v18f32_to_v18i32(<18 x float> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v18f32_to_v18i32: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB1_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.true |
| ; GCN-NEXT: v_add_f32_e32 v17, 1.0, v17 |
| ; GCN-NEXT: v_add_f32_e32 v16, 1.0, v16 |
| ; GCN-NEXT: v_add_f32_e32 v15, 1.0, v15 |
| ; GCN-NEXT: v_add_f32_e32 v14, 1.0, v14 |
| ; GCN-NEXT: v_add_f32_e32 v13, 1.0, v13 |
| ; GCN-NEXT: v_add_f32_e32 v12, 1.0, v12 |
| ; GCN-NEXT: v_add_f32_e32 v11, 1.0, v11 |
| ; GCN-NEXT: v_add_f32_e32 v10, 1.0, v10 |
| ; GCN-NEXT: v_add_f32_e32 v9, 1.0, v9 |
| ; GCN-NEXT: v_add_f32_e32 v8, 1.0, v8 |
| ; GCN-NEXT: v_add_f32_e32 v7, 1.0, v7 |
| ; GCN-NEXT: v_add_f32_e32 v6, 1.0, v6 |
| ; GCN-NEXT: v_add_f32_e32 v5, 1.0, v5 |
| ; GCN-NEXT: v_add_f32_e32 v4, 1.0, v4 |
| ; GCN-NEXT: v_add_f32_e32 v3, 1.0, v3 |
| ; GCN-NEXT: v_add_f32_e32 v2, 1.0, v2 |
| ; GCN-NEXT: v_add_f32_e32 v1, 1.0, v1 |
| ; GCN-NEXT: v_add_f32_e32 v0, 1.0, v0 |
| ; GCN-NEXT: .LBB1_2: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v18f32_to_v18i32: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB1_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.true |
| ; VI-NEXT: v_add_f32_e32 v17, 1.0, v17 |
| ; VI-NEXT: v_add_f32_e32 v16, 1.0, v16 |
| ; VI-NEXT: v_add_f32_e32 v15, 1.0, v15 |
| ; VI-NEXT: v_add_f32_e32 v14, 1.0, v14 |
| ; VI-NEXT: v_add_f32_e32 v13, 1.0, v13 |
| ; VI-NEXT: v_add_f32_e32 v12, 1.0, v12 |
| ; VI-NEXT: v_add_f32_e32 v11, 1.0, v11 |
| ; VI-NEXT: v_add_f32_e32 v10, 1.0, v10 |
| ; VI-NEXT: v_add_f32_e32 v9, 1.0, v9 |
| ; VI-NEXT: v_add_f32_e32 v8, 1.0, v8 |
| ; VI-NEXT: v_add_f32_e32 v7, 1.0, v7 |
| ; VI-NEXT: v_add_f32_e32 v6, 1.0, v6 |
| ; VI-NEXT: v_add_f32_e32 v5, 1.0, v5 |
| ; VI-NEXT: v_add_f32_e32 v4, 1.0, v4 |
| ; VI-NEXT: v_add_f32_e32 v3, 1.0, v3 |
| ; VI-NEXT: v_add_f32_e32 v2, 1.0, v2 |
| ; VI-NEXT: v_add_f32_e32 v1, 1.0, v1 |
| ; VI-NEXT: v_add_f32_e32 v0, 1.0, v0 |
| ; VI-NEXT: .LBB1_2: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v18f32_to_v18i32: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB1_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX9-NEXT: v_add_f32_e32 v17, 1.0, v17 |
| ; GFX9-NEXT: v_add_f32_e32 v16, 1.0, v16 |
| ; GFX9-NEXT: v_add_f32_e32 v15, 1.0, v15 |
| ; GFX9-NEXT: v_add_f32_e32 v14, 1.0, v14 |
| ; GFX9-NEXT: v_add_f32_e32 v13, 1.0, v13 |
| ; GFX9-NEXT: v_add_f32_e32 v12, 1.0, v12 |
| ; GFX9-NEXT: v_add_f32_e32 v11, 1.0, v11 |
| ; GFX9-NEXT: v_add_f32_e32 v10, 1.0, v10 |
| ; GFX9-NEXT: v_add_f32_e32 v9, 1.0, v9 |
| ; GFX9-NEXT: v_add_f32_e32 v8, 1.0, v8 |
| ; GFX9-NEXT: v_add_f32_e32 v7, 1.0, v7 |
| ; GFX9-NEXT: v_add_f32_e32 v6, 1.0, v6 |
| ; GFX9-NEXT: v_add_f32_e32 v5, 1.0, v5 |
| ; GFX9-NEXT: v_add_f32_e32 v4, 1.0, v4 |
| ; GFX9-NEXT: v_add_f32_e32 v3, 1.0, v3 |
| ; GFX9-NEXT: v_add_f32_e32 v2, 1.0, v2 |
| ; GFX9-NEXT: v_add_f32_e32 v1, 1.0, v1 |
| ; GFX9-NEXT: v_add_f32_e32 v0, 1.0, v0 |
| ; GFX9-NEXT: .LBB1_2: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v18f32_to_v18i32: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: s_mov_b32 s0, exec_lo |
| ; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v18 |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB1_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX11-NEXT: v_dual_add_f32 v17, 1.0, v17 :: v_dual_add_f32 v16, 1.0, v16 |
| ; GFX11-NEXT: v_dual_add_f32 v15, 1.0, v15 :: v_dual_add_f32 v14, 1.0, v14 |
| ; GFX11-NEXT: v_dual_add_f32 v13, 1.0, v13 :: v_dual_add_f32 v12, 1.0, v12 |
| ; GFX11-NEXT: v_dual_add_f32 v11, 1.0, v11 :: v_dual_add_f32 v10, 1.0, v10 |
| ; GFX11-NEXT: v_dual_add_f32 v9, 1.0, v9 :: v_dual_add_f32 v8, 1.0, v8 |
| ; GFX11-NEXT: v_dual_add_f32 v7, 1.0, v7 :: v_dual_add_f32 v6, 1.0, v6 |
| ; GFX11-NEXT: v_dual_add_f32 v5, 1.0, v5 :: v_dual_add_f32 v4, 1.0, v4 |
| ; GFX11-NEXT: v_dual_add_f32 v3, 1.0, v3 :: v_dual_add_f32 v2, 1.0, v2 |
| ; GFX11-NEXT: v_dual_add_f32 v1, 1.0, v1 :: v_dual_add_f32 v0, 1.0, v0 |
| ; GFX11-NEXT: .LBB1_2: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = fadd <18 x float> %a, splat (float 1.000000e+00) |
| %a2 = bitcast <18 x float> %a1 to <18 x i32> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <18 x float> %a to <18 x i32> |
| br label %end |
| |
| end: |
| %phi = phi <18 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <18 x i32> %phi |
| } |
| |
| define <9 x i64> @bitcast_v18i32_to_v9i64(<18 x i32> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v18i32_to_v9i64: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB2_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.true |
| ; GCN-NEXT: v_add_i32_e32 v17, vcc, 3, v17 |
| ; GCN-NEXT: v_add_i32_e32 v16, vcc, 3, v16 |
| ; GCN-NEXT: v_add_i32_e32 v15, vcc, 3, v15 |
| ; GCN-NEXT: v_add_i32_e32 v14, vcc, 3, v14 |
| ; GCN-NEXT: v_add_i32_e32 v13, vcc, 3, v13 |
| ; GCN-NEXT: v_add_i32_e32 v12, vcc, 3, v12 |
| ; GCN-NEXT: v_add_i32_e32 v11, vcc, 3, v11 |
| ; GCN-NEXT: v_add_i32_e32 v10, vcc, 3, v10 |
| ; GCN-NEXT: v_add_i32_e32 v9, vcc, 3, v9 |
| ; GCN-NEXT: v_add_i32_e32 v8, vcc, 3, v8 |
| ; GCN-NEXT: v_add_i32_e32 v7, vcc, 3, v7 |
| ; GCN-NEXT: v_add_i32_e32 v6, vcc, 3, v6 |
| ; GCN-NEXT: v_add_i32_e32 v5, vcc, 3, v5 |
| ; GCN-NEXT: v_add_i32_e32 v4, vcc, 3, v4 |
| ; GCN-NEXT: v_add_i32_e32 v3, vcc, 3, v3 |
| ; GCN-NEXT: v_add_i32_e32 v2, vcc, 3, v2 |
| ; GCN-NEXT: v_add_i32_e32 v1, vcc, 3, v1 |
| ; GCN-NEXT: v_add_i32_e32 v0, vcc, 3, v0 |
| ; GCN-NEXT: .LBB2_2: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v18i32_to_v9i64: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB2_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.true |
| ; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v17 |
| ; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v16 |
| ; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v15 |
| ; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v14 |
| ; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v13 |
| ; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v12 |
| ; VI-NEXT: v_add_u32_e32 v11, vcc, 3, v11 |
| ; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v10 |
| ; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v9 |
| ; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v8 |
| ; VI-NEXT: v_add_u32_e32 v7, vcc, 3, v7 |
| ; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v6 |
| ; VI-NEXT: v_add_u32_e32 v5, vcc, 3, v5 |
| ; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v4 |
| ; VI-NEXT: v_add_u32_e32 v3, vcc, 3, v3 |
| ; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v2 |
| ; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v1 |
| ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 |
| ; VI-NEXT: .LBB2_2: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v18i32_to_v9i64: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB2_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX9-NEXT: v_add_u32_e32 v17, 3, v17 |
| ; GFX9-NEXT: v_add_u32_e32 v16, 3, v16 |
| ; GFX9-NEXT: v_add_u32_e32 v15, 3, v15 |
| ; GFX9-NEXT: v_add_u32_e32 v14, 3, v14 |
| ; GFX9-NEXT: v_add_u32_e32 v13, 3, v13 |
| ; GFX9-NEXT: v_add_u32_e32 v12, 3, v12 |
| ; GFX9-NEXT: v_add_u32_e32 v11, 3, v11 |
| ; GFX9-NEXT: v_add_u32_e32 v10, 3, v10 |
| ; GFX9-NEXT: v_add_u32_e32 v9, 3, v9 |
| ; GFX9-NEXT: v_add_u32_e32 v8, 3, v8 |
| ; GFX9-NEXT: v_add_u32_e32 v7, 3, v7 |
| ; GFX9-NEXT: v_add_u32_e32 v6, 3, v6 |
| ; GFX9-NEXT: v_add_u32_e32 v5, 3, v5 |
| ; GFX9-NEXT: v_add_u32_e32 v4, 3, v4 |
| ; GFX9-NEXT: v_add_u32_e32 v3, 3, v3 |
| ; GFX9-NEXT: v_add_u32_e32 v2, 3, v2 |
| ; GFX9-NEXT: v_add_u32_e32 v1, 3, v1 |
| ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 |
| ; GFX9-NEXT: .LBB2_2: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v18i32_to_v9i64: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: s_mov_b32 s0, exec_lo |
| ; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v18 |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB2_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX11-NEXT: v_add_nc_u32_e32 v17, 3, v17 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v16, 3, v16 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v15, 3, v15 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v14, 3, v14 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v13, 3, v13 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v12, 3, v12 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v11, 3, v11 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v10, 3, v10 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v9, 3, v9 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v8, 3, v8 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v7, 3, v7 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v6, 3, v6 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v5, 3, v5 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v4, 3, v4 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v3, 3, v3 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v2, 3, v2 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v1, 3, v1 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v0, 3, v0 |
| ; GFX11-NEXT: .LBB2_2: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = add <18 x i32> %a, splat (i32 3) |
| %a2 = bitcast <18 x i32> %a1 to <9 x i64> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <18 x i32> %a to <9 x i64> |
| br label %end |
| |
| end: |
| %phi = phi <9 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <9 x i64> %phi |
| } |
| |
| define <18 x i32> @bitcast_v9i64_to_v18i32(<9 x i64> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v9i64_to_v18i32: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB3_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.true |
| ; GCN-NEXT: v_add_i32_e32 v16, vcc, 3, v16 |
| ; GCN-NEXT: v_addc_u32_e32 v17, vcc, 0, v17, vcc |
| ; GCN-NEXT: v_add_i32_e32 v14, vcc, 3, v14 |
| ; GCN-NEXT: v_addc_u32_e32 v15, vcc, 0, v15, vcc |
| ; GCN-NEXT: v_add_i32_e32 v12, vcc, 3, v12 |
| ; GCN-NEXT: v_addc_u32_e32 v13, vcc, 0, v13, vcc |
| ; GCN-NEXT: v_add_i32_e32 v10, vcc, 3, v10 |
| ; GCN-NEXT: v_addc_u32_e32 v11, vcc, 0, v11, vcc |
| ; GCN-NEXT: v_add_i32_e32 v8, vcc, 3, v8 |
| ; GCN-NEXT: v_addc_u32_e32 v9, vcc, 0, v9, vcc |
| ; GCN-NEXT: v_add_i32_e32 v6, vcc, 3, v6 |
| ; GCN-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc |
| ; GCN-NEXT: v_add_i32_e32 v4, vcc, 3, v4 |
| ; GCN-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc |
| ; GCN-NEXT: v_add_i32_e32 v2, vcc, 3, v2 |
| ; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc |
| ; GCN-NEXT: v_add_i32_e32 v0, vcc, 3, v0 |
| ; GCN-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc |
| ; GCN-NEXT: .LBB3_2: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v9i64_to_v18i32: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB3_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.true |
| ; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v16 |
| ; VI-NEXT: v_addc_u32_e32 v17, vcc, 0, v17, vcc |
| ; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v14 |
| ; VI-NEXT: v_addc_u32_e32 v15, vcc, 0, v15, vcc |
| ; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v12 |
| ; VI-NEXT: v_addc_u32_e32 v13, vcc, 0, v13, vcc |
| ; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v10 |
| ; VI-NEXT: v_addc_u32_e32 v11, vcc, 0, v11, vcc |
| ; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v8 |
| ; VI-NEXT: v_addc_u32_e32 v9, vcc, 0, v9, vcc |
| ; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v6 |
| ; VI-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc |
| ; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v4 |
| ; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc |
| ; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v2 |
| ; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc |
| ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 |
| ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc |
| ; VI-NEXT: .LBB3_2: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v9i64_to_v18i32: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB3_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX9-NEXT: v_add_co_u32_e32 v16, vcc, 3, v16 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v17, vcc, 0, v17, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v14, vcc, 3, v14 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v15, vcc, 0, v15, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v12, vcc, 3, v12 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v13, vcc, 0, v13, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v10, vcc, 3, v10 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v11, vcc, 0, v11, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v8, vcc, 3, v8 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v9, vcc, 0, v9, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v6, vcc, 3, v6 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v7, vcc, 0, v7, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v4, vcc, 3, v4 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v5, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, 3, v2 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, 3, v0 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc |
| ; GFX9-NEXT: .LBB3_2: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v9i64_to_v18i32: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: s_mov_b32 s0, exec_lo |
| ; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v18 |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB3_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX11-NEXT: v_add_co_u32 v16, vcc_lo, v16, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v17, null, 0, v17, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v14, vcc_lo, v14, 3 |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v15, null, 0, v15, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v12, vcc_lo, v12, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v13, null, 0, v13, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v10, vcc_lo, v10, 3 |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v11, null, 0, v11, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v8, vcc_lo, v8, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v9, null, 0, v9, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v6, vcc_lo, v6, 3 |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v7, null, 0, v7, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v4, vcc_lo, v4, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v5, null, 0, v5, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v2, vcc_lo, v2, 3 |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, 0, v3, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v0, vcc_lo, v0, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo |
| ; GFX11-NEXT: .LBB3_2: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = add <9 x i64> %a, splat (i64 3) |
| %a2 = bitcast <9 x i64> %a1 to <18 x i32> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <9 x i64> %a to <18 x i32> |
| br label %end |
| |
| end: |
| %phi = phi <18 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <18 x i32> %phi |
| } |
| |
| define <9 x double> @bitcast_v18i32_to_v9f64(<18 x i32> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v18i32_to_v9f64: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB4_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.true |
| ; GCN-NEXT: v_add_i32_e32 v17, vcc, 3, v17 |
| ; GCN-NEXT: v_add_i32_e32 v16, vcc, 3, v16 |
| ; GCN-NEXT: v_add_i32_e32 v15, vcc, 3, v15 |
| ; GCN-NEXT: v_add_i32_e32 v14, vcc, 3, v14 |
| ; GCN-NEXT: v_add_i32_e32 v13, vcc, 3, v13 |
| ; GCN-NEXT: v_add_i32_e32 v12, vcc, 3, v12 |
| ; GCN-NEXT: v_add_i32_e32 v11, vcc, 3, v11 |
| ; GCN-NEXT: v_add_i32_e32 v10, vcc, 3, v10 |
| ; GCN-NEXT: v_add_i32_e32 v9, vcc, 3, v9 |
| ; GCN-NEXT: v_add_i32_e32 v8, vcc, 3, v8 |
| ; GCN-NEXT: v_add_i32_e32 v7, vcc, 3, v7 |
| ; GCN-NEXT: v_add_i32_e32 v6, vcc, 3, v6 |
| ; GCN-NEXT: v_add_i32_e32 v5, vcc, 3, v5 |
| ; GCN-NEXT: v_add_i32_e32 v4, vcc, 3, v4 |
| ; GCN-NEXT: v_add_i32_e32 v3, vcc, 3, v3 |
| ; GCN-NEXT: v_add_i32_e32 v2, vcc, 3, v2 |
| ; GCN-NEXT: v_add_i32_e32 v1, vcc, 3, v1 |
| ; GCN-NEXT: v_add_i32_e32 v0, vcc, 3, v0 |
| ; GCN-NEXT: .LBB4_2: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v18i32_to_v9f64: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB4_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.true |
| ; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v17 |
| ; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v16 |
| ; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v15 |
| ; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v14 |
| ; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v13 |
| ; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v12 |
| ; VI-NEXT: v_add_u32_e32 v11, vcc, 3, v11 |
| ; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v10 |
| ; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v9 |
| ; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v8 |
| ; VI-NEXT: v_add_u32_e32 v7, vcc, 3, v7 |
| ; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v6 |
| ; VI-NEXT: v_add_u32_e32 v5, vcc, 3, v5 |
| ; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v4 |
| ; VI-NEXT: v_add_u32_e32 v3, vcc, 3, v3 |
| ; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v2 |
| ; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v1 |
| ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 |
| ; VI-NEXT: .LBB4_2: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v18i32_to_v9f64: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB4_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX9-NEXT: v_add_u32_e32 v17, 3, v17 |
| ; GFX9-NEXT: v_add_u32_e32 v16, 3, v16 |
| ; GFX9-NEXT: v_add_u32_e32 v15, 3, v15 |
| ; GFX9-NEXT: v_add_u32_e32 v14, 3, v14 |
| ; GFX9-NEXT: v_add_u32_e32 v13, 3, v13 |
| ; GFX9-NEXT: v_add_u32_e32 v12, 3, v12 |
| ; GFX9-NEXT: v_add_u32_e32 v11, 3, v11 |
| ; GFX9-NEXT: v_add_u32_e32 v10, 3, v10 |
| ; GFX9-NEXT: v_add_u32_e32 v9, 3, v9 |
| ; GFX9-NEXT: v_add_u32_e32 v8, 3, v8 |
| ; GFX9-NEXT: v_add_u32_e32 v7, 3, v7 |
| ; GFX9-NEXT: v_add_u32_e32 v6, 3, v6 |
| ; GFX9-NEXT: v_add_u32_e32 v5, 3, v5 |
| ; GFX9-NEXT: v_add_u32_e32 v4, 3, v4 |
| ; GFX9-NEXT: v_add_u32_e32 v3, 3, v3 |
| ; GFX9-NEXT: v_add_u32_e32 v2, 3, v2 |
| ; GFX9-NEXT: v_add_u32_e32 v1, 3, v1 |
| ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 |
| ; GFX9-NEXT: .LBB4_2: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v18i32_to_v9f64: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: s_mov_b32 s0, exec_lo |
| ; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v18 |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB4_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX11-NEXT: v_add_nc_u32_e32 v17, 3, v17 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v16, 3, v16 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v15, 3, v15 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v14, 3, v14 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v13, 3, v13 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v12, 3, v12 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v11, 3, v11 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v10, 3, v10 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v9, 3, v9 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v8, 3, v8 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v7, 3, v7 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v6, 3, v6 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v5, 3, v5 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v4, 3, v4 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v3, 3, v3 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v2, 3, v2 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v1, 3, v1 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v0, 3, v0 |
| ; GFX11-NEXT: .LBB4_2: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = add <18 x i32> %a, splat (i32 3) |
| %a2 = bitcast <18 x i32> %a1 to <9 x double> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <18 x i32> %a to <9 x double> |
| br label %end |
| |
| end: |
| %phi = phi <9 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <9 x double> %phi |
| } |
| |
| define <18 x i32> @bitcast_v9f64_to_v18i32(<9 x double> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v9f64_to_v18i32: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB5_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.true |
| ; GCN-NEXT: v_add_f64 v[16:17], v[16:17], 1.0 |
| ; GCN-NEXT: v_add_f64 v[14:15], v[14:15], 1.0 |
| ; GCN-NEXT: v_add_f64 v[12:13], v[12:13], 1.0 |
| ; GCN-NEXT: v_add_f64 v[10:11], v[10:11], 1.0 |
| ; GCN-NEXT: v_add_f64 v[8:9], v[8:9], 1.0 |
| ; GCN-NEXT: v_add_f64 v[6:7], v[6:7], 1.0 |
| ; GCN-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 |
| ; GCN-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 |
| ; GCN-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 |
| ; GCN-NEXT: .LBB5_2: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v9f64_to_v18i32: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB5_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.true |
| ; VI-NEXT: v_add_f64 v[16:17], v[16:17], 1.0 |
| ; VI-NEXT: v_add_f64 v[14:15], v[14:15], 1.0 |
| ; VI-NEXT: v_add_f64 v[12:13], v[12:13], 1.0 |
| ; VI-NEXT: v_add_f64 v[10:11], v[10:11], 1.0 |
| ; VI-NEXT: v_add_f64 v[8:9], v[8:9], 1.0 |
| ; VI-NEXT: v_add_f64 v[6:7], v[6:7], 1.0 |
| ; VI-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 |
| ; VI-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 |
| ; VI-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 |
| ; VI-NEXT: .LBB5_2: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v9f64_to_v18i32: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB5_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX9-NEXT: v_add_f64 v[16:17], v[16:17], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[14:15], v[14:15], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[12:13], v[12:13], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[10:11], v[10:11], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[8:9], v[8:9], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[6:7], v[6:7], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 |
| ; GFX9-NEXT: .LBB5_2: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v9f64_to_v18i32: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: s_mov_b32 s0, exec_lo |
| ; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v18 |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB5_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX11-NEXT: v_add_f64 v[16:17], v[16:17], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[14:15], v[14:15], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[12:13], v[12:13], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[10:11], v[10:11], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[8:9], v[8:9], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[6:7], v[6:7], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 |
| ; GFX11-NEXT: .LBB5_2: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = fadd <9 x double> %a, splat (double 1.000000e+00) |
| %a2 = bitcast <9 x double> %a1 to <18 x i32> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <9 x double> %a to <18 x i32> |
| br label %end |
| |
| end: |
| %phi = phi <18 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <18 x i32> %phi |
| } |
| |
| define <36 x i16> @bitcast_v18i32_to_v36i16(<18 x i32> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v18i32_to_v36i16: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v19 |
| ; GCN-NEXT: ; implicit-def: $vgpr33 |
| ; GCN-NEXT: ; implicit-def: $vgpr36 |
| ; GCN-NEXT: ; implicit-def: $vgpr31 |
| ; GCN-NEXT: ; implicit-def: $vgpr35 |
| ; GCN-NEXT: ; implicit-def: $vgpr29 |
| ; GCN-NEXT: ; implicit-def: $vgpr34 |
| ; GCN-NEXT: ; implicit-def: $vgpr27 |
| ; GCN-NEXT: ; implicit-def: $vgpr32 |
| ; GCN-NEXT: ; implicit-def: $vgpr25 |
| ; GCN-NEXT: ; implicit-def: $vgpr30 |
| ; GCN-NEXT: ; implicit-def: $vgpr22 |
| ; GCN-NEXT: ; implicit-def: $vgpr28 |
| ; GCN-NEXT: ; implicit-def: $vgpr21 |
| ; GCN-NEXT: ; implicit-def: $vgpr26 |
| ; GCN-NEXT: ; implicit-def: $vgpr20 |
| ; GCN-NEXT: ; implicit-def: $vgpr24 |
| ; GCN-NEXT: ; implicit-def: $vgpr19 |
| ; GCN-NEXT: ; implicit-def: $vgpr23 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB6_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.false |
| ; GCN-NEXT: v_alignbit_b32 v19, v18, v17, 16 |
| ; GCN-NEXT: v_alignbit_b32 v20, v16, v15, 16 |
| ; GCN-NEXT: v_alignbit_b32 v21, v14, v13, 16 |
| ; GCN-NEXT: v_alignbit_b32 v22, v12, v11, 16 |
| ; GCN-NEXT: v_alignbit_b32 v25, v10, v9, 16 |
| ; GCN-NEXT: v_alignbit_b32 v27, v8, v7, 16 |
| ; GCN-NEXT: v_alignbit_b32 v29, v6, v5, 16 |
| ; GCN-NEXT: v_alignbit_b32 v31, v4, v3, 16 |
| ; GCN-NEXT: v_alignbit_b32 v33, v2, v1, 16 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v23, 16, v18 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v24, 16, v16 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v26, 16, v14 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v28, 16, v12 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v30, 16, v10 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v32, 16, v8 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v34, 16, v6 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v35, 16, v4 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v36, 16, v2 |
| ; GCN-NEXT: .LBB6_2: ; %Flow |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB6_4 |
| ; GCN-NEXT: ; %bb.3: ; %cmp.true |
| ; GCN-NEXT: v_add_i32_e32 v2, vcc, 3, v2 |
| ; GCN-NEXT: v_add_i32_e32 v1, vcc, 3, v1 |
| ; GCN-NEXT: v_add_i32_e32 v4, vcc, 3, v4 |
| ; GCN-NEXT: v_add_i32_e32 v3, vcc, 3, v3 |
| ; GCN-NEXT: v_add_i32_e32 v6, vcc, 3, v6 |
| ; GCN-NEXT: v_add_i32_e32 v5, vcc, 3, v5 |
| ; GCN-NEXT: v_add_i32_e32 v8, vcc, 3, v8 |
| ; GCN-NEXT: v_add_i32_e32 v7, vcc, 3, v7 |
| ; GCN-NEXT: v_add_i32_e32 v10, vcc, 3, v10 |
| ; GCN-NEXT: v_add_i32_e32 v9, vcc, 3, v9 |
| ; GCN-NEXT: v_add_i32_e32 v12, vcc, 3, v12 |
| ; GCN-NEXT: v_add_i32_e32 v11, vcc, 3, v11 |
| ; GCN-NEXT: v_add_i32_e32 v14, vcc, 3, v14 |
| ; GCN-NEXT: v_add_i32_e32 v13, vcc, 3, v13 |
| ; GCN-NEXT: v_add_i32_e32 v16, vcc, 3, v16 |
| ; GCN-NEXT: v_add_i32_e32 v15, vcc, 3, v15 |
| ; GCN-NEXT: v_add_i32_e32 v18, vcc, 3, v18 |
| ; GCN-NEXT: v_add_i32_e32 v17, vcc, 3, v17 |
| ; GCN-NEXT: v_alignbit_b32 v19, v18, v17, 16 |
| ; GCN-NEXT: v_alignbit_b32 v20, v16, v15, 16 |
| ; GCN-NEXT: v_alignbit_b32 v21, v14, v13, 16 |
| ; GCN-NEXT: v_alignbit_b32 v22, v12, v11, 16 |
| ; GCN-NEXT: v_alignbit_b32 v25, v10, v9, 16 |
| ; GCN-NEXT: v_alignbit_b32 v27, v8, v7, 16 |
| ; GCN-NEXT: v_alignbit_b32 v29, v6, v5, 16 |
| ; GCN-NEXT: v_alignbit_b32 v31, v4, v3, 16 |
| ; GCN-NEXT: v_alignbit_b32 v33, v2, v1, 16 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v23, 16, v18 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v24, 16, v16 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v26, 16, v14 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v28, 16, v12 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v30, 16, v10 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v32, 16, v8 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v34, 16, v6 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v35, 16, v4 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v36, 16, v2 |
| ; GCN-NEXT: .LBB6_4: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: v_and_b32_e32 v1, 0xffff, v1 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v33, 16, v33 |
| ; GCN-NEXT: v_or_b32_e32 v1, v1, v33 |
| ; GCN-NEXT: v_and_b32_e32 v2, 0xffff, v2 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v33, 16, v36 |
| ; GCN-NEXT: v_or_b32_e32 v2, v2, v33 |
| ; GCN-NEXT: v_add_i32_e32 v33, vcc, 4, v0 |
| ; GCN-NEXT: v_and_b32_e32 v3, 0xffff, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v31, 16, v31 |
| ; GCN-NEXT: v_or_b32_e32 v3, v3, v31 |
| ; GCN-NEXT: v_add_i32_e32 v31, vcc, 8, v0 |
| ; GCN-NEXT: v_and_b32_e32 v4, 0xffff, v4 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v35, 16, v35 |
| ; GCN-NEXT: v_or_b32_e32 v4, v4, v35 |
| ; GCN-NEXT: v_add_i32_e32 v35, vcc, 12, v0 |
| ; GCN-NEXT: v_and_b32_e32 v5, 0xffff, v5 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v29, 16, v29 |
| ; GCN-NEXT: v_or_b32_e32 v5, v5, v29 |
| ; GCN-NEXT: v_add_i32_e32 v29, vcc, 16, v0 |
| ; GCN-NEXT: v_and_b32_e32 v6, 0xffff, v6 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v34, 16, v34 |
| ; GCN-NEXT: v_or_b32_e32 v6, v6, v34 |
| ; GCN-NEXT: v_add_i32_e32 v34, vcc, 20, v0 |
| ; GCN-NEXT: v_and_b32_e32 v7, 0xffff, v7 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v27, 16, v27 |
| ; GCN-NEXT: v_or_b32_e32 v7, v7, v27 |
| ; GCN-NEXT: v_add_i32_e32 v27, vcc, 24, v0 |
| ; GCN-NEXT: v_and_b32_e32 v8, 0xffff, v8 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v32, 16, v32 |
| ; GCN-NEXT: v_or_b32_e32 v8, v8, v32 |
| ; GCN-NEXT: v_add_i32_e32 v32, vcc, 28, v0 |
| ; GCN-NEXT: v_and_b32_e32 v9, 0xffff, v9 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v25, 16, v25 |
| ; GCN-NEXT: v_or_b32_e32 v9, v9, v25 |
| ; GCN-NEXT: v_add_i32_e32 v25, vcc, 32, v0 |
| ; GCN-NEXT: v_and_b32_e32 v10, 0xffff, v10 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v30, 16, v30 |
| ; GCN-NEXT: v_or_b32_e32 v10, v10, v30 |
| ; GCN-NEXT: v_add_i32_e32 v30, vcc, 36, v0 |
| ; GCN-NEXT: v_and_b32_e32 v11, 0xffff, v11 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v22, 16, v22 |
| ; GCN-NEXT: v_or_b32_e32 v11, v11, v22 |
| ; GCN-NEXT: v_add_i32_e32 v22, vcc, 40, v0 |
| ; GCN-NEXT: v_and_b32_e32 v12, 0xffff, v12 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v28, 16, v28 |
| ; GCN-NEXT: v_or_b32_e32 v12, v12, v28 |
| ; GCN-NEXT: v_add_i32_e32 v28, vcc, 44, v0 |
| ; GCN-NEXT: v_and_b32_e32 v13, 0xffff, v13 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v21, 16, v21 |
| ; GCN-NEXT: v_or_b32_e32 v13, v13, v21 |
| ; GCN-NEXT: v_add_i32_e32 v21, vcc, 48, v0 |
| ; GCN-NEXT: v_and_b32_e32 v14, 0xffff, v14 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v26, 16, v26 |
| ; GCN-NEXT: v_or_b32_e32 v14, v14, v26 |
| ; GCN-NEXT: v_add_i32_e32 v26, vcc, 52, v0 |
| ; GCN-NEXT: v_and_b32_e32 v15, 0xffff, v15 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v20, 16, v20 |
| ; GCN-NEXT: v_or_b32_e32 v15, v15, v20 |
| ; GCN-NEXT: v_add_i32_e32 v20, vcc, 56, v0 |
| ; GCN-NEXT: v_and_b32_e32 v16, 0xffff, v16 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v24, 16, v24 |
| ; GCN-NEXT: v_or_b32_e32 v16, v16, v24 |
| ; GCN-NEXT: v_add_i32_e32 v24, vcc, 60, v0 |
| ; GCN-NEXT: v_and_b32_e32 v17, 0xffff, v17 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v19, 16, v19 |
| ; GCN-NEXT: v_or_b32_e32 v17, v17, v19 |
| ; GCN-NEXT: v_add_i32_e32 v19, vcc, 64, v0 |
| ; GCN-NEXT: v_and_b32_e32 v18, 0xffff, v18 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v23, 16, v23 |
| ; GCN-NEXT: v_or_b32_e32 v18, v18, v23 |
| ; GCN-NEXT: v_add_i32_e32 v23, vcc, 0x44, v0 |
| ; GCN-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v2, v33, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v3, v31, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v4, v35, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v5, v29, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v6, v34, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v7, v27, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v8, v32, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v9, v25, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v10, v30, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v11, v22, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v12, v28, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v13, v21, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v14, v26, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v15, v20, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v16, v24, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v17, v19, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v18, v23, s[0:3], 0 offen |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v18i32_to_v36i16: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: ; implicit-def: $vgpr35 |
| ; VI-NEXT: ; implicit-def: $vgpr34 |
| ; VI-NEXT: ; implicit-def: $vgpr33 |
| ; VI-NEXT: ; implicit-def: $vgpr32 |
| ; VI-NEXT: ; implicit-def: $vgpr31 |
| ; VI-NEXT: ; implicit-def: $vgpr30 |
| ; VI-NEXT: ; implicit-def: $vgpr29 |
| ; VI-NEXT: ; implicit-def: $vgpr28 |
| ; VI-NEXT: ; implicit-def: $vgpr27 |
| ; VI-NEXT: ; implicit-def: $vgpr26 |
| ; VI-NEXT: ; implicit-def: $vgpr25 |
| ; VI-NEXT: ; implicit-def: $vgpr24 |
| ; VI-NEXT: ; implicit-def: $vgpr23 |
| ; VI-NEXT: ; implicit-def: $vgpr22 |
| ; VI-NEXT: ; implicit-def: $vgpr21 |
| ; VI-NEXT: ; implicit-def: $vgpr20 |
| ; VI-NEXT: ; implicit-def: $vgpr19 |
| ; VI-NEXT: ; implicit-def: $vgpr18 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB6_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.false |
| ; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; VI-NEXT: .LBB6_2: ; %Flow |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB6_4 |
| ; VI-NEXT: ; %bb.3: ; %cmp.true |
| ; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v17 |
| ; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v16 |
| ; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v15 |
| ; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v14 |
| ; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v13 |
| ; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v12 |
| ; VI-NEXT: v_add_u32_e32 v11, vcc, 3, v11 |
| ; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v10 |
| ; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v9 |
| ; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v8 |
| ; VI-NEXT: v_add_u32_e32 v7, vcc, 3, v7 |
| ; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v6 |
| ; VI-NEXT: v_add_u32_e32 v5, vcc, 3, v5 |
| ; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v4 |
| ; VI-NEXT: v_add_u32_e32 v3, vcc, 3, v3 |
| ; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v2 |
| ; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v1 |
| ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 |
| ; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; VI-NEXT: .LBB6_4: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 |
| ; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 |
| ; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 |
| ; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 |
| ; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 |
| ; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 |
| ; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 |
| ; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 |
| ; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 |
| ; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 |
| ; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 |
| ; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 |
| ; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 |
| ; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 |
| ; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 |
| ; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 |
| ; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 |
| ; VI-NEXT: v_or_b32_sdwa v0, v0, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v1, v1, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v2, v2, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v3, v3, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v4, v4, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v5, v5, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v6, v6, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v7, v7, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v8, v8, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v9, v9, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v10, v10, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v11, v11, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v12, v12, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v13, v13, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v14, v14, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v15, v15, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v16, v16, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v17, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v18i32_to_v36i16: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr35 |
| ; GFX9-NEXT: ; implicit-def: $vgpr34 |
| ; GFX9-NEXT: ; implicit-def: $vgpr33 |
| ; GFX9-NEXT: ; implicit-def: $vgpr32 |
| ; GFX9-NEXT: ; implicit-def: $vgpr31 |
| ; GFX9-NEXT: ; implicit-def: $vgpr30 |
| ; GFX9-NEXT: ; implicit-def: $vgpr29 |
| ; GFX9-NEXT: ; implicit-def: $vgpr28 |
| ; GFX9-NEXT: ; implicit-def: $vgpr27 |
| ; GFX9-NEXT: ; implicit-def: $vgpr26 |
| ; GFX9-NEXT: ; implicit-def: $vgpr25 |
| ; GFX9-NEXT: ; implicit-def: $vgpr24 |
| ; GFX9-NEXT: ; implicit-def: $vgpr23 |
| ; GFX9-NEXT: ; implicit-def: $vgpr22 |
| ; GFX9-NEXT: ; implicit-def: $vgpr21 |
| ; GFX9-NEXT: ; implicit-def: $vgpr20 |
| ; GFX9-NEXT: ; implicit-def: $vgpr19 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB6_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.false |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX9-NEXT: .LBB6_2: ; %Flow |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB6_4 |
| ; GFX9-NEXT: ; %bb.3: ; %cmp.true |
| ; GFX9-NEXT: v_add_u32_e32 v17, 3, v17 |
| ; GFX9-NEXT: v_add_u32_e32 v16, 3, v16 |
| ; GFX9-NEXT: v_add_u32_e32 v15, 3, v15 |
| ; GFX9-NEXT: v_add_u32_e32 v14, 3, v14 |
| ; GFX9-NEXT: v_add_u32_e32 v13, 3, v13 |
| ; GFX9-NEXT: v_add_u32_e32 v12, 3, v12 |
| ; GFX9-NEXT: v_add_u32_e32 v11, 3, v11 |
| ; GFX9-NEXT: v_add_u32_e32 v10, 3, v10 |
| ; GFX9-NEXT: v_add_u32_e32 v9, 3, v9 |
| ; GFX9-NEXT: v_add_u32_e32 v8, 3, v8 |
| ; GFX9-NEXT: v_add_u32_e32 v7, 3, v7 |
| ; GFX9-NEXT: v_add_u32_e32 v6, 3, v6 |
| ; GFX9-NEXT: v_add_u32_e32 v5, 3, v5 |
| ; GFX9-NEXT: v_add_u32_e32 v4, 3, v4 |
| ; GFX9-NEXT: v_add_u32_e32 v3, 3, v3 |
| ; GFX9-NEXT: v_add_u32_e32 v2, 3, v2 |
| ; GFX9-NEXT: v_add_u32_e32 v1, 3, v1 |
| ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX9-NEXT: .LBB6_4: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: s_mov_b32 s4, 0x5040100 |
| ; GFX9-NEXT: v_perm_b32 v0, v35, v0, s4 |
| ; GFX9-NEXT: v_perm_b32 v1, v34, v1, s4 |
| ; GFX9-NEXT: v_perm_b32 v2, v33, v2, s4 |
| ; GFX9-NEXT: v_perm_b32 v3, v32, v3, s4 |
| ; GFX9-NEXT: v_perm_b32 v4, v31, v4, s4 |
| ; GFX9-NEXT: v_perm_b32 v5, v30, v5, s4 |
| ; GFX9-NEXT: v_perm_b32 v6, v29, v6, s4 |
| ; GFX9-NEXT: v_perm_b32 v7, v28, v7, s4 |
| ; GFX9-NEXT: v_perm_b32 v8, v27, v8, s4 |
| ; GFX9-NEXT: v_perm_b32 v9, v26, v9, s4 |
| ; GFX9-NEXT: v_perm_b32 v10, v25, v10, s4 |
| ; GFX9-NEXT: v_perm_b32 v11, v24, v11, s4 |
| ; GFX9-NEXT: v_perm_b32 v12, v23, v12, s4 |
| ; GFX9-NEXT: v_perm_b32 v13, v22, v13, s4 |
| ; GFX9-NEXT: v_perm_b32 v14, v21, v14, s4 |
| ; GFX9-NEXT: v_perm_b32 v15, v20, v15, s4 |
| ; GFX9-NEXT: v_perm_b32 v16, v19, v16, s4 |
| ; GFX9-NEXT: v_perm_b32 v17, v18, v17, s4 |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v18i32_to_v36i16: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v18 |
| ; GFX11-NEXT: ; implicit-def: $vgpr35 |
| ; GFX11-NEXT: ; implicit-def: $vgpr34 |
| ; GFX11-NEXT: ; implicit-def: $vgpr33 |
| ; GFX11-NEXT: ; implicit-def: $vgpr32 |
| ; GFX11-NEXT: ; implicit-def: $vgpr31 |
| ; GFX11-NEXT: ; implicit-def: $vgpr30 |
| ; GFX11-NEXT: ; implicit-def: $vgpr29 |
| ; GFX11-NEXT: ; implicit-def: $vgpr28 |
| ; GFX11-NEXT: ; implicit-def: $vgpr27 |
| ; GFX11-NEXT: ; implicit-def: $vgpr26 |
| ; GFX11-NEXT: ; implicit-def: $vgpr25 |
| ; GFX11-NEXT: ; implicit-def: $vgpr24 |
| ; GFX11-NEXT: ; implicit-def: $vgpr23 |
| ; GFX11-NEXT: ; implicit-def: $vgpr22 |
| ; GFX11-NEXT: ; implicit-def: $vgpr21 |
| ; GFX11-NEXT: ; implicit-def: $vgpr20 |
| ; GFX11-NEXT: ; implicit-def: $vgpr19 |
| ; GFX11-NEXT: ; implicit-def: $vgpr18 |
| ; GFX11-NEXT: s_and_saveexec_b32 s0, vcc_lo |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB6_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.false |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX11-NEXT: .LBB6_2: ; %Flow |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB6_4 |
| ; GFX11-NEXT: ; %bb.3: ; %cmp.true |
| ; GFX11-NEXT: v_add_nc_u32_e32 v17, 3, v17 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v16, 3, v16 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v15, 3, v15 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v14, 3, v14 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v13, 3, v13 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v12, 3, v12 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v11, 3, v11 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v10, 3, v10 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v9, 3, v9 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v8, 3, v8 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v7, 3, v7 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v6, 3, v6 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v5, 3, v5 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v4, 3, v4 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v3, 3, v3 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v2, 3, v2 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v1, 3, v1 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v0, 3, v0 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX11-NEXT: .LBB6_4: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) |
| ; GFX11-NEXT: v_perm_b32 v0, v35, v0, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v1, v34, v1, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v2, v33, v2, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v3, v32, v3, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v4, v31, v4, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v5, v30, v5, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v6, v29, v6, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v7, v28, v7, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v8, v27, v8, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v9, v26, v9, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v10, v25, v10, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v11, v24, v11, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v12, v23, v12, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v13, v22, v13, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v14, v21, v14, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v15, v20, v15, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v16, v19, v16, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v17, v18, v17, 0x5040100 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = add <18 x i32> %a, splat (i32 3) |
| %a2 = bitcast <18 x i32> %a1 to <36 x i16> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <18 x i32> %a to <36 x i16> |
| br label %end |
| |
| end: |
| %phi = phi <36 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <36 x i16> %phi |
| } |
| |
| define <18 x i32> @bitcast_v36i16_to_v18i32(<36 x i16> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v36i16_to_v18i32: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_mov_b32_e32 v34, v26 |
| ; GCN-NEXT: v_mov_b32_e32 v35, v24 |
| ; GCN-NEXT: v_mov_b32_e32 v36, v22 |
| ; GCN-NEXT: v_mov_b32_e32 v37, v20 |
| ; GCN-NEXT: v_mov_b32_e32 v38, v18 |
| ; GCN-NEXT: v_mov_b32_e32 v39, v16 |
| ; GCN-NEXT: v_mov_b32_e32 v48, v14 |
| ; GCN-NEXT: v_mov_b32_e32 v49, v12 |
| ; GCN-NEXT: v_mov_b32_e32 v50, v10 |
| ; GCN-NEXT: v_mov_b32_e32 v51, v8 |
| ; GCN-NEXT: v_mov_b32_e32 v52, v6 |
| ; GCN-NEXT: v_mov_b32_e32 v53, v4 |
| ; GCN-NEXT: v_mov_b32_e32 v54, v2 |
| ; GCN-NEXT: v_mov_b32_e32 v55, v0 |
| ; GCN-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:16 |
| ; GCN-NEXT: s_waitcnt expcnt(3) |
| ; GCN-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:12 |
| ; GCN-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:8 |
| ; GCN-NEXT: s_waitcnt expcnt(2) |
| ; GCN-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:4 |
| ; GCN-NEXT: buffer_load_dword v4, off, s[0:3], s32 |
| ; GCN-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:20 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v40, 16, v1 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v41, 16, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v33, 16, v5 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v32, 16, v7 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v9 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v11 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_lshlrev_b32_e32 v42, 16, v13 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v43, 16, v15 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v44, 16, v17 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v45, 16, v19 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v46, 16, v21 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v47, 16, v23 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v56, 16, v25 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v57, 16, v27 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v58, 16, v29 |
| ; GCN-NEXT: s_waitcnt vmcnt(2) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v59, 16, v4 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v60, 16, v2 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v61, 16, v0 |
| ; GCN-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB7_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.false |
| ; GCN-NEXT: v_and_b32_e32 v0, 0xffff, v55 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_and_b32_e32 v1, 0xffff, v54 |
| ; GCN-NEXT: v_or_b32_e32 v0, v0, v40 |
| ; GCN-NEXT: v_or_b32_e32 v1, v1, v41 |
| ; GCN-NEXT: v_and_b32_e32 v2, 0xffff, v53 |
| ; GCN-NEXT: v_or_b32_e32 v2, v2, v33 |
| ; GCN-NEXT: v_and_b32_e32 v3, 0xffff, v52 |
| ; GCN-NEXT: v_or_b32_e32 v3, v3, v32 |
| ; GCN-NEXT: v_and_b32_e32 v4, 0xffff, v51 |
| ; GCN-NEXT: v_and_b32_e32 v5, 0xffff, v50 |
| ; GCN-NEXT: v_and_b32_e32 v6, 0xffff, v49 |
| ; GCN-NEXT: v_and_b32_e32 v7, 0xffff, v48 |
| ; GCN-NEXT: v_and_b32_e32 v8, 0xffff, v39 |
| ; GCN-NEXT: v_and_b32_e32 v9, 0xffff, v38 |
| ; GCN-NEXT: v_and_b32_e32 v10, 0xffff, v37 |
| ; GCN-NEXT: v_and_b32_e32 v11, 0xffff, v36 |
| ; GCN-NEXT: v_and_b32_e32 v12, 0xffff, v35 |
| ; GCN-NEXT: v_and_b32_e32 v13, 0xffff, v34 |
| ; GCN-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_and_b32_e32 v14, 0xffff, v14 |
| ; GCN-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_and_b32_e32 v15, 0xffff, v15 |
| ; GCN-NEXT: v_and_b32_e32 v16, 0xffff, v63 |
| ; GCN-NEXT: v_and_b32_e32 v17, 0xffff, v62 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v4, v4, v18 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v5, v5, v18 |
| ; GCN-NEXT: v_or_b32_e32 v6, v6, v42 |
| ; GCN-NEXT: v_or_b32_e32 v7, v7, v43 |
| ; GCN-NEXT: v_or_b32_e32 v8, v8, v44 |
| ; GCN-NEXT: v_or_b32_e32 v9, v9, v45 |
| ; GCN-NEXT: v_or_b32_e32 v10, v10, v46 |
| ; GCN-NEXT: v_or_b32_e32 v11, v11, v47 |
| ; GCN-NEXT: v_or_b32_e32 v12, v12, v56 |
| ; GCN-NEXT: v_or_b32_e32 v13, v13, v57 |
| ; GCN-NEXT: v_or_b32_e32 v14, v14, v58 |
| ; GCN-NEXT: v_or_b32_e32 v15, v15, v59 |
| ; GCN-NEXT: v_or_b32_e32 v16, v16, v60 |
| ; GCN-NEXT: v_or_b32_e32 v17, v17, v61 |
| ; GCN-NEXT: ; implicit-def: $vgpr55 |
| ; GCN-NEXT: ; implicit-def: $vgpr54 |
| ; GCN-NEXT: ; implicit-def: $vgpr53 |
| ; GCN-NEXT: ; implicit-def: $vgpr52 |
| ; GCN-NEXT: ; implicit-def: $vgpr51 |
| ; GCN-NEXT: ; implicit-def: $vgpr50 |
| ; GCN-NEXT: ; implicit-def: $vgpr49 |
| ; GCN-NEXT: ; implicit-def: $vgpr48 |
| ; GCN-NEXT: ; implicit-def: $vgpr39 |
| ; GCN-NEXT: ; implicit-def: $vgpr38 |
| ; GCN-NEXT: ; implicit-def: $vgpr37 |
| ; GCN-NEXT: ; implicit-def: $vgpr36 |
| ; GCN-NEXT: ; implicit-def: $vgpr35 |
| ; GCN-NEXT: ; implicit-def: $vgpr34 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr63 |
| ; GCN-NEXT: ; implicit-def: $vgpr62 |
| ; GCN-NEXT: ; implicit-def: $vgpr40 |
| ; GCN-NEXT: ; implicit-def: $vgpr41 |
| ; GCN-NEXT: ; implicit-def: $vgpr33 |
| ; GCN-NEXT: ; implicit-def: $vgpr32 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr42 |
| ; GCN-NEXT: ; implicit-def: $vgpr43 |
| ; GCN-NEXT: ; implicit-def: $vgpr44 |
| ; GCN-NEXT: ; implicit-def: $vgpr45 |
| ; GCN-NEXT: ; implicit-def: $vgpr46 |
| ; GCN-NEXT: ; implicit-def: $vgpr47 |
| ; GCN-NEXT: ; implicit-def: $vgpr56 |
| ; GCN-NEXT: ; implicit-def: $vgpr57 |
| ; GCN-NEXT: ; implicit-def: $vgpr58 |
| ; GCN-NEXT: ; implicit-def: $vgpr59 |
| ; GCN-NEXT: ; implicit-def: $vgpr60 |
| ; GCN-NEXT: ; implicit-def: $vgpr61 |
| ; GCN-NEXT: .LBB7_2: ; %Flow |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB7_4 |
| ; GCN-NEXT: ; %bb.3: ; %cmp.true |
| ; GCN-NEXT: v_add_i32_e32 v0, vcc, 3, v55 |
| ; GCN-NEXT: s_mov_b32 s6, 0x30000 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_add_i32_e32 v1, vcc, 3, v54 |
| ; GCN-NEXT: v_add_i32_e32 v2, vcc, 3, v53 |
| ; GCN-NEXT: v_add_i32_e32 v3, vcc, 3, v52 |
| ; GCN-NEXT: v_add_i32_e32 v4, vcc, 3, v51 |
| ; GCN-NEXT: v_add_i32_e32 v5, vcc, 3, v50 |
| ; GCN-NEXT: v_add_i32_e32 v6, vcc, 3, v49 |
| ; GCN-NEXT: v_add_i32_e32 v7, vcc, 3, v48 |
| ; GCN-NEXT: v_add_i32_e32 v8, vcc, 3, v39 |
| ; GCN-NEXT: v_add_i32_e32 v9, vcc, 3, v38 |
| ; GCN-NEXT: v_add_i32_e32 v10, vcc, 3, v37 |
| ; GCN-NEXT: v_add_i32_e32 v11, vcc, 3, v36 |
| ; GCN-NEXT: v_add_i32_e32 v12, vcc, 3, v35 |
| ; GCN-NEXT: v_add_i32_e32 v13, vcc, 3, v34 |
| ; GCN-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_add_i32_e32 v14, vcc, 3, v14 |
| ; GCN-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_add_i32_e32 v15, vcc, 3, v15 |
| ; GCN-NEXT: v_add_i32_e32 v16, vcc, 3, v63 |
| ; GCN-NEXT: v_add_i32_e32 v17, vcc, 3, v62 |
| ; GCN-NEXT: v_and_b32_e32 v0, 0xffff, v0 |
| ; GCN-NEXT: v_and_b32_e32 v1, 0xffff, v1 |
| ; GCN-NEXT: v_and_b32_e32 v2, 0xffff, v2 |
| ; GCN-NEXT: v_and_b32_e32 v3, 0xffff, v3 |
| ; GCN-NEXT: v_and_b32_e32 v4, 0xffff, v4 |
| ; GCN-NEXT: v_and_b32_e32 v5, 0xffff, v5 |
| ; GCN-NEXT: v_and_b32_e32 v6, 0xffff, v6 |
| ; GCN-NEXT: v_and_b32_e32 v7, 0xffff, v7 |
| ; GCN-NEXT: v_and_b32_e32 v8, 0xffff, v8 |
| ; GCN-NEXT: v_and_b32_e32 v9, 0xffff, v9 |
| ; GCN-NEXT: v_and_b32_e32 v10, 0xffff, v10 |
| ; GCN-NEXT: v_and_b32_e32 v11, 0xffff, v11 |
| ; GCN-NEXT: v_and_b32_e32 v12, 0xffff, v12 |
| ; GCN-NEXT: v_and_b32_e32 v13, 0xffff, v13 |
| ; GCN-NEXT: v_and_b32_e32 v14, 0xffff, v14 |
| ; GCN-NEXT: v_and_b32_e32 v15, 0xffff, v15 |
| ; GCN-NEXT: v_and_b32_e32 v16, 0xffff, v16 |
| ; GCN-NEXT: v_and_b32_e32 v17, 0xffff, v17 |
| ; GCN-NEXT: v_or_b32_e32 v0, v40, v0 |
| ; GCN-NEXT: v_or_b32_e32 v1, v41, v1 |
| ; GCN-NEXT: v_or_b32_e32 v2, v33, v2 |
| ; GCN-NEXT: v_or_b32_e32 v3, v32, v3 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v4, v18, v4 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v5, v18, v5 |
| ; GCN-NEXT: v_or_b32_e32 v6, v42, v6 |
| ; GCN-NEXT: v_or_b32_e32 v7, v43, v7 |
| ; GCN-NEXT: v_or_b32_e32 v8, v44, v8 |
| ; GCN-NEXT: v_or_b32_e32 v9, v45, v9 |
| ; GCN-NEXT: v_or_b32_e32 v10, v46, v10 |
| ; GCN-NEXT: v_or_b32_e32 v11, v47, v11 |
| ; GCN-NEXT: v_or_b32_e32 v12, v56, v12 |
| ; GCN-NEXT: v_or_b32_e32 v13, v57, v13 |
| ; GCN-NEXT: v_or_b32_e32 v14, v58, v14 |
| ; GCN-NEXT: v_or_b32_e32 v15, v59, v15 |
| ; GCN-NEXT: v_or_b32_e32 v16, v60, v16 |
| ; GCN-NEXT: v_or_b32_e32 v17, v61, v17 |
| ; GCN-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0 |
| ; GCN-NEXT: v_add_i32_e32 v1, vcc, s6, v1 |
| ; GCN-NEXT: v_add_i32_e32 v2, vcc, s6, v2 |
| ; GCN-NEXT: v_add_i32_e32 v3, vcc, s6, v3 |
| ; GCN-NEXT: v_add_i32_e32 v4, vcc, s6, v4 |
| ; GCN-NEXT: v_add_i32_e32 v5, vcc, s6, v5 |
| ; GCN-NEXT: v_add_i32_e32 v6, vcc, s6, v6 |
| ; GCN-NEXT: v_add_i32_e32 v7, vcc, s6, v7 |
| ; GCN-NEXT: v_add_i32_e32 v8, vcc, s6, v8 |
| ; GCN-NEXT: v_add_i32_e32 v9, vcc, s6, v9 |
| ; GCN-NEXT: v_add_i32_e32 v10, vcc, s6, v10 |
| ; GCN-NEXT: v_add_i32_e32 v11, vcc, s6, v11 |
| ; GCN-NEXT: v_add_i32_e32 v12, vcc, s6, v12 |
| ; GCN-NEXT: v_add_i32_e32 v13, vcc, s6, v13 |
| ; GCN-NEXT: v_add_i32_e32 v14, vcc, s6, v14 |
| ; GCN-NEXT: v_add_i32_e32 v15, vcc, s6, v15 |
| ; GCN-NEXT: v_add_i32_e32 v16, vcc, s6, v16 |
| ; GCN-NEXT: v_add_i32_e32 v17, vcc, s6, v17 |
| ; GCN-NEXT: .LBB7_4: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v36i16_to_v18i32: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill |
| ; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 ; 4-byte Folded Spill |
| ; VI-NEXT: v_mov_b32_e32 v32, v17 |
| ; VI-NEXT: v_mov_b32_e32 v33, v16 |
| ; VI-NEXT: v_mov_b32_e32 v34, v15 |
| ; VI-NEXT: v_mov_b32_e32 v35, v14 |
| ; VI-NEXT: v_mov_b32_e32 v36, v13 |
| ; VI-NEXT: v_mov_b32_e32 v37, v12 |
| ; VI-NEXT: v_mov_b32_e32 v38, v11 |
| ; VI-NEXT: v_mov_b32_e32 v39, v10 |
| ; VI-NEXT: v_mov_b32_e32 v48, v9 |
| ; VI-NEXT: v_mov_b32_e32 v49, v8 |
| ; VI-NEXT: v_mov_b32_e32 v50, v7 |
| ; VI-NEXT: v_mov_b32_e32 v51, v6 |
| ; VI-NEXT: v_mov_b32_e32 v52, v5 |
| ; VI-NEXT: v_mov_b32_e32 v53, v4 |
| ; VI-NEXT: v_mov_b32_e32 v54, v3 |
| ; VI-NEXT: v_mov_b32_e32 v55, v2 |
| ; VI-NEXT: v_mov_b32_e32 v40, v1 |
| ; VI-NEXT: v_mov_b32_e32 v41, v0 |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB7_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.false |
| ; VI-NEXT: v_mov_b32_e32 v17, 16 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v0, v17, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v1, v17, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v2, v17, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v3, v17, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v4, v17, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v5, v17, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v6, v17, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v7, v17, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v8, v17, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v9, v17, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v10, v17, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v11, v17, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v12, v17, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v13, v17, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v14, v17, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v15, v17, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v16, v17, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v17, v17, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_or_b32_sdwa v0, v41, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v1, v40, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v2, v55, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v3, v54, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v4, v53, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v5, v52, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v6, v51, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v7, v50, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v8, v49, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v9, v48, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v10, v39, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v11, v38, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v12, v37, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v13, v36, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v14, v35, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v15, v34, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v16, v33, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v17, v32, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: ; implicit-def: $vgpr41 |
| ; VI-NEXT: ; implicit-def: $vgpr40 |
| ; VI-NEXT: ; implicit-def: $vgpr55 |
| ; VI-NEXT: ; implicit-def: $vgpr54 |
| ; VI-NEXT: ; implicit-def: $vgpr53 |
| ; VI-NEXT: ; implicit-def: $vgpr52 |
| ; VI-NEXT: ; implicit-def: $vgpr51 |
| ; VI-NEXT: ; implicit-def: $vgpr50 |
| ; VI-NEXT: ; implicit-def: $vgpr49 |
| ; VI-NEXT: ; implicit-def: $vgpr48 |
| ; VI-NEXT: ; implicit-def: $vgpr39 |
| ; VI-NEXT: ; implicit-def: $vgpr38 |
| ; VI-NEXT: ; implicit-def: $vgpr37 |
| ; VI-NEXT: ; implicit-def: $vgpr36 |
| ; VI-NEXT: ; implicit-def: $vgpr35 |
| ; VI-NEXT: ; implicit-def: $vgpr34 |
| ; VI-NEXT: ; implicit-def: $vgpr33 |
| ; VI-NEXT: ; implicit-def: $vgpr32 |
| ; VI-NEXT: .LBB7_2: ; %Flow |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB7_4 |
| ; VI-NEXT: ; %bb.3: ; %cmp.true |
| ; VI-NEXT: v_mov_b32_e32 v17, 3 |
| ; VI-NEXT: v_add_u16_e32 v0, 3, v41 |
| ; VI-NEXT: v_add_u16_sdwa v1, v41, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v0, v0, v1 |
| ; VI-NEXT: v_add_u16_e32 v1, 3, v40 |
| ; VI-NEXT: v_add_u16_sdwa v2, v40, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v1, v1, v2 |
| ; VI-NEXT: v_add_u16_e32 v2, 3, v55 |
| ; VI-NEXT: v_add_u16_sdwa v3, v55, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v2, v2, v3 |
| ; VI-NEXT: v_add_u16_e32 v3, 3, v54 |
| ; VI-NEXT: v_add_u16_sdwa v4, v54, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v3, v3, v4 |
| ; VI-NEXT: v_add_u16_e32 v4, 3, v53 |
| ; VI-NEXT: v_add_u16_sdwa v5, v53, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v4, v4, v5 |
| ; VI-NEXT: v_add_u16_e32 v5, 3, v52 |
| ; VI-NEXT: v_add_u16_sdwa v6, v52, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v5, v5, v6 |
| ; VI-NEXT: v_add_u16_e32 v6, 3, v51 |
| ; VI-NEXT: v_add_u16_sdwa v7, v51, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v6, v6, v7 |
| ; VI-NEXT: v_add_u16_e32 v7, 3, v50 |
| ; VI-NEXT: v_add_u16_sdwa v8, v50, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v7, v7, v8 |
| ; VI-NEXT: v_add_u16_e32 v8, 3, v49 |
| ; VI-NEXT: v_add_u16_sdwa v9, v49, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v8, v8, v9 |
| ; VI-NEXT: v_add_u16_e32 v9, 3, v48 |
| ; VI-NEXT: v_add_u16_sdwa v10, v48, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v9, v9, v10 |
| ; VI-NEXT: v_add_u16_e32 v10, 3, v39 |
| ; VI-NEXT: v_add_u16_sdwa v11, v39, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v10, v10, v11 |
| ; VI-NEXT: v_add_u16_e32 v11, 3, v38 |
| ; VI-NEXT: v_add_u16_sdwa v12, v38, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v11, v11, v12 |
| ; VI-NEXT: v_add_u16_e32 v12, 3, v37 |
| ; VI-NEXT: v_add_u16_sdwa v13, v37, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v12, v12, v13 |
| ; VI-NEXT: v_add_u16_e32 v13, 3, v36 |
| ; VI-NEXT: v_add_u16_sdwa v14, v36, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v13, v13, v14 |
| ; VI-NEXT: v_add_u16_e32 v14, 3, v35 |
| ; VI-NEXT: v_add_u16_sdwa v15, v35, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v14, v14, v15 |
| ; VI-NEXT: v_add_u16_e32 v15, 3, v34 |
| ; VI-NEXT: v_add_u16_sdwa v16, v34, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v15, v15, v16 |
| ; VI-NEXT: v_add_u16_e32 v16, 3, v33 |
| ; VI-NEXT: v_add_u16_sdwa v18, v33, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v16, v16, v18 |
| ; VI-NEXT: v_add_u16_e32 v18, 3, v32 |
| ; VI-NEXT: v_add_u16_sdwa v17, v32, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v17, v18, v17 |
| ; VI-NEXT: .LBB7_4: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 ; 4-byte Folded Reload |
| ; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload |
| ; VI-NEXT: s_waitcnt vmcnt(0) |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v36i16_to_v18i32: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_mov_b32_e32 v32, v17 |
| ; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_mov_b32_e32 v33, v16 |
| ; GFX9-NEXT: v_mov_b32_e32 v41, v0 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v32 |
| ; GFX9-NEXT: v_mov_b32_e32 v34, v15 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33 |
| ; GFX9-NEXT: v_mov_b32_e32 v35, v14 |
| ; GFX9-NEXT: v_mov_b32_e32 v36, v13 |
| ; GFX9-NEXT: v_mov_b32_e32 v37, v12 |
| ; GFX9-NEXT: v_mov_b32_e32 v38, v11 |
| ; GFX9-NEXT: v_mov_b32_e32 v39, v10 |
| ; GFX9-NEXT: v_mov_b32_e32 v48, v9 |
| ; GFX9-NEXT: v_mov_b32_e32 v49, v8 |
| ; GFX9-NEXT: v_mov_b32_e32 v50, v7 |
| ; GFX9-NEXT: v_mov_b32_e32 v51, v6 |
| ; GFX9-NEXT: v_mov_b32_e32 v52, v5 |
| ; GFX9-NEXT: v_mov_b32_e32 v53, v4 |
| ; GFX9-NEXT: v_mov_b32_e32 v54, v3 |
| ; GFX9-NEXT: v_mov_b32_e32 v55, v2 |
| ; GFX9-NEXT: v_mov_b32_e32 v40, v1 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v36 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v37 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v38 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v39 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v48 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v49 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v50 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v51 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v52 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v53 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v54 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v55 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v40 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v41 |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill |
| ; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB7_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.false |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: s_mov_b32 s6, 0x5040100 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v35 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v34 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v33 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v32 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: v_perm_b32 v0, v45, v41, s6 |
| ; GFX9-NEXT: v_perm_b32 v1, v44, v40, s6 |
| ; GFX9-NEXT: v_perm_b32 v2, v43, v55, s6 |
| ; GFX9-NEXT: v_perm_b32 v3, v42, v54, s6 |
| ; GFX9-NEXT: v_perm_b32 v4, v63, v53, s6 |
| ; GFX9-NEXT: v_perm_b32 v5, v62, v52, s6 |
| ; GFX9-NEXT: v_perm_b32 v6, v61, v51, s6 |
| ; GFX9-NEXT: v_perm_b32 v7, v60, v50, s6 |
| ; GFX9-NEXT: v_perm_b32 v8, v59, v49, s6 |
| ; GFX9-NEXT: v_perm_b32 v9, v58, v48, s6 |
| ; GFX9-NEXT: v_perm_b32 v10, v57, v39, s6 |
| ; GFX9-NEXT: v_perm_b32 v11, v56, v38, s6 |
| ; GFX9-NEXT: v_perm_b32 v12, v47, v37, s6 |
| ; GFX9-NEXT: v_perm_b32 v13, v46, v36, s6 |
| ; GFX9-NEXT: v_perm_b32 v14, v14, v35, s6 |
| ; GFX9-NEXT: v_perm_b32 v15, v15, v34, s6 |
| ; GFX9-NEXT: v_perm_b32 v16, v16, v33, s6 |
| ; GFX9-NEXT: v_perm_b32 v17, v17, v32, s6 |
| ; GFX9-NEXT: ; implicit-def: $vgpr41 |
| ; GFX9-NEXT: ; implicit-def: $vgpr40 |
| ; GFX9-NEXT: ; implicit-def: $vgpr55 |
| ; GFX9-NEXT: ; implicit-def: $vgpr54 |
| ; GFX9-NEXT: ; implicit-def: $vgpr53 |
| ; GFX9-NEXT: ; implicit-def: $vgpr52 |
| ; GFX9-NEXT: ; implicit-def: $vgpr51 |
| ; GFX9-NEXT: ; implicit-def: $vgpr50 |
| ; GFX9-NEXT: ; implicit-def: $vgpr49 |
| ; GFX9-NEXT: ; implicit-def: $vgpr48 |
| ; GFX9-NEXT: ; implicit-def: $vgpr39 |
| ; GFX9-NEXT: ; implicit-def: $vgpr38 |
| ; GFX9-NEXT: ; implicit-def: $vgpr37 |
| ; GFX9-NEXT: ; implicit-def: $vgpr36 |
| ; GFX9-NEXT: ; implicit-def: $vgpr35 |
| ; GFX9-NEXT: ; implicit-def: $vgpr34 |
| ; GFX9-NEXT: ; implicit-def: $vgpr33 |
| ; GFX9-NEXT: ; implicit-def: $vgpr32 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr46 |
| ; GFX9-NEXT: ; implicit-def: $vgpr47 |
| ; GFX9-NEXT: ; implicit-def: $vgpr56 |
| ; GFX9-NEXT: ; implicit-def: $vgpr57 |
| ; GFX9-NEXT: ; implicit-def: $vgpr58 |
| ; GFX9-NEXT: ; implicit-def: $vgpr59 |
| ; GFX9-NEXT: ; implicit-def: $vgpr60 |
| ; GFX9-NEXT: ; implicit-def: $vgpr61 |
| ; GFX9-NEXT: ; implicit-def: $vgpr62 |
| ; GFX9-NEXT: ; implicit-def: $vgpr63 |
| ; GFX9-NEXT: ; implicit-def: $vgpr42 |
| ; GFX9-NEXT: ; implicit-def: $vgpr43 |
| ; GFX9-NEXT: ; implicit-def: $vgpr44 |
| ; GFX9-NEXT: ; implicit-def: $vgpr45 |
| ; GFX9-NEXT: .LBB7_2: ; %Flow |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB7_4 |
| ; GFX9-NEXT: ; %bb.3: ; %cmp.true |
| ; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload |
| ; GFX9-NEXT: s_mov_b32 s6, 0x5040100 |
| ; GFX9-NEXT: v_perm_b32 v0, v45, v41, s6 |
| ; GFX9-NEXT: v_perm_b32 v1, v44, v40, s6 |
| ; GFX9-NEXT: v_perm_b32 v2, v43, v55, s6 |
| ; GFX9-NEXT: v_perm_b32 v3, v42, v54, s6 |
| ; GFX9-NEXT: v_perm_b32 v4, v63, v53, s6 |
| ; GFX9-NEXT: v_perm_b32 v5, v62, v52, s6 |
| ; GFX9-NEXT: v_perm_b32 v6, v61, v51, s6 |
| ; GFX9-NEXT: v_perm_b32 v7, v60, v50, s6 |
| ; GFX9-NEXT: v_perm_b32 v8, v59, v49, s6 |
| ; GFX9-NEXT: v_perm_b32 v9, v58, v48, s6 |
| ; GFX9-NEXT: v_perm_b32 v10, v57, v39, s6 |
| ; GFX9-NEXT: v_perm_b32 v11, v56, v38, s6 |
| ; GFX9-NEXT: v_perm_b32 v12, v47, v37, s6 |
| ; GFX9-NEXT: v_perm_b32 v13, v46, v36, s6 |
| ; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: s_waitcnt vmcnt(3) |
| ; GFX9-NEXT: v_perm_b32 v14, v14, v35, s6 |
| ; GFX9-NEXT: s_waitcnt vmcnt(2) |
| ; GFX9-NEXT: v_perm_b32 v15, v15, v34, s6 |
| ; GFX9-NEXT: s_waitcnt vmcnt(1) |
| ; GFX9-NEXT: v_perm_b32 v16, v16, v33, s6 |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) |
| ; GFX9-NEXT: v_perm_b32 v17, v17, v32, s6 |
| ; GFX9-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: .LBB7_4: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v36i16_to_v18i32: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v0 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v36, 16, v3 |
| ; GFX11-NEXT: v_perm_b32 v4, v32, v4, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v0, v33, v0, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v1, v34, v1, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v2, v35, v2, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v3, v36, v3, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v5, v31, v5, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v6, v30, v6, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v7, v29, v7, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v8, v28, v8, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v9, v27, v9, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v10, v26, v10, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v11, v25, v11, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v12, v24, v12, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v13, v23, v13, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v14, v22, v14, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v15, v21, v15, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v16, v20, v16, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v17, v19, v17, 0x5040100 |
| ; GFX11-NEXT: s_mov_b32 s0, exec_lo |
| ; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v18 |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB7_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX11-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: .LBB7_2: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = add <36 x i16> %a, splat (i16 3) |
| %a2 = bitcast <36 x i16> %a1 to <18 x i32> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <36 x i16> %a to <18 x i32> |
| br label %end |
| |
| end: |
| %phi = phi <18 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <18 x i32> %phi |
| } |
| |
| define <36 x half> @bitcast_v18i32_to_v36f16(<18 x i32> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v18i32_to_v36f16: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v46, off, s[0:3], s32 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v19 |
| ; GCN-NEXT: ; implicit-def: $vgpr42 |
| ; GCN-NEXT: ; implicit-def: $vgpr46 |
| ; GCN-NEXT: ; implicit-def: $vgpr53 |
| ; GCN-NEXT: ; implicit-def: $vgpr45 |
| ; GCN-NEXT: ; implicit-def: $vgpr51 |
| ; GCN-NEXT: ; implicit-def: $vgpr44 |
| ; GCN-NEXT: ; implicit-def: $vgpr49 |
| ; GCN-NEXT: ; implicit-def: $vgpr43 |
| ; GCN-NEXT: ; implicit-def: $vgpr39 |
| ; GCN-NEXT: ; implicit-def: $vgpr41 |
| ; GCN-NEXT: ; implicit-def: $vgpr37 |
| ; GCN-NEXT: ; implicit-def: $vgpr40 |
| ; GCN-NEXT: ; implicit-def: $vgpr35 |
| ; GCN-NEXT: ; implicit-def: $vgpr55 |
| ; GCN-NEXT: ; implicit-def: $vgpr33 |
| ; GCN-NEXT: ; implicit-def: $vgpr54 |
| ; GCN-NEXT: ; implicit-def: $vgpr31 |
| ; GCN-NEXT: ; implicit-def: $vgpr52 |
| ; GCN-NEXT: ; implicit-def: $vgpr29 |
| ; GCN-NEXT: ; implicit-def: $vgpr50 |
| ; GCN-NEXT: ; implicit-def: $vgpr27 |
| ; GCN-NEXT: ; implicit-def: $vgpr48 |
| ; GCN-NEXT: ; implicit-def: $vgpr25 |
| ; GCN-NEXT: ; implicit-def: $vgpr38 |
| ; GCN-NEXT: ; implicit-def: $vgpr24 |
| ; GCN-NEXT: ; implicit-def: $vgpr36 |
| ; GCN-NEXT: ; implicit-def: $vgpr23 |
| ; GCN-NEXT: ; implicit-def: $vgpr34 |
| ; GCN-NEXT: ; implicit-def: $vgpr22 |
| ; GCN-NEXT: ; implicit-def: $vgpr32 |
| ; GCN-NEXT: ; implicit-def: $vgpr21 |
| ; GCN-NEXT: ; implicit-def: $vgpr30 |
| ; GCN-NEXT: ; implicit-def: $vgpr20 |
| ; GCN-NEXT: ; implicit-def: $vgpr28 |
| ; GCN-NEXT: ; implicit-def: $vgpr19 |
| ; GCN-NEXT: ; implicit-def: $vgpr26 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB8_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.false |
| ; GCN-NEXT: v_lshrrev_b32_e32 v26, 16, v18 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v28, 16, v17 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v30, 16, v16 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v32, 16, v15 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v34, 16, v14 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v36, 16, v13 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v38, 16, v12 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v48, 16, v11 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v50, 16, v10 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v52, 16, v9 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v54, 16, v8 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v55, 16, v7 |
| ; GCN-NEXT: s_waitcnt expcnt(6) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v40, 16, v6 |
| ; GCN-NEXT: s_waitcnt expcnt(5) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v41, 16, v5 |
| ; GCN-NEXT: s_waitcnt expcnt(4) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v42, 16, v4 |
| ; GCN-NEXT: s_waitcnt expcnt(2) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v44, 16, v3 |
| ; GCN-NEXT: s_waitcnt expcnt(1) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v45, 16, v2 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v46, 16, v1 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v19, v18 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v20, v17 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v21, v16 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v22, v15 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v23, v14 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v24, v13 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v25, v12 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v27, v11 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v29, v10 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v31, v9 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v33, v8 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v35, v7 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v37, v6 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v39, v5 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v49, v4 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v51, v3 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v53, v2 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v26, v26 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v28, v28 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v30, v30 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v32, v32 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v34, v34 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v36, v36 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v38, v38 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v48, v48 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v50, v50 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v52, v52 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v54, v54 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v55, v55 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v40, v40 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v41, v41 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v43, v42 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v44, v44 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v45, v45 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v46, v46 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v42, v1 |
| ; GCN-NEXT: ; implicit-def: $vgpr1 |
| ; GCN-NEXT: ; implicit-def: $vgpr2 |
| ; GCN-NEXT: ; implicit-def: $vgpr3 |
| ; GCN-NEXT: ; implicit-def: $vgpr4 |
| ; GCN-NEXT: ; implicit-def: $vgpr5 |
| ; GCN-NEXT: ; implicit-def: $vgpr6 |
| ; GCN-NEXT: ; implicit-def: $vgpr7 |
| ; GCN-NEXT: ; implicit-def: $vgpr8 |
| ; GCN-NEXT: ; implicit-def: $vgpr9 |
| ; GCN-NEXT: ; implicit-def: $vgpr10 |
| ; GCN-NEXT: ; implicit-def: $vgpr11 |
| ; GCN-NEXT: ; implicit-def: $vgpr12 |
| ; GCN-NEXT: ; implicit-def: $vgpr13 |
| ; GCN-NEXT: ; implicit-def: $vgpr14 |
| ; GCN-NEXT: ; implicit-def: $vgpr15 |
| ; GCN-NEXT: ; implicit-def: $vgpr16 |
| ; GCN-NEXT: ; implicit-def: $vgpr17 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: .LBB8_2: ; %Flow |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB8_4 |
| ; GCN-NEXT: ; %bb.3: ; %cmp.true |
| ; GCN-NEXT: v_add_i32_e32 v1, vcc, 3, v1 |
| ; GCN-NEXT: v_add_i32_e32 v2, vcc, 3, v2 |
| ; GCN-NEXT: v_add_i32_e32 v3, vcc, 3, v3 |
| ; GCN-NEXT: v_add_i32_e32 v4, vcc, 3, v4 |
| ; GCN-NEXT: v_add_i32_e32 v5, vcc, 3, v5 |
| ; GCN-NEXT: v_add_i32_e32 v6, vcc, 3, v6 |
| ; GCN-NEXT: v_add_i32_e32 v7, vcc, 3, v7 |
| ; GCN-NEXT: v_add_i32_e32 v8, vcc, 3, v8 |
| ; GCN-NEXT: v_add_i32_e32 v9, vcc, 3, v9 |
| ; GCN-NEXT: v_add_i32_e32 v10, vcc, 3, v10 |
| ; GCN-NEXT: v_add_i32_e32 v11, vcc, 3, v11 |
| ; GCN-NEXT: v_add_i32_e32 v12, vcc, 3, v12 |
| ; GCN-NEXT: v_add_i32_e32 v13, vcc, 3, v13 |
| ; GCN-NEXT: v_add_i32_e32 v14, vcc, 3, v14 |
| ; GCN-NEXT: v_add_i32_e32 v15, vcc, 3, v15 |
| ; GCN-NEXT: v_add_i32_e32 v16, vcc, 3, v16 |
| ; GCN-NEXT: v_add_i32_e32 v17, vcc, 3, v17 |
| ; GCN-NEXT: v_add_i32_e32 v18, vcc, 3, v18 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v46, 16, v1 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v45, 16, v2 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v44, 16, v3 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v43, 16, v4 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v41, 16, v5 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v40, 16, v6 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v55, 16, v7 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v54, 16, v8 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v52, 16, v9 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v50, 16, v10 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v48, 16, v11 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v38, 16, v12 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v36, 16, v13 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v34, 16, v14 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v32, 16, v15 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v30, 16, v16 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v28, 16, v17 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v26, 16, v18 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v19, v18 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v20, v17 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v21, v16 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v22, v15 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v23, v14 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v24, v13 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v25, v12 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v27, v11 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v29, v10 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v31, v9 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v33, v8 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v35, v7 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v37, v6 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v39, v5 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v49, v4 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v51, v3 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v53, v2 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v42, v1 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v26, v26 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v28, v28 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v30, v30 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v32, v32 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v34, v34 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v36, v36 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v38, v38 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v48, v48 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v50, v50 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v52, v52 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v54, v54 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v55, v55 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v40, v40 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v41, v41 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v43, v43 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v44, v44 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v45, v45 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v46, v46 |
| ; GCN-NEXT: .LBB8_4: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v3, v46 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v4, v42 |
| ; GCN-NEXT: v_add_i32_e32 v1, vcc, 4, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v5, v45 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v6, v53 |
| ; GCN-NEXT: v_add_i32_e32 v2, vcc, 8, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v7, v44 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v8, v51 |
| ; GCN-NEXT: v_add_i32_e32 v9, vcc, 12, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v10, v43 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v11, v49 |
| ; GCN-NEXT: v_add_i32_e32 v12, vcc, 16, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v13, v41 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v14, v39 |
| ; GCN-NEXT: v_add_i32_e32 v15, vcc, 20, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v16, v40 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v17, v37 |
| ; GCN-NEXT: v_add_i32_e32 v18, vcc, 24, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v37, v55 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v35, v35 |
| ; GCN-NEXT: v_add_i32_e32 v39, vcc, 28, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v49, v54 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v33, v33 |
| ; GCN-NEXT: v_add_i32_e32 v51, vcc, 32, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v52, v52 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v31, v31 |
| ; GCN-NEXT: v_add_i32_e32 v53, vcc, 36, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v50, v50 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v29, v29 |
| ; GCN-NEXT: v_add_i32_e32 v54, vcc, 40, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v48, v48 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v27, v27 |
| ; GCN-NEXT: v_add_i32_e32 v55, vcc, 44, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v38, v38 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v25, v25 |
| ; GCN-NEXT: s_waitcnt expcnt(6) |
| ; GCN-NEXT: v_add_i32_e32 v40, vcc, 48, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v36, v36 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v24, v24 |
| ; GCN-NEXT: s_waitcnt expcnt(5) |
| ; GCN-NEXT: v_add_i32_e32 v41, vcc, 52, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v34, v34 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v23, v23 |
| ; GCN-NEXT: s_waitcnt expcnt(4) |
| ; GCN-NEXT: v_add_i32_e32 v42, vcc, 56, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v32, v32 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v22, v22 |
| ; GCN-NEXT: s_waitcnt expcnt(3) |
| ; GCN-NEXT: v_add_i32_e32 v43, vcc, 60, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v30, v30 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v21, v21 |
| ; GCN-NEXT: s_waitcnt expcnt(2) |
| ; GCN-NEXT: v_add_i32_e32 v44, vcc, 64, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v28, v28 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v20, v20 |
| ; GCN-NEXT: s_waitcnt expcnt(1) |
| ; GCN-NEXT: v_add_i32_e32 v45, vcc, 0x44, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v26, v26 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v19, v19 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v3, 16, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v5, 16, v5 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v7, 16, v7 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v10, 16, v10 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v13, 16, v13 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v16, 16, v16 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v37, 16, v37 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v49, 16, v49 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v52, 16, v52 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v50, 16, v50 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v48, 16, v48 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v38, 16, v38 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v36, 16, v36 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v34, 16, v34 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v32, 16, v32 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v30, 16, v30 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v28, 16, v28 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v26, 16, v26 |
| ; GCN-NEXT: v_or_b32_e32 v3, v4, v3 |
| ; GCN-NEXT: v_or_b32_e32 v4, v6, v5 |
| ; GCN-NEXT: v_or_b32_e32 v5, v8, v7 |
| ; GCN-NEXT: v_or_b32_e32 v6, v11, v10 |
| ; GCN-NEXT: v_or_b32_e32 v7, v14, v13 |
| ; GCN-NEXT: v_or_b32_e32 v8, v17, v16 |
| ; GCN-NEXT: v_or_b32_e32 v10, v35, v37 |
| ; GCN-NEXT: v_or_b32_e32 v11, v33, v49 |
| ; GCN-NEXT: v_or_b32_e32 v13, v31, v52 |
| ; GCN-NEXT: v_or_b32_e32 v14, v29, v50 |
| ; GCN-NEXT: v_or_b32_e32 v16, v27, v48 |
| ; GCN-NEXT: v_or_b32_e32 v17, v25, v38 |
| ; GCN-NEXT: v_or_b32_e32 v24, v24, v36 |
| ; GCN-NEXT: v_or_b32_e32 v23, v23, v34 |
| ; GCN-NEXT: v_or_b32_e32 v22, v22, v32 |
| ; GCN-NEXT: v_or_b32_e32 v21, v21, v30 |
| ; GCN-NEXT: v_or_b32_e32 v20, v20, v28 |
| ; GCN-NEXT: v_or_b32_e32 v19, v19, v26 |
| ; GCN-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v4, v1, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v5, v2, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v7, v12, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v8, v15, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v10, v18, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v11, v39, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v13, v51, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v14, v53, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v16, v54, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v17, v55, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v24, v40, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v23, v41, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v22, v42, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v21, v43, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v20, v44, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v19, v45, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_load_dword v46, off, s[0:3], s32 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v18i32_to_v36f16: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: ; implicit-def: $vgpr35 |
| ; VI-NEXT: ; implicit-def: $vgpr34 |
| ; VI-NEXT: ; implicit-def: $vgpr33 |
| ; VI-NEXT: ; implicit-def: $vgpr32 |
| ; VI-NEXT: ; implicit-def: $vgpr31 |
| ; VI-NEXT: ; implicit-def: $vgpr30 |
| ; VI-NEXT: ; implicit-def: $vgpr29 |
| ; VI-NEXT: ; implicit-def: $vgpr28 |
| ; VI-NEXT: ; implicit-def: $vgpr27 |
| ; VI-NEXT: ; implicit-def: $vgpr26 |
| ; VI-NEXT: ; implicit-def: $vgpr25 |
| ; VI-NEXT: ; implicit-def: $vgpr24 |
| ; VI-NEXT: ; implicit-def: $vgpr23 |
| ; VI-NEXT: ; implicit-def: $vgpr22 |
| ; VI-NEXT: ; implicit-def: $vgpr21 |
| ; VI-NEXT: ; implicit-def: $vgpr20 |
| ; VI-NEXT: ; implicit-def: $vgpr19 |
| ; VI-NEXT: ; implicit-def: $vgpr18 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB8_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.false |
| ; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; VI-NEXT: .LBB8_2: ; %Flow |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB8_4 |
| ; VI-NEXT: ; %bb.3: ; %cmp.true |
| ; VI-NEXT: v_add_u32_e32 v17, vcc, 3, v17 |
| ; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v16 |
| ; VI-NEXT: v_add_u32_e32 v15, vcc, 3, v15 |
| ; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v14 |
| ; VI-NEXT: v_add_u32_e32 v13, vcc, 3, v13 |
| ; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v12 |
| ; VI-NEXT: v_add_u32_e32 v11, vcc, 3, v11 |
| ; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v10 |
| ; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v9 |
| ; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v8 |
| ; VI-NEXT: v_add_u32_e32 v7, vcc, 3, v7 |
| ; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v6 |
| ; VI-NEXT: v_add_u32_e32 v5, vcc, 3, v5 |
| ; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v4 |
| ; VI-NEXT: v_add_u32_e32 v3, vcc, 3, v3 |
| ; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v2 |
| ; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v1 |
| ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 |
| ; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; VI-NEXT: .LBB8_4: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 |
| ; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 |
| ; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 |
| ; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 |
| ; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 |
| ; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 |
| ; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 |
| ; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 |
| ; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 |
| ; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 |
| ; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 |
| ; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 |
| ; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 |
| ; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 |
| ; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 |
| ; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 |
| ; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 |
| ; VI-NEXT: v_or_b32_sdwa v0, v0, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v1, v1, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v2, v2, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v3, v3, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v4, v4, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v5, v5, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v6, v6, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v7, v7, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v8, v8, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v9, v9, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v10, v10, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v11, v11, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v12, v12, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v13, v13, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v14, v14, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v15, v15, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v16, v16, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v17, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v18i32_to_v36f16: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr35 |
| ; GFX9-NEXT: ; implicit-def: $vgpr34 |
| ; GFX9-NEXT: ; implicit-def: $vgpr33 |
| ; GFX9-NEXT: ; implicit-def: $vgpr32 |
| ; GFX9-NEXT: ; implicit-def: $vgpr31 |
| ; GFX9-NEXT: ; implicit-def: $vgpr30 |
| ; GFX9-NEXT: ; implicit-def: $vgpr29 |
| ; GFX9-NEXT: ; implicit-def: $vgpr28 |
| ; GFX9-NEXT: ; implicit-def: $vgpr27 |
| ; GFX9-NEXT: ; implicit-def: $vgpr26 |
| ; GFX9-NEXT: ; implicit-def: $vgpr25 |
| ; GFX9-NEXT: ; implicit-def: $vgpr24 |
| ; GFX9-NEXT: ; implicit-def: $vgpr23 |
| ; GFX9-NEXT: ; implicit-def: $vgpr22 |
| ; GFX9-NEXT: ; implicit-def: $vgpr21 |
| ; GFX9-NEXT: ; implicit-def: $vgpr20 |
| ; GFX9-NEXT: ; implicit-def: $vgpr19 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB8_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.false |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX9-NEXT: .LBB8_2: ; %Flow |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB8_4 |
| ; GFX9-NEXT: ; %bb.3: ; %cmp.true |
| ; GFX9-NEXT: v_add_u32_e32 v17, 3, v17 |
| ; GFX9-NEXT: v_add_u32_e32 v16, 3, v16 |
| ; GFX9-NEXT: v_add_u32_e32 v15, 3, v15 |
| ; GFX9-NEXT: v_add_u32_e32 v14, 3, v14 |
| ; GFX9-NEXT: v_add_u32_e32 v13, 3, v13 |
| ; GFX9-NEXT: v_add_u32_e32 v12, 3, v12 |
| ; GFX9-NEXT: v_add_u32_e32 v11, 3, v11 |
| ; GFX9-NEXT: v_add_u32_e32 v10, 3, v10 |
| ; GFX9-NEXT: v_add_u32_e32 v9, 3, v9 |
| ; GFX9-NEXT: v_add_u32_e32 v8, 3, v8 |
| ; GFX9-NEXT: v_add_u32_e32 v7, 3, v7 |
| ; GFX9-NEXT: v_add_u32_e32 v6, 3, v6 |
| ; GFX9-NEXT: v_add_u32_e32 v5, 3, v5 |
| ; GFX9-NEXT: v_add_u32_e32 v4, 3, v4 |
| ; GFX9-NEXT: v_add_u32_e32 v3, 3, v3 |
| ; GFX9-NEXT: v_add_u32_e32 v2, 3, v2 |
| ; GFX9-NEXT: v_add_u32_e32 v1, 3, v1 |
| ; GFX9-NEXT: v_add_u32_e32 v0, 3, v0 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX9-NEXT: .LBB8_4: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: s_mov_b32 s4, 0x5040100 |
| ; GFX9-NEXT: v_perm_b32 v0, v35, v0, s4 |
| ; GFX9-NEXT: v_perm_b32 v1, v34, v1, s4 |
| ; GFX9-NEXT: v_perm_b32 v2, v33, v2, s4 |
| ; GFX9-NEXT: v_perm_b32 v3, v32, v3, s4 |
| ; GFX9-NEXT: v_perm_b32 v4, v31, v4, s4 |
| ; GFX9-NEXT: v_perm_b32 v5, v30, v5, s4 |
| ; GFX9-NEXT: v_perm_b32 v6, v29, v6, s4 |
| ; GFX9-NEXT: v_perm_b32 v7, v28, v7, s4 |
| ; GFX9-NEXT: v_perm_b32 v8, v27, v8, s4 |
| ; GFX9-NEXT: v_perm_b32 v9, v26, v9, s4 |
| ; GFX9-NEXT: v_perm_b32 v10, v25, v10, s4 |
| ; GFX9-NEXT: v_perm_b32 v11, v24, v11, s4 |
| ; GFX9-NEXT: v_perm_b32 v12, v23, v12, s4 |
| ; GFX9-NEXT: v_perm_b32 v13, v22, v13, s4 |
| ; GFX9-NEXT: v_perm_b32 v14, v21, v14, s4 |
| ; GFX9-NEXT: v_perm_b32 v15, v20, v15, s4 |
| ; GFX9-NEXT: v_perm_b32 v16, v19, v16, s4 |
| ; GFX9-NEXT: v_perm_b32 v17, v18, v17, s4 |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v18i32_to_v36f16: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v18 |
| ; GFX11-NEXT: ; implicit-def: $vgpr35 |
| ; GFX11-NEXT: ; implicit-def: $vgpr34 |
| ; GFX11-NEXT: ; implicit-def: $vgpr33 |
| ; GFX11-NEXT: ; implicit-def: $vgpr32 |
| ; GFX11-NEXT: ; implicit-def: $vgpr31 |
| ; GFX11-NEXT: ; implicit-def: $vgpr30 |
| ; GFX11-NEXT: ; implicit-def: $vgpr29 |
| ; GFX11-NEXT: ; implicit-def: $vgpr28 |
| ; GFX11-NEXT: ; implicit-def: $vgpr27 |
| ; GFX11-NEXT: ; implicit-def: $vgpr26 |
| ; GFX11-NEXT: ; implicit-def: $vgpr25 |
| ; GFX11-NEXT: ; implicit-def: $vgpr24 |
| ; GFX11-NEXT: ; implicit-def: $vgpr23 |
| ; GFX11-NEXT: ; implicit-def: $vgpr22 |
| ; GFX11-NEXT: ; implicit-def: $vgpr21 |
| ; GFX11-NEXT: ; implicit-def: $vgpr20 |
| ; GFX11-NEXT: ; implicit-def: $vgpr19 |
| ; GFX11-NEXT: ; implicit-def: $vgpr18 |
| ; GFX11-NEXT: s_and_saveexec_b32 s0, vcc_lo |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB8_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.false |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX11-NEXT: .LBB8_2: ; %Flow |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB8_4 |
| ; GFX11-NEXT: ; %bb.3: ; %cmp.true |
| ; GFX11-NEXT: v_add_nc_u32_e32 v17, 3, v17 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v16, 3, v16 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v15, 3, v15 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v14, 3, v14 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v13, 3, v13 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v12, 3, v12 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v11, 3, v11 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v10, 3, v10 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v9, 3, v9 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v8, 3, v8 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v7, 3, v7 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v6, 3, v6 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v5, 3, v5 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v4, 3, v4 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v3, 3, v3 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v2, 3, v2 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v1, 3, v1 |
| ; GFX11-NEXT: v_add_nc_u32_e32 v0, 3, v0 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX11-NEXT: .LBB8_4: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) |
| ; GFX11-NEXT: v_perm_b32 v0, v35, v0, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v1, v34, v1, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v2, v33, v2, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v3, v32, v3, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v4, v31, v4, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v5, v30, v5, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v6, v29, v6, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v7, v28, v7, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v8, v27, v8, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v9, v26, v9, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v10, v25, v10, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v11, v24, v11, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v12, v23, v12, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v13, v22, v13, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v14, v21, v14, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v15, v20, v15, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v16, v19, v16, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v17, v18, v17, 0x5040100 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = add <18 x i32> %a, splat (i32 3) |
| %a2 = bitcast <18 x i32> %a1 to <36 x half> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <18 x i32> %a to <36 x half> |
| br label %end |
| |
| end: |
| %phi = phi <36 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <36 x half> %phi |
| } |
| |
| define <18 x i32> @bitcast_v36f16_to_v18i32(<36 x half> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v36f16_to_v18i32: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:16 |
| ; GCN-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:12 |
| ; GCN-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:8 |
| ; GCN-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:4 |
| ; GCN-NEXT: buffer_load_dword v49, off, s[0:3], s32 |
| ; GCN-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:20 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v35, v1 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v34, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v33, v3 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v32, v2 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v63, v5 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v62, v4 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v61, v7 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v60, v6 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v59, v9 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v46, v8 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v58, v11 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v44, v10 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v57, v13 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v42, v12 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v56, v15 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v40, v14 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v47, v17 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v54, v16 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v45, v19 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v52, v18 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v43, v21 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v51, v20 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v41, v23 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v48, v22 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v55, v25 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v0, v24 |
| ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v53, v27 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v0, v26 |
| ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v50, v29 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v0, v28 |
| ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v0, v30 |
| ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill |
| ; GCN-NEXT: s_waitcnt vmcnt(4) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v39 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v49, v49 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v38, v38 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v37, v37 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v39, v31 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v36, v36 |
| ; GCN-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB9_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.false |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_lshlrev_b32_e32 v0, 16, v35 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v33 |
| ; GCN-NEXT: v_or_b32_e32 v0, v34, v0 |
| ; GCN-NEXT: v_or_b32_e32 v1, v32, v1 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v2, 16, v63 |
| ; GCN-NEXT: v_or_b32_e32 v2, v62, v2 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v3, 16, v61 |
| ; GCN-NEXT: v_or_b32_e32 v3, v60, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v4, 16, v59 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v5, 16, v58 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v6, 16, v57 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v7, 16, v56 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v8, 16, v47 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v9, 16, v45 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v10, 16, v43 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v11, 16, v41 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v12, 16, v55 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v13, 16, v53 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v14, 16, v50 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v15, 16, v49 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v16, 16, v38 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v17, 16, v39 |
| ; GCN-NEXT: v_or_b32_e32 v4, v46, v4 |
| ; GCN-NEXT: v_or_b32_e32 v5, v44, v5 |
| ; GCN-NEXT: v_or_b32_e32 v6, v42, v6 |
| ; GCN-NEXT: v_or_b32_e32 v7, v40, v7 |
| ; GCN-NEXT: v_or_b32_e32 v8, v54, v8 |
| ; GCN-NEXT: v_or_b32_e32 v9, v52, v9 |
| ; GCN-NEXT: v_or_b32_e32 v10, v51, v10 |
| ; GCN-NEXT: v_or_b32_e32 v11, v48, v11 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v12, v18, v12 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v13, v18, v13 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v14, v18, v14 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v15, v18, v15 |
| ; GCN-NEXT: v_or_b32_e32 v16, v37, v16 |
| ; GCN-NEXT: v_or_b32_e32 v17, v36, v17 |
| ; GCN-NEXT: ; implicit-def: $vgpr35 |
| ; GCN-NEXT: ; implicit-def: $vgpr34 |
| ; GCN-NEXT: ; implicit-def: $vgpr33 |
| ; GCN-NEXT: ; implicit-def: $vgpr32 |
| ; GCN-NEXT: ; implicit-def: $vgpr63 |
| ; GCN-NEXT: ; implicit-def: $vgpr62 |
| ; GCN-NEXT: ; implicit-def: $vgpr61 |
| ; GCN-NEXT: ; implicit-def: $vgpr60 |
| ; GCN-NEXT: ; implicit-def: $vgpr59 |
| ; GCN-NEXT: ; implicit-def: $vgpr46 |
| ; GCN-NEXT: ; implicit-def: $vgpr58 |
| ; GCN-NEXT: ; implicit-def: $vgpr44 |
| ; GCN-NEXT: ; implicit-def: $vgpr57 |
| ; GCN-NEXT: ; implicit-def: $vgpr42 |
| ; GCN-NEXT: ; implicit-def: $vgpr56 |
| ; GCN-NEXT: ; implicit-def: $vgpr40 |
| ; GCN-NEXT: ; implicit-def: $vgpr47 |
| ; GCN-NEXT: ; implicit-def: $vgpr54 |
| ; GCN-NEXT: ; implicit-def: $vgpr45 |
| ; GCN-NEXT: ; implicit-def: $vgpr52 |
| ; GCN-NEXT: ; implicit-def: $vgpr43 |
| ; GCN-NEXT: ; implicit-def: $vgpr51 |
| ; GCN-NEXT: ; implicit-def: $vgpr41 |
| ; GCN-NEXT: ; implicit-def: $vgpr48 |
| ; GCN-NEXT: ; implicit-def: $vgpr55 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr53 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr50 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr49 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr38 |
| ; GCN-NEXT: ; implicit-def: $vgpr37 |
| ; GCN-NEXT: ; implicit-def: $vgpr39 |
| ; GCN-NEXT: ; implicit-def: $vgpr36 |
| ; GCN-NEXT: .LBB9_2: ; %Flow |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB9_4 |
| ; GCN-NEXT: ; %bb.3: ; %cmp.true |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v0, v35 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v1, v34 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v2, v33 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v3, v32 |
| ; GCN-NEXT: v_add_f32_e32 v0, 0x38000000, v0 |
| ; GCN-NEXT: v_add_f32_e32 v1, 0x38000000, v1 |
| ; GCN-NEXT: v_add_f32_e32 v2, 0x38000000, v2 |
| ; GCN-NEXT: v_add_f32_e32 v3, 0x38000000, v3 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v0, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v1, v1 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v2, v2 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v3, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v0, 16, v0 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v2, 16, v2 |
| ; GCN-NEXT: v_or_b32_e32 v0, v1, v0 |
| ; GCN-NEXT: v_or_b32_e32 v1, v3, v2 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v2, v63 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v3, v62 |
| ; GCN-NEXT: v_add_f32_e32 v2, 0x38000000, v2 |
| ; GCN-NEXT: v_add_f32_e32 v3, 0x38000000, v3 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v2, v2 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v3, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v2, 16, v2 |
| ; GCN-NEXT: v_or_b32_e32 v2, v3, v2 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v3, v61 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v4, v60 |
| ; GCN-NEXT: v_add_f32_e32 v3, 0x38000000, v3 |
| ; GCN-NEXT: v_add_f32_e32 v4, 0x38000000, v4 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v3, v3 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v4, v4 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v3, 16, v3 |
| ; GCN-NEXT: v_or_b32_e32 v3, v4, v3 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v4, v59 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v5, v46 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v6, v58 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v7, v44 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v8, v57 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v9, v42 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v10, v56 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v11, v40 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v12, v47 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v13, v54 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v14, v45 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v15, v52 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v16, v43 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v17, v51 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v18, v41 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v19, v48 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v20, v55 |
| ; GCN-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v21, v21 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v22, v53 |
| ; GCN-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v23, v23 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v24, v50 |
| ; GCN-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v25, v25 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v26, v49 |
| ; GCN-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v27, v27 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v28, v38 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v29, v37 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v30, v39 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v31, v36 |
| ; GCN-NEXT: v_add_f32_e32 v4, 0x38000000, v4 |
| ; GCN-NEXT: v_add_f32_e32 v5, 0x38000000, v5 |
| ; GCN-NEXT: v_add_f32_e32 v6, 0x38000000, v6 |
| ; GCN-NEXT: v_add_f32_e32 v7, 0x38000000, v7 |
| ; GCN-NEXT: v_add_f32_e32 v8, 0x38000000, v8 |
| ; GCN-NEXT: v_add_f32_e32 v9, 0x38000000, v9 |
| ; GCN-NEXT: v_add_f32_e32 v10, 0x38000000, v10 |
| ; GCN-NEXT: v_add_f32_e32 v11, 0x38000000, v11 |
| ; GCN-NEXT: v_add_f32_e32 v12, 0x38000000, v12 |
| ; GCN-NEXT: v_add_f32_e32 v13, 0x38000000, v13 |
| ; GCN-NEXT: v_add_f32_e32 v14, 0x38000000, v14 |
| ; GCN-NEXT: v_add_f32_e32 v15, 0x38000000, v15 |
| ; GCN-NEXT: v_add_f32_e32 v16, 0x38000000, v16 |
| ; GCN-NEXT: v_add_f32_e32 v17, 0x38000000, v17 |
| ; GCN-NEXT: v_add_f32_e32 v18, 0x38000000, v18 |
| ; GCN-NEXT: v_add_f32_e32 v19, 0x38000000, v19 |
| ; GCN-NEXT: v_add_f32_e32 v20, 0x38000000, v20 |
| ; GCN-NEXT: v_add_f32_e32 v21, 0x38000000, v21 |
| ; GCN-NEXT: v_add_f32_e32 v22, 0x38000000, v22 |
| ; GCN-NEXT: v_add_f32_e32 v23, 0x38000000, v23 |
| ; GCN-NEXT: v_add_f32_e32 v24, 0x38000000, v24 |
| ; GCN-NEXT: v_add_f32_e32 v25, 0x38000000, v25 |
| ; GCN-NEXT: v_add_f32_e32 v26, 0x38000000, v26 |
| ; GCN-NEXT: v_add_f32_e32 v27, 0x38000000, v27 |
| ; GCN-NEXT: v_add_f32_e32 v28, 0x38000000, v28 |
| ; GCN-NEXT: v_add_f32_e32 v29, 0x38000000, v29 |
| ; GCN-NEXT: v_add_f32_e32 v30, 0x38000000, v30 |
| ; GCN-NEXT: v_add_f32_e32 v31, 0x38000000, v31 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v4, v4 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v5, v5 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v6, v6 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v7, v7 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v8, v8 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v9, v9 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v10, v10 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v11, v11 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v12, v12 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v13, v13 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v14, v14 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v15, v15 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v16, v16 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v17, v17 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v18, v18 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v19, v19 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v20, v20 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v21, v21 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v22, v22 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v23, v23 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v24, v24 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v25, v25 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v26, v26 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v27, v27 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v28, v28 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v29, v29 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v30, v30 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v31, v31 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v4, 16, v4 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v6, 16, v6 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v8, 16, v8 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v10, 16, v10 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v12, 16, v12 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v14, 16, v14 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v16, 16, v16 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v18, 16, v18 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v20, 16, v20 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v22, 16, v22 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v24, 16, v24 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v26, 16, v26 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v28, 16, v28 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v30, 16, v30 |
| ; GCN-NEXT: v_or_b32_e32 v4, v5, v4 |
| ; GCN-NEXT: v_or_b32_e32 v5, v7, v6 |
| ; GCN-NEXT: v_or_b32_e32 v6, v9, v8 |
| ; GCN-NEXT: v_or_b32_e32 v7, v11, v10 |
| ; GCN-NEXT: v_or_b32_e32 v8, v13, v12 |
| ; GCN-NEXT: v_or_b32_e32 v9, v15, v14 |
| ; GCN-NEXT: v_or_b32_e32 v10, v17, v16 |
| ; GCN-NEXT: v_or_b32_e32 v11, v19, v18 |
| ; GCN-NEXT: v_or_b32_e32 v12, v21, v20 |
| ; GCN-NEXT: v_or_b32_e32 v13, v23, v22 |
| ; GCN-NEXT: v_or_b32_e32 v14, v25, v24 |
| ; GCN-NEXT: v_or_b32_e32 v15, v27, v26 |
| ; GCN-NEXT: v_or_b32_e32 v16, v29, v28 |
| ; GCN-NEXT: v_or_b32_e32 v17, v31, v30 |
| ; GCN-NEXT: .LBB9_4: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v36f16_to_v18i32: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill |
| ; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 ; 4-byte Folded Spill |
| ; VI-NEXT: v_mov_b32_e32 v32, v17 |
| ; VI-NEXT: v_mov_b32_e32 v33, v16 |
| ; VI-NEXT: v_mov_b32_e32 v34, v15 |
| ; VI-NEXT: v_mov_b32_e32 v35, v14 |
| ; VI-NEXT: v_mov_b32_e32 v36, v13 |
| ; VI-NEXT: v_mov_b32_e32 v37, v12 |
| ; VI-NEXT: v_mov_b32_e32 v38, v11 |
| ; VI-NEXT: v_mov_b32_e32 v39, v10 |
| ; VI-NEXT: v_mov_b32_e32 v48, v9 |
| ; VI-NEXT: v_mov_b32_e32 v49, v8 |
| ; VI-NEXT: v_mov_b32_e32 v50, v7 |
| ; VI-NEXT: v_mov_b32_e32 v51, v6 |
| ; VI-NEXT: v_mov_b32_e32 v52, v5 |
| ; VI-NEXT: v_mov_b32_e32 v53, v4 |
| ; VI-NEXT: v_mov_b32_e32 v54, v3 |
| ; VI-NEXT: v_mov_b32_e32 v55, v2 |
| ; VI-NEXT: v_mov_b32_e32 v40, v1 |
| ; VI-NEXT: v_mov_b32_e32 v41, v0 |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB9_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.false |
| ; VI-NEXT: v_mov_b32_e32 v17, 16 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v0, v17, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v1, v17, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v2, v17, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v3, v17, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v4, v17, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v5, v17, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v6, v17, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v7, v17, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v8, v17, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v9, v17, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v10, v17, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v11, v17, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v12, v17, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v13, v17, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v14, v17, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v15, v17, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v16, v17, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v17, v17, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_or_b32_sdwa v0, v41, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v1, v40, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v2, v55, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v3, v54, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v4, v53, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v5, v52, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v6, v51, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v7, v50, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v8, v49, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v9, v48, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v10, v39, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v11, v38, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v12, v37, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v13, v36, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v14, v35, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v15, v34, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v16, v33, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v17, v32, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: ; implicit-def: $vgpr41 |
| ; VI-NEXT: ; implicit-def: $vgpr40 |
| ; VI-NEXT: ; implicit-def: $vgpr55 |
| ; VI-NEXT: ; implicit-def: $vgpr54 |
| ; VI-NEXT: ; implicit-def: $vgpr53 |
| ; VI-NEXT: ; implicit-def: $vgpr52 |
| ; VI-NEXT: ; implicit-def: $vgpr51 |
| ; VI-NEXT: ; implicit-def: $vgpr50 |
| ; VI-NEXT: ; implicit-def: $vgpr49 |
| ; VI-NEXT: ; implicit-def: $vgpr48 |
| ; VI-NEXT: ; implicit-def: $vgpr39 |
| ; VI-NEXT: ; implicit-def: $vgpr38 |
| ; VI-NEXT: ; implicit-def: $vgpr37 |
| ; VI-NEXT: ; implicit-def: $vgpr36 |
| ; VI-NEXT: ; implicit-def: $vgpr35 |
| ; VI-NEXT: ; implicit-def: $vgpr34 |
| ; VI-NEXT: ; implicit-def: $vgpr33 |
| ; VI-NEXT: ; implicit-def: $vgpr32 |
| ; VI-NEXT: .LBB9_2: ; %Flow |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB9_4 |
| ; VI-NEXT: ; %bb.3: ; %cmp.true |
| ; VI-NEXT: v_mov_b32_e32 v17, 0x200 |
| ; VI-NEXT: v_add_f16_sdwa v0, v41, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v1, 0x200, v41 |
| ; VI-NEXT: v_or_b32_e32 v0, v1, v0 |
| ; VI-NEXT: v_add_f16_sdwa v1, v40, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v2, 0x200, v40 |
| ; VI-NEXT: v_or_b32_e32 v1, v2, v1 |
| ; VI-NEXT: v_add_f16_sdwa v2, v55, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v3, 0x200, v55 |
| ; VI-NEXT: v_or_b32_e32 v2, v3, v2 |
| ; VI-NEXT: v_add_f16_sdwa v3, v54, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v4, 0x200, v54 |
| ; VI-NEXT: v_or_b32_e32 v3, v4, v3 |
| ; VI-NEXT: v_add_f16_sdwa v4, v53, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v5, 0x200, v53 |
| ; VI-NEXT: v_or_b32_e32 v4, v5, v4 |
| ; VI-NEXT: v_add_f16_sdwa v5, v52, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v6, 0x200, v52 |
| ; VI-NEXT: v_or_b32_e32 v5, v6, v5 |
| ; VI-NEXT: v_add_f16_sdwa v6, v51, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v7, 0x200, v51 |
| ; VI-NEXT: v_or_b32_e32 v6, v7, v6 |
| ; VI-NEXT: v_add_f16_sdwa v7, v50, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v8, 0x200, v50 |
| ; VI-NEXT: v_or_b32_e32 v7, v8, v7 |
| ; VI-NEXT: v_add_f16_sdwa v8, v49, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v9, 0x200, v49 |
| ; VI-NEXT: v_or_b32_e32 v8, v9, v8 |
| ; VI-NEXT: v_add_f16_sdwa v9, v48, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v10, 0x200, v48 |
| ; VI-NEXT: v_or_b32_e32 v9, v10, v9 |
| ; VI-NEXT: v_add_f16_sdwa v10, v39, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v11, 0x200, v39 |
| ; VI-NEXT: v_or_b32_e32 v10, v11, v10 |
| ; VI-NEXT: v_add_f16_sdwa v11, v38, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v12, 0x200, v38 |
| ; VI-NEXT: v_or_b32_e32 v11, v12, v11 |
| ; VI-NEXT: v_add_f16_sdwa v12, v37, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v13, 0x200, v37 |
| ; VI-NEXT: v_or_b32_e32 v12, v13, v12 |
| ; VI-NEXT: v_add_f16_sdwa v13, v36, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v14, 0x200, v36 |
| ; VI-NEXT: v_or_b32_e32 v13, v14, v13 |
| ; VI-NEXT: v_add_f16_sdwa v14, v35, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v15, 0x200, v35 |
| ; VI-NEXT: v_or_b32_e32 v14, v15, v14 |
| ; VI-NEXT: v_add_f16_sdwa v15, v34, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v16, 0x200, v34 |
| ; VI-NEXT: v_or_b32_e32 v15, v16, v15 |
| ; VI-NEXT: v_add_f16_sdwa v16, v33, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v18, 0x200, v33 |
| ; VI-NEXT: v_or_b32_e32 v16, v18, v16 |
| ; VI-NEXT: v_add_f16_sdwa v17, v32, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v18, 0x200, v32 |
| ; VI-NEXT: v_or_b32_e32 v17, v18, v17 |
| ; VI-NEXT: .LBB9_4: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 ; 4-byte Folded Reload |
| ; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload |
| ; VI-NEXT: s_waitcnt vmcnt(0) |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v36f16_to_v18i32: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_mov_b32_e32 v32, v17 |
| ; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_mov_b32_e32 v33, v16 |
| ; GFX9-NEXT: v_mov_b32_e32 v41, v0 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v32 |
| ; GFX9-NEXT: v_mov_b32_e32 v34, v15 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33 |
| ; GFX9-NEXT: v_mov_b32_e32 v35, v14 |
| ; GFX9-NEXT: v_mov_b32_e32 v36, v13 |
| ; GFX9-NEXT: v_mov_b32_e32 v37, v12 |
| ; GFX9-NEXT: v_mov_b32_e32 v38, v11 |
| ; GFX9-NEXT: v_mov_b32_e32 v39, v10 |
| ; GFX9-NEXT: v_mov_b32_e32 v48, v9 |
| ; GFX9-NEXT: v_mov_b32_e32 v49, v8 |
| ; GFX9-NEXT: v_mov_b32_e32 v50, v7 |
| ; GFX9-NEXT: v_mov_b32_e32 v51, v6 |
| ; GFX9-NEXT: v_mov_b32_e32 v52, v5 |
| ; GFX9-NEXT: v_mov_b32_e32 v53, v4 |
| ; GFX9-NEXT: v_mov_b32_e32 v54, v3 |
| ; GFX9-NEXT: v_mov_b32_e32 v55, v2 |
| ; GFX9-NEXT: v_mov_b32_e32 v40, v1 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v36 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v37 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v38 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v39 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v48 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v49 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v50 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v51 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v52 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v53 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v54 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v55 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v40 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v41 |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill |
| ; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB9_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.false |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: s_mov_b32 s6, 0x5040100 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v35 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v34 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v33 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v32 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: v_perm_b32 v0, v45, v41, s6 |
| ; GFX9-NEXT: v_perm_b32 v1, v44, v40, s6 |
| ; GFX9-NEXT: v_perm_b32 v2, v43, v55, s6 |
| ; GFX9-NEXT: v_perm_b32 v3, v42, v54, s6 |
| ; GFX9-NEXT: v_perm_b32 v4, v63, v53, s6 |
| ; GFX9-NEXT: v_perm_b32 v5, v62, v52, s6 |
| ; GFX9-NEXT: v_perm_b32 v6, v61, v51, s6 |
| ; GFX9-NEXT: v_perm_b32 v7, v60, v50, s6 |
| ; GFX9-NEXT: v_perm_b32 v8, v59, v49, s6 |
| ; GFX9-NEXT: v_perm_b32 v9, v58, v48, s6 |
| ; GFX9-NEXT: v_perm_b32 v10, v57, v39, s6 |
| ; GFX9-NEXT: v_perm_b32 v11, v56, v38, s6 |
| ; GFX9-NEXT: v_perm_b32 v12, v47, v37, s6 |
| ; GFX9-NEXT: v_perm_b32 v13, v46, v36, s6 |
| ; GFX9-NEXT: v_perm_b32 v14, v14, v35, s6 |
| ; GFX9-NEXT: v_perm_b32 v15, v15, v34, s6 |
| ; GFX9-NEXT: v_perm_b32 v16, v16, v33, s6 |
| ; GFX9-NEXT: v_perm_b32 v17, v17, v32, s6 |
| ; GFX9-NEXT: ; implicit-def: $vgpr41 |
| ; GFX9-NEXT: ; implicit-def: $vgpr40 |
| ; GFX9-NEXT: ; implicit-def: $vgpr55 |
| ; GFX9-NEXT: ; implicit-def: $vgpr54 |
| ; GFX9-NEXT: ; implicit-def: $vgpr53 |
| ; GFX9-NEXT: ; implicit-def: $vgpr52 |
| ; GFX9-NEXT: ; implicit-def: $vgpr51 |
| ; GFX9-NEXT: ; implicit-def: $vgpr50 |
| ; GFX9-NEXT: ; implicit-def: $vgpr49 |
| ; GFX9-NEXT: ; implicit-def: $vgpr48 |
| ; GFX9-NEXT: ; implicit-def: $vgpr39 |
| ; GFX9-NEXT: ; implicit-def: $vgpr38 |
| ; GFX9-NEXT: ; implicit-def: $vgpr37 |
| ; GFX9-NEXT: ; implicit-def: $vgpr36 |
| ; GFX9-NEXT: ; implicit-def: $vgpr35 |
| ; GFX9-NEXT: ; implicit-def: $vgpr34 |
| ; GFX9-NEXT: ; implicit-def: $vgpr33 |
| ; GFX9-NEXT: ; implicit-def: $vgpr32 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr46 |
| ; GFX9-NEXT: ; implicit-def: $vgpr47 |
| ; GFX9-NEXT: ; implicit-def: $vgpr56 |
| ; GFX9-NEXT: ; implicit-def: $vgpr57 |
| ; GFX9-NEXT: ; implicit-def: $vgpr58 |
| ; GFX9-NEXT: ; implicit-def: $vgpr59 |
| ; GFX9-NEXT: ; implicit-def: $vgpr60 |
| ; GFX9-NEXT: ; implicit-def: $vgpr61 |
| ; GFX9-NEXT: ; implicit-def: $vgpr62 |
| ; GFX9-NEXT: ; implicit-def: $vgpr63 |
| ; GFX9-NEXT: ; implicit-def: $vgpr42 |
| ; GFX9-NEXT: ; implicit-def: $vgpr43 |
| ; GFX9-NEXT: ; implicit-def: $vgpr44 |
| ; GFX9-NEXT: ; implicit-def: $vgpr45 |
| ; GFX9-NEXT: .LBB9_2: ; %Flow |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB9_4 |
| ; GFX9-NEXT: ; %bb.3: ; %cmp.true |
| ; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload |
| ; GFX9-NEXT: s_mov_b32 s6, 0x5040100 |
| ; GFX9-NEXT: v_perm_b32 v0, v45, v41, s6 |
| ; GFX9-NEXT: s_movk_i32 s7, 0x200 |
| ; GFX9-NEXT: v_perm_b32 v1, v44, v40, s6 |
| ; GFX9-NEXT: v_perm_b32 v2, v43, v55, s6 |
| ; GFX9-NEXT: v_perm_b32 v3, v42, v54, s6 |
| ; GFX9-NEXT: v_perm_b32 v4, v63, v53, s6 |
| ; GFX9-NEXT: v_perm_b32 v5, v62, v52, s6 |
| ; GFX9-NEXT: v_perm_b32 v6, v61, v51, s6 |
| ; GFX9-NEXT: v_perm_b32 v7, v60, v50, s6 |
| ; GFX9-NEXT: v_perm_b32 v8, v59, v49, s6 |
| ; GFX9-NEXT: v_perm_b32 v9, v58, v48, s6 |
| ; GFX9-NEXT: v_perm_b32 v10, v57, v39, s6 |
| ; GFX9-NEXT: v_perm_b32 v11, v56, v38, s6 |
| ; GFX9-NEXT: v_perm_b32 v12, v47, v37, s6 |
| ; GFX9-NEXT: v_perm_b32 v13, v46, v36, s6 |
| ; GFX9-NEXT: v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v3, v3, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v4, v4, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v12, v12, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v13, v13, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: s_waitcnt vmcnt(3) |
| ; GFX9-NEXT: v_perm_b32 v14, v14, v35, s6 |
| ; GFX9-NEXT: s_waitcnt vmcnt(2) |
| ; GFX9-NEXT: v_perm_b32 v15, v15, v34, s6 |
| ; GFX9-NEXT: s_waitcnt vmcnt(1) |
| ; GFX9-NEXT: v_perm_b32 v16, v16, v33, s6 |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) |
| ; GFX9-NEXT: v_perm_b32 v17, v17, v32, s6 |
| ; GFX9-NEXT: v_pk_add_f16 v14, v14, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v15, v15, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v16, v16, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v17, v17, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: .LBB9_4: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v36f16_to_v18i32: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v0 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v36, 16, v3 |
| ; GFX11-NEXT: v_perm_b32 v4, v32, v4, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v0, v33, v0, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v1, v34, v1, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v2, v35, v2, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v3, v36, v3, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v5, v31, v5, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v6, v30, v6, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v7, v29, v7, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v8, v28, v8, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v9, v27, v9, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v10, v26, v10, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v11, v25, v11, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v12, v24, v12, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v13, v23, v13, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v14, v22, v14, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v15, v21, v15, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v16, v20, v16, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v17, v19, v17, 0x5040100 |
| ; GFX11-NEXT: s_mov_b32 s0, exec_lo |
| ; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v18 |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB9_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX11-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1] |
| ; GFX11-NEXT: .LBB9_2: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = fadd <36 x half> %a, splat (half 0xH0200) |
| %a2 = bitcast <36 x half> %a1 to <18 x i32> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <36 x half> %a to <18 x i32> |
| br label %end |
| |
| end: |
| %phi = phi <18 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <18 x i32> %phi |
| } |
| |
| define <9 x i64> @bitcast_v18f32_to_v9i64(<18 x float> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v18f32_to_v9i64: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB10_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.true |
| ; GCN-NEXT: v_add_f32_e32 v17, 1.0, v17 |
| ; GCN-NEXT: v_add_f32_e32 v16, 1.0, v16 |
| ; GCN-NEXT: v_add_f32_e32 v15, 1.0, v15 |
| ; GCN-NEXT: v_add_f32_e32 v14, 1.0, v14 |
| ; GCN-NEXT: v_add_f32_e32 v13, 1.0, v13 |
| ; GCN-NEXT: v_add_f32_e32 v12, 1.0, v12 |
| ; GCN-NEXT: v_add_f32_e32 v11, 1.0, v11 |
| ; GCN-NEXT: v_add_f32_e32 v10, 1.0, v10 |
| ; GCN-NEXT: v_add_f32_e32 v9, 1.0, v9 |
| ; GCN-NEXT: v_add_f32_e32 v8, 1.0, v8 |
| ; GCN-NEXT: v_add_f32_e32 v7, 1.0, v7 |
| ; GCN-NEXT: v_add_f32_e32 v6, 1.0, v6 |
| ; GCN-NEXT: v_add_f32_e32 v5, 1.0, v5 |
| ; GCN-NEXT: v_add_f32_e32 v4, 1.0, v4 |
| ; GCN-NEXT: v_add_f32_e32 v3, 1.0, v3 |
| ; GCN-NEXT: v_add_f32_e32 v2, 1.0, v2 |
| ; GCN-NEXT: v_add_f32_e32 v1, 1.0, v1 |
| ; GCN-NEXT: v_add_f32_e32 v0, 1.0, v0 |
| ; GCN-NEXT: .LBB10_2: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v18f32_to_v9i64: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB10_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.true |
| ; VI-NEXT: v_add_f32_e32 v17, 1.0, v17 |
| ; VI-NEXT: v_add_f32_e32 v16, 1.0, v16 |
| ; VI-NEXT: v_add_f32_e32 v15, 1.0, v15 |
| ; VI-NEXT: v_add_f32_e32 v14, 1.0, v14 |
| ; VI-NEXT: v_add_f32_e32 v13, 1.0, v13 |
| ; VI-NEXT: v_add_f32_e32 v12, 1.0, v12 |
| ; VI-NEXT: v_add_f32_e32 v11, 1.0, v11 |
| ; VI-NEXT: v_add_f32_e32 v10, 1.0, v10 |
| ; VI-NEXT: v_add_f32_e32 v9, 1.0, v9 |
| ; VI-NEXT: v_add_f32_e32 v8, 1.0, v8 |
| ; VI-NEXT: v_add_f32_e32 v7, 1.0, v7 |
| ; VI-NEXT: v_add_f32_e32 v6, 1.0, v6 |
| ; VI-NEXT: v_add_f32_e32 v5, 1.0, v5 |
| ; VI-NEXT: v_add_f32_e32 v4, 1.0, v4 |
| ; VI-NEXT: v_add_f32_e32 v3, 1.0, v3 |
| ; VI-NEXT: v_add_f32_e32 v2, 1.0, v2 |
| ; VI-NEXT: v_add_f32_e32 v1, 1.0, v1 |
| ; VI-NEXT: v_add_f32_e32 v0, 1.0, v0 |
| ; VI-NEXT: .LBB10_2: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v18f32_to_v9i64: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB10_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX9-NEXT: v_add_f32_e32 v17, 1.0, v17 |
| ; GFX9-NEXT: v_add_f32_e32 v16, 1.0, v16 |
| ; GFX9-NEXT: v_add_f32_e32 v15, 1.0, v15 |
| ; GFX9-NEXT: v_add_f32_e32 v14, 1.0, v14 |
| ; GFX9-NEXT: v_add_f32_e32 v13, 1.0, v13 |
| ; GFX9-NEXT: v_add_f32_e32 v12, 1.0, v12 |
| ; GFX9-NEXT: v_add_f32_e32 v11, 1.0, v11 |
| ; GFX9-NEXT: v_add_f32_e32 v10, 1.0, v10 |
| ; GFX9-NEXT: v_add_f32_e32 v9, 1.0, v9 |
| ; GFX9-NEXT: v_add_f32_e32 v8, 1.0, v8 |
| ; GFX9-NEXT: v_add_f32_e32 v7, 1.0, v7 |
| ; GFX9-NEXT: v_add_f32_e32 v6, 1.0, v6 |
| ; GFX9-NEXT: v_add_f32_e32 v5, 1.0, v5 |
| ; GFX9-NEXT: v_add_f32_e32 v4, 1.0, v4 |
| ; GFX9-NEXT: v_add_f32_e32 v3, 1.0, v3 |
| ; GFX9-NEXT: v_add_f32_e32 v2, 1.0, v2 |
| ; GFX9-NEXT: v_add_f32_e32 v1, 1.0, v1 |
| ; GFX9-NEXT: v_add_f32_e32 v0, 1.0, v0 |
| ; GFX9-NEXT: .LBB10_2: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v18f32_to_v9i64: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: s_mov_b32 s0, exec_lo |
| ; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v18 |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB10_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX11-NEXT: v_dual_add_f32 v17, 1.0, v17 :: v_dual_add_f32 v16, 1.0, v16 |
| ; GFX11-NEXT: v_dual_add_f32 v15, 1.0, v15 :: v_dual_add_f32 v14, 1.0, v14 |
| ; GFX11-NEXT: v_dual_add_f32 v13, 1.0, v13 :: v_dual_add_f32 v12, 1.0, v12 |
| ; GFX11-NEXT: v_dual_add_f32 v11, 1.0, v11 :: v_dual_add_f32 v10, 1.0, v10 |
| ; GFX11-NEXT: v_dual_add_f32 v9, 1.0, v9 :: v_dual_add_f32 v8, 1.0, v8 |
| ; GFX11-NEXT: v_dual_add_f32 v7, 1.0, v7 :: v_dual_add_f32 v6, 1.0, v6 |
| ; GFX11-NEXT: v_dual_add_f32 v5, 1.0, v5 :: v_dual_add_f32 v4, 1.0, v4 |
| ; GFX11-NEXT: v_dual_add_f32 v3, 1.0, v3 :: v_dual_add_f32 v2, 1.0, v2 |
| ; GFX11-NEXT: v_dual_add_f32 v1, 1.0, v1 :: v_dual_add_f32 v0, 1.0, v0 |
| ; GFX11-NEXT: .LBB10_2: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = fadd <18 x float> %a, splat (float 1.000000e+00) |
| %a2 = bitcast <18 x float> %a1 to <9 x i64> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <18 x float> %a to <9 x i64> |
| br label %end |
| |
| end: |
| %phi = phi <9 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <9 x i64> %phi |
| } |
| |
| define <18 x float> @bitcast_v9i64_to_v18f32(<9 x i64> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v9i64_to_v18f32: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB11_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.true |
| ; GCN-NEXT: v_add_i32_e32 v16, vcc, 3, v16 |
| ; GCN-NEXT: v_addc_u32_e32 v17, vcc, 0, v17, vcc |
| ; GCN-NEXT: v_add_i32_e32 v14, vcc, 3, v14 |
| ; GCN-NEXT: v_addc_u32_e32 v15, vcc, 0, v15, vcc |
| ; GCN-NEXT: v_add_i32_e32 v12, vcc, 3, v12 |
| ; GCN-NEXT: v_addc_u32_e32 v13, vcc, 0, v13, vcc |
| ; GCN-NEXT: v_add_i32_e32 v10, vcc, 3, v10 |
| ; GCN-NEXT: v_addc_u32_e32 v11, vcc, 0, v11, vcc |
| ; GCN-NEXT: v_add_i32_e32 v8, vcc, 3, v8 |
| ; GCN-NEXT: v_addc_u32_e32 v9, vcc, 0, v9, vcc |
| ; GCN-NEXT: v_add_i32_e32 v6, vcc, 3, v6 |
| ; GCN-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc |
| ; GCN-NEXT: v_add_i32_e32 v4, vcc, 3, v4 |
| ; GCN-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc |
| ; GCN-NEXT: v_add_i32_e32 v2, vcc, 3, v2 |
| ; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc |
| ; GCN-NEXT: v_add_i32_e32 v0, vcc, 3, v0 |
| ; GCN-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc |
| ; GCN-NEXT: .LBB11_2: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v9i64_to_v18f32: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB11_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.true |
| ; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v16 |
| ; VI-NEXT: v_addc_u32_e32 v17, vcc, 0, v17, vcc |
| ; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v14 |
| ; VI-NEXT: v_addc_u32_e32 v15, vcc, 0, v15, vcc |
| ; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v12 |
| ; VI-NEXT: v_addc_u32_e32 v13, vcc, 0, v13, vcc |
| ; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v10 |
| ; VI-NEXT: v_addc_u32_e32 v11, vcc, 0, v11, vcc |
| ; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v8 |
| ; VI-NEXT: v_addc_u32_e32 v9, vcc, 0, v9, vcc |
| ; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v6 |
| ; VI-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc |
| ; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v4 |
| ; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc |
| ; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v2 |
| ; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc |
| ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 |
| ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc |
| ; VI-NEXT: .LBB11_2: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v9i64_to_v18f32: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB11_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX9-NEXT: v_add_co_u32_e32 v16, vcc, 3, v16 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v17, vcc, 0, v17, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v14, vcc, 3, v14 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v15, vcc, 0, v15, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v12, vcc, 3, v12 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v13, vcc, 0, v13, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v10, vcc, 3, v10 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v11, vcc, 0, v11, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v8, vcc, 3, v8 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v9, vcc, 0, v9, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v6, vcc, 3, v6 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v7, vcc, 0, v7, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v4, vcc, 3, v4 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v5, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, 3, v2 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, 3, v0 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc |
| ; GFX9-NEXT: .LBB11_2: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v9i64_to_v18f32: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: s_mov_b32 s0, exec_lo |
| ; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v18 |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB11_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX11-NEXT: v_add_co_u32 v16, vcc_lo, v16, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v17, null, 0, v17, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v14, vcc_lo, v14, 3 |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v15, null, 0, v15, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v12, vcc_lo, v12, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v13, null, 0, v13, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v10, vcc_lo, v10, 3 |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v11, null, 0, v11, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v8, vcc_lo, v8, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v9, null, 0, v9, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v6, vcc_lo, v6, 3 |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v7, null, 0, v7, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v4, vcc_lo, v4, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v5, null, 0, v5, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v2, vcc_lo, v2, 3 |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, 0, v3, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v0, vcc_lo, v0, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo |
| ; GFX11-NEXT: .LBB11_2: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = add <9 x i64> %a, splat (i64 3) |
| %a2 = bitcast <9 x i64> %a1 to <18 x float> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <9 x i64> %a to <18 x float> |
| br label %end |
| |
| end: |
| %phi = phi <18 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <18 x float> %phi |
| } |
| |
| define <9 x double> @bitcast_v18f32_to_v9f64(<18 x float> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v18f32_to_v9f64: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB12_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.true |
| ; GCN-NEXT: v_add_f32_e32 v17, 1.0, v17 |
| ; GCN-NEXT: v_add_f32_e32 v16, 1.0, v16 |
| ; GCN-NEXT: v_add_f32_e32 v15, 1.0, v15 |
| ; GCN-NEXT: v_add_f32_e32 v14, 1.0, v14 |
| ; GCN-NEXT: v_add_f32_e32 v13, 1.0, v13 |
| ; GCN-NEXT: v_add_f32_e32 v12, 1.0, v12 |
| ; GCN-NEXT: v_add_f32_e32 v11, 1.0, v11 |
| ; GCN-NEXT: v_add_f32_e32 v10, 1.0, v10 |
| ; GCN-NEXT: v_add_f32_e32 v9, 1.0, v9 |
| ; GCN-NEXT: v_add_f32_e32 v8, 1.0, v8 |
| ; GCN-NEXT: v_add_f32_e32 v7, 1.0, v7 |
| ; GCN-NEXT: v_add_f32_e32 v6, 1.0, v6 |
| ; GCN-NEXT: v_add_f32_e32 v5, 1.0, v5 |
| ; GCN-NEXT: v_add_f32_e32 v4, 1.0, v4 |
| ; GCN-NEXT: v_add_f32_e32 v3, 1.0, v3 |
| ; GCN-NEXT: v_add_f32_e32 v2, 1.0, v2 |
| ; GCN-NEXT: v_add_f32_e32 v1, 1.0, v1 |
| ; GCN-NEXT: v_add_f32_e32 v0, 1.0, v0 |
| ; GCN-NEXT: .LBB12_2: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v18f32_to_v9f64: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB12_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.true |
| ; VI-NEXT: v_add_f32_e32 v17, 1.0, v17 |
| ; VI-NEXT: v_add_f32_e32 v16, 1.0, v16 |
| ; VI-NEXT: v_add_f32_e32 v15, 1.0, v15 |
| ; VI-NEXT: v_add_f32_e32 v14, 1.0, v14 |
| ; VI-NEXT: v_add_f32_e32 v13, 1.0, v13 |
| ; VI-NEXT: v_add_f32_e32 v12, 1.0, v12 |
| ; VI-NEXT: v_add_f32_e32 v11, 1.0, v11 |
| ; VI-NEXT: v_add_f32_e32 v10, 1.0, v10 |
| ; VI-NEXT: v_add_f32_e32 v9, 1.0, v9 |
| ; VI-NEXT: v_add_f32_e32 v8, 1.0, v8 |
| ; VI-NEXT: v_add_f32_e32 v7, 1.0, v7 |
| ; VI-NEXT: v_add_f32_e32 v6, 1.0, v6 |
| ; VI-NEXT: v_add_f32_e32 v5, 1.0, v5 |
| ; VI-NEXT: v_add_f32_e32 v4, 1.0, v4 |
| ; VI-NEXT: v_add_f32_e32 v3, 1.0, v3 |
| ; VI-NEXT: v_add_f32_e32 v2, 1.0, v2 |
| ; VI-NEXT: v_add_f32_e32 v1, 1.0, v1 |
| ; VI-NEXT: v_add_f32_e32 v0, 1.0, v0 |
| ; VI-NEXT: .LBB12_2: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v18f32_to_v9f64: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB12_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX9-NEXT: v_add_f32_e32 v17, 1.0, v17 |
| ; GFX9-NEXT: v_add_f32_e32 v16, 1.0, v16 |
| ; GFX9-NEXT: v_add_f32_e32 v15, 1.0, v15 |
| ; GFX9-NEXT: v_add_f32_e32 v14, 1.0, v14 |
| ; GFX9-NEXT: v_add_f32_e32 v13, 1.0, v13 |
| ; GFX9-NEXT: v_add_f32_e32 v12, 1.0, v12 |
| ; GFX9-NEXT: v_add_f32_e32 v11, 1.0, v11 |
| ; GFX9-NEXT: v_add_f32_e32 v10, 1.0, v10 |
| ; GFX9-NEXT: v_add_f32_e32 v9, 1.0, v9 |
| ; GFX9-NEXT: v_add_f32_e32 v8, 1.0, v8 |
| ; GFX9-NEXT: v_add_f32_e32 v7, 1.0, v7 |
| ; GFX9-NEXT: v_add_f32_e32 v6, 1.0, v6 |
| ; GFX9-NEXT: v_add_f32_e32 v5, 1.0, v5 |
| ; GFX9-NEXT: v_add_f32_e32 v4, 1.0, v4 |
| ; GFX9-NEXT: v_add_f32_e32 v3, 1.0, v3 |
| ; GFX9-NEXT: v_add_f32_e32 v2, 1.0, v2 |
| ; GFX9-NEXT: v_add_f32_e32 v1, 1.0, v1 |
| ; GFX9-NEXT: v_add_f32_e32 v0, 1.0, v0 |
| ; GFX9-NEXT: .LBB12_2: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v18f32_to_v9f64: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: s_mov_b32 s0, exec_lo |
| ; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v18 |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB12_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX11-NEXT: v_dual_add_f32 v17, 1.0, v17 :: v_dual_add_f32 v16, 1.0, v16 |
| ; GFX11-NEXT: v_dual_add_f32 v15, 1.0, v15 :: v_dual_add_f32 v14, 1.0, v14 |
| ; GFX11-NEXT: v_dual_add_f32 v13, 1.0, v13 :: v_dual_add_f32 v12, 1.0, v12 |
| ; GFX11-NEXT: v_dual_add_f32 v11, 1.0, v11 :: v_dual_add_f32 v10, 1.0, v10 |
| ; GFX11-NEXT: v_dual_add_f32 v9, 1.0, v9 :: v_dual_add_f32 v8, 1.0, v8 |
| ; GFX11-NEXT: v_dual_add_f32 v7, 1.0, v7 :: v_dual_add_f32 v6, 1.0, v6 |
| ; GFX11-NEXT: v_dual_add_f32 v5, 1.0, v5 :: v_dual_add_f32 v4, 1.0, v4 |
| ; GFX11-NEXT: v_dual_add_f32 v3, 1.0, v3 :: v_dual_add_f32 v2, 1.0, v2 |
| ; GFX11-NEXT: v_dual_add_f32 v1, 1.0, v1 :: v_dual_add_f32 v0, 1.0, v0 |
| ; GFX11-NEXT: .LBB12_2: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = fadd <18 x float> %a, splat (float 1.000000e+00) |
| %a2 = bitcast <18 x float> %a1 to <9 x double> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <18 x float> %a to <9 x double> |
| br label %end |
| |
| end: |
| %phi = phi <9 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <9 x double> %phi |
| } |
| |
| define <18 x float> @bitcast_v9f64_to_v18f32(<9 x double> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v9f64_to_v18f32: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB13_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.true |
| ; GCN-NEXT: v_add_f64 v[16:17], v[16:17], 1.0 |
| ; GCN-NEXT: v_add_f64 v[14:15], v[14:15], 1.0 |
| ; GCN-NEXT: v_add_f64 v[12:13], v[12:13], 1.0 |
| ; GCN-NEXT: v_add_f64 v[10:11], v[10:11], 1.0 |
| ; GCN-NEXT: v_add_f64 v[8:9], v[8:9], 1.0 |
| ; GCN-NEXT: v_add_f64 v[6:7], v[6:7], 1.0 |
| ; GCN-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 |
| ; GCN-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 |
| ; GCN-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 |
| ; GCN-NEXT: .LBB13_2: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v9f64_to_v18f32: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB13_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.true |
| ; VI-NEXT: v_add_f64 v[16:17], v[16:17], 1.0 |
| ; VI-NEXT: v_add_f64 v[14:15], v[14:15], 1.0 |
| ; VI-NEXT: v_add_f64 v[12:13], v[12:13], 1.0 |
| ; VI-NEXT: v_add_f64 v[10:11], v[10:11], 1.0 |
| ; VI-NEXT: v_add_f64 v[8:9], v[8:9], 1.0 |
| ; VI-NEXT: v_add_f64 v[6:7], v[6:7], 1.0 |
| ; VI-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 |
| ; VI-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 |
| ; VI-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 |
| ; VI-NEXT: .LBB13_2: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v9f64_to_v18f32: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB13_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX9-NEXT: v_add_f64 v[16:17], v[16:17], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[14:15], v[14:15], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[12:13], v[12:13], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[10:11], v[10:11], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[8:9], v[8:9], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[6:7], v[6:7], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 |
| ; GFX9-NEXT: .LBB13_2: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v9f64_to_v18f32: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: s_mov_b32 s0, exec_lo |
| ; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v18 |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB13_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX11-NEXT: v_add_f64 v[16:17], v[16:17], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[14:15], v[14:15], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[12:13], v[12:13], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[10:11], v[10:11], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[8:9], v[8:9], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[6:7], v[6:7], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 |
| ; GFX11-NEXT: .LBB13_2: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = fadd <9 x double> %a, splat (double 1.000000e+00) |
| %a2 = bitcast <9 x double> %a1 to <18 x float> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <9 x double> %a to <18 x float> |
| br label %end |
| |
| end: |
| %phi = phi <18 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <18 x float> %phi |
| } |
| |
| define <36 x i16> @bitcast_v18f32_to_v36i16(<18 x float> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v18f32_to_v36i16: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v19 |
| ; GCN-NEXT: ; implicit-def: $vgpr33 |
| ; GCN-NEXT: ; implicit-def: $vgpr36 |
| ; GCN-NEXT: ; implicit-def: $vgpr31 |
| ; GCN-NEXT: ; implicit-def: $vgpr35 |
| ; GCN-NEXT: ; implicit-def: $vgpr29 |
| ; GCN-NEXT: ; implicit-def: $vgpr34 |
| ; GCN-NEXT: ; implicit-def: $vgpr27 |
| ; GCN-NEXT: ; implicit-def: $vgpr32 |
| ; GCN-NEXT: ; implicit-def: $vgpr25 |
| ; GCN-NEXT: ; implicit-def: $vgpr30 |
| ; GCN-NEXT: ; implicit-def: $vgpr22 |
| ; GCN-NEXT: ; implicit-def: $vgpr28 |
| ; GCN-NEXT: ; implicit-def: $vgpr21 |
| ; GCN-NEXT: ; implicit-def: $vgpr26 |
| ; GCN-NEXT: ; implicit-def: $vgpr20 |
| ; GCN-NEXT: ; implicit-def: $vgpr24 |
| ; GCN-NEXT: ; implicit-def: $vgpr19 |
| ; GCN-NEXT: ; implicit-def: $vgpr23 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB14_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.false |
| ; GCN-NEXT: v_alignbit_b32 v19, v18, v17, 16 |
| ; GCN-NEXT: v_alignbit_b32 v20, v16, v15, 16 |
| ; GCN-NEXT: v_alignbit_b32 v21, v14, v13, 16 |
| ; GCN-NEXT: v_alignbit_b32 v22, v12, v11, 16 |
| ; GCN-NEXT: v_alignbit_b32 v25, v10, v9, 16 |
| ; GCN-NEXT: v_alignbit_b32 v27, v8, v7, 16 |
| ; GCN-NEXT: v_alignbit_b32 v29, v6, v5, 16 |
| ; GCN-NEXT: v_alignbit_b32 v31, v4, v3, 16 |
| ; GCN-NEXT: v_alignbit_b32 v33, v2, v1, 16 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v23, 16, v18 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v24, 16, v16 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v26, 16, v14 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v28, 16, v12 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v30, 16, v10 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v32, 16, v8 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v34, 16, v6 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v35, 16, v4 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v36, 16, v2 |
| ; GCN-NEXT: .LBB14_2: ; %Flow |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB14_4 |
| ; GCN-NEXT: ; %bb.3: ; %cmp.true |
| ; GCN-NEXT: v_add_f32_e32 v2, 1.0, v2 |
| ; GCN-NEXT: v_add_f32_e32 v1, 1.0, v1 |
| ; GCN-NEXT: v_add_f32_e32 v4, 1.0, v4 |
| ; GCN-NEXT: v_add_f32_e32 v3, 1.0, v3 |
| ; GCN-NEXT: v_add_f32_e32 v6, 1.0, v6 |
| ; GCN-NEXT: v_add_f32_e32 v5, 1.0, v5 |
| ; GCN-NEXT: v_add_f32_e32 v8, 1.0, v8 |
| ; GCN-NEXT: v_add_f32_e32 v7, 1.0, v7 |
| ; GCN-NEXT: v_add_f32_e32 v10, 1.0, v10 |
| ; GCN-NEXT: v_add_f32_e32 v9, 1.0, v9 |
| ; GCN-NEXT: v_add_f32_e32 v12, 1.0, v12 |
| ; GCN-NEXT: v_add_f32_e32 v11, 1.0, v11 |
| ; GCN-NEXT: v_add_f32_e32 v14, 1.0, v14 |
| ; GCN-NEXT: v_add_f32_e32 v13, 1.0, v13 |
| ; GCN-NEXT: v_add_f32_e32 v16, 1.0, v16 |
| ; GCN-NEXT: v_add_f32_e32 v15, 1.0, v15 |
| ; GCN-NEXT: v_add_f32_e32 v18, 1.0, v18 |
| ; GCN-NEXT: v_add_f32_e32 v17, 1.0, v17 |
| ; GCN-NEXT: v_alignbit_b32 v19, v18, v17, 16 |
| ; GCN-NEXT: v_alignbit_b32 v20, v16, v15, 16 |
| ; GCN-NEXT: v_alignbit_b32 v21, v14, v13, 16 |
| ; GCN-NEXT: v_alignbit_b32 v22, v12, v11, 16 |
| ; GCN-NEXT: v_alignbit_b32 v25, v10, v9, 16 |
| ; GCN-NEXT: v_alignbit_b32 v27, v8, v7, 16 |
| ; GCN-NEXT: v_alignbit_b32 v29, v6, v5, 16 |
| ; GCN-NEXT: v_alignbit_b32 v31, v4, v3, 16 |
| ; GCN-NEXT: v_alignbit_b32 v33, v2, v1, 16 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v23, 16, v18 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v24, 16, v16 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v26, 16, v14 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v28, 16, v12 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v30, 16, v10 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v32, 16, v8 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v34, 16, v6 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v35, 16, v4 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v36, 16, v2 |
| ; GCN-NEXT: .LBB14_4: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: v_and_b32_e32 v1, 0xffff, v1 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v33, 16, v33 |
| ; GCN-NEXT: v_or_b32_e32 v1, v1, v33 |
| ; GCN-NEXT: v_and_b32_e32 v2, 0xffff, v2 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v33, 16, v36 |
| ; GCN-NEXT: v_or_b32_e32 v2, v2, v33 |
| ; GCN-NEXT: v_add_i32_e32 v33, vcc, 4, v0 |
| ; GCN-NEXT: v_and_b32_e32 v3, 0xffff, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v31, 16, v31 |
| ; GCN-NEXT: v_or_b32_e32 v3, v3, v31 |
| ; GCN-NEXT: v_add_i32_e32 v31, vcc, 8, v0 |
| ; GCN-NEXT: v_and_b32_e32 v4, 0xffff, v4 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v35, 16, v35 |
| ; GCN-NEXT: v_or_b32_e32 v4, v4, v35 |
| ; GCN-NEXT: v_add_i32_e32 v35, vcc, 12, v0 |
| ; GCN-NEXT: v_and_b32_e32 v5, 0xffff, v5 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v29, 16, v29 |
| ; GCN-NEXT: v_or_b32_e32 v5, v5, v29 |
| ; GCN-NEXT: v_add_i32_e32 v29, vcc, 16, v0 |
| ; GCN-NEXT: v_and_b32_e32 v6, 0xffff, v6 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v34, 16, v34 |
| ; GCN-NEXT: v_or_b32_e32 v6, v6, v34 |
| ; GCN-NEXT: v_add_i32_e32 v34, vcc, 20, v0 |
| ; GCN-NEXT: v_and_b32_e32 v7, 0xffff, v7 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v27, 16, v27 |
| ; GCN-NEXT: v_or_b32_e32 v7, v7, v27 |
| ; GCN-NEXT: v_add_i32_e32 v27, vcc, 24, v0 |
| ; GCN-NEXT: v_and_b32_e32 v8, 0xffff, v8 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v32, 16, v32 |
| ; GCN-NEXT: v_or_b32_e32 v8, v8, v32 |
| ; GCN-NEXT: v_add_i32_e32 v32, vcc, 28, v0 |
| ; GCN-NEXT: v_and_b32_e32 v9, 0xffff, v9 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v25, 16, v25 |
| ; GCN-NEXT: v_or_b32_e32 v9, v9, v25 |
| ; GCN-NEXT: v_add_i32_e32 v25, vcc, 32, v0 |
| ; GCN-NEXT: v_and_b32_e32 v10, 0xffff, v10 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v30, 16, v30 |
| ; GCN-NEXT: v_or_b32_e32 v10, v10, v30 |
| ; GCN-NEXT: v_add_i32_e32 v30, vcc, 36, v0 |
| ; GCN-NEXT: v_and_b32_e32 v11, 0xffff, v11 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v22, 16, v22 |
| ; GCN-NEXT: v_or_b32_e32 v11, v11, v22 |
| ; GCN-NEXT: v_add_i32_e32 v22, vcc, 40, v0 |
| ; GCN-NEXT: v_and_b32_e32 v12, 0xffff, v12 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v28, 16, v28 |
| ; GCN-NEXT: v_or_b32_e32 v12, v12, v28 |
| ; GCN-NEXT: v_add_i32_e32 v28, vcc, 44, v0 |
| ; GCN-NEXT: v_and_b32_e32 v13, 0xffff, v13 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v21, 16, v21 |
| ; GCN-NEXT: v_or_b32_e32 v13, v13, v21 |
| ; GCN-NEXT: v_add_i32_e32 v21, vcc, 48, v0 |
| ; GCN-NEXT: v_and_b32_e32 v14, 0xffff, v14 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v26, 16, v26 |
| ; GCN-NEXT: v_or_b32_e32 v14, v14, v26 |
| ; GCN-NEXT: v_add_i32_e32 v26, vcc, 52, v0 |
| ; GCN-NEXT: v_and_b32_e32 v15, 0xffff, v15 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v20, 16, v20 |
| ; GCN-NEXT: v_or_b32_e32 v15, v15, v20 |
| ; GCN-NEXT: v_add_i32_e32 v20, vcc, 56, v0 |
| ; GCN-NEXT: v_and_b32_e32 v16, 0xffff, v16 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v24, 16, v24 |
| ; GCN-NEXT: v_or_b32_e32 v16, v16, v24 |
| ; GCN-NEXT: v_add_i32_e32 v24, vcc, 60, v0 |
| ; GCN-NEXT: v_and_b32_e32 v17, 0xffff, v17 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v19, 16, v19 |
| ; GCN-NEXT: v_or_b32_e32 v17, v17, v19 |
| ; GCN-NEXT: v_add_i32_e32 v19, vcc, 64, v0 |
| ; GCN-NEXT: v_and_b32_e32 v18, 0xffff, v18 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v23, 16, v23 |
| ; GCN-NEXT: v_or_b32_e32 v18, v18, v23 |
| ; GCN-NEXT: v_add_i32_e32 v23, vcc, 0x44, v0 |
| ; GCN-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v2, v33, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v3, v31, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v4, v35, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v5, v29, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v6, v34, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v7, v27, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v8, v32, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v9, v25, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v10, v30, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v11, v22, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v12, v28, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v13, v21, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v14, v26, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v15, v20, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v16, v24, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v17, v19, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v18, v23, s[0:3], 0 offen |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v18f32_to_v36i16: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: ; implicit-def: $vgpr35 |
| ; VI-NEXT: ; implicit-def: $vgpr34 |
| ; VI-NEXT: ; implicit-def: $vgpr33 |
| ; VI-NEXT: ; implicit-def: $vgpr32 |
| ; VI-NEXT: ; implicit-def: $vgpr31 |
| ; VI-NEXT: ; implicit-def: $vgpr30 |
| ; VI-NEXT: ; implicit-def: $vgpr29 |
| ; VI-NEXT: ; implicit-def: $vgpr28 |
| ; VI-NEXT: ; implicit-def: $vgpr27 |
| ; VI-NEXT: ; implicit-def: $vgpr26 |
| ; VI-NEXT: ; implicit-def: $vgpr25 |
| ; VI-NEXT: ; implicit-def: $vgpr24 |
| ; VI-NEXT: ; implicit-def: $vgpr23 |
| ; VI-NEXT: ; implicit-def: $vgpr22 |
| ; VI-NEXT: ; implicit-def: $vgpr21 |
| ; VI-NEXT: ; implicit-def: $vgpr20 |
| ; VI-NEXT: ; implicit-def: $vgpr19 |
| ; VI-NEXT: ; implicit-def: $vgpr18 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB14_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.false |
| ; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; VI-NEXT: .LBB14_2: ; %Flow |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB14_4 |
| ; VI-NEXT: ; %bb.3: ; %cmp.true |
| ; VI-NEXT: v_add_f32_e32 v17, 1.0, v17 |
| ; VI-NEXT: v_add_f32_e32 v16, 1.0, v16 |
| ; VI-NEXT: v_add_f32_e32 v15, 1.0, v15 |
| ; VI-NEXT: v_add_f32_e32 v14, 1.0, v14 |
| ; VI-NEXT: v_add_f32_e32 v13, 1.0, v13 |
| ; VI-NEXT: v_add_f32_e32 v12, 1.0, v12 |
| ; VI-NEXT: v_add_f32_e32 v11, 1.0, v11 |
| ; VI-NEXT: v_add_f32_e32 v10, 1.0, v10 |
| ; VI-NEXT: v_add_f32_e32 v9, 1.0, v9 |
| ; VI-NEXT: v_add_f32_e32 v8, 1.0, v8 |
| ; VI-NEXT: v_add_f32_e32 v7, 1.0, v7 |
| ; VI-NEXT: v_add_f32_e32 v6, 1.0, v6 |
| ; VI-NEXT: v_add_f32_e32 v5, 1.0, v5 |
| ; VI-NEXT: v_add_f32_e32 v4, 1.0, v4 |
| ; VI-NEXT: v_add_f32_e32 v3, 1.0, v3 |
| ; VI-NEXT: v_add_f32_e32 v2, 1.0, v2 |
| ; VI-NEXT: v_add_f32_e32 v1, 1.0, v1 |
| ; VI-NEXT: v_add_f32_e32 v0, 1.0, v0 |
| ; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; VI-NEXT: .LBB14_4: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 |
| ; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 |
| ; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 |
| ; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 |
| ; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 |
| ; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 |
| ; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 |
| ; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 |
| ; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 |
| ; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 |
| ; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 |
| ; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 |
| ; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 |
| ; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 |
| ; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 |
| ; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 |
| ; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 |
| ; VI-NEXT: v_or_b32_sdwa v0, v0, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v1, v1, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v2, v2, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v3, v3, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v4, v4, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v5, v5, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v6, v6, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v7, v7, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v8, v8, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v9, v9, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v10, v10, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v11, v11, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v12, v12, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v13, v13, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v14, v14, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v15, v15, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v16, v16, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v17, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v18f32_to_v36i16: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr35 |
| ; GFX9-NEXT: ; implicit-def: $vgpr34 |
| ; GFX9-NEXT: ; implicit-def: $vgpr33 |
| ; GFX9-NEXT: ; implicit-def: $vgpr32 |
| ; GFX9-NEXT: ; implicit-def: $vgpr31 |
| ; GFX9-NEXT: ; implicit-def: $vgpr30 |
| ; GFX9-NEXT: ; implicit-def: $vgpr29 |
| ; GFX9-NEXT: ; implicit-def: $vgpr28 |
| ; GFX9-NEXT: ; implicit-def: $vgpr27 |
| ; GFX9-NEXT: ; implicit-def: $vgpr26 |
| ; GFX9-NEXT: ; implicit-def: $vgpr25 |
| ; GFX9-NEXT: ; implicit-def: $vgpr24 |
| ; GFX9-NEXT: ; implicit-def: $vgpr23 |
| ; GFX9-NEXT: ; implicit-def: $vgpr22 |
| ; GFX9-NEXT: ; implicit-def: $vgpr21 |
| ; GFX9-NEXT: ; implicit-def: $vgpr20 |
| ; GFX9-NEXT: ; implicit-def: $vgpr19 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB14_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.false |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX9-NEXT: .LBB14_2: ; %Flow |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB14_4 |
| ; GFX9-NEXT: ; %bb.3: ; %cmp.true |
| ; GFX9-NEXT: v_add_f32_e32 v17, 1.0, v17 |
| ; GFX9-NEXT: v_add_f32_e32 v16, 1.0, v16 |
| ; GFX9-NEXT: v_add_f32_e32 v15, 1.0, v15 |
| ; GFX9-NEXT: v_add_f32_e32 v14, 1.0, v14 |
| ; GFX9-NEXT: v_add_f32_e32 v13, 1.0, v13 |
| ; GFX9-NEXT: v_add_f32_e32 v12, 1.0, v12 |
| ; GFX9-NEXT: v_add_f32_e32 v11, 1.0, v11 |
| ; GFX9-NEXT: v_add_f32_e32 v10, 1.0, v10 |
| ; GFX9-NEXT: v_add_f32_e32 v9, 1.0, v9 |
| ; GFX9-NEXT: v_add_f32_e32 v8, 1.0, v8 |
| ; GFX9-NEXT: v_add_f32_e32 v7, 1.0, v7 |
| ; GFX9-NEXT: v_add_f32_e32 v6, 1.0, v6 |
| ; GFX9-NEXT: v_add_f32_e32 v5, 1.0, v5 |
| ; GFX9-NEXT: v_add_f32_e32 v4, 1.0, v4 |
| ; GFX9-NEXT: v_add_f32_e32 v3, 1.0, v3 |
| ; GFX9-NEXT: v_add_f32_e32 v2, 1.0, v2 |
| ; GFX9-NEXT: v_add_f32_e32 v1, 1.0, v1 |
| ; GFX9-NEXT: v_add_f32_e32 v0, 1.0, v0 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX9-NEXT: .LBB14_4: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: s_mov_b32 s4, 0x5040100 |
| ; GFX9-NEXT: v_perm_b32 v0, v35, v0, s4 |
| ; GFX9-NEXT: v_perm_b32 v1, v34, v1, s4 |
| ; GFX9-NEXT: v_perm_b32 v2, v33, v2, s4 |
| ; GFX9-NEXT: v_perm_b32 v3, v32, v3, s4 |
| ; GFX9-NEXT: v_perm_b32 v4, v31, v4, s4 |
| ; GFX9-NEXT: v_perm_b32 v5, v30, v5, s4 |
| ; GFX9-NEXT: v_perm_b32 v6, v29, v6, s4 |
| ; GFX9-NEXT: v_perm_b32 v7, v28, v7, s4 |
| ; GFX9-NEXT: v_perm_b32 v8, v27, v8, s4 |
| ; GFX9-NEXT: v_perm_b32 v9, v26, v9, s4 |
| ; GFX9-NEXT: v_perm_b32 v10, v25, v10, s4 |
| ; GFX9-NEXT: v_perm_b32 v11, v24, v11, s4 |
| ; GFX9-NEXT: v_perm_b32 v12, v23, v12, s4 |
| ; GFX9-NEXT: v_perm_b32 v13, v22, v13, s4 |
| ; GFX9-NEXT: v_perm_b32 v14, v21, v14, s4 |
| ; GFX9-NEXT: v_perm_b32 v15, v20, v15, s4 |
| ; GFX9-NEXT: v_perm_b32 v16, v19, v16, s4 |
| ; GFX9-NEXT: v_perm_b32 v17, v18, v17, s4 |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v18f32_to_v36i16: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v18 |
| ; GFX11-NEXT: ; implicit-def: $vgpr35 |
| ; GFX11-NEXT: ; implicit-def: $vgpr34 |
| ; GFX11-NEXT: ; implicit-def: $vgpr33 |
| ; GFX11-NEXT: ; implicit-def: $vgpr32 |
| ; GFX11-NEXT: ; implicit-def: $vgpr31 |
| ; GFX11-NEXT: ; implicit-def: $vgpr30 |
| ; GFX11-NEXT: ; implicit-def: $vgpr29 |
| ; GFX11-NEXT: ; implicit-def: $vgpr28 |
| ; GFX11-NEXT: ; implicit-def: $vgpr27 |
| ; GFX11-NEXT: ; implicit-def: $vgpr26 |
| ; GFX11-NEXT: ; implicit-def: $vgpr25 |
| ; GFX11-NEXT: ; implicit-def: $vgpr24 |
| ; GFX11-NEXT: ; implicit-def: $vgpr23 |
| ; GFX11-NEXT: ; implicit-def: $vgpr22 |
| ; GFX11-NEXT: ; implicit-def: $vgpr21 |
| ; GFX11-NEXT: ; implicit-def: $vgpr20 |
| ; GFX11-NEXT: ; implicit-def: $vgpr19 |
| ; GFX11-NEXT: ; implicit-def: $vgpr18 |
| ; GFX11-NEXT: s_and_saveexec_b32 s0, vcc_lo |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB14_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.false |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX11-NEXT: .LBB14_2: ; %Flow |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB14_4 |
| ; GFX11-NEXT: ; %bb.3: ; %cmp.true |
| ; GFX11-NEXT: v_dual_add_f32 v17, 1.0, v17 :: v_dual_add_f32 v16, 1.0, v16 |
| ; GFX11-NEXT: v_dual_add_f32 v15, 1.0, v15 :: v_dual_add_f32 v14, 1.0, v14 |
| ; GFX11-NEXT: v_dual_add_f32 v13, 1.0, v13 :: v_dual_add_f32 v12, 1.0, v12 |
| ; GFX11-NEXT: v_dual_add_f32 v11, 1.0, v11 :: v_dual_add_f32 v10, 1.0, v10 |
| ; GFX11-NEXT: v_dual_add_f32 v9, 1.0, v9 :: v_dual_add_f32 v8, 1.0, v8 |
| ; GFX11-NEXT: v_dual_add_f32 v7, 1.0, v7 :: v_dual_add_f32 v6, 1.0, v6 |
| ; GFX11-NEXT: v_dual_add_f32 v5, 1.0, v5 :: v_dual_add_f32 v4, 1.0, v4 |
| ; GFX11-NEXT: v_dual_add_f32 v3, 1.0, v3 :: v_dual_add_f32 v2, 1.0, v2 |
| ; GFX11-NEXT: v_dual_add_f32 v1, 1.0, v1 :: v_dual_add_f32 v0, 1.0, v0 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX11-NEXT: .LBB14_4: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) |
| ; GFX11-NEXT: v_perm_b32 v0, v35, v0, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v1, v34, v1, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v2, v33, v2, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v3, v32, v3, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v4, v31, v4, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v5, v30, v5, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v6, v29, v6, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v7, v28, v7, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v8, v27, v8, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v9, v26, v9, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v10, v25, v10, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v11, v24, v11, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v12, v23, v12, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v13, v22, v13, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v14, v21, v14, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v15, v20, v15, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v16, v19, v16, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v17, v18, v17, 0x5040100 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = fadd <18 x float> %a, splat (float 1.000000e+00) |
| %a2 = bitcast <18 x float> %a1 to <36 x i16> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <18 x float> %a to <36 x i16> |
| br label %end |
| |
| end: |
| %phi = phi <36 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <36 x i16> %phi |
| } |
| |
| define <18 x float> @bitcast_v36i16_to_v18f32(<36 x i16> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v36i16_to_v18f32: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_mov_b32_e32 v34, v26 |
| ; GCN-NEXT: v_mov_b32_e32 v35, v24 |
| ; GCN-NEXT: v_mov_b32_e32 v36, v22 |
| ; GCN-NEXT: v_mov_b32_e32 v37, v20 |
| ; GCN-NEXT: v_mov_b32_e32 v38, v18 |
| ; GCN-NEXT: v_mov_b32_e32 v39, v16 |
| ; GCN-NEXT: v_mov_b32_e32 v48, v14 |
| ; GCN-NEXT: v_mov_b32_e32 v49, v12 |
| ; GCN-NEXT: v_mov_b32_e32 v50, v10 |
| ; GCN-NEXT: v_mov_b32_e32 v51, v8 |
| ; GCN-NEXT: v_mov_b32_e32 v52, v6 |
| ; GCN-NEXT: v_mov_b32_e32 v53, v4 |
| ; GCN-NEXT: v_mov_b32_e32 v54, v2 |
| ; GCN-NEXT: v_mov_b32_e32 v55, v0 |
| ; GCN-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:16 |
| ; GCN-NEXT: s_waitcnt expcnt(3) |
| ; GCN-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:12 |
| ; GCN-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:8 |
| ; GCN-NEXT: s_waitcnt expcnt(2) |
| ; GCN-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:4 |
| ; GCN-NEXT: buffer_load_dword v4, off, s[0:3], s32 |
| ; GCN-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:20 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v40, 16, v1 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v41, 16, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v33, 16, v5 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v32, 16, v7 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v9 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v11 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_lshlrev_b32_e32 v42, 16, v13 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v43, 16, v15 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v44, 16, v17 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v45, 16, v19 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v46, 16, v21 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v47, 16, v23 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v56, 16, v25 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v57, 16, v27 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v58, 16, v29 |
| ; GCN-NEXT: s_waitcnt vmcnt(2) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v59, 16, v4 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v60, 16, v2 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v61, 16, v0 |
| ; GCN-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB15_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.false |
| ; GCN-NEXT: v_and_b32_e32 v0, 0xffff, v55 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_and_b32_e32 v1, 0xffff, v54 |
| ; GCN-NEXT: v_or_b32_e32 v0, v0, v40 |
| ; GCN-NEXT: v_or_b32_e32 v1, v1, v41 |
| ; GCN-NEXT: v_and_b32_e32 v2, 0xffff, v53 |
| ; GCN-NEXT: v_or_b32_e32 v2, v2, v33 |
| ; GCN-NEXT: v_and_b32_e32 v3, 0xffff, v52 |
| ; GCN-NEXT: v_or_b32_e32 v3, v3, v32 |
| ; GCN-NEXT: v_and_b32_e32 v4, 0xffff, v51 |
| ; GCN-NEXT: v_and_b32_e32 v5, 0xffff, v50 |
| ; GCN-NEXT: v_and_b32_e32 v6, 0xffff, v49 |
| ; GCN-NEXT: v_and_b32_e32 v7, 0xffff, v48 |
| ; GCN-NEXT: v_and_b32_e32 v8, 0xffff, v39 |
| ; GCN-NEXT: v_and_b32_e32 v9, 0xffff, v38 |
| ; GCN-NEXT: v_and_b32_e32 v10, 0xffff, v37 |
| ; GCN-NEXT: v_and_b32_e32 v11, 0xffff, v36 |
| ; GCN-NEXT: v_and_b32_e32 v12, 0xffff, v35 |
| ; GCN-NEXT: v_and_b32_e32 v13, 0xffff, v34 |
| ; GCN-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_and_b32_e32 v14, 0xffff, v14 |
| ; GCN-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_and_b32_e32 v15, 0xffff, v15 |
| ; GCN-NEXT: v_and_b32_e32 v16, 0xffff, v63 |
| ; GCN-NEXT: v_and_b32_e32 v17, 0xffff, v62 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v4, v4, v18 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v5, v5, v18 |
| ; GCN-NEXT: v_or_b32_e32 v6, v6, v42 |
| ; GCN-NEXT: v_or_b32_e32 v7, v7, v43 |
| ; GCN-NEXT: v_or_b32_e32 v8, v8, v44 |
| ; GCN-NEXT: v_or_b32_e32 v9, v9, v45 |
| ; GCN-NEXT: v_or_b32_e32 v10, v10, v46 |
| ; GCN-NEXT: v_or_b32_e32 v11, v11, v47 |
| ; GCN-NEXT: v_or_b32_e32 v12, v12, v56 |
| ; GCN-NEXT: v_or_b32_e32 v13, v13, v57 |
| ; GCN-NEXT: v_or_b32_e32 v14, v14, v58 |
| ; GCN-NEXT: v_or_b32_e32 v15, v15, v59 |
| ; GCN-NEXT: v_or_b32_e32 v16, v16, v60 |
| ; GCN-NEXT: v_or_b32_e32 v17, v17, v61 |
| ; GCN-NEXT: ; implicit-def: $vgpr55 |
| ; GCN-NEXT: ; implicit-def: $vgpr54 |
| ; GCN-NEXT: ; implicit-def: $vgpr53 |
| ; GCN-NEXT: ; implicit-def: $vgpr52 |
| ; GCN-NEXT: ; implicit-def: $vgpr51 |
| ; GCN-NEXT: ; implicit-def: $vgpr50 |
| ; GCN-NEXT: ; implicit-def: $vgpr49 |
| ; GCN-NEXT: ; implicit-def: $vgpr48 |
| ; GCN-NEXT: ; implicit-def: $vgpr39 |
| ; GCN-NEXT: ; implicit-def: $vgpr38 |
| ; GCN-NEXT: ; implicit-def: $vgpr37 |
| ; GCN-NEXT: ; implicit-def: $vgpr36 |
| ; GCN-NEXT: ; implicit-def: $vgpr35 |
| ; GCN-NEXT: ; implicit-def: $vgpr34 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr63 |
| ; GCN-NEXT: ; implicit-def: $vgpr62 |
| ; GCN-NEXT: ; implicit-def: $vgpr40 |
| ; GCN-NEXT: ; implicit-def: $vgpr41 |
| ; GCN-NEXT: ; implicit-def: $vgpr33 |
| ; GCN-NEXT: ; implicit-def: $vgpr32 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr42 |
| ; GCN-NEXT: ; implicit-def: $vgpr43 |
| ; GCN-NEXT: ; implicit-def: $vgpr44 |
| ; GCN-NEXT: ; implicit-def: $vgpr45 |
| ; GCN-NEXT: ; implicit-def: $vgpr46 |
| ; GCN-NEXT: ; implicit-def: $vgpr47 |
| ; GCN-NEXT: ; implicit-def: $vgpr56 |
| ; GCN-NEXT: ; implicit-def: $vgpr57 |
| ; GCN-NEXT: ; implicit-def: $vgpr58 |
| ; GCN-NEXT: ; implicit-def: $vgpr59 |
| ; GCN-NEXT: ; implicit-def: $vgpr60 |
| ; GCN-NEXT: ; implicit-def: $vgpr61 |
| ; GCN-NEXT: .LBB15_2: ; %Flow |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB15_4 |
| ; GCN-NEXT: ; %bb.3: ; %cmp.true |
| ; GCN-NEXT: v_add_i32_e32 v0, vcc, 3, v55 |
| ; GCN-NEXT: s_mov_b32 s6, 0x30000 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_add_i32_e32 v1, vcc, 3, v54 |
| ; GCN-NEXT: v_add_i32_e32 v2, vcc, 3, v53 |
| ; GCN-NEXT: v_add_i32_e32 v3, vcc, 3, v52 |
| ; GCN-NEXT: v_add_i32_e32 v4, vcc, 3, v51 |
| ; GCN-NEXT: v_add_i32_e32 v5, vcc, 3, v50 |
| ; GCN-NEXT: v_add_i32_e32 v6, vcc, 3, v49 |
| ; GCN-NEXT: v_add_i32_e32 v7, vcc, 3, v48 |
| ; GCN-NEXT: v_add_i32_e32 v8, vcc, 3, v39 |
| ; GCN-NEXT: v_add_i32_e32 v9, vcc, 3, v38 |
| ; GCN-NEXT: v_add_i32_e32 v10, vcc, 3, v37 |
| ; GCN-NEXT: v_add_i32_e32 v11, vcc, 3, v36 |
| ; GCN-NEXT: v_add_i32_e32 v12, vcc, 3, v35 |
| ; GCN-NEXT: v_add_i32_e32 v13, vcc, 3, v34 |
| ; GCN-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_add_i32_e32 v14, vcc, 3, v14 |
| ; GCN-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_add_i32_e32 v15, vcc, 3, v15 |
| ; GCN-NEXT: v_add_i32_e32 v16, vcc, 3, v63 |
| ; GCN-NEXT: v_add_i32_e32 v17, vcc, 3, v62 |
| ; GCN-NEXT: v_and_b32_e32 v0, 0xffff, v0 |
| ; GCN-NEXT: v_and_b32_e32 v1, 0xffff, v1 |
| ; GCN-NEXT: v_and_b32_e32 v2, 0xffff, v2 |
| ; GCN-NEXT: v_and_b32_e32 v3, 0xffff, v3 |
| ; GCN-NEXT: v_and_b32_e32 v4, 0xffff, v4 |
| ; GCN-NEXT: v_and_b32_e32 v5, 0xffff, v5 |
| ; GCN-NEXT: v_and_b32_e32 v6, 0xffff, v6 |
| ; GCN-NEXT: v_and_b32_e32 v7, 0xffff, v7 |
| ; GCN-NEXT: v_and_b32_e32 v8, 0xffff, v8 |
| ; GCN-NEXT: v_and_b32_e32 v9, 0xffff, v9 |
| ; GCN-NEXT: v_and_b32_e32 v10, 0xffff, v10 |
| ; GCN-NEXT: v_and_b32_e32 v11, 0xffff, v11 |
| ; GCN-NEXT: v_and_b32_e32 v12, 0xffff, v12 |
| ; GCN-NEXT: v_and_b32_e32 v13, 0xffff, v13 |
| ; GCN-NEXT: v_and_b32_e32 v14, 0xffff, v14 |
| ; GCN-NEXT: v_and_b32_e32 v15, 0xffff, v15 |
| ; GCN-NEXT: v_and_b32_e32 v16, 0xffff, v16 |
| ; GCN-NEXT: v_and_b32_e32 v17, 0xffff, v17 |
| ; GCN-NEXT: v_or_b32_e32 v0, v40, v0 |
| ; GCN-NEXT: v_or_b32_e32 v1, v41, v1 |
| ; GCN-NEXT: v_or_b32_e32 v2, v33, v2 |
| ; GCN-NEXT: v_or_b32_e32 v3, v32, v3 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v4, v18, v4 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v5, v18, v5 |
| ; GCN-NEXT: v_or_b32_e32 v6, v42, v6 |
| ; GCN-NEXT: v_or_b32_e32 v7, v43, v7 |
| ; GCN-NEXT: v_or_b32_e32 v8, v44, v8 |
| ; GCN-NEXT: v_or_b32_e32 v9, v45, v9 |
| ; GCN-NEXT: v_or_b32_e32 v10, v46, v10 |
| ; GCN-NEXT: v_or_b32_e32 v11, v47, v11 |
| ; GCN-NEXT: v_or_b32_e32 v12, v56, v12 |
| ; GCN-NEXT: v_or_b32_e32 v13, v57, v13 |
| ; GCN-NEXT: v_or_b32_e32 v14, v58, v14 |
| ; GCN-NEXT: v_or_b32_e32 v15, v59, v15 |
| ; GCN-NEXT: v_or_b32_e32 v16, v60, v16 |
| ; GCN-NEXT: v_or_b32_e32 v17, v61, v17 |
| ; GCN-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0 |
| ; GCN-NEXT: v_add_i32_e32 v1, vcc, s6, v1 |
| ; GCN-NEXT: v_add_i32_e32 v2, vcc, s6, v2 |
| ; GCN-NEXT: v_add_i32_e32 v3, vcc, s6, v3 |
| ; GCN-NEXT: v_add_i32_e32 v4, vcc, s6, v4 |
| ; GCN-NEXT: v_add_i32_e32 v5, vcc, s6, v5 |
| ; GCN-NEXT: v_add_i32_e32 v6, vcc, s6, v6 |
| ; GCN-NEXT: v_add_i32_e32 v7, vcc, s6, v7 |
| ; GCN-NEXT: v_add_i32_e32 v8, vcc, s6, v8 |
| ; GCN-NEXT: v_add_i32_e32 v9, vcc, s6, v9 |
| ; GCN-NEXT: v_add_i32_e32 v10, vcc, s6, v10 |
| ; GCN-NEXT: v_add_i32_e32 v11, vcc, s6, v11 |
| ; GCN-NEXT: v_add_i32_e32 v12, vcc, s6, v12 |
| ; GCN-NEXT: v_add_i32_e32 v13, vcc, s6, v13 |
| ; GCN-NEXT: v_add_i32_e32 v14, vcc, s6, v14 |
| ; GCN-NEXT: v_add_i32_e32 v15, vcc, s6, v15 |
| ; GCN-NEXT: v_add_i32_e32 v16, vcc, s6, v16 |
| ; GCN-NEXT: v_add_i32_e32 v17, vcc, s6, v17 |
| ; GCN-NEXT: .LBB15_4: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v36i16_to_v18f32: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill |
| ; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 ; 4-byte Folded Spill |
| ; VI-NEXT: v_mov_b32_e32 v32, v17 |
| ; VI-NEXT: v_mov_b32_e32 v33, v16 |
| ; VI-NEXT: v_mov_b32_e32 v34, v15 |
| ; VI-NEXT: v_mov_b32_e32 v35, v14 |
| ; VI-NEXT: v_mov_b32_e32 v36, v13 |
| ; VI-NEXT: v_mov_b32_e32 v37, v12 |
| ; VI-NEXT: v_mov_b32_e32 v38, v11 |
| ; VI-NEXT: v_mov_b32_e32 v39, v10 |
| ; VI-NEXT: v_mov_b32_e32 v48, v9 |
| ; VI-NEXT: v_mov_b32_e32 v49, v8 |
| ; VI-NEXT: v_mov_b32_e32 v50, v7 |
| ; VI-NEXT: v_mov_b32_e32 v51, v6 |
| ; VI-NEXT: v_mov_b32_e32 v52, v5 |
| ; VI-NEXT: v_mov_b32_e32 v53, v4 |
| ; VI-NEXT: v_mov_b32_e32 v54, v3 |
| ; VI-NEXT: v_mov_b32_e32 v55, v2 |
| ; VI-NEXT: v_mov_b32_e32 v40, v1 |
| ; VI-NEXT: v_mov_b32_e32 v41, v0 |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB15_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.false |
| ; VI-NEXT: v_mov_b32_e32 v17, 16 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v0, v17, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v1, v17, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v2, v17, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v3, v17, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v4, v17, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v5, v17, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v6, v17, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v7, v17, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v8, v17, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v9, v17, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v10, v17, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v11, v17, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v12, v17, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v13, v17, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v14, v17, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v15, v17, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v16, v17, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v17, v17, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_or_b32_sdwa v0, v41, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v1, v40, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v2, v55, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v3, v54, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v4, v53, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v5, v52, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v6, v51, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v7, v50, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v8, v49, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v9, v48, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v10, v39, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v11, v38, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v12, v37, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v13, v36, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v14, v35, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v15, v34, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v16, v33, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v17, v32, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: ; implicit-def: $vgpr41 |
| ; VI-NEXT: ; implicit-def: $vgpr40 |
| ; VI-NEXT: ; implicit-def: $vgpr55 |
| ; VI-NEXT: ; implicit-def: $vgpr54 |
| ; VI-NEXT: ; implicit-def: $vgpr53 |
| ; VI-NEXT: ; implicit-def: $vgpr52 |
| ; VI-NEXT: ; implicit-def: $vgpr51 |
| ; VI-NEXT: ; implicit-def: $vgpr50 |
| ; VI-NEXT: ; implicit-def: $vgpr49 |
| ; VI-NEXT: ; implicit-def: $vgpr48 |
| ; VI-NEXT: ; implicit-def: $vgpr39 |
| ; VI-NEXT: ; implicit-def: $vgpr38 |
| ; VI-NEXT: ; implicit-def: $vgpr37 |
| ; VI-NEXT: ; implicit-def: $vgpr36 |
| ; VI-NEXT: ; implicit-def: $vgpr35 |
| ; VI-NEXT: ; implicit-def: $vgpr34 |
| ; VI-NEXT: ; implicit-def: $vgpr33 |
| ; VI-NEXT: ; implicit-def: $vgpr32 |
| ; VI-NEXT: .LBB15_2: ; %Flow |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB15_4 |
| ; VI-NEXT: ; %bb.3: ; %cmp.true |
| ; VI-NEXT: v_mov_b32_e32 v17, 3 |
| ; VI-NEXT: v_add_u16_e32 v0, 3, v41 |
| ; VI-NEXT: v_add_u16_sdwa v1, v41, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v0, v0, v1 |
| ; VI-NEXT: v_add_u16_e32 v1, 3, v40 |
| ; VI-NEXT: v_add_u16_sdwa v2, v40, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v1, v1, v2 |
| ; VI-NEXT: v_add_u16_e32 v2, 3, v55 |
| ; VI-NEXT: v_add_u16_sdwa v3, v55, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v2, v2, v3 |
| ; VI-NEXT: v_add_u16_e32 v3, 3, v54 |
| ; VI-NEXT: v_add_u16_sdwa v4, v54, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v3, v3, v4 |
| ; VI-NEXT: v_add_u16_e32 v4, 3, v53 |
| ; VI-NEXT: v_add_u16_sdwa v5, v53, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v4, v4, v5 |
| ; VI-NEXT: v_add_u16_e32 v5, 3, v52 |
| ; VI-NEXT: v_add_u16_sdwa v6, v52, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v5, v5, v6 |
| ; VI-NEXT: v_add_u16_e32 v6, 3, v51 |
| ; VI-NEXT: v_add_u16_sdwa v7, v51, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v6, v6, v7 |
| ; VI-NEXT: v_add_u16_e32 v7, 3, v50 |
| ; VI-NEXT: v_add_u16_sdwa v8, v50, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v7, v7, v8 |
| ; VI-NEXT: v_add_u16_e32 v8, 3, v49 |
| ; VI-NEXT: v_add_u16_sdwa v9, v49, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v8, v8, v9 |
| ; VI-NEXT: v_add_u16_e32 v9, 3, v48 |
| ; VI-NEXT: v_add_u16_sdwa v10, v48, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v9, v9, v10 |
| ; VI-NEXT: v_add_u16_e32 v10, 3, v39 |
| ; VI-NEXT: v_add_u16_sdwa v11, v39, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v10, v10, v11 |
| ; VI-NEXT: v_add_u16_e32 v11, 3, v38 |
| ; VI-NEXT: v_add_u16_sdwa v12, v38, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v11, v11, v12 |
| ; VI-NEXT: v_add_u16_e32 v12, 3, v37 |
| ; VI-NEXT: v_add_u16_sdwa v13, v37, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v12, v12, v13 |
| ; VI-NEXT: v_add_u16_e32 v13, 3, v36 |
| ; VI-NEXT: v_add_u16_sdwa v14, v36, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v13, v13, v14 |
| ; VI-NEXT: v_add_u16_e32 v14, 3, v35 |
| ; VI-NEXT: v_add_u16_sdwa v15, v35, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v14, v14, v15 |
| ; VI-NEXT: v_add_u16_e32 v15, 3, v34 |
| ; VI-NEXT: v_add_u16_sdwa v16, v34, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v15, v15, v16 |
| ; VI-NEXT: v_add_u16_e32 v16, 3, v33 |
| ; VI-NEXT: v_add_u16_sdwa v18, v33, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v16, v16, v18 |
| ; VI-NEXT: v_add_u16_e32 v18, 3, v32 |
| ; VI-NEXT: v_add_u16_sdwa v17, v32, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v17, v18, v17 |
| ; VI-NEXT: .LBB15_4: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 ; 4-byte Folded Reload |
| ; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload |
| ; VI-NEXT: s_waitcnt vmcnt(0) |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v36i16_to_v18f32: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_mov_b32_e32 v32, v17 |
| ; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_mov_b32_e32 v33, v16 |
| ; GFX9-NEXT: v_mov_b32_e32 v41, v0 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v32 |
| ; GFX9-NEXT: v_mov_b32_e32 v34, v15 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33 |
| ; GFX9-NEXT: v_mov_b32_e32 v35, v14 |
| ; GFX9-NEXT: v_mov_b32_e32 v36, v13 |
| ; GFX9-NEXT: v_mov_b32_e32 v37, v12 |
| ; GFX9-NEXT: v_mov_b32_e32 v38, v11 |
| ; GFX9-NEXT: v_mov_b32_e32 v39, v10 |
| ; GFX9-NEXT: v_mov_b32_e32 v48, v9 |
| ; GFX9-NEXT: v_mov_b32_e32 v49, v8 |
| ; GFX9-NEXT: v_mov_b32_e32 v50, v7 |
| ; GFX9-NEXT: v_mov_b32_e32 v51, v6 |
| ; GFX9-NEXT: v_mov_b32_e32 v52, v5 |
| ; GFX9-NEXT: v_mov_b32_e32 v53, v4 |
| ; GFX9-NEXT: v_mov_b32_e32 v54, v3 |
| ; GFX9-NEXT: v_mov_b32_e32 v55, v2 |
| ; GFX9-NEXT: v_mov_b32_e32 v40, v1 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v36 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v37 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v38 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v39 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v48 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v49 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v50 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v51 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v52 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v53 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v54 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v55 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v40 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v41 |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill |
| ; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB15_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.false |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: s_mov_b32 s6, 0x5040100 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v35 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v34 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v33 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v32 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: v_perm_b32 v0, v45, v41, s6 |
| ; GFX9-NEXT: v_perm_b32 v1, v44, v40, s6 |
| ; GFX9-NEXT: v_perm_b32 v2, v43, v55, s6 |
| ; GFX9-NEXT: v_perm_b32 v3, v42, v54, s6 |
| ; GFX9-NEXT: v_perm_b32 v4, v63, v53, s6 |
| ; GFX9-NEXT: v_perm_b32 v5, v62, v52, s6 |
| ; GFX9-NEXT: v_perm_b32 v6, v61, v51, s6 |
| ; GFX9-NEXT: v_perm_b32 v7, v60, v50, s6 |
| ; GFX9-NEXT: v_perm_b32 v8, v59, v49, s6 |
| ; GFX9-NEXT: v_perm_b32 v9, v58, v48, s6 |
| ; GFX9-NEXT: v_perm_b32 v10, v57, v39, s6 |
| ; GFX9-NEXT: v_perm_b32 v11, v56, v38, s6 |
| ; GFX9-NEXT: v_perm_b32 v12, v47, v37, s6 |
| ; GFX9-NEXT: v_perm_b32 v13, v46, v36, s6 |
| ; GFX9-NEXT: v_perm_b32 v14, v14, v35, s6 |
| ; GFX9-NEXT: v_perm_b32 v15, v15, v34, s6 |
| ; GFX9-NEXT: v_perm_b32 v16, v16, v33, s6 |
| ; GFX9-NEXT: v_perm_b32 v17, v17, v32, s6 |
| ; GFX9-NEXT: ; implicit-def: $vgpr41 |
| ; GFX9-NEXT: ; implicit-def: $vgpr40 |
| ; GFX9-NEXT: ; implicit-def: $vgpr55 |
| ; GFX9-NEXT: ; implicit-def: $vgpr54 |
| ; GFX9-NEXT: ; implicit-def: $vgpr53 |
| ; GFX9-NEXT: ; implicit-def: $vgpr52 |
| ; GFX9-NEXT: ; implicit-def: $vgpr51 |
| ; GFX9-NEXT: ; implicit-def: $vgpr50 |
| ; GFX9-NEXT: ; implicit-def: $vgpr49 |
| ; GFX9-NEXT: ; implicit-def: $vgpr48 |
| ; GFX9-NEXT: ; implicit-def: $vgpr39 |
| ; GFX9-NEXT: ; implicit-def: $vgpr38 |
| ; GFX9-NEXT: ; implicit-def: $vgpr37 |
| ; GFX9-NEXT: ; implicit-def: $vgpr36 |
| ; GFX9-NEXT: ; implicit-def: $vgpr35 |
| ; GFX9-NEXT: ; implicit-def: $vgpr34 |
| ; GFX9-NEXT: ; implicit-def: $vgpr33 |
| ; GFX9-NEXT: ; implicit-def: $vgpr32 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr46 |
| ; GFX9-NEXT: ; implicit-def: $vgpr47 |
| ; GFX9-NEXT: ; implicit-def: $vgpr56 |
| ; GFX9-NEXT: ; implicit-def: $vgpr57 |
| ; GFX9-NEXT: ; implicit-def: $vgpr58 |
| ; GFX9-NEXT: ; implicit-def: $vgpr59 |
| ; GFX9-NEXT: ; implicit-def: $vgpr60 |
| ; GFX9-NEXT: ; implicit-def: $vgpr61 |
| ; GFX9-NEXT: ; implicit-def: $vgpr62 |
| ; GFX9-NEXT: ; implicit-def: $vgpr63 |
| ; GFX9-NEXT: ; implicit-def: $vgpr42 |
| ; GFX9-NEXT: ; implicit-def: $vgpr43 |
| ; GFX9-NEXT: ; implicit-def: $vgpr44 |
| ; GFX9-NEXT: ; implicit-def: $vgpr45 |
| ; GFX9-NEXT: .LBB15_2: ; %Flow |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB15_4 |
| ; GFX9-NEXT: ; %bb.3: ; %cmp.true |
| ; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload |
| ; GFX9-NEXT: s_mov_b32 s6, 0x5040100 |
| ; GFX9-NEXT: v_perm_b32 v0, v45, v41, s6 |
| ; GFX9-NEXT: v_perm_b32 v1, v44, v40, s6 |
| ; GFX9-NEXT: v_perm_b32 v2, v43, v55, s6 |
| ; GFX9-NEXT: v_perm_b32 v3, v42, v54, s6 |
| ; GFX9-NEXT: v_perm_b32 v4, v63, v53, s6 |
| ; GFX9-NEXT: v_perm_b32 v5, v62, v52, s6 |
| ; GFX9-NEXT: v_perm_b32 v6, v61, v51, s6 |
| ; GFX9-NEXT: v_perm_b32 v7, v60, v50, s6 |
| ; GFX9-NEXT: v_perm_b32 v8, v59, v49, s6 |
| ; GFX9-NEXT: v_perm_b32 v9, v58, v48, s6 |
| ; GFX9-NEXT: v_perm_b32 v10, v57, v39, s6 |
| ; GFX9-NEXT: v_perm_b32 v11, v56, v38, s6 |
| ; GFX9-NEXT: v_perm_b32 v12, v47, v37, s6 |
| ; GFX9-NEXT: v_perm_b32 v13, v46, v36, s6 |
| ; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: s_waitcnt vmcnt(3) |
| ; GFX9-NEXT: v_perm_b32 v14, v14, v35, s6 |
| ; GFX9-NEXT: s_waitcnt vmcnt(2) |
| ; GFX9-NEXT: v_perm_b32 v15, v15, v34, s6 |
| ; GFX9-NEXT: s_waitcnt vmcnt(1) |
| ; GFX9-NEXT: v_perm_b32 v16, v16, v33, s6 |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) |
| ; GFX9-NEXT: v_perm_b32 v17, v17, v32, s6 |
| ; GFX9-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: .LBB15_4: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v36i16_to_v18f32: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v0 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v36, 16, v3 |
| ; GFX11-NEXT: v_perm_b32 v4, v32, v4, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v0, v33, v0, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v1, v34, v1, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v2, v35, v2, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v3, v36, v3, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v5, v31, v5, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v6, v30, v6, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v7, v29, v7, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v8, v28, v8, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v9, v27, v9, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v10, v26, v10, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v11, v25, v11, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v12, v24, v12, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v13, v23, v13, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v14, v22, v14, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v15, v21, v15, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v16, v20, v16, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v17, v19, v17, 0x5040100 |
| ; GFX11-NEXT: s_mov_b32 s0, exec_lo |
| ; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v18 |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB15_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX11-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: .LBB15_2: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = add <36 x i16> %a, splat (i16 3) |
| %a2 = bitcast <36 x i16> %a1 to <18 x float> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <36 x i16> %a to <18 x float> |
| br label %end |
| |
| end: |
| %phi = phi <18 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <18 x float> %phi |
| } |
| |
| define <36 x half> @bitcast_v18f32_to_v36f16(<18 x float> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v18f32_to_v36f16: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v46, off, s[0:3], s32 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v19 |
| ; GCN-NEXT: ; implicit-def: $vgpr42 |
| ; GCN-NEXT: ; implicit-def: $vgpr46 |
| ; GCN-NEXT: ; implicit-def: $vgpr53 |
| ; GCN-NEXT: ; implicit-def: $vgpr45 |
| ; GCN-NEXT: ; implicit-def: $vgpr51 |
| ; GCN-NEXT: ; implicit-def: $vgpr44 |
| ; GCN-NEXT: ; implicit-def: $vgpr49 |
| ; GCN-NEXT: ; implicit-def: $vgpr43 |
| ; GCN-NEXT: ; implicit-def: $vgpr39 |
| ; GCN-NEXT: ; implicit-def: $vgpr41 |
| ; GCN-NEXT: ; implicit-def: $vgpr37 |
| ; GCN-NEXT: ; implicit-def: $vgpr40 |
| ; GCN-NEXT: ; implicit-def: $vgpr35 |
| ; GCN-NEXT: ; implicit-def: $vgpr55 |
| ; GCN-NEXT: ; implicit-def: $vgpr33 |
| ; GCN-NEXT: ; implicit-def: $vgpr54 |
| ; GCN-NEXT: ; implicit-def: $vgpr31 |
| ; GCN-NEXT: ; implicit-def: $vgpr52 |
| ; GCN-NEXT: ; implicit-def: $vgpr29 |
| ; GCN-NEXT: ; implicit-def: $vgpr50 |
| ; GCN-NEXT: ; implicit-def: $vgpr27 |
| ; GCN-NEXT: ; implicit-def: $vgpr48 |
| ; GCN-NEXT: ; implicit-def: $vgpr25 |
| ; GCN-NEXT: ; implicit-def: $vgpr38 |
| ; GCN-NEXT: ; implicit-def: $vgpr24 |
| ; GCN-NEXT: ; implicit-def: $vgpr36 |
| ; GCN-NEXT: ; implicit-def: $vgpr23 |
| ; GCN-NEXT: ; implicit-def: $vgpr34 |
| ; GCN-NEXT: ; implicit-def: $vgpr22 |
| ; GCN-NEXT: ; implicit-def: $vgpr32 |
| ; GCN-NEXT: ; implicit-def: $vgpr21 |
| ; GCN-NEXT: ; implicit-def: $vgpr30 |
| ; GCN-NEXT: ; implicit-def: $vgpr20 |
| ; GCN-NEXT: ; implicit-def: $vgpr28 |
| ; GCN-NEXT: ; implicit-def: $vgpr19 |
| ; GCN-NEXT: ; implicit-def: $vgpr26 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB16_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.false |
| ; GCN-NEXT: v_lshrrev_b32_e32 v26, 16, v18 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v28, 16, v17 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v30, 16, v16 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v32, 16, v15 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v34, 16, v14 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v36, 16, v13 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v38, 16, v12 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v48, 16, v11 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v50, 16, v10 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v52, 16, v9 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v54, 16, v8 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v55, 16, v7 |
| ; GCN-NEXT: s_waitcnt expcnt(6) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v40, 16, v6 |
| ; GCN-NEXT: s_waitcnt expcnt(5) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v41, 16, v5 |
| ; GCN-NEXT: s_waitcnt expcnt(4) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v42, 16, v4 |
| ; GCN-NEXT: s_waitcnt expcnt(2) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v44, 16, v3 |
| ; GCN-NEXT: s_waitcnt expcnt(1) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v45, 16, v2 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v46, 16, v1 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v19, v18 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v20, v17 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v21, v16 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v22, v15 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v23, v14 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v24, v13 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v25, v12 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v27, v11 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v29, v10 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v31, v9 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v33, v8 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v35, v7 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v37, v6 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v39, v5 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v49, v4 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v51, v3 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v53, v2 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v26, v26 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v28, v28 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v30, v30 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v32, v32 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v34, v34 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v36, v36 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v38, v38 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v48, v48 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v50, v50 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v52, v52 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v54, v54 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v55, v55 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v40, v40 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v41, v41 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v43, v42 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v44, v44 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v45, v45 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v46, v46 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v42, v1 |
| ; GCN-NEXT: ; implicit-def: $vgpr1 |
| ; GCN-NEXT: ; implicit-def: $vgpr2 |
| ; GCN-NEXT: ; implicit-def: $vgpr3 |
| ; GCN-NEXT: ; implicit-def: $vgpr4 |
| ; GCN-NEXT: ; implicit-def: $vgpr5 |
| ; GCN-NEXT: ; implicit-def: $vgpr6 |
| ; GCN-NEXT: ; implicit-def: $vgpr7 |
| ; GCN-NEXT: ; implicit-def: $vgpr8 |
| ; GCN-NEXT: ; implicit-def: $vgpr9 |
| ; GCN-NEXT: ; implicit-def: $vgpr10 |
| ; GCN-NEXT: ; implicit-def: $vgpr11 |
| ; GCN-NEXT: ; implicit-def: $vgpr12 |
| ; GCN-NEXT: ; implicit-def: $vgpr13 |
| ; GCN-NEXT: ; implicit-def: $vgpr14 |
| ; GCN-NEXT: ; implicit-def: $vgpr15 |
| ; GCN-NEXT: ; implicit-def: $vgpr16 |
| ; GCN-NEXT: ; implicit-def: $vgpr17 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: .LBB16_2: ; %Flow |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB16_4 |
| ; GCN-NEXT: ; %bb.3: ; %cmp.true |
| ; GCN-NEXT: v_add_f32_e32 v1, 1.0, v1 |
| ; GCN-NEXT: v_add_f32_e32 v2, 1.0, v2 |
| ; GCN-NEXT: v_add_f32_e32 v3, 1.0, v3 |
| ; GCN-NEXT: v_add_f32_e32 v4, 1.0, v4 |
| ; GCN-NEXT: v_add_f32_e32 v5, 1.0, v5 |
| ; GCN-NEXT: v_add_f32_e32 v6, 1.0, v6 |
| ; GCN-NEXT: v_add_f32_e32 v7, 1.0, v7 |
| ; GCN-NEXT: v_add_f32_e32 v8, 1.0, v8 |
| ; GCN-NEXT: v_add_f32_e32 v9, 1.0, v9 |
| ; GCN-NEXT: v_add_f32_e32 v10, 1.0, v10 |
| ; GCN-NEXT: v_add_f32_e32 v11, 1.0, v11 |
| ; GCN-NEXT: v_add_f32_e32 v12, 1.0, v12 |
| ; GCN-NEXT: v_add_f32_e32 v13, 1.0, v13 |
| ; GCN-NEXT: v_add_f32_e32 v14, 1.0, v14 |
| ; GCN-NEXT: v_add_f32_e32 v15, 1.0, v15 |
| ; GCN-NEXT: v_add_f32_e32 v16, 1.0, v16 |
| ; GCN-NEXT: v_add_f32_e32 v17, 1.0, v17 |
| ; GCN-NEXT: v_add_f32_e32 v18, 1.0, v18 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v46, 16, v1 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v45, 16, v2 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v44, 16, v3 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v43, 16, v4 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v41, 16, v5 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v40, 16, v6 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v55, 16, v7 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v54, 16, v8 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v52, 16, v9 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v50, 16, v10 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v48, 16, v11 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v38, 16, v12 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v36, 16, v13 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v34, 16, v14 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v32, 16, v15 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v30, 16, v16 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v28, 16, v17 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v26, 16, v18 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v19, v18 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v20, v17 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v21, v16 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v22, v15 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v23, v14 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v24, v13 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v25, v12 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v27, v11 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v29, v10 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v31, v9 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v33, v8 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v35, v7 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v37, v6 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v39, v5 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v49, v4 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v51, v3 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v53, v2 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v42, v1 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v26, v26 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v28, v28 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v30, v30 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v32, v32 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v34, v34 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v36, v36 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v38, v38 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v48, v48 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v50, v50 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v52, v52 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v54, v54 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v55, v55 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v40, v40 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v41, v41 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v43, v43 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v44, v44 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v45, v45 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v46, v46 |
| ; GCN-NEXT: .LBB16_4: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v3, v46 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v4, v42 |
| ; GCN-NEXT: v_add_i32_e32 v1, vcc, 4, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v5, v45 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v6, v53 |
| ; GCN-NEXT: v_add_i32_e32 v2, vcc, 8, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v7, v44 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v8, v51 |
| ; GCN-NEXT: v_add_i32_e32 v9, vcc, 12, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v10, v43 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v11, v49 |
| ; GCN-NEXT: v_add_i32_e32 v12, vcc, 16, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v13, v41 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v14, v39 |
| ; GCN-NEXT: v_add_i32_e32 v15, vcc, 20, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v16, v40 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v17, v37 |
| ; GCN-NEXT: v_add_i32_e32 v18, vcc, 24, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v37, v55 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v35, v35 |
| ; GCN-NEXT: v_add_i32_e32 v39, vcc, 28, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v49, v54 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v33, v33 |
| ; GCN-NEXT: v_add_i32_e32 v51, vcc, 32, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v52, v52 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v31, v31 |
| ; GCN-NEXT: v_add_i32_e32 v53, vcc, 36, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v50, v50 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v29, v29 |
| ; GCN-NEXT: v_add_i32_e32 v54, vcc, 40, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v48, v48 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v27, v27 |
| ; GCN-NEXT: v_add_i32_e32 v55, vcc, 44, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v38, v38 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v25, v25 |
| ; GCN-NEXT: s_waitcnt expcnt(6) |
| ; GCN-NEXT: v_add_i32_e32 v40, vcc, 48, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v36, v36 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v24, v24 |
| ; GCN-NEXT: s_waitcnt expcnt(5) |
| ; GCN-NEXT: v_add_i32_e32 v41, vcc, 52, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v34, v34 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v23, v23 |
| ; GCN-NEXT: s_waitcnt expcnt(4) |
| ; GCN-NEXT: v_add_i32_e32 v42, vcc, 56, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v32, v32 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v22, v22 |
| ; GCN-NEXT: s_waitcnt expcnt(3) |
| ; GCN-NEXT: v_add_i32_e32 v43, vcc, 60, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v30, v30 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v21, v21 |
| ; GCN-NEXT: s_waitcnt expcnt(2) |
| ; GCN-NEXT: v_add_i32_e32 v44, vcc, 64, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v28, v28 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v20, v20 |
| ; GCN-NEXT: s_waitcnt expcnt(1) |
| ; GCN-NEXT: v_add_i32_e32 v45, vcc, 0x44, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v26, v26 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v19, v19 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v3, 16, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v5, 16, v5 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v7, 16, v7 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v10, 16, v10 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v13, 16, v13 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v16, 16, v16 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v37, 16, v37 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v49, 16, v49 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v52, 16, v52 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v50, 16, v50 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v48, 16, v48 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v38, 16, v38 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v36, 16, v36 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v34, 16, v34 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v32, 16, v32 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v30, 16, v30 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v28, 16, v28 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v26, 16, v26 |
| ; GCN-NEXT: v_or_b32_e32 v3, v4, v3 |
| ; GCN-NEXT: v_or_b32_e32 v4, v6, v5 |
| ; GCN-NEXT: v_or_b32_e32 v5, v8, v7 |
| ; GCN-NEXT: v_or_b32_e32 v6, v11, v10 |
| ; GCN-NEXT: v_or_b32_e32 v7, v14, v13 |
| ; GCN-NEXT: v_or_b32_e32 v8, v17, v16 |
| ; GCN-NEXT: v_or_b32_e32 v10, v35, v37 |
| ; GCN-NEXT: v_or_b32_e32 v11, v33, v49 |
| ; GCN-NEXT: v_or_b32_e32 v13, v31, v52 |
| ; GCN-NEXT: v_or_b32_e32 v14, v29, v50 |
| ; GCN-NEXT: v_or_b32_e32 v16, v27, v48 |
| ; GCN-NEXT: v_or_b32_e32 v17, v25, v38 |
| ; GCN-NEXT: v_or_b32_e32 v24, v24, v36 |
| ; GCN-NEXT: v_or_b32_e32 v23, v23, v34 |
| ; GCN-NEXT: v_or_b32_e32 v22, v22, v32 |
| ; GCN-NEXT: v_or_b32_e32 v21, v21, v30 |
| ; GCN-NEXT: v_or_b32_e32 v20, v20, v28 |
| ; GCN-NEXT: v_or_b32_e32 v19, v19, v26 |
| ; GCN-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v4, v1, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v5, v2, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v7, v12, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v8, v15, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v10, v18, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v11, v39, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v13, v51, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v14, v53, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v16, v54, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v17, v55, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v24, v40, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v23, v41, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v22, v42, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v21, v43, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v20, v44, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v19, v45, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_load_dword v46, off, s[0:3], s32 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v18f32_to_v36f16: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: ; implicit-def: $vgpr35 |
| ; VI-NEXT: ; implicit-def: $vgpr34 |
| ; VI-NEXT: ; implicit-def: $vgpr33 |
| ; VI-NEXT: ; implicit-def: $vgpr32 |
| ; VI-NEXT: ; implicit-def: $vgpr31 |
| ; VI-NEXT: ; implicit-def: $vgpr30 |
| ; VI-NEXT: ; implicit-def: $vgpr29 |
| ; VI-NEXT: ; implicit-def: $vgpr28 |
| ; VI-NEXT: ; implicit-def: $vgpr27 |
| ; VI-NEXT: ; implicit-def: $vgpr26 |
| ; VI-NEXT: ; implicit-def: $vgpr25 |
| ; VI-NEXT: ; implicit-def: $vgpr24 |
| ; VI-NEXT: ; implicit-def: $vgpr23 |
| ; VI-NEXT: ; implicit-def: $vgpr22 |
| ; VI-NEXT: ; implicit-def: $vgpr21 |
| ; VI-NEXT: ; implicit-def: $vgpr20 |
| ; VI-NEXT: ; implicit-def: $vgpr19 |
| ; VI-NEXT: ; implicit-def: $vgpr18 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB16_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.false |
| ; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; VI-NEXT: .LBB16_2: ; %Flow |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB16_4 |
| ; VI-NEXT: ; %bb.3: ; %cmp.true |
| ; VI-NEXT: v_add_f32_e32 v17, 1.0, v17 |
| ; VI-NEXT: v_add_f32_e32 v16, 1.0, v16 |
| ; VI-NEXT: v_add_f32_e32 v15, 1.0, v15 |
| ; VI-NEXT: v_add_f32_e32 v14, 1.0, v14 |
| ; VI-NEXT: v_add_f32_e32 v13, 1.0, v13 |
| ; VI-NEXT: v_add_f32_e32 v12, 1.0, v12 |
| ; VI-NEXT: v_add_f32_e32 v11, 1.0, v11 |
| ; VI-NEXT: v_add_f32_e32 v10, 1.0, v10 |
| ; VI-NEXT: v_add_f32_e32 v9, 1.0, v9 |
| ; VI-NEXT: v_add_f32_e32 v8, 1.0, v8 |
| ; VI-NEXT: v_add_f32_e32 v7, 1.0, v7 |
| ; VI-NEXT: v_add_f32_e32 v6, 1.0, v6 |
| ; VI-NEXT: v_add_f32_e32 v5, 1.0, v5 |
| ; VI-NEXT: v_add_f32_e32 v4, 1.0, v4 |
| ; VI-NEXT: v_add_f32_e32 v3, 1.0, v3 |
| ; VI-NEXT: v_add_f32_e32 v2, 1.0, v2 |
| ; VI-NEXT: v_add_f32_e32 v1, 1.0, v1 |
| ; VI-NEXT: v_add_f32_e32 v0, 1.0, v0 |
| ; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; VI-NEXT: .LBB16_4: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 |
| ; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 |
| ; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 |
| ; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 |
| ; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 |
| ; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 |
| ; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 |
| ; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 |
| ; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 |
| ; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 |
| ; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 |
| ; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 |
| ; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 |
| ; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 |
| ; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 |
| ; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 |
| ; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 |
| ; VI-NEXT: v_or_b32_sdwa v0, v0, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v1, v1, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v2, v2, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v3, v3, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v4, v4, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v5, v5, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v6, v6, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v7, v7, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v8, v8, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v9, v9, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v10, v10, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v11, v11, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v12, v12, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v13, v13, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v14, v14, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v15, v15, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v16, v16, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v17, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v18f32_to_v36f16: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr35 |
| ; GFX9-NEXT: ; implicit-def: $vgpr34 |
| ; GFX9-NEXT: ; implicit-def: $vgpr33 |
| ; GFX9-NEXT: ; implicit-def: $vgpr32 |
| ; GFX9-NEXT: ; implicit-def: $vgpr31 |
| ; GFX9-NEXT: ; implicit-def: $vgpr30 |
| ; GFX9-NEXT: ; implicit-def: $vgpr29 |
| ; GFX9-NEXT: ; implicit-def: $vgpr28 |
| ; GFX9-NEXT: ; implicit-def: $vgpr27 |
| ; GFX9-NEXT: ; implicit-def: $vgpr26 |
| ; GFX9-NEXT: ; implicit-def: $vgpr25 |
| ; GFX9-NEXT: ; implicit-def: $vgpr24 |
| ; GFX9-NEXT: ; implicit-def: $vgpr23 |
| ; GFX9-NEXT: ; implicit-def: $vgpr22 |
| ; GFX9-NEXT: ; implicit-def: $vgpr21 |
| ; GFX9-NEXT: ; implicit-def: $vgpr20 |
| ; GFX9-NEXT: ; implicit-def: $vgpr19 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB16_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.false |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX9-NEXT: .LBB16_2: ; %Flow |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB16_4 |
| ; GFX9-NEXT: ; %bb.3: ; %cmp.true |
| ; GFX9-NEXT: v_add_f32_e32 v17, 1.0, v17 |
| ; GFX9-NEXT: v_add_f32_e32 v16, 1.0, v16 |
| ; GFX9-NEXT: v_add_f32_e32 v15, 1.0, v15 |
| ; GFX9-NEXT: v_add_f32_e32 v14, 1.0, v14 |
| ; GFX9-NEXT: v_add_f32_e32 v13, 1.0, v13 |
| ; GFX9-NEXT: v_add_f32_e32 v12, 1.0, v12 |
| ; GFX9-NEXT: v_add_f32_e32 v11, 1.0, v11 |
| ; GFX9-NEXT: v_add_f32_e32 v10, 1.0, v10 |
| ; GFX9-NEXT: v_add_f32_e32 v9, 1.0, v9 |
| ; GFX9-NEXT: v_add_f32_e32 v8, 1.0, v8 |
| ; GFX9-NEXT: v_add_f32_e32 v7, 1.0, v7 |
| ; GFX9-NEXT: v_add_f32_e32 v6, 1.0, v6 |
| ; GFX9-NEXT: v_add_f32_e32 v5, 1.0, v5 |
| ; GFX9-NEXT: v_add_f32_e32 v4, 1.0, v4 |
| ; GFX9-NEXT: v_add_f32_e32 v3, 1.0, v3 |
| ; GFX9-NEXT: v_add_f32_e32 v2, 1.0, v2 |
| ; GFX9-NEXT: v_add_f32_e32 v1, 1.0, v1 |
| ; GFX9-NEXT: v_add_f32_e32 v0, 1.0, v0 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX9-NEXT: .LBB16_4: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: s_mov_b32 s4, 0x5040100 |
| ; GFX9-NEXT: v_perm_b32 v0, v35, v0, s4 |
| ; GFX9-NEXT: v_perm_b32 v1, v34, v1, s4 |
| ; GFX9-NEXT: v_perm_b32 v2, v33, v2, s4 |
| ; GFX9-NEXT: v_perm_b32 v3, v32, v3, s4 |
| ; GFX9-NEXT: v_perm_b32 v4, v31, v4, s4 |
| ; GFX9-NEXT: v_perm_b32 v5, v30, v5, s4 |
| ; GFX9-NEXT: v_perm_b32 v6, v29, v6, s4 |
| ; GFX9-NEXT: v_perm_b32 v7, v28, v7, s4 |
| ; GFX9-NEXT: v_perm_b32 v8, v27, v8, s4 |
| ; GFX9-NEXT: v_perm_b32 v9, v26, v9, s4 |
| ; GFX9-NEXT: v_perm_b32 v10, v25, v10, s4 |
| ; GFX9-NEXT: v_perm_b32 v11, v24, v11, s4 |
| ; GFX9-NEXT: v_perm_b32 v12, v23, v12, s4 |
| ; GFX9-NEXT: v_perm_b32 v13, v22, v13, s4 |
| ; GFX9-NEXT: v_perm_b32 v14, v21, v14, s4 |
| ; GFX9-NEXT: v_perm_b32 v15, v20, v15, s4 |
| ; GFX9-NEXT: v_perm_b32 v16, v19, v16, s4 |
| ; GFX9-NEXT: v_perm_b32 v17, v18, v17, s4 |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v18f32_to_v36f16: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v18 |
| ; GFX11-NEXT: ; implicit-def: $vgpr35 |
| ; GFX11-NEXT: ; implicit-def: $vgpr34 |
| ; GFX11-NEXT: ; implicit-def: $vgpr33 |
| ; GFX11-NEXT: ; implicit-def: $vgpr32 |
| ; GFX11-NEXT: ; implicit-def: $vgpr31 |
| ; GFX11-NEXT: ; implicit-def: $vgpr30 |
| ; GFX11-NEXT: ; implicit-def: $vgpr29 |
| ; GFX11-NEXT: ; implicit-def: $vgpr28 |
| ; GFX11-NEXT: ; implicit-def: $vgpr27 |
| ; GFX11-NEXT: ; implicit-def: $vgpr26 |
| ; GFX11-NEXT: ; implicit-def: $vgpr25 |
| ; GFX11-NEXT: ; implicit-def: $vgpr24 |
| ; GFX11-NEXT: ; implicit-def: $vgpr23 |
| ; GFX11-NEXT: ; implicit-def: $vgpr22 |
| ; GFX11-NEXT: ; implicit-def: $vgpr21 |
| ; GFX11-NEXT: ; implicit-def: $vgpr20 |
| ; GFX11-NEXT: ; implicit-def: $vgpr19 |
| ; GFX11-NEXT: ; implicit-def: $vgpr18 |
| ; GFX11-NEXT: s_and_saveexec_b32 s0, vcc_lo |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB16_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.false |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX11-NEXT: .LBB16_2: ; %Flow |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB16_4 |
| ; GFX11-NEXT: ; %bb.3: ; %cmp.true |
| ; GFX11-NEXT: v_dual_add_f32 v17, 1.0, v17 :: v_dual_add_f32 v16, 1.0, v16 |
| ; GFX11-NEXT: v_dual_add_f32 v15, 1.0, v15 :: v_dual_add_f32 v14, 1.0, v14 |
| ; GFX11-NEXT: v_dual_add_f32 v13, 1.0, v13 :: v_dual_add_f32 v12, 1.0, v12 |
| ; GFX11-NEXT: v_dual_add_f32 v11, 1.0, v11 :: v_dual_add_f32 v10, 1.0, v10 |
| ; GFX11-NEXT: v_dual_add_f32 v9, 1.0, v9 :: v_dual_add_f32 v8, 1.0, v8 |
| ; GFX11-NEXT: v_dual_add_f32 v7, 1.0, v7 :: v_dual_add_f32 v6, 1.0, v6 |
| ; GFX11-NEXT: v_dual_add_f32 v5, 1.0, v5 :: v_dual_add_f32 v4, 1.0, v4 |
| ; GFX11-NEXT: v_dual_add_f32 v3, 1.0, v3 :: v_dual_add_f32 v2, 1.0, v2 |
| ; GFX11-NEXT: v_dual_add_f32 v1, 1.0, v1 :: v_dual_add_f32 v0, 1.0, v0 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX11-NEXT: .LBB16_4: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) |
| ; GFX11-NEXT: v_perm_b32 v0, v35, v0, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v1, v34, v1, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v2, v33, v2, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v3, v32, v3, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v4, v31, v4, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v5, v30, v5, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v6, v29, v6, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v7, v28, v7, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v8, v27, v8, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v9, v26, v9, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v10, v25, v10, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v11, v24, v11, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v12, v23, v12, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v13, v22, v13, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v14, v21, v14, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v15, v20, v15, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v16, v19, v16, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v17, v18, v17, 0x5040100 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = fadd <18 x float> %a, splat (float 1.000000e+00) |
| %a2 = bitcast <18 x float> %a1 to <36 x half> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <18 x float> %a to <36 x half> |
| br label %end |
| |
| end: |
| %phi = phi <36 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <36 x half> %phi |
| } |
| |
| define <18 x float> @bitcast_v36f16_to_v18f32(<36 x half> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v36f16_to_v18f32: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:16 |
| ; GCN-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:12 |
| ; GCN-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:8 |
| ; GCN-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:4 |
| ; GCN-NEXT: buffer_load_dword v49, off, s[0:3], s32 |
| ; GCN-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:20 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v35, v1 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v34, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v33, v3 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v32, v2 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v63, v5 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v62, v4 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v61, v7 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v60, v6 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v59, v9 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v46, v8 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v58, v11 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v44, v10 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v57, v13 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v42, v12 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v56, v15 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v40, v14 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v47, v17 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v54, v16 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v45, v19 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v52, v18 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v43, v21 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v51, v20 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v41, v23 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v48, v22 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v55, v25 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v0, v24 |
| ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v53, v27 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v0, v26 |
| ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v50, v29 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v0, v28 |
| ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v0, v30 |
| ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill |
| ; GCN-NEXT: s_waitcnt vmcnt(4) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v39 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v49, v49 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v38, v38 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v37, v37 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v39, v31 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v36, v36 |
| ; GCN-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB17_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.false |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_lshlrev_b32_e32 v0, 16, v35 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v33 |
| ; GCN-NEXT: v_or_b32_e32 v0, v34, v0 |
| ; GCN-NEXT: v_or_b32_e32 v1, v32, v1 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v2, 16, v63 |
| ; GCN-NEXT: v_or_b32_e32 v2, v62, v2 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v3, 16, v61 |
| ; GCN-NEXT: v_or_b32_e32 v3, v60, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v4, 16, v59 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v5, 16, v58 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v6, 16, v57 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v7, 16, v56 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v8, 16, v47 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v9, 16, v45 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v10, 16, v43 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v11, 16, v41 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v12, 16, v55 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v13, 16, v53 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v14, 16, v50 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v15, 16, v49 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v16, 16, v38 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v17, 16, v39 |
| ; GCN-NEXT: v_or_b32_e32 v4, v46, v4 |
| ; GCN-NEXT: v_or_b32_e32 v5, v44, v5 |
| ; GCN-NEXT: v_or_b32_e32 v6, v42, v6 |
| ; GCN-NEXT: v_or_b32_e32 v7, v40, v7 |
| ; GCN-NEXT: v_or_b32_e32 v8, v54, v8 |
| ; GCN-NEXT: v_or_b32_e32 v9, v52, v9 |
| ; GCN-NEXT: v_or_b32_e32 v10, v51, v10 |
| ; GCN-NEXT: v_or_b32_e32 v11, v48, v11 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v12, v18, v12 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v13, v18, v13 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v14, v18, v14 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v15, v18, v15 |
| ; GCN-NEXT: v_or_b32_e32 v16, v37, v16 |
| ; GCN-NEXT: v_or_b32_e32 v17, v36, v17 |
| ; GCN-NEXT: ; implicit-def: $vgpr35 |
| ; GCN-NEXT: ; implicit-def: $vgpr34 |
| ; GCN-NEXT: ; implicit-def: $vgpr33 |
| ; GCN-NEXT: ; implicit-def: $vgpr32 |
| ; GCN-NEXT: ; implicit-def: $vgpr63 |
| ; GCN-NEXT: ; implicit-def: $vgpr62 |
| ; GCN-NEXT: ; implicit-def: $vgpr61 |
| ; GCN-NEXT: ; implicit-def: $vgpr60 |
| ; GCN-NEXT: ; implicit-def: $vgpr59 |
| ; GCN-NEXT: ; implicit-def: $vgpr46 |
| ; GCN-NEXT: ; implicit-def: $vgpr58 |
| ; GCN-NEXT: ; implicit-def: $vgpr44 |
| ; GCN-NEXT: ; implicit-def: $vgpr57 |
| ; GCN-NEXT: ; implicit-def: $vgpr42 |
| ; GCN-NEXT: ; implicit-def: $vgpr56 |
| ; GCN-NEXT: ; implicit-def: $vgpr40 |
| ; GCN-NEXT: ; implicit-def: $vgpr47 |
| ; GCN-NEXT: ; implicit-def: $vgpr54 |
| ; GCN-NEXT: ; implicit-def: $vgpr45 |
| ; GCN-NEXT: ; implicit-def: $vgpr52 |
| ; GCN-NEXT: ; implicit-def: $vgpr43 |
| ; GCN-NEXT: ; implicit-def: $vgpr51 |
| ; GCN-NEXT: ; implicit-def: $vgpr41 |
| ; GCN-NEXT: ; implicit-def: $vgpr48 |
| ; GCN-NEXT: ; implicit-def: $vgpr55 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr53 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr50 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr49 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr38 |
| ; GCN-NEXT: ; implicit-def: $vgpr37 |
| ; GCN-NEXT: ; implicit-def: $vgpr39 |
| ; GCN-NEXT: ; implicit-def: $vgpr36 |
| ; GCN-NEXT: .LBB17_2: ; %Flow |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB17_4 |
| ; GCN-NEXT: ; %bb.3: ; %cmp.true |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v0, v35 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v1, v34 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v2, v33 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v3, v32 |
| ; GCN-NEXT: v_add_f32_e32 v0, 0x38000000, v0 |
| ; GCN-NEXT: v_add_f32_e32 v1, 0x38000000, v1 |
| ; GCN-NEXT: v_add_f32_e32 v2, 0x38000000, v2 |
| ; GCN-NEXT: v_add_f32_e32 v3, 0x38000000, v3 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v0, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v1, v1 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v2, v2 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v3, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v0, 16, v0 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v2, 16, v2 |
| ; GCN-NEXT: v_or_b32_e32 v0, v1, v0 |
| ; GCN-NEXT: v_or_b32_e32 v1, v3, v2 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v2, v63 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v3, v62 |
| ; GCN-NEXT: v_add_f32_e32 v2, 0x38000000, v2 |
| ; GCN-NEXT: v_add_f32_e32 v3, 0x38000000, v3 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v2, v2 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v3, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v2, 16, v2 |
| ; GCN-NEXT: v_or_b32_e32 v2, v3, v2 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v3, v61 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v4, v60 |
| ; GCN-NEXT: v_add_f32_e32 v3, 0x38000000, v3 |
| ; GCN-NEXT: v_add_f32_e32 v4, 0x38000000, v4 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v3, v3 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v4, v4 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v3, 16, v3 |
| ; GCN-NEXT: v_or_b32_e32 v3, v4, v3 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v4, v59 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v5, v46 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v6, v58 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v7, v44 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v8, v57 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v9, v42 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v10, v56 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v11, v40 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v12, v47 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v13, v54 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v14, v45 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v15, v52 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v16, v43 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v17, v51 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v18, v41 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v19, v48 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v20, v55 |
| ; GCN-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v21, v21 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v22, v53 |
| ; GCN-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v23, v23 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v24, v50 |
| ; GCN-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v25, v25 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v26, v49 |
| ; GCN-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v27, v27 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v28, v38 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v29, v37 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v30, v39 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v31, v36 |
| ; GCN-NEXT: v_add_f32_e32 v4, 0x38000000, v4 |
| ; GCN-NEXT: v_add_f32_e32 v5, 0x38000000, v5 |
| ; GCN-NEXT: v_add_f32_e32 v6, 0x38000000, v6 |
| ; GCN-NEXT: v_add_f32_e32 v7, 0x38000000, v7 |
| ; GCN-NEXT: v_add_f32_e32 v8, 0x38000000, v8 |
| ; GCN-NEXT: v_add_f32_e32 v9, 0x38000000, v9 |
| ; GCN-NEXT: v_add_f32_e32 v10, 0x38000000, v10 |
| ; GCN-NEXT: v_add_f32_e32 v11, 0x38000000, v11 |
| ; GCN-NEXT: v_add_f32_e32 v12, 0x38000000, v12 |
| ; GCN-NEXT: v_add_f32_e32 v13, 0x38000000, v13 |
| ; GCN-NEXT: v_add_f32_e32 v14, 0x38000000, v14 |
| ; GCN-NEXT: v_add_f32_e32 v15, 0x38000000, v15 |
| ; GCN-NEXT: v_add_f32_e32 v16, 0x38000000, v16 |
| ; GCN-NEXT: v_add_f32_e32 v17, 0x38000000, v17 |
| ; GCN-NEXT: v_add_f32_e32 v18, 0x38000000, v18 |
| ; GCN-NEXT: v_add_f32_e32 v19, 0x38000000, v19 |
| ; GCN-NEXT: v_add_f32_e32 v20, 0x38000000, v20 |
| ; GCN-NEXT: v_add_f32_e32 v21, 0x38000000, v21 |
| ; GCN-NEXT: v_add_f32_e32 v22, 0x38000000, v22 |
| ; GCN-NEXT: v_add_f32_e32 v23, 0x38000000, v23 |
| ; GCN-NEXT: v_add_f32_e32 v24, 0x38000000, v24 |
| ; GCN-NEXT: v_add_f32_e32 v25, 0x38000000, v25 |
| ; GCN-NEXT: v_add_f32_e32 v26, 0x38000000, v26 |
| ; GCN-NEXT: v_add_f32_e32 v27, 0x38000000, v27 |
| ; GCN-NEXT: v_add_f32_e32 v28, 0x38000000, v28 |
| ; GCN-NEXT: v_add_f32_e32 v29, 0x38000000, v29 |
| ; GCN-NEXT: v_add_f32_e32 v30, 0x38000000, v30 |
| ; GCN-NEXT: v_add_f32_e32 v31, 0x38000000, v31 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v4, v4 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v5, v5 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v6, v6 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v7, v7 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v8, v8 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v9, v9 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v10, v10 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v11, v11 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v12, v12 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v13, v13 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v14, v14 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v15, v15 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v16, v16 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v17, v17 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v18, v18 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v19, v19 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v20, v20 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v21, v21 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v22, v22 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v23, v23 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v24, v24 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v25, v25 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v26, v26 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v27, v27 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v28, v28 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v29, v29 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v30, v30 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v31, v31 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v4, 16, v4 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v6, 16, v6 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v8, 16, v8 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v10, 16, v10 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v12, 16, v12 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v14, 16, v14 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v16, 16, v16 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v18, 16, v18 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v20, 16, v20 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v22, 16, v22 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v24, 16, v24 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v26, 16, v26 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v28, 16, v28 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v30, 16, v30 |
| ; GCN-NEXT: v_or_b32_e32 v4, v5, v4 |
| ; GCN-NEXT: v_or_b32_e32 v5, v7, v6 |
| ; GCN-NEXT: v_or_b32_e32 v6, v9, v8 |
| ; GCN-NEXT: v_or_b32_e32 v7, v11, v10 |
| ; GCN-NEXT: v_or_b32_e32 v8, v13, v12 |
| ; GCN-NEXT: v_or_b32_e32 v9, v15, v14 |
| ; GCN-NEXT: v_or_b32_e32 v10, v17, v16 |
| ; GCN-NEXT: v_or_b32_e32 v11, v19, v18 |
| ; GCN-NEXT: v_or_b32_e32 v12, v21, v20 |
| ; GCN-NEXT: v_or_b32_e32 v13, v23, v22 |
| ; GCN-NEXT: v_or_b32_e32 v14, v25, v24 |
| ; GCN-NEXT: v_or_b32_e32 v15, v27, v26 |
| ; GCN-NEXT: v_or_b32_e32 v16, v29, v28 |
| ; GCN-NEXT: v_or_b32_e32 v17, v31, v30 |
| ; GCN-NEXT: .LBB17_4: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v36f16_to_v18f32: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill |
| ; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 ; 4-byte Folded Spill |
| ; VI-NEXT: v_mov_b32_e32 v32, v17 |
| ; VI-NEXT: v_mov_b32_e32 v33, v16 |
| ; VI-NEXT: v_mov_b32_e32 v34, v15 |
| ; VI-NEXT: v_mov_b32_e32 v35, v14 |
| ; VI-NEXT: v_mov_b32_e32 v36, v13 |
| ; VI-NEXT: v_mov_b32_e32 v37, v12 |
| ; VI-NEXT: v_mov_b32_e32 v38, v11 |
| ; VI-NEXT: v_mov_b32_e32 v39, v10 |
| ; VI-NEXT: v_mov_b32_e32 v48, v9 |
| ; VI-NEXT: v_mov_b32_e32 v49, v8 |
| ; VI-NEXT: v_mov_b32_e32 v50, v7 |
| ; VI-NEXT: v_mov_b32_e32 v51, v6 |
| ; VI-NEXT: v_mov_b32_e32 v52, v5 |
| ; VI-NEXT: v_mov_b32_e32 v53, v4 |
| ; VI-NEXT: v_mov_b32_e32 v54, v3 |
| ; VI-NEXT: v_mov_b32_e32 v55, v2 |
| ; VI-NEXT: v_mov_b32_e32 v40, v1 |
| ; VI-NEXT: v_mov_b32_e32 v41, v0 |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB17_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.false |
| ; VI-NEXT: v_mov_b32_e32 v17, 16 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v0, v17, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v1, v17, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v2, v17, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v3, v17, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v4, v17, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v5, v17, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v6, v17, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v7, v17, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v8, v17, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v9, v17, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v10, v17, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v11, v17, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v12, v17, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v13, v17, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v14, v17, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v15, v17, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v16, v17, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v17, v17, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_or_b32_sdwa v0, v41, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v1, v40, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v2, v55, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v3, v54, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v4, v53, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v5, v52, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v6, v51, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v7, v50, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v8, v49, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v9, v48, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v10, v39, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v11, v38, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v12, v37, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v13, v36, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v14, v35, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v15, v34, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v16, v33, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v17, v32, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: ; implicit-def: $vgpr41 |
| ; VI-NEXT: ; implicit-def: $vgpr40 |
| ; VI-NEXT: ; implicit-def: $vgpr55 |
| ; VI-NEXT: ; implicit-def: $vgpr54 |
| ; VI-NEXT: ; implicit-def: $vgpr53 |
| ; VI-NEXT: ; implicit-def: $vgpr52 |
| ; VI-NEXT: ; implicit-def: $vgpr51 |
| ; VI-NEXT: ; implicit-def: $vgpr50 |
| ; VI-NEXT: ; implicit-def: $vgpr49 |
| ; VI-NEXT: ; implicit-def: $vgpr48 |
| ; VI-NEXT: ; implicit-def: $vgpr39 |
| ; VI-NEXT: ; implicit-def: $vgpr38 |
| ; VI-NEXT: ; implicit-def: $vgpr37 |
| ; VI-NEXT: ; implicit-def: $vgpr36 |
| ; VI-NEXT: ; implicit-def: $vgpr35 |
| ; VI-NEXT: ; implicit-def: $vgpr34 |
| ; VI-NEXT: ; implicit-def: $vgpr33 |
| ; VI-NEXT: ; implicit-def: $vgpr32 |
| ; VI-NEXT: .LBB17_2: ; %Flow |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB17_4 |
| ; VI-NEXT: ; %bb.3: ; %cmp.true |
| ; VI-NEXT: v_mov_b32_e32 v17, 0x200 |
| ; VI-NEXT: v_add_f16_sdwa v0, v41, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v1, 0x200, v41 |
| ; VI-NEXT: v_or_b32_e32 v0, v1, v0 |
| ; VI-NEXT: v_add_f16_sdwa v1, v40, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v2, 0x200, v40 |
| ; VI-NEXT: v_or_b32_e32 v1, v2, v1 |
| ; VI-NEXT: v_add_f16_sdwa v2, v55, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v3, 0x200, v55 |
| ; VI-NEXT: v_or_b32_e32 v2, v3, v2 |
| ; VI-NEXT: v_add_f16_sdwa v3, v54, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v4, 0x200, v54 |
| ; VI-NEXT: v_or_b32_e32 v3, v4, v3 |
| ; VI-NEXT: v_add_f16_sdwa v4, v53, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v5, 0x200, v53 |
| ; VI-NEXT: v_or_b32_e32 v4, v5, v4 |
| ; VI-NEXT: v_add_f16_sdwa v5, v52, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v6, 0x200, v52 |
| ; VI-NEXT: v_or_b32_e32 v5, v6, v5 |
| ; VI-NEXT: v_add_f16_sdwa v6, v51, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v7, 0x200, v51 |
| ; VI-NEXT: v_or_b32_e32 v6, v7, v6 |
| ; VI-NEXT: v_add_f16_sdwa v7, v50, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v8, 0x200, v50 |
| ; VI-NEXT: v_or_b32_e32 v7, v8, v7 |
| ; VI-NEXT: v_add_f16_sdwa v8, v49, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v9, 0x200, v49 |
| ; VI-NEXT: v_or_b32_e32 v8, v9, v8 |
| ; VI-NEXT: v_add_f16_sdwa v9, v48, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v10, 0x200, v48 |
| ; VI-NEXT: v_or_b32_e32 v9, v10, v9 |
| ; VI-NEXT: v_add_f16_sdwa v10, v39, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v11, 0x200, v39 |
| ; VI-NEXT: v_or_b32_e32 v10, v11, v10 |
| ; VI-NEXT: v_add_f16_sdwa v11, v38, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v12, 0x200, v38 |
| ; VI-NEXT: v_or_b32_e32 v11, v12, v11 |
| ; VI-NEXT: v_add_f16_sdwa v12, v37, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v13, 0x200, v37 |
| ; VI-NEXT: v_or_b32_e32 v12, v13, v12 |
| ; VI-NEXT: v_add_f16_sdwa v13, v36, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v14, 0x200, v36 |
| ; VI-NEXT: v_or_b32_e32 v13, v14, v13 |
| ; VI-NEXT: v_add_f16_sdwa v14, v35, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v15, 0x200, v35 |
| ; VI-NEXT: v_or_b32_e32 v14, v15, v14 |
| ; VI-NEXT: v_add_f16_sdwa v15, v34, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v16, 0x200, v34 |
| ; VI-NEXT: v_or_b32_e32 v15, v16, v15 |
| ; VI-NEXT: v_add_f16_sdwa v16, v33, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v18, 0x200, v33 |
| ; VI-NEXT: v_or_b32_e32 v16, v18, v16 |
| ; VI-NEXT: v_add_f16_sdwa v17, v32, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v18, 0x200, v32 |
| ; VI-NEXT: v_or_b32_e32 v17, v18, v17 |
| ; VI-NEXT: .LBB17_4: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 ; 4-byte Folded Reload |
| ; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload |
| ; VI-NEXT: s_waitcnt vmcnt(0) |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v36f16_to_v18f32: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_mov_b32_e32 v32, v17 |
| ; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_mov_b32_e32 v33, v16 |
| ; GFX9-NEXT: v_mov_b32_e32 v41, v0 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v32 |
| ; GFX9-NEXT: v_mov_b32_e32 v34, v15 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33 |
| ; GFX9-NEXT: v_mov_b32_e32 v35, v14 |
| ; GFX9-NEXT: v_mov_b32_e32 v36, v13 |
| ; GFX9-NEXT: v_mov_b32_e32 v37, v12 |
| ; GFX9-NEXT: v_mov_b32_e32 v38, v11 |
| ; GFX9-NEXT: v_mov_b32_e32 v39, v10 |
| ; GFX9-NEXT: v_mov_b32_e32 v48, v9 |
| ; GFX9-NEXT: v_mov_b32_e32 v49, v8 |
| ; GFX9-NEXT: v_mov_b32_e32 v50, v7 |
| ; GFX9-NEXT: v_mov_b32_e32 v51, v6 |
| ; GFX9-NEXT: v_mov_b32_e32 v52, v5 |
| ; GFX9-NEXT: v_mov_b32_e32 v53, v4 |
| ; GFX9-NEXT: v_mov_b32_e32 v54, v3 |
| ; GFX9-NEXT: v_mov_b32_e32 v55, v2 |
| ; GFX9-NEXT: v_mov_b32_e32 v40, v1 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v36 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v37 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v38 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v39 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v48 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v49 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v50 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v51 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v52 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v53 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v54 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v55 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v40 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v41 |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill |
| ; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB17_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.false |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: s_mov_b32 s6, 0x5040100 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v35 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v34 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v33 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v32 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: v_perm_b32 v0, v45, v41, s6 |
| ; GFX9-NEXT: v_perm_b32 v1, v44, v40, s6 |
| ; GFX9-NEXT: v_perm_b32 v2, v43, v55, s6 |
| ; GFX9-NEXT: v_perm_b32 v3, v42, v54, s6 |
| ; GFX9-NEXT: v_perm_b32 v4, v63, v53, s6 |
| ; GFX9-NEXT: v_perm_b32 v5, v62, v52, s6 |
| ; GFX9-NEXT: v_perm_b32 v6, v61, v51, s6 |
| ; GFX9-NEXT: v_perm_b32 v7, v60, v50, s6 |
| ; GFX9-NEXT: v_perm_b32 v8, v59, v49, s6 |
| ; GFX9-NEXT: v_perm_b32 v9, v58, v48, s6 |
| ; GFX9-NEXT: v_perm_b32 v10, v57, v39, s6 |
| ; GFX9-NEXT: v_perm_b32 v11, v56, v38, s6 |
| ; GFX9-NEXT: v_perm_b32 v12, v47, v37, s6 |
| ; GFX9-NEXT: v_perm_b32 v13, v46, v36, s6 |
| ; GFX9-NEXT: v_perm_b32 v14, v14, v35, s6 |
| ; GFX9-NEXT: v_perm_b32 v15, v15, v34, s6 |
| ; GFX9-NEXT: v_perm_b32 v16, v16, v33, s6 |
| ; GFX9-NEXT: v_perm_b32 v17, v17, v32, s6 |
| ; GFX9-NEXT: ; implicit-def: $vgpr41 |
| ; GFX9-NEXT: ; implicit-def: $vgpr40 |
| ; GFX9-NEXT: ; implicit-def: $vgpr55 |
| ; GFX9-NEXT: ; implicit-def: $vgpr54 |
| ; GFX9-NEXT: ; implicit-def: $vgpr53 |
| ; GFX9-NEXT: ; implicit-def: $vgpr52 |
| ; GFX9-NEXT: ; implicit-def: $vgpr51 |
| ; GFX9-NEXT: ; implicit-def: $vgpr50 |
| ; GFX9-NEXT: ; implicit-def: $vgpr49 |
| ; GFX9-NEXT: ; implicit-def: $vgpr48 |
| ; GFX9-NEXT: ; implicit-def: $vgpr39 |
| ; GFX9-NEXT: ; implicit-def: $vgpr38 |
| ; GFX9-NEXT: ; implicit-def: $vgpr37 |
| ; GFX9-NEXT: ; implicit-def: $vgpr36 |
| ; GFX9-NEXT: ; implicit-def: $vgpr35 |
| ; GFX9-NEXT: ; implicit-def: $vgpr34 |
| ; GFX9-NEXT: ; implicit-def: $vgpr33 |
| ; GFX9-NEXT: ; implicit-def: $vgpr32 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr46 |
| ; GFX9-NEXT: ; implicit-def: $vgpr47 |
| ; GFX9-NEXT: ; implicit-def: $vgpr56 |
| ; GFX9-NEXT: ; implicit-def: $vgpr57 |
| ; GFX9-NEXT: ; implicit-def: $vgpr58 |
| ; GFX9-NEXT: ; implicit-def: $vgpr59 |
| ; GFX9-NEXT: ; implicit-def: $vgpr60 |
| ; GFX9-NEXT: ; implicit-def: $vgpr61 |
| ; GFX9-NEXT: ; implicit-def: $vgpr62 |
| ; GFX9-NEXT: ; implicit-def: $vgpr63 |
| ; GFX9-NEXT: ; implicit-def: $vgpr42 |
| ; GFX9-NEXT: ; implicit-def: $vgpr43 |
| ; GFX9-NEXT: ; implicit-def: $vgpr44 |
| ; GFX9-NEXT: ; implicit-def: $vgpr45 |
| ; GFX9-NEXT: .LBB17_2: ; %Flow |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB17_4 |
| ; GFX9-NEXT: ; %bb.3: ; %cmp.true |
| ; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload |
| ; GFX9-NEXT: s_mov_b32 s6, 0x5040100 |
| ; GFX9-NEXT: v_perm_b32 v0, v45, v41, s6 |
| ; GFX9-NEXT: s_movk_i32 s7, 0x200 |
| ; GFX9-NEXT: v_perm_b32 v1, v44, v40, s6 |
| ; GFX9-NEXT: v_perm_b32 v2, v43, v55, s6 |
| ; GFX9-NEXT: v_perm_b32 v3, v42, v54, s6 |
| ; GFX9-NEXT: v_perm_b32 v4, v63, v53, s6 |
| ; GFX9-NEXT: v_perm_b32 v5, v62, v52, s6 |
| ; GFX9-NEXT: v_perm_b32 v6, v61, v51, s6 |
| ; GFX9-NEXT: v_perm_b32 v7, v60, v50, s6 |
| ; GFX9-NEXT: v_perm_b32 v8, v59, v49, s6 |
| ; GFX9-NEXT: v_perm_b32 v9, v58, v48, s6 |
| ; GFX9-NEXT: v_perm_b32 v10, v57, v39, s6 |
| ; GFX9-NEXT: v_perm_b32 v11, v56, v38, s6 |
| ; GFX9-NEXT: v_perm_b32 v12, v47, v37, s6 |
| ; GFX9-NEXT: v_perm_b32 v13, v46, v36, s6 |
| ; GFX9-NEXT: v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v3, v3, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v4, v4, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v12, v12, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v13, v13, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: s_waitcnt vmcnt(3) |
| ; GFX9-NEXT: v_perm_b32 v14, v14, v35, s6 |
| ; GFX9-NEXT: s_waitcnt vmcnt(2) |
| ; GFX9-NEXT: v_perm_b32 v15, v15, v34, s6 |
| ; GFX9-NEXT: s_waitcnt vmcnt(1) |
| ; GFX9-NEXT: v_perm_b32 v16, v16, v33, s6 |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) |
| ; GFX9-NEXT: v_perm_b32 v17, v17, v32, s6 |
| ; GFX9-NEXT: v_pk_add_f16 v14, v14, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v15, v15, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v16, v16, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v17, v17, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: .LBB17_4: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v36f16_to_v18f32: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v0 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v36, 16, v3 |
| ; GFX11-NEXT: v_perm_b32 v4, v32, v4, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v0, v33, v0, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v1, v34, v1, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v2, v35, v2, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v3, v36, v3, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v5, v31, v5, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v6, v30, v6, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v7, v29, v7, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v8, v28, v8, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v9, v27, v9, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v10, v26, v10, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v11, v25, v11, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v12, v24, v12, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v13, v23, v13, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v14, v22, v14, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v15, v21, v15, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v16, v20, v16, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v17, v19, v17, 0x5040100 |
| ; GFX11-NEXT: s_mov_b32 s0, exec_lo |
| ; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v18 |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB17_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX11-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1] |
| ; GFX11-NEXT: .LBB17_2: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = fadd <36 x half> %a, splat (half 0xH0200) |
| %a2 = bitcast <36 x half> %a1 to <18 x float> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <36 x half> %a to <18 x float> |
| br label %end |
| |
| end: |
| %phi = phi <18 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <18 x float> %phi |
| } |
| |
| define <9 x double> @bitcast_v9i64_to_v9f64(<9 x i64> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v9i64_to_v9f64: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB18_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.true |
| ; GCN-NEXT: v_add_i32_e32 v0, vcc, 3, v0 |
| ; GCN-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc |
| ; GCN-NEXT: v_add_i32_e32 v2, vcc, 3, v2 |
| ; GCN-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc |
| ; GCN-NEXT: v_add_i32_e32 v4, vcc, 3, v4 |
| ; GCN-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc |
| ; GCN-NEXT: v_add_i32_e32 v6, vcc, 3, v6 |
| ; GCN-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc |
| ; GCN-NEXT: v_add_i32_e32 v8, vcc, 3, v8 |
| ; GCN-NEXT: v_addc_u32_e32 v9, vcc, 0, v9, vcc |
| ; GCN-NEXT: v_add_i32_e32 v10, vcc, 3, v10 |
| ; GCN-NEXT: v_addc_u32_e32 v11, vcc, 0, v11, vcc |
| ; GCN-NEXT: v_add_i32_e32 v12, vcc, 3, v12 |
| ; GCN-NEXT: v_addc_u32_e32 v13, vcc, 0, v13, vcc |
| ; GCN-NEXT: v_add_i32_e32 v14, vcc, 3, v14 |
| ; GCN-NEXT: v_addc_u32_e32 v15, vcc, 0, v15, vcc |
| ; GCN-NEXT: v_add_i32_e32 v16, vcc, 3, v16 |
| ; GCN-NEXT: v_addc_u32_e32 v17, vcc, 0, v17, vcc |
| ; GCN-NEXT: .LBB18_2: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v9i64_to_v9f64: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB18_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.true |
| ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 |
| ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc |
| ; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v2 |
| ; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc |
| ; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v4 |
| ; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc |
| ; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v6 |
| ; VI-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc |
| ; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v8 |
| ; VI-NEXT: v_addc_u32_e32 v9, vcc, 0, v9, vcc |
| ; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v10 |
| ; VI-NEXT: v_addc_u32_e32 v11, vcc, 0, v11, vcc |
| ; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v12 |
| ; VI-NEXT: v_addc_u32_e32 v13, vcc, 0, v13, vcc |
| ; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v14 |
| ; VI-NEXT: v_addc_u32_e32 v15, vcc, 0, v15, vcc |
| ; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v16 |
| ; VI-NEXT: v_addc_u32_e32 v17, vcc, 0, v17, vcc |
| ; VI-NEXT: .LBB18_2: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v9i64_to_v9f64: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB18_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, 3, v0 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, 3, v2 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v4, vcc, 3, v4 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v5, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v6, vcc, 3, v6 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v7, vcc, 0, v7, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v8, vcc, 3, v8 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v9, vcc, 0, v9, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v10, vcc, 3, v10 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v11, vcc, 0, v11, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v12, vcc, 3, v12 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v13, vcc, 0, v13, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v14, vcc, 3, v14 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v15, vcc, 0, v15, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v16, vcc, 3, v16 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v17, vcc, 0, v17, vcc |
| ; GFX9-NEXT: .LBB18_2: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v9i64_to_v9f64: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: s_mov_b32 s0, exec_lo |
| ; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v18 |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB18_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX11-NEXT: v_add_co_u32 v0, vcc_lo, v0, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v2, vcc_lo, v2, 3 |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, 0, v3, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v4, vcc_lo, v4, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v5, null, 0, v5, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v6, vcc_lo, v6, 3 |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v7, null, 0, v7, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v8, vcc_lo, v8, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v9, null, 0, v9, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v10, vcc_lo, v10, 3 |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v11, null, 0, v11, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v12, vcc_lo, v12, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v13, null, 0, v13, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v14, vcc_lo, v14, 3 |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v15, null, 0, v15, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v16, vcc_lo, v16, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v17, null, 0, v17, vcc_lo |
| ; GFX11-NEXT: .LBB18_2: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = add <9 x i64> %a, splat (i64 3) |
| %a2 = bitcast <9 x i64> %a1 to <9 x double> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <9 x i64> %a to <9 x double> |
| br label %end |
| |
| end: |
| %phi = phi <9 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <9 x double> %phi |
| } |
| |
| define <9 x i64> @bitcast_v9f64_to_v9i64(<9 x double> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v9f64_to_v9i64: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB19_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.true |
| ; GCN-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 |
| ; GCN-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 |
| ; GCN-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 |
| ; GCN-NEXT: v_add_f64 v[6:7], v[6:7], 1.0 |
| ; GCN-NEXT: v_add_f64 v[8:9], v[8:9], 1.0 |
| ; GCN-NEXT: v_add_f64 v[10:11], v[10:11], 1.0 |
| ; GCN-NEXT: v_add_f64 v[12:13], v[12:13], 1.0 |
| ; GCN-NEXT: v_add_f64 v[14:15], v[14:15], 1.0 |
| ; GCN-NEXT: v_add_f64 v[16:17], v[16:17], 1.0 |
| ; GCN-NEXT: .LBB19_2: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v9f64_to_v9i64: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB19_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.true |
| ; VI-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 |
| ; VI-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 |
| ; VI-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 |
| ; VI-NEXT: v_add_f64 v[6:7], v[6:7], 1.0 |
| ; VI-NEXT: v_add_f64 v[8:9], v[8:9], 1.0 |
| ; VI-NEXT: v_add_f64 v[10:11], v[10:11], 1.0 |
| ; VI-NEXT: v_add_f64 v[12:13], v[12:13], 1.0 |
| ; VI-NEXT: v_add_f64 v[14:15], v[14:15], 1.0 |
| ; VI-NEXT: v_add_f64 v[16:17], v[16:17], 1.0 |
| ; VI-NEXT: .LBB19_2: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v9f64_to_v9i64: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB19_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX9-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[6:7], v[6:7], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[8:9], v[8:9], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[10:11], v[10:11], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[12:13], v[12:13], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[14:15], v[14:15], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[16:17], v[16:17], 1.0 |
| ; GFX9-NEXT: .LBB19_2: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v9f64_to_v9i64: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: s_mov_b32 s0, exec_lo |
| ; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v18 |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB19_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX11-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[6:7], v[6:7], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[8:9], v[8:9], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[10:11], v[10:11], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[12:13], v[12:13], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[14:15], v[14:15], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[16:17], v[16:17], 1.0 |
| ; GFX11-NEXT: .LBB19_2: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = fadd <9 x double> %a, splat (double 1.000000e+00) |
| %a2 = bitcast <9 x double> %a1 to <9 x i64> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <9 x double> %a to <9 x i64> |
| br label %end |
| |
| end: |
| %phi = phi <9 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <9 x i64> %phi |
| } |
| |
| define <36 x i16> @bitcast_v9i64_to_v36i16(<9 x i64> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v9i64_to_v36i16: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v19 |
| ; GCN-NEXT: ; implicit-def: $vgpr33 |
| ; GCN-NEXT: ; implicit-def: $vgpr36 |
| ; GCN-NEXT: ; implicit-def: $vgpr31 |
| ; GCN-NEXT: ; implicit-def: $vgpr35 |
| ; GCN-NEXT: ; implicit-def: $vgpr29 |
| ; GCN-NEXT: ; implicit-def: $vgpr34 |
| ; GCN-NEXT: ; implicit-def: $vgpr26 |
| ; GCN-NEXT: ; implicit-def: $vgpr32 |
| ; GCN-NEXT: ; implicit-def: $vgpr24 |
| ; GCN-NEXT: ; implicit-def: $vgpr30 |
| ; GCN-NEXT: ; implicit-def: $vgpr22 |
| ; GCN-NEXT: ; implicit-def: $vgpr28 |
| ; GCN-NEXT: ; implicit-def: $vgpr21 |
| ; GCN-NEXT: ; implicit-def: $vgpr27 |
| ; GCN-NEXT: ; implicit-def: $vgpr20 |
| ; GCN-NEXT: ; implicit-def: $vgpr25 |
| ; GCN-NEXT: ; implicit-def: $vgpr19 |
| ; GCN-NEXT: ; implicit-def: $vgpr23 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB20_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.false |
| ; GCN-NEXT: v_alignbit_b32 v19, v18, v17, 16 |
| ; GCN-NEXT: v_alignbit_b32 v20, v16, v15, 16 |
| ; GCN-NEXT: v_alignbit_b32 v21, v14, v13, 16 |
| ; GCN-NEXT: v_alignbit_b32 v22, v12, v11, 16 |
| ; GCN-NEXT: v_alignbit_b32 v24, v10, v9, 16 |
| ; GCN-NEXT: v_alignbit_b32 v26, v8, v7, 16 |
| ; GCN-NEXT: v_alignbit_b32 v29, v6, v5, 16 |
| ; GCN-NEXT: v_alignbit_b32 v31, v4, v3, 16 |
| ; GCN-NEXT: v_alignbit_b32 v33, v2, v1, 16 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v23, 16, v18 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v25, 16, v16 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v27, 16, v14 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v28, 16, v12 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v30, 16, v10 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v32, 16, v8 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v34, 16, v6 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v35, 16, v4 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v36, 16, v2 |
| ; GCN-NEXT: .LBB20_2: ; %Flow |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB20_4 |
| ; GCN-NEXT: ; %bb.3: ; %cmp.true |
| ; GCN-NEXT: v_add_i32_e32 v1, vcc, 3, v1 |
| ; GCN-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc |
| ; GCN-NEXT: v_add_i32_e32 v3, vcc, 3, v3 |
| ; GCN-NEXT: v_addc_u32_e32 v4, vcc, 0, v4, vcc |
| ; GCN-NEXT: v_add_i32_e32 v5, vcc, 3, v5 |
| ; GCN-NEXT: v_addc_u32_e32 v6, vcc, 0, v6, vcc |
| ; GCN-NEXT: v_add_i32_e32 v7, vcc, 3, v7 |
| ; GCN-NEXT: v_addc_u32_e32 v8, vcc, 0, v8, vcc |
| ; GCN-NEXT: v_add_i32_e32 v9, vcc, 3, v9 |
| ; GCN-NEXT: v_addc_u32_e32 v10, vcc, 0, v10, vcc |
| ; GCN-NEXT: v_add_i32_e32 v11, vcc, 3, v11 |
| ; GCN-NEXT: v_addc_u32_e32 v12, vcc, 0, v12, vcc |
| ; GCN-NEXT: v_add_i32_e32 v13, vcc, 3, v13 |
| ; GCN-NEXT: v_addc_u32_e32 v14, vcc, 0, v14, vcc |
| ; GCN-NEXT: v_add_i32_e32 v15, vcc, 3, v15 |
| ; GCN-NEXT: v_addc_u32_e32 v16, vcc, 0, v16, vcc |
| ; GCN-NEXT: v_add_i32_e32 v17, vcc, 3, v17 |
| ; GCN-NEXT: v_addc_u32_e32 v18, vcc, 0, v18, vcc |
| ; GCN-NEXT: v_alignbit_b32 v19, v18, v17, 16 |
| ; GCN-NEXT: v_alignbit_b32 v20, v16, v15, 16 |
| ; GCN-NEXT: v_alignbit_b32 v21, v14, v13, 16 |
| ; GCN-NEXT: v_alignbit_b32 v22, v12, v11, 16 |
| ; GCN-NEXT: v_alignbit_b32 v24, v10, v9, 16 |
| ; GCN-NEXT: v_alignbit_b32 v26, v8, v7, 16 |
| ; GCN-NEXT: v_alignbit_b32 v29, v6, v5, 16 |
| ; GCN-NEXT: v_alignbit_b32 v31, v4, v3, 16 |
| ; GCN-NEXT: v_alignbit_b32 v33, v2, v1, 16 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v23, 16, v18 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v25, 16, v16 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v27, 16, v14 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v28, 16, v12 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v30, 16, v10 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v32, 16, v8 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v34, 16, v6 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v35, 16, v4 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v36, 16, v2 |
| ; GCN-NEXT: .LBB20_4: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: v_and_b32_e32 v1, 0xffff, v1 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v33, 16, v33 |
| ; GCN-NEXT: v_or_b32_e32 v1, v1, v33 |
| ; GCN-NEXT: v_and_b32_e32 v2, 0xffff, v2 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v33, 16, v36 |
| ; GCN-NEXT: v_or_b32_e32 v2, v2, v33 |
| ; GCN-NEXT: v_add_i32_e32 v33, vcc, 4, v0 |
| ; GCN-NEXT: v_and_b32_e32 v3, 0xffff, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v31, 16, v31 |
| ; GCN-NEXT: v_or_b32_e32 v3, v3, v31 |
| ; GCN-NEXT: v_add_i32_e32 v31, vcc, 8, v0 |
| ; GCN-NEXT: v_and_b32_e32 v4, 0xffff, v4 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v35, 16, v35 |
| ; GCN-NEXT: v_or_b32_e32 v4, v4, v35 |
| ; GCN-NEXT: v_add_i32_e32 v35, vcc, 12, v0 |
| ; GCN-NEXT: v_and_b32_e32 v5, 0xffff, v5 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v29, 16, v29 |
| ; GCN-NEXT: v_or_b32_e32 v5, v5, v29 |
| ; GCN-NEXT: v_add_i32_e32 v29, vcc, 16, v0 |
| ; GCN-NEXT: v_and_b32_e32 v6, 0xffff, v6 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v34, 16, v34 |
| ; GCN-NEXT: v_or_b32_e32 v6, v6, v34 |
| ; GCN-NEXT: v_add_i32_e32 v34, vcc, 20, v0 |
| ; GCN-NEXT: v_and_b32_e32 v7, 0xffff, v7 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v26, 16, v26 |
| ; GCN-NEXT: v_or_b32_e32 v7, v7, v26 |
| ; GCN-NEXT: v_add_i32_e32 v26, vcc, 24, v0 |
| ; GCN-NEXT: v_and_b32_e32 v8, 0xffff, v8 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v32, 16, v32 |
| ; GCN-NEXT: v_or_b32_e32 v8, v8, v32 |
| ; GCN-NEXT: v_add_i32_e32 v32, vcc, 28, v0 |
| ; GCN-NEXT: v_and_b32_e32 v9, 0xffff, v9 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v24, 16, v24 |
| ; GCN-NEXT: v_or_b32_e32 v9, v9, v24 |
| ; GCN-NEXT: v_add_i32_e32 v24, vcc, 32, v0 |
| ; GCN-NEXT: v_and_b32_e32 v10, 0xffff, v10 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v30, 16, v30 |
| ; GCN-NEXT: v_or_b32_e32 v10, v10, v30 |
| ; GCN-NEXT: v_add_i32_e32 v30, vcc, 36, v0 |
| ; GCN-NEXT: v_and_b32_e32 v11, 0xffff, v11 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v22, 16, v22 |
| ; GCN-NEXT: v_or_b32_e32 v11, v11, v22 |
| ; GCN-NEXT: v_add_i32_e32 v22, vcc, 40, v0 |
| ; GCN-NEXT: v_and_b32_e32 v12, 0xffff, v12 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v28, 16, v28 |
| ; GCN-NEXT: v_or_b32_e32 v12, v12, v28 |
| ; GCN-NEXT: v_add_i32_e32 v28, vcc, 44, v0 |
| ; GCN-NEXT: v_and_b32_e32 v13, 0xffff, v13 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v21, 16, v21 |
| ; GCN-NEXT: v_or_b32_e32 v13, v13, v21 |
| ; GCN-NEXT: v_add_i32_e32 v21, vcc, 48, v0 |
| ; GCN-NEXT: v_and_b32_e32 v14, 0xffff, v14 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v27, 16, v27 |
| ; GCN-NEXT: v_or_b32_e32 v14, v14, v27 |
| ; GCN-NEXT: v_add_i32_e32 v27, vcc, 52, v0 |
| ; GCN-NEXT: v_and_b32_e32 v15, 0xffff, v15 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v20, 16, v20 |
| ; GCN-NEXT: v_or_b32_e32 v15, v15, v20 |
| ; GCN-NEXT: v_add_i32_e32 v20, vcc, 56, v0 |
| ; GCN-NEXT: v_and_b32_e32 v16, 0xffff, v16 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v25, 16, v25 |
| ; GCN-NEXT: v_or_b32_e32 v16, v16, v25 |
| ; GCN-NEXT: v_add_i32_e32 v25, vcc, 60, v0 |
| ; GCN-NEXT: v_and_b32_e32 v17, 0xffff, v17 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v19, 16, v19 |
| ; GCN-NEXT: v_or_b32_e32 v17, v17, v19 |
| ; GCN-NEXT: v_add_i32_e32 v19, vcc, 64, v0 |
| ; GCN-NEXT: v_and_b32_e32 v18, 0xffff, v18 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v23, 16, v23 |
| ; GCN-NEXT: v_or_b32_e32 v18, v18, v23 |
| ; GCN-NEXT: v_add_i32_e32 v23, vcc, 0x44, v0 |
| ; GCN-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v2, v33, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v3, v31, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v4, v35, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v5, v29, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v6, v34, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v7, v26, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v8, v32, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v9, v24, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v10, v30, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v11, v22, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v12, v28, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v13, v21, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v14, v27, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v15, v20, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v16, v25, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v17, v19, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v18, v23, s[0:3], 0 offen |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v9i64_to_v36i16: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: ; implicit-def: $vgpr35 |
| ; VI-NEXT: ; implicit-def: $vgpr34 |
| ; VI-NEXT: ; implicit-def: $vgpr33 |
| ; VI-NEXT: ; implicit-def: $vgpr32 |
| ; VI-NEXT: ; implicit-def: $vgpr31 |
| ; VI-NEXT: ; implicit-def: $vgpr30 |
| ; VI-NEXT: ; implicit-def: $vgpr29 |
| ; VI-NEXT: ; implicit-def: $vgpr28 |
| ; VI-NEXT: ; implicit-def: $vgpr27 |
| ; VI-NEXT: ; implicit-def: $vgpr26 |
| ; VI-NEXT: ; implicit-def: $vgpr25 |
| ; VI-NEXT: ; implicit-def: $vgpr24 |
| ; VI-NEXT: ; implicit-def: $vgpr23 |
| ; VI-NEXT: ; implicit-def: $vgpr22 |
| ; VI-NEXT: ; implicit-def: $vgpr21 |
| ; VI-NEXT: ; implicit-def: $vgpr20 |
| ; VI-NEXT: ; implicit-def: $vgpr19 |
| ; VI-NEXT: ; implicit-def: $vgpr18 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB20_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.false |
| ; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; VI-NEXT: .LBB20_2: ; %Flow |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB20_4 |
| ; VI-NEXT: ; %bb.3: ; %cmp.true |
| ; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v16 |
| ; VI-NEXT: v_addc_u32_e32 v17, vcc, 0, v17, vcc |
| ; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v14 |
| ; VI-NEXT: v_addc_u32_e32 v15, vcc, 0, v15, vcc |
| ; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v12 |
| ; VI-NEXT: v_addc_u32_e32 v13, vcc, 0, v13, vcc |
| ; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v10 |
| ; VI-NEXT: v_addc_u32_e32 v11, vcc, 0, v11, vcc |
| ; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v8 |
| ; VI-NEXT: v_addc_u32_e32 v9, vcc, 0, v9, vcc |
| ; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v6 |
| ; VI-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc |
| ; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v4 |
| ; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc |
| ; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v2 |
| ; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc |
| ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 |
| ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc |
| ; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; VI-NEXT: .LBB20_4: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 |
| ; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 |
| ; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 |
| ; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 |
| ; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 |
| ; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 |
| ; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 |
| ; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 |
| ; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 |
| ; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 |
| ; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 |
| ; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 |
| ; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 |
| ; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 |
| ; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 |
| ; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 |
| ; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 |
| ; VI-NEXT: v_or_b32_sdwa v0, v0, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v1, v1, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v2, v2, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v3, v3, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v4, v4, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v5, v5, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v6, v6, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v7, v7, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v8, v8, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v9, v9, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v10, v10, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v11, v11, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v12, v12, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v13, v13, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v14, v14, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v15, v15, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v16, v16, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v17, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v9i64_to_v36i16: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr35 |
| ; GFX9-NEXT: ; implicit-def: $vgpr34 |
| ; GFX9-NEXT: ; implicit-def: $vgpr33 |
| ; GFX9-NEXT: ; implicit-def: $vgpr32 |
| ; GFX9-NEXT: ; implicit-def: $vgpr31 |
| ; GFX9-NEXT: ; implicit-def: $vgpr30 |
| ; GFX9-NEXT: ; implicit-def: $vgpr29 |
| ; GFX9-NEXT: ; implicit-def: $vgpr28 |
| ; GFX9-NEXT: ; implicit-def: $vgpr27 |
| ; GFX9-NEXT: ; implicit-def: $vgpr26 |
| ; GFX9-NEXT: ; implicit-def: $vgpr25 |
| ; GFX9-NEXT: ; implicit-def: $vgpr24 |
| ; GFX9-NEXT: ; implicit-def: $vgpr23 |
| ; GFX9-NEXT: ; implicit-def: $vgpr22 |
| ; GFX9-NEXT: ; implicit-def: $vgpr21 |
| ; GFX9-NEXT: ; implicit-def: $vgpr20 |
| ; GFX9-NEXT: ; implicit-def: $vgpr19 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB20_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.false |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX9-NEXT: .LBB20_2: ; %Flow |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB20_4 |
| ; GFX9-NEXT: ; %bb.3: ; %cmp.true |
| ; GFX9-NEXT: v_add_co_u32_e32 v16, vcc, 3, v16 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v17, vcc, 0, v17, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v14, vcc, 3, v14 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v15, vcc, 0, v15, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v12, vcc, 3, v12 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v13, vcc, 0, v13, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v10, vcc, 3, v10 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v11, vcc, 0, v11, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v8, vcc, 3, v8 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v9, vcc, 0, v9, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v6, vcc, 3, v6 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v7, vcc, 0, v7, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v4, vcc, 3, v4 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v5, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, 3, v2 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, 3, v0 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX9-NEXT: .LBB20_4: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: s_mov_b32 s4, 0x5040100 |
| ; GFX9-NEXT: v_perm_b32 v0, v35, v0, s4 |
| ; GFX9-NEXT: v_perm_b32 v1, v34, v1, s4 |
| ; GFX9-NEXT: v_perm_b32 v2, v33, v2, s4 |
| ; GFX9-NEXT: v_perm_b32 v3, v32, v3, s4 |
| ; GFX9-NEXT: v_perm_b32 v4, v31, v4, s4 |
| ; GFX9-NEXT: v_perm_b32 v5, v30, v5, s4 |
| ; GFX9-NEXT: v_perm_b32 v6, v29, v6, s4 |
| ; GFX9-NEXT: v_perm_b32 v7, v28, v7, s4 |
| ; GFX9-NEXT: v_perm_b32 v8, v27, v8, s4 |
| ; GFX9-NEXT: v_perm_b32 v9, v26, v9, s4 |
| ; GFX9-NEXT: v_perm_b32 v10, v25, v10, s4 |
| ; GFX9-NEXT: v_perm_b32 v11, v24, v11, s4 |
| ; GFX9-NEXT: v_perm_b32 v12, v23, v12, s4 |
| ; GFX9-NEXT: v_perm_b32 v13, v22, v13, s4 |
| ; GFX9-NEXT: v_perm_b32 v14, v21, v14, s4 |
| ; GFX9-NEXT: v_perm_b32 v15, v20, v15, s4 |
| ; GFX9-NEXT: v_perm_b32 v16, v19, v16, s4 |
| ; GFX9-NEXT: v_perm_b32 v17, v18, v17, s4 |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v9i64_to_v36i16: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v18 |
| ; GFX11-NEXT: ; implicit-def: $vgpr35 |
| ; GFX11-NEXT: ; implicit-def: $vgpr34 |
| ; GFX11-NEXT: ; implicit-def: $vgpr33 |
| ; GFX11-NEXT: ; implicit-def: $vgpr32 |
| ; GFX11-NEXT: ; implicit-def: $vgpr31 |
| ; GFX11-NEXT: ; implicit-def: $vgpr30 |
| ; GFX11-NEXT: ; implicit-def: $vgpr29 |
| ; GFX11-NEXT: ; implicit-def: $vgpr28 |
| ; GFX11-NEXT: ; implicit-def: $vgpr27 |
| ; GFX11-NEXT: ; implicit-def: $vgpr26 |
| ; GFX11-NEXT: ; implicit-def: $vgpr25 |
| ; GFX11-NEXT: ; implicit-def: $vgpr24 |
| ; GFX11-NEXT: ; implicit-def: $vgpr23 |
| ; GFX11-NEXT: ; implicit-def: $vgpr22 |
| ; GFX11-NEXT: ; implicit-def: $vgpr21 |
| ; GFX11-NEXT: ; implicit-def: $vgpr20 |
| ; GFX11-NEXT: ; implicit-def: $vgpr19 |
| ; GFX11-NEXT: ; implicit-def: $vgpr18 |
| ; GFX11-NEXT: s_and_saveexec_b32 s0, vcc_lo |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB20_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.false |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX11-NEXT: .LBB20_2: ; %Flow |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB20_4 |
| ; GFX11-NEXT: ; %bb.3: ; %cmp.true |
| ; GFX11-NEXT: v_add_co_u32 v16, vcc_lo, v16, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v17, null, 0, v17, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v14, vcc_lo, v14, 3 |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v15, null, 0, v15, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v12, vcc_lo, v12, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v13, null, 0, v13, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v10, vcc_lo, v10, 3 |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v11, null, 0, v11, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v8, vcc_lo, v8, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v9, null, 0, v9, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v6, vcc_lo, v6, 3 |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v7, null, 0, v7, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v4, vcc_lo, v4, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v5, null, 0, v5, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v2, vcc_lo, v2, 3 |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, 0, v3, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v0, vcc_lo, v0, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX11-NEXT: .LBB20_4: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) |
| ; GFX11-NEXT: v_perm_b32 v0, v35, v0, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v1, v34, v1, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v2, v33, v2, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v3, v32, v3, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v4, v31, v4, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v5, v30, v5, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v6, v29, v6, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v7, v28, v7, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v8, v27, v8, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v9, v26, v9, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v10, v25, v10, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v11, v24, v11, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v12, v23, v12, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v13, v22, v13, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v14, v21, v14, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v15, v20, v15, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v16, v19, v16, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v17, v18, v17, 0x5040100 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = add <9 x i64> %a, splat (i64 3) |
| %a2 = bitcast <9 x i64> %a1 to <36 x i16> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <9 x i64> %a to <36 x i16> |
| br label %end |
| |
| end: |
| %phi = phi <36 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <36 x i16> %phi |
| } |
| |
| define <9 x i64> @bitcast_v36i16_to_v9i64(<36 x i16> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v36i16_to_v9i64: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_mov_b32_e32 v34, v26 |
| ; GCN-NEXT: v_mov_b32_e32 v35, v24 |
| ; GCN-NEXT: v_mov_b32_e32 v36, v22 |
| ; GCN-NEXT: v_mov_b32_e32 v37, v20 |
| ; GCN-NEXT: v_mov_b32_e32 v38, v18 |
| ; GCN-NEXT: v_mov_b32_e32 v39, v16 |
| ; GCN-NEXT: v_mov_b32_e32 v48, v14 |
| ; GCN-NEXT: v_mov_b32_e32 v49, v12 |
| ; GCN-NEXT: v_mov_b32_e32 v50, v10 |
| ; GCN-NEXT: v_mov_b32_e32 v51, v8 |
| ; GCN-NEXT: v_mov_b32_e32 v52, v6 |
| ; GCN-NEXT: v_mov_b32_e32 v53, v4 |
| ; GCN-NEXT: v_mov_b32_e32 v54, v2 |
| ; GCN-NEXT: v_mov_b32_e32 v55, v0 |
| ; GCN-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:16 |
| ; GCN-NEXT: s_waitcnt expcnt(3) |
| ; GCN-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:12 |
| ; GCN-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:8 |
| ; GCN-NEXT: s_waitcnt expcnt(2) |
| ; GCN-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:4 |
| ; GCN-NEXT: buffer_load_dword v4, off, s[0:3], s32 |
| ; GCN-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:20 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v40, 16, v1 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v41, 16, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v33, 16, v5 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v32, 16, v7 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v9 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v11 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_lshlrev_b32_e32 v42, 16, v13 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v43, 16, v15 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v44, 16, v17 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v45, 16, v19 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v46, 16, v21 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v47, 16, v23 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v56, 16, v25 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v57, 16, v27 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v58, 16, v29 |
| ; GCN-NEXT: s_waitcnt vmcnt(2) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v59, 16, v4 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v60, 16, v2 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v61, 16, v0 |
| ; GCN-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB21_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.false |
| ; GCN-NEXT: v_and_b32_e32 v0, 0xffff, v55 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_and_b32_e32 v1, 0xffff, v54 |
| ; GCN-NEXT: v_or_b32_e32 v0, v0, v40 |
| ; GCN-NEXT: v_or_b32_e32 v1, v1, v41 |
| ; GCN-NEXT: v_and_b32_e32 v2, 0xffff, v53 |
| ; GCN-NEXT: v_or_b32_e32 v2, v2, v33 |
| ; GCN-NEXT: v_and_b32_e32 v3, 0xffff, v52 |
| ; GCN-NEXT: v_or_b32_e32 v3, v3, v32 |
| ; GCN-NEXT: v_and_b32_e32 v4, 0xffff, v51 |
| ; GCN-NEXT: v_and_b32_e32 v5, 0xffff, v50 |
| ; GCN-NEXT: v_and_b32_e32 v6, 0xffff, v49 |
| ; GCN-NEXT: v_and_b32_e32 v7, 0xffff, v48 |
| ; GCN-NEXT: v_and_b32_e32 v8, 0xffff, v39 |
| ; GCN-NEXT: v_and_b32_e32 v9, 0xffff, v38 |
| ; GCN-NEXT: v_and_b32_e32 v10, 0xffff, v37 |
| ; GCN-NEXT: v_and_b32_e32 v11, 0xffff, v36 |
| ; GCN-NEXT: v_and_b32_e32 v12, 0xffff, v35 |
| ; GCN-NEXT: v_and_b32_e32 v13, 0xffff, v34 |
| ; GCN-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_and_b32_e32 v14, 0xffff, v14 |
| ; GCN-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_and_b32_e32 v15, 0xffff, v15 |
| ; GCN-NEXT: v_and_b32_e32 v16, 0xffff, v63 |
| ; GCN-NEXT: v_and_b32_e32 v17, 0xffff, v62 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v4, v4, v18 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v5, v5, v18 |
| ; GCN-NEXT: v_or_b32_e32 v6, v6, v42 |
| ; GCN-NEXT: v_or_b32_e32 v7, v7, v43 |
| ; GCN-NEXT: v_or_b32_e32 v8, v8, v44 |
| ; GCN-NEXT: v_or_b32_e32 v9, v9, v45 |
| ; GCN-NEXT: v_or_b32_e32 v10, v10, v46 |
| ; GCN-NEXT: v_or_b32_e32 v11, v11, v47 |
| ; GCN-NEXT: v_or_b32_e32 v12, v12, v56 |
| ; GCN-NEXT: v_or_b32_e32 v13, v13, v57 |
| ; GCN-NEXT: v_or_b32_e32 v14, v14, v58 |
| ; GCN-NEXT: v_or_b32_e32 v15, v15, v59 |
| ; GCN-NEXT: v_or_b32_e32 v16, v16, v60 |
| ; GCN-NEXT: v_or_b32_e32 v17, v17, v61 |
| ; GCN-NEXT: ; implicit-def: $vgpr55 |
| ; GCN-NEXT: ; implicit-def: $vgpr54 |
| ; GCN-NEXT: ; implicit-def: $vgpr53 |
| ; GCN-NEXT: ; implicit-def: $vgpr52 |
| ; GCN-NEXT: ; implicit-def: $vgpr51 |
| ; GCN-NEXT: ; implicit-def: $vgpr50 |
| ; GCN-NEXT: ; implicit-def: $vgpr49 |
| ; GCN-NEXT: ; implicit-def: $vgpr48 |
| ; GCN-NEXT: ; implicit-def: $vgpr39 |
| ; GCN-NEXT: ; implicit-def: $vgpr38 |
| ; GCN-NEXT: ; implicit-def: $vgpr37 |
| ; GCN-NEXT: ; implicit-def: $vgpr36 |
| ; GCN-NEXT: ; implicit-def: $vgpr35 |
| ; GCN-NEXT: ; implicit-def: $vgpr34 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr63 |
| ; GCN-NEXT: ; implicit-def: $vgpr62 |
| ; GCN-NEXT: ; implicit-def: $vgpr40 |
| ; GCN-NEXT: ; implicit-def: $vgpr41 |
| ; GCN-NEXT: ; implicit-def: $vgpr33 |
| ; GCN-NEXT: ; implicit-def: $vgpr32 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr42 |
| ; GCN-NEXT: ; implicit-def: $vgpr43 |
| ; GCN-NEXT: ; implicit-def: $vgpr44 |
| ; GCN-NEXT: ; implicit-def: $vgpr45 |
| ; GCN-NEXT: ; implicit-def: $vgpr46 |
| ; GCN-NEXT: ; implicit-def: $vgpr47 |
| ; GCN-NEXT: ; implicit-def: $vgpr56 |
| ; GCN-NEXT: ; implicit-def: $vgpr57 |
| ; GCN-NEXT: ; implicit-def: $vgpr58 |
| ; GCN-NEXT: ; implicit-def: $vgpr59 |
| ; GCN-NEXT: ; implicit-def: $vgpr60 |
| ; GCN-NEXT: ; implicit-def: $vgpr61 |
| ; GCN-NEXT: .LBB21_2: ; %Flow |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB21_4 |
| ; GCN-NEXT: ; %bb.3: ; %cmp.true |
| ; GCN-NEXT: v_add_i32_e32 v0, vcc, 3, v55 |
| ; GCN-NEXT: s_mov_b32 s6, 0x30000 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_add_i32_e32 v1, vcc, 3, v54 |
| ; GCN-NEXT: v_add_i32_e32 v2, vcc, 3, v53 |
| ; GCN-NEXT: v_add_i32_e32 v3, vcc, 3, v52 |
| ; GCN-NEXT: v_add_i32_e32 v4, vcc, 3, v51 |
| ; GCN-NEXT: v_add_i32_e32 v5, vcc, 3, v50 |
| ; GCN-NEXT: v_add_i32_e32 v6, vcc, 3, v49 |
| ; GCN-NEXT: v_add_i32_e32 v7, vcc, 3, v48 |
| ; GCN-NEXT: v_add_i32_e32 v8, vcc, 3, v39 |
| ; GCN-NEXT: v_add_i32_e32 v9, vcc, 3, v38 |
| ; GCN-NEXT: v_add_i32_e32 v10, vcc, 3, v37 |
| ; GCN-NEXT: v_add_i32_e32 v11, vcc, 3, v36 |
| ; GCN-NEXT: v_add_i32_e32 v12, vcc, 3, v35 |
| ; GCN-NEXT: v_add_i32_e32 v13, vcc, 3, v34 |
| ; GCN-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_add_i32_e32 v14, vcc, 3, v14 |
| ; GCN-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_add_i32_e32 v15, vcc, 3, v15 |
| ; GCN-NEXT: v_add_i32_e32 v16, vcc, 3, v63 |
| ; GCN-NEXT: v_add_i32_e32 v17, vcc, 3, v62 |
| ; GCN-NEXT: v_and_b32_e32 v0, 0xffff, v0 |
| ; GCN-NEXT: v_and_b32_e32 v1, 0xffff, v1 |
| ; GCN-NEXT: v_and_b32_e32 v2, 0xffff, v2 |
| ; GCN-NEXT: v_and_b32_e32 v3, 0xffff, v3 |
| ; GCN-NEXT: v_and_b32_e32 v4, 0xffff, v4 |
| ; GCN-NEXT: v_and_b32_e32 v5, 0xffff, v5 |
| ; GCN-NEXT: v_and_b32_e32 v6, 0xffff, v6 |
| ; GCN-NEXT: v_and_b32_e32 v7, 0xffff, v7 |
| ; GCN-NEXT: v_and_b32_e32 v8, 0xffff, v8 |
| ; GCN-NEXT: v_and_b32_e32 v9, 0xffff, v9 |
| ; GCN-NEXT: v_and_b32_e32 v10, 0xffff, v10 |
| ; GCN-NEXT: v_and_b32_e32 v11, 0xffff, v11 |
| ; GCN-NEXT: v_and_b32_e32 v12, 0xffff, v12 |
| ; GCN-NEXT: v_and_b32_e32 v13, 0xffff, v13 |
| ; GCN-NEXT: v_and_b32_e32 v14, 0xffff, v14 |
| ; GCN-NEXT: v_and_b32_e32 v15, 0xffff, v15 |
| ; GCN-NEXT: v_and_b32_e32 v16, 0xffff, v16 |
| ; GCN-NEXT: v_and_b32_e32 v17, 0xffff, v17 |
| ; GCN-NEXT: v_or_b32_e32 v0, v40, v0 |
| ; GCN-NEXT: v_or_b32_e32 v1, v41, v1 |
| ; GCN-NEXT: v_or_b32_e32 v2, v33, v2 |
| ; GCN-NEXT: v_or_b32_e32 v3, v32, v3 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v4, v18, v4 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v5, v18, v5 |
| ; GCN-NEXT: v_or_b32_e32 v6, v42, v6 |
| ; GCN-NEXT: v_or_b32_e32 v7, v43, v7 |
| ; GCN-NEXT: v_or_b32_e32 v8, v44, v8 |
| ; GCN-NEXT: v_or_b32_e32 v9, v45, v9 |
| ; GCN-NEXT: v_or_b32_e32 v10, v46, v10 |
| ; GCN-NEXT: v_or_b32_e32 v11, v47, v11 |
| ; GCN-NEXT: v_or_b32_e32 v12, v56, v12 |
| ; GCN-NEXT: v_or_b32_e32 v13, v57, v13 |
| ; GCN-NEXT: v_or_b32_e32 v14, v58, v14 |
| ; GCN-NEXT: v_or_b32_e32 v15, v59, v15 |
| ; GCN-NEXT: v_or_b32_e32 v16, v60, v16 |
| ; GCN-NEXT: v_or_b32_e32 v17, v61, v17 |
| ; GCN-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0 |
| ; GCN-NEXT: v_add_i32_e32 v1, vcc, s6, v1 |
| ; GCN-NEXT: v_add_i32_e32 v2, vcc, s6, v2 |
| ; GCN-NEXT: v_add_i32_e32 v3, vcc, s6, v3 |
| ; GCN-NEXT: v_add_i32_e32 v4, vcc, s6, v4 |
| ; GCN-NEXT: v_add_i32_e32 v5, vcc, s6, v5 |
| ; GCN-NEXT: v_add_i32_e32 v6, vcc, s6, v6 |
| ; GCN-NEXT: v_add_i32_e32 v7, vcc, s6, v7 |
| ; GCN-NEXT: v_add_i32_e32 v8, vcc, s6, v8 |
| ; GCN-NEXT: v_add_i32_e32 v9, vcc, s6, v9 |
| ; GCN-NEXT: v_add_i32_e32 v10, vcc, s6, v10 |
| ; GCN-NEXT: v_add_i32_e32 v11, vcc, s6, v11 |
| ; GCN-NEXT: v_add_i32_e32 v12, vcc, s6, v12 |
| ; GCN-NEXT: v_add_i32_e32 v13, vcc, s6, v13 |
| ; GCN-NEXT: v_add_i32_e32 v14, vcc, s6, v14 |
| ; GCN-NEXT: v_add_i32_e32 v15, vcc, s6, v15 |
| ; GCN-NEXT: v_add_i32_e32 v16, vcc, s6, v16 |
| ; GCN-NEXT: v_add_i32_e32 v17, vcc, s6, v17 |
| ; GCN-NEXT: .LBB21_4: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v36i16_to_v9i64: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill |
| ; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 ; 4-byte Folded Spill |
| ; VI-NEXT: v_mov_b32_e32 v32, v17 |
| ; VI-NEXT: v_mov_b32_e32 v33, v16 |
| ; VI-NEXT: v_mov_b32_e32 v34, v15 |
| ; VI-NEXT: v_mov_b32_e32 v35, v14 |
| ; VI-NEXT: v_mov_b32_e32 v36, v13 |
| ; VI-NEXT: v_mov_b32_e32 v37, v12 |
| ; VI-NEXT: v_mov_b32_e32 v38, v11 |
| ; VI-NEXT: v_mov_b32_e32 v39, v10 |
| ; VI-NEXT: v_mov_b32_e32 v48, v9 |
| ; VI-NEXT: v_mov_b32_e32 v49, v8 |
| ; VI-NEXT: v_mov_b32_e32 v50, v7 |
| ; VI-NEXT: v_mov_b32_e32 v51, v6 |
| ; VI-NEXT: v_mov_b32_e32 v52, v5 |
| ; VI-NEXT: v_mov_b32_e32 v53, v4 |
| ; VI-NEXT: v_mov_b32_e32 v54, v3 |
| ; VI-NEXT: v_mov_b32_e32 v55, v2 |
| ; VI-NEXT: v_mov_b32_e32 v40, v1 |
| ; VI-NEXT: v_mov_b32_e32 v41, v0 |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB21_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.false |
| ; VI-NEXT: v_mov_b32_e32 v17, 16 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v0, v17, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v1, v17, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v2, v17, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v3, v17, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v4, v17, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v5, v17, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v6, v17, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v7, v17, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v8, v17, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v9, v17, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v10, v17, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v11, v17, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v12, v17, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v13, v17, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v14, v17, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v15, v17, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v16, v17, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v17, v17, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_or_b32_sdwa v0, v41, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v1, v40, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v2, v55, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v3, v54, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v4, v53, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v5, v52, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v6, v51, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v7, v50, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v8, v49, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v9, v48, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v10, v39, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v11, v38, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v12, v37, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v13, v36, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v14, v35, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v15, v34, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v16, v33, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v17, v32, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: ; implicit-def: $vgpr41 |
| ; VI-NEXT: ; implicit-def: $vgpr40 |
| ; VI-NEXT: ; implicit-def: $vgpr55 |
| ; VI-NEXT: ; implicit-def: $vgpr54 |
| ; VI-NEXT: ; implicit-def: $vgpr53 |
| ; VI-NEXT: ; implicit-def: $vgpr52 |
| ; VI-NEXT: ; implicit-def: $vgpr51 |
| ; VI-NEXT: ; implicit-def: $vgpr50 |
| ; VI-NEXT: ; implicit-def: $vgpr49 |
| ; VI-NEXT: ; implicit-def: $vgpr48 |
| ; VI-NEXT: ; implicit-def: $vgpr39 |
| ; VI-NEXT: ; implicit-def: $vgpr38 |
| ; VI-NEXT: ; implicit-def: $vgpr37 |
| ; VI-NEXT: ; implicit-def: $vgpr36 |
| ; VI-NEXT: ; implicit-def: $vgpr35 |
| ; VI-NEXT: ; implicit-def: $vgpr34 |
| ; VI-NEXT: ; implicit-def: $vgpr33 |
| ; VI-NEXT: ; implicit-def: $vgpr32 |
| ; VI-NEXT: .LBB21_2: ; %Flow |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB21_4 |
| ; VI-NEXT: ; %bb.3: ; %cmp.true |
| ; VI-NEXT: v_mov_b32_e32 v17, 3 |
| ; VI-NEXT: v_add_u16_e32 v0, 3, v41 |
| ; VI-NEXT: v_add_u16_sdwa v1, v41, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v0, v0, v1 |
| ; VI-NEXT: v_add_u16_e32 v1, 3, v40 |
| ; VI-NEXT: v_add_u16_sdwa v2, v40, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v1, v1, v2 |
| ; VI-NEXT: v_add_u16_e32 v2, 3, v55 |
| ; VI-NEXT: v_add_u16_sdwa v3, v55, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v2, v2, v3 |
| ; VI-NEXT: v_add_u16_e32 v3, 3, v54 |
| ; VI-NEXT: v_add_u16_sdwa v4, v54, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v3, v3, v4 |
| ; VI-NEXT: v_add_u16_e32 v4, 3, v53 |
| ; VI-NEXT: v_add_u16_sdwa v5, v53, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v4, v4, v5 |
| ; VI-NEXT: v_add_u16_e32 v5, 3, v52 |
| ; VI-NEXT: v_add_u16_sdwa v6, v52, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v5, v5, v6 |
| ; VI-NEXT: v_add_u16_e32 v6, 3, v51 |
| ; VI-NEXT: v_add_u16_sdwa v7, v51, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v6, v6, v7 |
| ; VI-NEXT: v_add_u16_e32 v7, 3, v50 |
| ; VI-NEXT: v_add_u16_sdwa v8, v50, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v7, v7, v8 |
| ; VI-NEXT: v_add_u16_e32 v8, 3, v49 |
| ; VI-NEXT: v_add_u16_sdwa v9, v49, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v8, v8, v9 |
| ; VI-NEXT: v_add_u16_e32 v9, 3, v48 |
| ; VI-NEXT: v_add_u16_sdwa v10, v48, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v9, v9, v10 |
| ; VI-NEXT: v_add_u16_e32 v10, 3, v39 |
| ; VI-NEXT: v_add_u16_sdwa v11, v39, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v10, v10, v11 |
| ; VI-NEXT: v_add_u16_e32 v11, 3, v38 |
| ; VI-NEXT: v_add_u16_sdwa v12, v38, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v11, v11, v12 |
| ; VI-NEXT: v_add_u16_e32 v12, 3, v37 |
| ; VI-NEXT: v_add_u16_sdwa v13, v37, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v12, v12, v13 |
| ; VI-NEXT: v_add_u16_e32 v13, 3, v36 |
| ; VI-NEXT: v_add_u16_sdwa v14, v36, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v13, v13, v14 |
| ; VI-NEXT: v_add_u16_e32 v14, 3, v35 |
| ; VI-NEXT: v_add_u16_sdwa v15, v35, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v14, v14, v15 |
| ; VI-NEXT: v_add_u16_e32 v15, 3, v34 |
| ; VI-NEXT: v_add_u16_sdwa v16, v34, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v15, v15, v16 |
| ; VI-NEXT: v_add_u16_e32 v16, 3, v33 |
| ; VI-NEXT: v_add_u16_sdwa v18, v33, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v16, v16, v18 |
| ; VI-NEXT: v_add_u16_e32 v18, 3, v32 |
| ; VI-NEXT: v_add_u16_sdwa v17, v32, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v17, v18, v17 |
| ; VI-NEXT: .LBB21_4: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 ; 4-byte Folded Reload |
| ; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload |
| ; VI-NEXT: s_waitcnt vmcnt(0) |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v36i16_to_v9i64: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_mov_b32_e32 v32, v17 |
| ; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_mov_b32_e32 v33, v16 |
| ; GFX9-NEXT: v_mov_b32_e32 v41, v0 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v32 |
| ; GFX9-NEXT: v_mov_b32_e32 v34, v15 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33 |
| ; GFX9-NEXT: v_mov_b32_e32 v35, v14 |
| ; GFX9-NEXT: v_mov_b32_e32 v36, v13 |
| ; GFX9-NEXT: v_mov_b32_e32 v37, v12 |
| ; GFX9-NEXT: v_mov_b32_e32 v38, v11 |
| ; GFX9-NEXT: v_mov_b32_e32 v39, v10 |
| ; GFX9-NEXT: v_mov_b32_e32 v48, v9 |
| ; GFX9-NEXT: v_mov_b32_e32 v49, v8 |
| ; GFX9-NEXT: v_mov_b32_e32 v50, v7 |
| ; GFX9-NEXT: v_mov_b32_e32 v51, v6 |
| ; GFX9-NEXT: v_mov_b32_e32 v52, v5 |
| ; GFX9-NEXT: v_mov_b32_e32 v53, v4 |
| ; GFX9-NEXT: v_mov_b32_e32 v54, v3 |
| ; GFX9-NEXT: v_mov_b32_e32 v55, v2 |
| ; GFX9-NEXT: v_mov_b32_e32 v40, v1 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v36 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v37 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v38 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v39 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v48 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v49 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v50 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v51 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v52 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v53 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v54 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v55 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v40 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v41 |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill |
| ; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB21_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.false |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: s_mov_b32 s6, 0x5040100 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v35 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v34 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v33 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v32 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: v_perm_b32 v0, v45, v41, s6 |
| ; GFX9-NEXT: v_perm_b32 v1, v44, v40, s6 |
| ; GFX9-NEXT: v_perm_b32 v2, v43, v55, s6 |
| ; GFX9-NEXT: v_perm_b32 v3, v42, v54, s6 |
| ; GFX9-NEXT: v_perm_b32 v4, v63, v53, s6 |
| ; GFX9-NEXT: v_perm_b32 v5, v62, v52, s6 |
| ; GFX9-NEXT: v_perm_b32 v6, v61, v51, s6 |
| ; GFX9-NEXT: v_perm_b32 v7, v60, v50, s6 |
| ; GFX9-NEXT: v_perm_b32 v8, v59, v49, s6 |
| ; GFX9-NEXT: v_perm_b32 v9, v58, v48, s6 |
| ; GFX9-NEXT: v_perm_b32 v10, v57, v39, s6 |
| ; GFX9-NEXT: v_perm_b32 v11, v56, v38, s6 |
| ; GFX9-NEXT: v_perm_b32 v12, v47, v37, s6 |
| ; GFX9-NEXT: v_perm_b32 v13, v46, v36, s6 |
| ; GFX9-NEXT: v_perm_b32 v14, v14, v35, s6 |
| ; GFX9-NEXT: v_perm_b32 v15, v15, v34, s6 |
| ; GFX9-NEXT: v_perm_b32 v16, v16, v33, s6 |
| ; GFX9-NEXT: v_perm_b32 v17, v17, v32, s6 |
| ; GFX9-NEXT: ; implicit-def: $vgpr41 |
| ; GFX9-NEXT: ; implicit-def: $vgpr40 |
| ; GFX9-NEXT: ; implicit-def: $vgpr55 |
| ; GFX9-NEXT: ; implicit-def: $vgpr54 |
| ; GFX9-NEXT: ; implicit-def: $vgpr53 |
| ; GFX9-NEXT: ; implicit-def: $vgpr52 |
| ; GFX9-NEXT: ; implicit-def: $vgpr51 |
| ; GFX9-NEXT: ; implicit-def: $vgpr50 |
| ; GFX9-NEXT: ; implicit-def: $vgpr49 |
| ; GFX9-NEXT: ; implicit-def: $vgpr48 |
| ; GFX9-NEXT: ; implicit-def: $vgpr39 |
| ; GFX9-NEXT: ; implicit-def: $vgpr38 |
| ; GFX9-NEXT: ; implicit-def: $vgpr37 |
| ; GFX9-NEXT: ; implicit-def: $vgpr36 |
| ; GFX9-NEXT: ; implicit-def: $vgpr35 |
| ; GFX9-NEXT: ; implicit-def: $vgpr34 |
| ; GFX9-NEXT: ; implicit-def: $vgpr33 |
| ; GFX9-NEXT: ; implicit-def: $vgpr32 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr46 |
| ; GFX9-NEXT: ; implicit-def: $vgpr47 |
| ; GFX9-NEXT: ; implicit-def: $vgpr56 |
| ; GFX9-NEXT: ; implicit-def: $vgpr57 |
| ; GFX9-NEXT: ; implicit-def: $vgpr58 |
| ; GFX9-NEXT: ; implicit-def: $vgpr59 |
| ; GFX9-NEXT: ; implicit-def: $vgpr60 |
| ; GFX9-NEXT: ; implicit-def: $vgpr61 |
| ; GFX9-NEXT: ; implicit-def: $vgpr62 |
| ; GFX9-NEXT: ; implicit-def: $vgpr63 |
| ; GFX9-NEXT: ; implicit-def: $vgpr42 |
| ; GFX9-NEXT: ; implicit-def: $vgpr43 |
| ; GFX9-NEXT: ; implicit-def: $vgpr44 |
| ; GFX9-NEXT: ; implicit-def: $vgpr45 |
| ; GFX9-NEXT: .LBB21_2: ; %Flow |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB21_4 |
| ; GFX9-NEXT: ; %bb.3: ; %cmp.true |
| ; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload |
| ; GFX9-NEXT: s_mov_b32 s6, 0x5040100 |
| ; GFX9-NEXT: v_perm_b32 v0, v45, v41, s6 |
| ; GFX9-NEXT: v_perm_b32 v1, v44, v40, s6 |
| ; GFX9-NEXT: v_perm_b32 v2, v43, v55, s6 |
| ; GFX9-NEXT: v_perm_b32 v3, v42, v54, s6 |
| ; GFX9-NEXT: v_perm_b32 v4, v63, v53, s6 |
| ; GFX9-NEXT: v_perm_b32 v5, v62, v52, s6 |
| ; GFX9-NEXT: v_perm_b32 v6, v61, v51, s6 |
| ; GFX9-NEXT: v_perm_b32 v7, v60, v50, s6 |
| ; GFX9-NEXT: v_perm_b32 v8, v59, v49, s6 |
| ; GFX9-NEXT: v_perm_b32 v9, v58, v48, s6 |
| ; GFX9-NEXT: v_perm_b32 v10, v57, v39, s6 |
| ; GFX9-NEXT: v_perm_b32 v11, v56, v38, s6 |
| ; GFX9-NEXT: v_perm_b32 v12, v47, v37, s6 |
| ; GFX9-NEXT: v_perm_b32 v13, v46, v36, s6 |
| ; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: s_waitcnt vmcnt(3) |
| ; GFX9-NEXT: v_perm_b32 v14, v14, v35, s6 |
| ; GFX9-NEXT: s_waitcnt vmcnt(2) |
| ; GFX9-NEXT: v_perm_b32 v15, v15, v34, s6 |
| ; GFX9-NEXT: s_waitcnt vmcnt(1) |
| ; GFX9-NEXT: v_perm_b32 v16, v16, v33, s6 |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) |
| ; GFX9-NEXT: v_perm_b32 v17, v17, v32, s6 |
| ; GFX9-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: .LBB21_4: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v36i16_to_v9i64: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v0 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v36, 16, v3 |
| ; GFX11-NEXT: v_perm_b32 v4, v32, v4, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v0, v33, v0, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v1, v34, v1, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v2, v35, v2, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v3, v36, v3, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v5, v31, v5, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v6, v30, v6, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v7, v29, v7, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v8, v28, v8, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v9, v27, v9, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v10, v26, v10, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v11, v25, v11, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v12, v24, v12, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v13, v23, v13, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v14, v22, v14, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v15, v21, v15, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v16, v20, v16, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v17, v19, v17, 0x5040100 |
| ; GFX11-NEXT: s_mov_b32 s0, exec_lo |
| ; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v18 |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB21_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX11-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: .LBB21_2: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = add <36 x i16> %a, splat (i16 3) |
| %a2 = bitcast <36 x i16> %a1 to <9 x i64> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <36 x i16> %a to <9 x i64> |
| br label %end |
| |
| end: |
| %phi = phi <9 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <9 x i64> %phi |
| } |
| |
| define <36 x half> @bitcast_v9i64_to_v36f16(<9 x i64> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v9i64_to_v36f16: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v46, off, s[0:3], s32 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v19 |
| ; GCN-NEXT: ; implicit-def: $vgpr42 |
| ; GCN-NEXT: ; implicit-def: $vgpr46 |
| ; GCN-NEXT: ; implicit-def: $vgpr53 |
| ; GCN-NEXT: ; implicit-def: $vgpr45 |
| ; GCN-NEXT: ; implicit-def: $vgpr51 |
| ; GCN-NEXT: ; implicit-def: $vgpr44 |
| ; GCN-NEXT: ; implicit-def: $vgpr49 |
| ; GCN-NEXT: ; implicit-def: $vgpr43 |
| ; GCN-NEXT: ; implicit-def: $vgpr39 |
| ; GCN-NEXT: ; implicit-def: $vgpr41 |
| ; GCN-NEXT: ; implicit-def: $vgpr37 |
| ; GCN-NEXT: ; implicit-def: $vgpr40 |
| ; GCN-NEXT: ; implicit-def: $vgpr35 |
| ; GCN-NEXT: ; implicit-def: $vgpr55 |
| ; GCN-NEXT: ; implicit-def: $vgpr33 |
| ; GCN-NEXT: ; implicit-def: $vgpr54 |
| ; GCN-NEXT: ; implicit-def: $vgpr31 |
| ; GCN-NEXT: ; implicit-def: $vgpr52 |
| ; GCN-NEXT: ; implicit-def: $vgpr29 |
| ; GCN-NEXT: ; implicit-def: $vgpr50 |
| ; GCN-NEXT: ; implicit-def: $vgpr27 |
| ; GCN-NEXT: ; implicit-def: $vgpr48 |
| ; GCN-NEXT: ; implicit-def: $vgpr25 |
| ; GCN-NEXT: ; implicit-def: $vgpr38 |
| ; GCN-NEXT: ; implicit-def: $vgpr24 |
| ; GCN-NEXT: ; implicit-def: $vgpr36 |
| ; GCN-NEXT: ; implicit-def: $vgpr23 |
| ; GCN-NEXT: ; implicit-def: $vgpr34 |
| ; GCN-NEXT: ; implicit-def: $vgpr22 |
| ; GCN-NEXT: ; implicit-def: $vgpr32 |
| ; GCN-NEXT: ; implicit-def: $vgpr21 |
| ; GCN-NEXT: ; implicit-def: $vgpr30 |
| ; GCN-NEXT: ; implicit-def: $vgpr20 |
| ; GCN-NEXT: ; implicit-def: $vgpr28 |
| ; GCN-NEXT: ; implicit-def: $vgpr19 |
| ; GCN-NEXT: ; implicit-def: $vgpr26 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB22_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.false |
| ; GCN-NEXT: v_lshrrev_b32_e32 v26, 16, v18 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v28, 16, v17 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v30, 16, v16 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v32, 16, v15 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v34, 16, v14 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v36, 16, v13 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v38, 16, v12 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v48, 16, v11 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v50, 16, v10 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v52, 16, v9 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v54, 16, v8 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v55, 16, v7 |
| ; GCN-NEXT: s_waitcnt expcnt(6) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v40, 16, v6 |
| ; GCN-NEXT: s_waitcnt expcnt(5) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v41, 16, v5 |
| ; GCN-NEXT: s_waitcnt expcnt(4) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v42, 16, v4 |
| ; GCN-NEXT: s_waitcnt expcnt(2) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v44, 16, v3 |
| ; GCN-NEXT: s_waitcnt expcnt(1) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v45, 16, v2 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v46, 16, v1 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v19, v18 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v20, v17 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v21, v16 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v22, v15 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v23, v14 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v24, v13 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v25, v12 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v27, v11 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v29, v10 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v31, v9 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v33, v8 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v35, v7 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v37, v6 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v39, v5 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v49, v4 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v51, v3 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v53, v2 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v26, v26 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v28, v28 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v30, v30 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v32, v32 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v34, v34 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v36, v36 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v38, v38 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v48, v48 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v50, v50 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v52, v52 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v54, v54 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v55, v55 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v40, v40 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v41, v41 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v43, v42 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v44, v44 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v45, v45 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v46, v46 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v42, v1 |
| ; GCN-NEXT: ; implicit-def: $vgpr1 |
| ; GCN-NEXT: ; implicit-def: $vgpr2 |
| ; GCN-NEXT: ; implicit-def: $vgpr3 |
| ; GCN-NEXT: ; implicit-def: $vgpr4 |
| ; GCN-NEXT: ; implicit-def: $vgpr5 |
| ; GCN-NEXT: ; implicit-def: $vgpr6 |
| ; GCN-NEXT: ; implicit-def: $vgpr7 |
| ; GCN-NEXT: ; implicit-def: $vgpr8 |
| ; GCN-NEXT: ; implicit-def: $vgpr9 |
| ; GCN-NEXT: ; implicit-def: $vgpr10 |
| ; GCN-NEXT: ; implicit-def: $vgpr11 |
| ; GCN-NEXT: ; implicit-def: $vgpr12 |
| ; GCN-NEXT: ; implicit-def: $vgpr13 |
| ; GCN-NEXT: ; implicit-def: $vgpr14 |
| ; GCN-NEXT: ; implicit-def: $vgpr15 |
| ; GCN-NEXT: ; implicit-def: $vgpr16 |
| ; GCN-NEXT: ; implicit-def: $vgpr17 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: .LBB22_2: ; %Flow |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB22_4 |
| ; GCN-NEXT: ; %bb.3: ; %cmp.true |
| ; GCN-NEXT: v_add_i32_e32 v1, vcc, 3, v1 |
| ; GCN-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc |
| ; GCN-NEXT: v_add_i32_e32 v3, vcc, 3, v3 |
| ; GCN-NEXT: v_addc_u32_e32 v4, vcc, 0, v4, vcc |
| ; GCN-NEXT: v_add_i32_e32 v5, vcc, 3, v5 |
| ; GCN-NEXT: v_addc_u32_e32 v6, vcc, 0, v6, vcc |
| ; GCN-NEXT: v_add_i32_e32 v7, vcc, 3, v7 |
| ; GCN-NEXT: v_addc_u32_e32 v8, vcc, 0, v8, vcc |
| ; GCN-NEXT: v_add_i32_e32 v9, vcc, 3, v9 |
| ; GCN-NEXT: v_addc_u32_e32 v10, vcc, 0, v10, vcc |
| ; GCN-NEXT: v_add_i32_e32 v11, vcc, 3, v11 |
| ; GCN-NEXT: v_addc_u32_e32 v12, vcc, 0, v12, vcc |
| ; GCN-NEXT: v_add_i32_e32 v13, vcc, 3, v13 |
| ; GCN-NEXT: v_addc_u32_e32 v14, vcc, 0, v14, vcc |
| ; GCN-NEXT: v_add_i32_e32 v15, vcc, 3, v15 |
| ; GCN-NEXT: v_addc_u32_e32 v16, vcc, 0, v16, vcc |
| ; GCN-NEXT: v_add_i32_e32 v17, vcc, 3, v17 |
| ; GCN-NEXT: v_addc_u32_e32 v18, vcc, 0, v18, vcc |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v46, 16, v1 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v45, 16, v2 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v44, 16, v3 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v43, 16, v4 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v41, 16, v5 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v40, 16, v6 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v55, 16, v7 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v54, 16, v8 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v52, 16, v9 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v50, 16, v10 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v48, 16, v11 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v38, 16, v12 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v36, 16, v13 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v34, 16, v14 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v32, 16, v15 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v30, 16, v16 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v28, 16, v17 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v26, 16, v18 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v19, v18 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v20, v17 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v21, v16 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v22, v15 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v23, v14 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v24, v13 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v25, v12 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v27, v11 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v29, v10 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v31, v9 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v33, v8 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v35, v7 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v37, v6 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v39, v5 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v49, v4 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v51, v3 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v53, v2 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v42, v1 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v26, v26 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v28, v28 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v30, v30 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v32, v32 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v34, v34 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v36, v36 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v38, v38 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v48, v48 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v50, v50 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v52, v52 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v54, v54 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v55, v55 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v40, v40 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v41, v41 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v43, v43 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v44, v44 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v45, v45 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v46, v46 |
| ; GCN-NEXT: .LBB22_4: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v3, v46 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v4, v42 |
| ; GCN-NEXT: v_add_i32_e32 v1, vcc, 4, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v5, v45 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v6, v53 |
| ; GCN-NEXT: v_add_i32_e32 v2, vcc, 8, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v7, v44 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v8, v51 |
| ; GCN-NEXT: v_add_i32_e32 v9, vcc, 12, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v10, v43 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v11, v49 |
| ; GCN-NEXT: v_add_i32_e32 v12, vcc, 16, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v13, v41 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v14, v39 |
| ; GCN-NEXT: v_add_i32_e32 v15, vcc, 20, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v16, v40 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v17, v37 |
| ; GCN-NEXT: v_add_i32_e32 v18, vcc, 24, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v37, v55 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v35, v35 |
| ; GCN-NEXT: v_add_i32_e32 v39, vcc, 28, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v49, v54 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v33, v33 |
| ; GCN-NEXT: v_add_i32_e32 v51, vcc, 32, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v52, v52 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v31, v31 |
| ; GCN-NEXT: v_add_i32_e32 v53, vcc, 36, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v50, v50 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v29, v29 |
| ; GCN-NEXT: v_add_i32_e32 v54, vcc, 40, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v48, v48 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v27, v27 |
| ; GCN-NEXT: v_add_i32_e32 v55, vcc, 44, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v38, v38 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v25, v25 |
| ; GCN-NEXT: s_waitcnt expcnt(6) |
| ; GCN-NEXT: v_add_i32_e32 v40, vcc, 48, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v36, v36 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v24, v24 |
| ; GCN-NEXT: s_waitcnt expcnt(5) |
| ; GCN-NEXT: v_add_i32_e32 v41, vcc, 52, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v34, v34 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v23, v23 |
| ; GCN-NEXT: s_waitcnt expcnt(4) |
| ; GCN-NEXT: v_add_i32_e32 v42, vcc, 56, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v32, v32 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v22, v22 |
| ; GCN-NEXT: s_waitcnt expcnt(3) |
| ; GCN-NEXT: v_add_i32_e32 v43, vcc, 60, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v30, v30 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v21, v21 |
| ; GCN-NEXT: s_waitcnt expcnt(2) |
| ; GCN-NEXT: v_add_i32_e32 v44, vcc, 64, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v28, v28 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v20, v20 |
| ; GCN-NEXT: s_waitcnt expcnt(1) |
| ; GCN-NEXT: v_add_i32_e32 v45, vcc, 0x44, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v26, v26 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v19, v19 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v3, 16, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v5, 16, v5 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v7, 16, v7 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v10, 16, v10 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v13, 16, v13 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v16, 16, v16 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v37, 16, v37 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v49, 16, v49 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v52, 16, v52 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v50, 16, v50 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v48, 16, v48 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v38, 16, v38 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v36, 16, v36 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v34, 16, v34 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v32, 16, v32 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v30, 16, v30 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v28, 16, v28 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v26, 16, v26 |
| ; GCN-NEXT: v_or_b32_e32 v3, v4, v3 |
| ; GCN-NEXT: v_or_b32_e32 v4, v6, v5 |
| ; GCN-NEXT: v_or_b32_e32 v5, v8, v7 |
| ; GCN-NEXT: v_or_b32_e32 v6, v11, v10 |
| ; GCN-NEXT: v_or_b32_e32 v7, v14, v13 |
| ; GCN-NEXT: v_or_b32_e32 v8, v17, v16 |
| ; GCN-NEXT: v_or_b32_e32 v10, v35, v37 |
| ; GCN-NEXT: v_or_b32_e32 v11, v33, v49 |
| ; GCN-NEXT: v_or_b32_e32 v13, v31, v52 |
| ; GCN-NEXT: v_or_b32_e32 v14, v29, v50 |
| ; GCN-NEXT: v_or_b32_e32 v16, v27, v48 |
| ; GCN-NEXT: v_or_b32_e32 v17, v25, v38 |
| ; GCN-NEXT: v_or_b32_e32 v24, v24, v36 |
| ; GCN-NEXT: v_or_b32_e32 v23, v23, v34 |
| ; GCN-NEXT: v_or_b32_e32 v22, v22, v32 |
| ; GCN-NEXT: v_or_b32_e32 v21, v21, v30 |
| ; GCN-NEXT: v_or_b32_e32 v20, v20, v28 |
| ; GCN-NEXT: v_or_b32_e32 v19, v19, v26 |
| ; GCN-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v4, v1, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v5, v2, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v7, v12, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v8, v15, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v10, v18, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v11, v39, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v13, v51, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v14, v53, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v16, v54, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v17, v55, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v24, v40, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v23, v41, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v22, v42, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v21, v43, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v20, v44, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v19, v45, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_load_dword v46, off, s[0:3], s32 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v9i64_to_v36f16: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: ; implicit-def: $vgpr35 |
| ; VI-NEXT: ; implicit-def: $vgpr34 |
| ; VI-NEXT: ; implicit-def: $vgpr33 |
| ; VI-NEXT: ; implicit-def: $vgpr32 |
| ; VI-NEXT: ; implicit-def: $vgpr31 |
| ; VI-NEXT: ; implicit-def: $vgpr30 |
| ; VI-NEXT: ; implicit-def: $vgpr29 |
| ; VI-NEXT: ; implicit-def: $vgpr28 |
| ; VI-NEXT: ; implicit-def: $vgpr27 |
| ; VI-NEXT: ; implicit-def: $vgpr26 |
| ; VI-NEXT: ; implicit-def: $vgpr25 |
| ; VI-NEXT: ; implicit-def: $vgpr24 |
| ; VI-NEXT: ; implicit-def: $vgpr23 |
| ; VI-NEXT: ; implicit-def: $vgpr22 |
| ; VI-NEXT: ; implicit-def: $vgpr21 |
| ; VI-NEXT: ; implicit-def: $vgpr20 |
| ; VI-NEXT: ; implicit-def: $vgpr19 |
| ; VI-NEXT: ; implicit-def: $vgpr18 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB22_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.false |
| ; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; VI-NEXT: .LBB22_2: ; %Flow |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB22_4 |
| ; VI-NEXT: ; %bb.3: ; %cmp.true |
| ; VI-NEXT: v_add_u32_e32 v16, vcc, 3, v16 |
| ; VI-NEXT: v_addc_u32_e32 v17, vcc, 0, v17, vcc |
| ; VI-NEXT: v_add_u32_e32 v14, vcc, 3, v14 |
| ; VI-NEXT: v_addc_u32_e32 v15, vcc, 0, v15, vcc |
| ; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v12 |
| ; VI-NEXT: v_addc_u32_e32 v13, vcc, 0, v13, vcc |
| ; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v10 |
| ; VI-NEXT: v_addc_u32_e32 v11, vcc, 0, v11, vcc |
| ; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v8 |
| ; VI-NEXT: v_addc_u32_e32 v9, vcc, 0, v9, vcc |
| ; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v6 |
| ; VI-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc |
| ; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v4 |
| ; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc |
| ; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v2 |
| ; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc |
| ; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v0 |
| ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc |
| ; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; VI-NEXT: .LBB22_4: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 |
| ; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 |
| ; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 |
| ; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 |
| ; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 |
| ; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 |
| ; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 |
| ; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 |
| ; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 |
| ; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 |
| ; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 |
| ; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 |
| ; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 |
| ; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 |
| ; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 |
| ; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 |
| ; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 |
| ; VI-NEXT: v_or_b32_sdwa v0, v0, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v1, v1, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v2, v2, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v3, v3, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v4, v4, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v5, v5, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v6, v6, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v7, v7, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v8, v8, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v9, v9, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v10, v10, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v11, v11, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v12, v12, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v13, v13, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v14, v14, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v15, v15, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v16, v16, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v17, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v9i64_to_v36f16: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr35 |
| ; GFX9-NEXT: ; implicit-def: $vgpr34 |
| ; GFX9-NEXT: ; implicit-def: $vgpr33 |
| ; GFX9-NEXT: ; implicit-def: $vgpr32 |
| ; GFX9-NEXT: ; implicit-def: $vgpr31 |
| ; GFX9-NEXT: ; implicit-def: $vgpr30 |
| ; GFX9-NEXT: ; implicit-def: $vgpr29 |
| ; GFX9-NEXT: ; implicit-def: $vgpr28 |
| ; GFX9-NEXT: ; implicit-def: $vgpr27 |
| ; GFX9-NEXT: ; implicit-def: $vgpr26 |
| ; GFX9-NEXT: ; implicit-def: $vgpr25 |
| ; GFX9-NEXT: ; implicit-def: $vgpr24 |
| ; GFX9-NEXT: ; implicit-def: $vgpr23 |
| ; GFX9-NEXT: ; implicit-def: $vgpr22 |
| ; GFX9-NEXT: ; implicit-def: $vgpr21 |
| ; GFX9-NEXT: ; implicit-def: $vgpr20 |
| ; GFX9-NEXT: ; implicit-def: $vgpr19 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB22_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.false |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX9-NEXT: .LBB22_2: ; %Flow |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB22_4 |
| ; GFX9-NEXT: ; %bb.3: ; %cmp.true |
| ; GFX9-NEXT: v_add_co_u32_e32 v16, vcc, 3, v16 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v17, vcc, 0, v17, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v14, vcc, 3, v14 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v15, vcc, 0, v15, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v12, vcc, 3, v12 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v13, vcc, 0, v13, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v10, vcc, 3, v10 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v11, vcc, 0, v11, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v8, vcc, 3, v8 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v9, vcc, 0, v9, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v6, vcc, 3, v6 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v7, vcc, 0, v7, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v4, vcc, 3, v4 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v5, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, 3, v2 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc |
| ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, 3, v0 |
| ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX9-NEXT: .LBB22_4: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: s_mov_b32 s4, 0x5040100 |
| ; GFX9-NEXT: v_perm_b32 v0, v35, v0, s4 |
| ; GFX9-NEXT: v_perm_b32 v1, v34, v1, s4 |
| ; GFX9-NEXT: v_perm_b32 v2, v33, v2, s4 |
| ; GFX9-NEXT: v_perm_b32 v3, v32, v3, s4 |
| ; GFX9-NEXT: v_perm_b32 v4, v31, v4, s4 |
| ; GFX9-NEXT: v_perm_b32 v5, v30, v5, s4 |
| ; GFX9-NEXT: v_perm_b32 v6, v29, v6, s4 |
| ; GFX9-NEXT: v_perm_b32 v7, v28, v7, s4 |
| ; GFX9-NEXT: v_perm_b32 v8, v27, v8, s4 |
| ; GFX9-NEXT: v_perm_b32 v9, v26, v9, s4 |
| ; GFX9-NEXT: v_perm_b32 v10, v25, v10, s4 |
| ; GFX9-NEXT: v_perm_b32 v11, v24, v11, s4 |
| ; GFX9-NEXT: v_perm_b32 v12, v23, v12, s4 |
| ; GFX9-NEXT: v_perm_b32 v13, v22, v13, s4 |
| ; GFX9-NEXT: v_perm_b32 v14, v21, v14, s4 |
| ; GFX9-NEXT: v_perm_b32 v15, v20, v15, s4 |
| ; GFX9-NEXT: v_perm_b32 v16, v19, v16, s4 |
| ; GFX9-NEXT: v_perm_b32 v17, v18, v17, s4 |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v9i64_to_v36f16: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v18 |
| ; GFX11-NEXT: ; implicit-def: $vgpr35 |
| ; GFX11-NEXT: ; implicit-def: $vgpr34 |
| ; GFX11-NEXT: ; implicit-def: $vgpr33 |
| ; GFX11-NEXT: ; implicit-def: $vgpr32 |
| ; GFX11-NEXT: ; implicit-def: $vgpr31 |
| ; GFX11-NEXT: ; implicit-def: $vgpr30 |
| ; GFX11-NEXT: ; implicit-def: $vgpr29 |
| ; GFX11-NEXT: ; implicit-def: $vgpr28 |
| ; GFX11-NEXT: ; implicit-def: $vgpr27 |
| ; GFX11-NEXT: ; implicit-def: $vgpr26 |
| ; GFX11-NEXT: ; implicit-def: $vgpr25 |
| ; GFX11-NEXT: ; implicit-def: $vgpr24 |
| ; GFX11-NEXT: ; implicit-def: $vgpr23 |
| ; GFX11-NEXT: ; implicit-def: $vgpr22 |
| ; GFX11-NEXT: ; implicit-def: $vgpr21 |
| ; GFX11-NEXT: ; implicit-def: $vgpr20 |
| ; GFX11-NEXT: ; implicit-def: $vgpr19 |
| ; GFX11-NEXT: ; implicit-def: $vgpr18 |
| ; GFX11-NEXT: s_and_saveexec_b32 s0, vcc_lo |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB22_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.false |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX11-NEXT: .LBB22_2: ; %Flow |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB22_4 |
| ; GFX11-NEXT: ; %bb.3: ; %cmp.true |
| ; GFX11-NEXT: v_add_co_u32 v16, vcc_lo, v16, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v17, null, 0, v17, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v14, vcc_lo, v14, 3 |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v15, null, 0, v15, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v12, vcc_lo, v12, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v13, null, 0, v13, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v10, vcc_lo, v10, 3 |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v11, null, 0, v11, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v8, vcc_lo, v8, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v9, null, 0, v9, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v6, vcc_lo, v6, 3 |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v7, null, 0, v7, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v4, vcc_lo, v4, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v5, null, 0, v5, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v2, vcc_lo, v2, 3 |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, 0, v3, vcc_lo |
| ; GFX11-NEXT: v_add_co_u32 v0, vcc_lo, v0, 3 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) |
| ; GFX11-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX11-NEXT: .LBB22_4: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) |
| ; GFX11-NEXT: v_perm_b32 v0, v35, v0, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v1, v34, v1, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v2, v33, v2, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v3, v32, v3, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v4, v31, v4, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v5, v30, v5, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v6, v29, v6, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v7, v28, v7, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v8, v27, v8, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v9, v26, v9, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v10, v25, v10, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v11, v24, v11, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v12, v23, v12, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v13, v22, v13, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v14, v21, v14, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v15, v20, v15, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v16, v19, v16, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v17, v18, v17, 0x5040100 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = add <9 x i64> %a, splat (i64 3) |
| %a2 = bitcast <9 x i64> %a1 to <36 x half> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <9 x i64> %a to <36 x half> |
| br label %end |
| |
| end: |
| %phi = phi <36 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <36 x half> %phi |
| } |
| |
| define <9 x i64> @bitcast_v36f16_to_v9i64(<36 x half> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v36f16_to_v9i64: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:16 |
| ; GCN-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:12 |
| ; GCN-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:8 |
| ; GCN-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:4 |
| ; GCN-NEXT: buffer_load_dword v49, off, s[0:3], s32 |
| ; GCN-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:20 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v35, v1 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v34, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v33, v3 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v32, v2 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v63, v5 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v62, v4 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v61, v7 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v60, v6 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v59, v9 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v46, v8 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v58, v11 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v44, v10 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v57, v13 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v42, v12 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v56, v15 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v40, v14 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v47, v17 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v54, v16 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v45, v19 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v52, v18 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v43, v21 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v51, v20 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v41, v23 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v48, v22 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v55, v25 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v0, v24 |
| ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v53, v27 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v0, v26 |
| ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v50, v29 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v0, v28 |
| ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v0, v30 |
| ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill |
| ; GCN-NEXT: s_waitcnt vmcnt(4) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v39 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v49, v49 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v38, v38 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v37, v37 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v39, v31 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v36, v36 |
| ; GCN-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB23_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.false |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_lshlrev_b32_e32 v0, 16, v35 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v33 |
| ; GCN-NEXT: v_or_b32_e32 v0, v34, v0 |
| ; GCN-NEXT: v_or_b32_e32 v1, v32, v1 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v2, 16, v63 |
| ; GCN-NEXT: v_or_b32_e32 v2, v62, v2 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v3, 16, v61 |
| ; GCN-NEXT: v_or_b32_e32 v3, v60, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v4, 16, v59 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v5, 16, v58 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v6, 16, v57 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v7, 16, v56 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v8, 16, v47 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v9, 16, v45 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v10, 16, v43 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v11, 16, v41 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v12, 16, v55 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v13, 16, v53 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v14, 16, v50 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v15, 16, v49 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v16, 16, v38 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v17, 16, v39 |
| ; GCN-NEXT: v_or_b32_e32 v4, v46, v4 |
| ; GCN-NEXT: v_or_b32_e32 v5, v44, v5 |
| ; GCN-NEXT: v_or_b32_e32 v6, v42, v6 |
| ; GCN-NEXT: v_or_b32_e32 v7, v40, v7 |
| ; GCN-NEXT: v_or_b32_e32 v8, v54, v8 |
| ; GCN-NEXT: v_or_b32_e32 v9, v52, v9 |
| ; GCN-NEXT: v_or_b32_e32 v10, v51, v10 |
| ; GCN-NEXT: v_or_b32_e32 v11, v48, v11 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v12, v18, v12 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v13, v18, v13 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v14, v18, v14 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v15, v18, v15 |
| ; GCN-NEXT: v_or_b32_e32 v16, v37, v16 |
| ; GCN-NEXT: v_or_b32_e32 v17, v36, v17 |
| ; GCN-NEXT: ; implicit-def: $vgpr35 |
| ; GCN-NEXT: ; implicit-def: $vgpr34 |
| ; GCN-NEXT: ; implicit-def: $vgpr33 |
| ; GCN-NEXT: ; implicit-def: $vgpr32 |
| ; GCN-NEXT: ; implicit-def: $vgpr63 |
| ; GCN-NEXT: ; implicit-def: $vgpr62 |
| ; GCN-NEXT: ; implicit-def: $vgpr61 |
| ; GCN-NEXT: ; implicit-def: $vgpr60 |
| ; GCN-NEXT: ; implicit-def: $vgpr59 |
| ; GCN-NEXT: ; implicit-def: $vgpr46 |
| ; GCN-NEXT: ; implicit-def: $vgpr58 |
| ; GCN-NEXT: ; implicit-def: $vgpr44 |
| ; GCN-NEXT: ; implicit-def: $vgpr57 |
| ; GCN-NEXT: ; implicit-def: $vgpr42 |
| ; GCN-NEXT: ; implicit-def: $vgpr56 |
| ; GCN-NEXT: ; implicit-def: $vgpr40 |
| ; GCN-NEXT: ; implicit-def: $vgpr47 |
| ; GCN-NEXT: ; implicit-def: $vgpr54 |
| ; GCN-NEXT: ; implicit-def: $vgpr45 |
| ; GCN-NEXT: ; implicit-def: $vgpr52 |
| ; GCN-NEXT: ; implicit-def: $vgpr43 |
| ; GCN-NEXT: ; implicit-def: $vgpr51 |
| ; GCN-NEXT: ; implicit-def: $vgpr41 |
| ; GCN-NEXT: ; implicit-def: $vgpr48 |
| ; GCN-NEXT: ; implicit-def: $vgpr55 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr53 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr50 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr49 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr38 |
| ; GCN-NEXT: ; implicit-def: $vgpr37 |
| ; GCN-NEXT: ; implicit-def: $vgpr39 |
| ; GCN-NEXT: ; implicit-def: $vgpr36 |
| ; GCN-NEXT: .LBB23_2: ; %Flow |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB23_4 |
| ; GCN-NEXT: ; %bb.3: ; %cmp.true |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v0, v35 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v1, v34 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v2, v33 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v3, v32 |
| ; GCN-NEXT: v_add_f32_e32 v0, 0x38000000, v0 |
| ; GCN-NEXT: v_add_f32_e32 v1, 0x38000000, v1 |
| ; GCN-NEXT: v_add_f32_e32 v2, 0x38000000, v2 |
| ; GCN-NEXT: v_add_f32_e32 v3, 0x38000000, v3 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v0, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v1, v1 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v2, v2 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v3, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v0, 16, v0 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v2, 16, v2 |
| ; GCN-NEXT: v_or_b32_e32 v0, v1, v0 |
| ; GCN-NEXT: v_or_b32_e32 v1, v3, v2 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v2, v63 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v3, v62 |
| ; GCN-NEXT: v_add_f32_e32 v2, 0x38000000, v2 |
| ; GCN-NEXT: v_add_f32_e32 v3, 0x38000000, v3 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v2, v2 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v3, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v2, 16, v2 |
| ; GCN-NEXT: v_or_b32_e32 v2, v3, v2 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v3, v61 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v4, v60 |
| ; GCN-NEXT: v_add_f32_e32 v3, 0x38000000, v3 |
| ; GCN-NEXT: v_add_f32_e32 v4, 0x38000000, v4 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v3, v3 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v4, v4 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v3, 16, v3 |
| ; GCN-NEXT: v_or_b32_e32 v3, v4, v3 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v4, v59 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v5, v46 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v6, v58 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v7, v44 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v8, v57 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v9, v42 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v10, v56 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v11, v40 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v12, v47 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v13, v54 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v14, v45 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v15, v52 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v16, v43 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v17, v51 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v18, v41 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v19, v48 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v20, v55 |
| ; GCN-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v21, v21 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v22, v53 |
| ; GCN-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v23, v23 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v24, v50 |
| ; GCN-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v25, v25 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v26, v49 |
| ; GCN-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v27, v27 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v28, v38 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v29, v37 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v30, v39 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v31, v36 |
| ; GCN-NEXT: v_add_f32_e32 v4, 0x38000000, v4 |
| ; GCN-NEXT: v_add_f32_e32 v5, 0x38000000, v5 |
| ; GCN-NEXT: v_add_f32_e32 v6, 0x38000000, v6 |
| ; GCN-NEXT: v_add_f32_e32 v7, 0x38000000, v7 |
| ; GCN-NEXT: v_add_f32_e32 v8, 0x38000000, v8 |
| ; GCN-NEXT: v_add_f32_e32 v9, 0x38000000, v9 |
| ; GCN-NEXT: v_add_f32_e32 v10, 0x38000000, v10 |
| ; GCN-NEXT: v_add_f32_e32 v11, 0x38000000, v11 |
| ; GCN-NEXT: v_add_f32_e32 v12, 0x38000000, v12 |
| ; GCN-NEXT: v_add_f32_e32 v13, 0x38000000, v13 |
| ; GCN-NEXT: v_add_f32_e32 v14, 0x38000000, v14 |
| ; GCN-NEXT: v_add_f32_e32 v15, 0x38000000, v15 |
| ; GCN-NEXT: v_add_f32_e32 v16, 0x38000000, v16 |
| ; GCN-NEXT: v_add_f32_e32 v17, 0x38000000, v17 |
| ; GCN-NEXT: v_add_f32_e32 v18, 0x38000000, v18 |
| ; GCN-NEXT: v_add_f32_e32 v19, 0x38000000, v19 |
| ; GCN-NEXT: v_add_f32_e32 v20, 0x38000000, v20 |
| ; GCN-NEXT: v_add_f32_e32 v21, 0x38000000, v21 |
| ; GCN-NEXT: v_add_f32_e32 v22, 0x38000000, v22 |
| ; GCN-NEXT: v_add_f32_e32 v23, 0x38000000, v23 |
| ; GCN-NEXT: v_add_f32_e32 v24, 0x38000000, v24 |
| ; GCN-NEXT: v_add_f32_e32 v25, 0x38000000, v25 |
| ; GCN-NEXT: v_add_f32_e32 v26, 0x38000000, v26 |
| ; GCN-NEXT: v_add_f32_e32 v27, 0x38000000, v27 |
| ; GCN-NEXT: v_add_f32_e32 v28, 0x38000000, v28 |
| ; GCN-NEXT: v_add_f32_e32 v29, 0x38000000, v29 |
| ; GCN-NEXT: v_add_f32_e32 v30, 0x38000000, v30 |
| ; GCN-NEXT: v_add_f32_e32 v31, 0x38000000, v31 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v4, v4 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v5, v5 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v6, v6 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v7, v7 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v8, v8 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v9, v9 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v10, v10 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v11, v11 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v12, v12 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v13, v13 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v14, v14 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v15, v15 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v16, v16 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v17, v17 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v18, v18 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v19, v19 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v20, v20 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v21, v21 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v22, v22 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v23, v23 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v24, v24 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v25, v25 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v26, v26 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v27, v27 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v28, v28 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v29, v29 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v30, v30 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v31, v31 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v4, 16, v4 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v6, 16, v6 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v8, 16, v8 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v10, 16, v10 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v12, 16, v12 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v14, 16, v14 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v16, 16, v16 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v18, 16, v18 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v20, 16, v20 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v22, 16, v22 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v24, 16, v24 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v26, 16, v26 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v28, 16, v28 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v30, 16, v30 |
| ; GCN-NEXT: v_or_b32_e32 v4, v5, v4 |
| ; GCN-NEXT: v_or_b32_e32 v5, v7, v6 |
| ; GCN-NEXT: v_or_b32_e32 v6, v9, v8 |
| ; GCN-NEXT: v_or_b32_e32 v7, v11, v10 |
| ; GCN-NEXT: v_or_b32_e32 v8, v13, v12 |
| ; GCN-NEXT: v_or_b32_e32 v9, v15, v14 |
| ; GCN-NEXT: v_or_b32_e32 v10, v17, v16 |
| ; GCN-NEXT: v_or_b32_e32 v11, v19, v18 |
| ; GCN-NEXT: v_or_b32_e32 v12, v21, v20 |
| ; GCN-NEXT: v_or_b32_e32 v13, v23, v22 |
| ; GCN-NEXT: v_or_b32_e32 v14, v25, v24 |
| ; GCN-NEXT: v_or_b32_e32 v15, v27, v26 |
| ; GCN-NEXT: v_or_b32_e32 v16, v29, v28 |
| ; GCN-NEXT: v_or_b32_e32 v17, v31, v30 |
| ; GCN-NEXT: .LBB23_4: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v36f16_to_v9i64: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill |
| ; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 ; 4-byte Folded Spill |
| ; VI-NEXT: v_mov_b32_e32 v32, v17 |
| ; VI-NEXT: v_mov_b32_e32 v33, v16 |
| ; VI-NEXT: v_mov_b32_e32 v34, v15 |
| ; VI-NEXT: v_mov_b32_e32 v35, v14 |
| ; VI-NEXT: v_mov_b32_e32 v36, v13 |
| ; VI-NEXT: v_mov_b32_e32 v37, v12 |
| ; VI-NEXT: v_mov_b32_e32 v38, v11 |
| ; VI-NEXT: v_mov_b32_e32 v39, v10 |
| ; VI-NEXT: v_mov_b32_e32 v48, v9 |
| ; VI-NEXT: v_mov_b32_e32 v49, v8 |
| ; VI-NEXT: v_mov_b32_e32 v50, v7 |
| ; VI-NEXT: v_mov_b32_e32 v51, v6 |
| ; VI-NEXT: v_mov_b32_e32 v52, v5 |
| ; VI-NEXT: v_mov_b32_e32 v53, v4 |
| ; VI-NEXT: v_mov_b32_e32 v54, v3 |
| ; VI-NEXT: v_mov_b32_e32 v55, v2 |
| ; VI-NEXT: v_mov_b32_e32 v40, v1 |
| ; VI-NEXT: v_mov_b32_e32 v41, v0 |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB23_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.false |
| ; VI-NEXT: v_mov_b32_e32 v17, 16 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v0, v17, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v1, v17, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v2, v17, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v3, v17, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v4, v17, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v5, v17, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v6, v17, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v7, v17, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v8, v17, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v9, v17, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v10, v17, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v11, v17, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v12, v17, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v13, v17, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v14, v17, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v15, v17, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v16, v17, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v17, v17, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_or_b32_sdwa v0, v41, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v1, v40, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v2, v55, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v3, v54, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v4, v53, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v5, v52, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v6, v51, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v7, v50, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v8, v49, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v9, v48, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v10, v39, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v11, v38, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v12, v37, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v13, v36, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v14, v35, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v15, v34, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v16, v33, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v17, v32, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: ; implicit-def: $vgpr41 |
| ; VI-NEXT: ; implicit-def: $vgpr40 |
| ; VI-NEXT: ; implicit-def: $vgpr55 |
| ; VI-NEXT: ; implicit-def: $vgpr54 |
| ; VI-NEXT: ; implicit-def: $vgpr53 |
| ; VI-NEXT: ; implicit-def: $vgpr52 |
| ; VI-NEXT: ; implicit-def: $vgpr51 |
| ; VI-NEXT: ; implicit-def: $vgpr50 |
| ; VI-NEXT: ; implicit-def: $vgpr49 |
| ; VI-NEXT: ; implicit-def: $vgpr48 |
| ; VI-NEXT: ; implicit-def: $vgpr39 |
| ; VI-NEXT: ; implicit-def: $vgpr38 |
| ; VI-NEXT: ; implicit-def: $vgpr37 |
| ; VI-NEXT: ; implicit-def: $vgpr36 |
| ; VI-NEXT: ; implicit-def: $vgpr35 |
| ; VI-NEXT: ; implicit-def: $vgpr34 |
| ; VI-NEXT: ; implicit-def: $vgpr33 |
| ; VI-NEXT: ; implicit-def: $vgpr32 |
| ; VI-NEXT: .LBB23_2: ; %Flow |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB23_4 |
| ; VI-NEXT: ; %bb.3: ; %cmp.true |
| ; VI-NEXT: v_mov_b32_e32 v17, 0x200 |
| ; VI-NEXT: v_add_f16_sdwa v0, v41, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v1, 0x200, v41 |
| ; VI-NEXT: v_or_b32_e32 v0, v1, v0 |
| ; VI-NEXT: v_add_f16_sdwa v1, v40, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v2, 0x200, v40 |
| ; VI-NEXT: v_or_b32_e32 v1, v2, v1 |
| ; VI-NEXT: v_add_f16_sdwa v2, v55, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v3, 0x200, v55 |
| ; VI-NEXT: v_or_b32_e32 v2, v3, v2 |
| ; VI-NEXT: v_add_f16_sdwa v3, v54, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v4, 0x200, v54 |
| ; VI-NEXT: v_or_b32_e32 v3, v4, v3 |
| ; VI-NEXT: v_add_f16_sdwa v4, v53, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v5, 0x200, v53 |
| ; VI-NEXT: v_or_b32_e32 v4, v5, v4 |
| ; VI-NEXT: v_add_f16_sdwa v5, v52, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v6, 0x200, v52 |
| ; VI-NEXT: v_or_b32_e32 v5, v6, v5 |
| ; VI-NEXT: v_add_f16_sdwa v6, v51, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v7, 0x200, v51 |
| ; VI-NEXT: v_or_b32_e32 v6, v7, v6 |
| ; VI-NEXT: v_add_f16_sdwa v7, v50, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v8, 0x200, v50 |
| ; VI-NEXT: v_or_b32_e32 v7, v8, v7 |
| ; VI-NEXT: v_add_f16_sdwa v8, v49, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v9, 0x200, v49 |
| ; VI-NEXT: v_or_b32_e32 v8, v9, v8 |
| ; VI-NEXT: v_add_f16_sdwa v9, v48, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v10, 0x200, v48 |
| ; VI-NEXT: v_or_b32_e32 v9, v10, v9 |
| ; VI-NEXT: v_add_f16_sdwa v10, v39, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v11, 0x200, v39 |
| ; VI-NEXT: v_or_b32_e32 v10, v11, v10 |
| ; VI-NEXT: v_add_f16_sdwa v11, v38, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v12, 0x200, v38 |
| ; VI-NEXT: v_or_b32_e32 v11, v12, v11 |
| ; VI-NEXT: v_add_f16_sdwa v12, v37, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v13, 0x200, v37 |
| ; VI-NEXT: v_or_b32_e32 v12, v13, v12 |
| ; VI-NEXT: v_add_f16_sdwa v13, v36, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v14, 0x200, v36 |
| ; VI-NEXT: v_or_b32_e32 v13, v14, v13 |
| ; VI-NEXT: v_add_f16_sdwa v14, v35, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v15, 0x200, v35 |
| ; VI-NEXT: v_or_b32_e32 v14, v15, v14 |
| ; VI-NEXT: v_add_f16_sdwa v15, v34, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v16, 0x200, v34 |
| ; VI-NEXT: v_or_b32_e32 v15, v16, v15 |
| ; VI-NEXT: v_add_f16_sdwa v16, v33, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v18, 0x200, v33 |
| ; VI-NEXT: v_or_b32_e32 v16, v18, v16 |
| ; VI-NEXT: v_add_f16_sdwa v17, v32, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v18, 0x200, v32 |
| ; VI-NEXT: v_or_b32_e32 v17, v18, v17 |
| ; VI-NEXT: .LBB23_4: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 ; 4-byte Folded Reload |
| ; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload |
| ; VI-NEXT: s_waitcnt vmcnt(0) |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v36f16_to_v9i64: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_mov_b32_e32 v32, v17 |
| ; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_mov_b32_e32 v33, v16 |
| ; GFX9-NEXT: v_mov_b32_e32 v41, v0 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v32 |
| ; GFX9-NEXT: v_mov_b32_e32 v34, v15 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33 |
| ; GFX9-NEXT: v_mov_b32_e32 v35, v14 |
| ; GFX9-NEXT: v_mov_b32_e32 v36, v13 |
| ; GFX9-NEXT: v_mov_b32_e32 v37, v12 |
| ; GFX9-NEXT: v_mov_b32_e32 v38, v11 |
| ; GFX9-NEXT: v_mov_b32_e32 v39, v10 |
| ; GFX9-NEXT: v_mov_b32_e32 v48, v9 |
| ; GFX9-NEXT: v_mov_b32_e32 v49, v8 |
| ; GFX9-NEXT: v_mov_b32_e32 v50, v7 |
| ; GFX9-NEXT: v_mov_b32_e32 v51, v6 |
| ; GFX9-NEXT: v_mov_b32_e32 v52, v5 |
| ; GFX9-NEXT: v_mov_b32_e32 v53, v4 |
| ; GFX9-NEXT: v_mov_b32_e32 v54, v3 |
| ; GFX9-NEXT: v_mov_b32_e32 v55, v2 |
| ; GFX9-NEXT: v_mov_b32_e32 v40, v1 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v36 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v37 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v38 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v39 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v48 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v49 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v50 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v51 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v52 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v53 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v54 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v55 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v40 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v41 |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill |
| ; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB23_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.false |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: s_mov_b32 s6, 0x5040100 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v35 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v34 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v33 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v32 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: v_perm_b32 v0, v45, v41, s6 |
| ; GFX9-NEXT: v_perm_b32 v1, v44, v40, s6 |
| ; GFX9-NEXT: v_perm_b32 v2, v43, v55, s6 |
| ; GFX9-NEXT: v_perm_b32 v3, v42, v54, s6 |
| ; GFX9-NEXT: v_perm_b32 v4, v63, v53, s6 |
| ; GFX9-NEXT: v_perm_b32 v5, v62, v52, s6 |
| ; GFX9-NEXT: v_perm_b32 v6, v61, v51, s6 |
| ; GFX9-NEXT: v_perm_b32 v7, v60, v50, s6 |
| ; GFX9-NEXT: v_perm_b32 v8, v59, v49, s6 |
| ; GFX9-NEXT: v_perm_b32 v9, v58, v48, s6 |
| ; GFX9-NEXT: v_perm_b32 v10, v57, v39, s6 |
| ; GFX9-NEXT: v_perm_b32 v11, v56, v38, s6 |
| ; GFX9-NEXT: v_perm_b32 v12, v47, v37, s6 |
| ; GFX9-NEXT: v_perm_b32 v13, v46, v36, s6 |
| ; GFX9-NEXT: v_perm_b32 v14, v14, v35, s6 |
| ; GFX9-NEXT: v_perm_b32 v15, v15, v34, s6 |
| ; GFX9-NEXT: v_perm_b32 v16, v16, v33, s6 |
| ; GFX9-NEXT: v_perm_b32 v17, v17, v32, s6 |
| ; GFX9-NEXT: ; implicit-def: $vgpr41 |
| ; GFX9-NEXT: ; implicit-def: $vgpr40 |
| ; GFX9-NEXT: ; implicit-def: $vgpr55 |
| ; GFX9-NEXT: ; implicit-def: $vgpr54 |
| ; GFX9-NEXT: ; implicit-def: $vgpr53 |
| ; GFX9-NEXT: ; implicit-def: $vgpr52 |
| ; GFX9-NEXT: ; implicit-def: $vgpr51 |
| ; GFX9-NEXT: ; implicit-def: $vgpr50 |
| ; GFX9-NEXT: ; implicit-def: $vgpr49 |
| ; GFX9-NEXT: ; implicit-def: $vgpr48 |
| ; GFX9-NEXT: ; implicit-def: $vgpr39 |
| ; GFX9-NEXT: ; implicit-def: $vgpr38 |
| ; GFX9-NEXT: ; implicit-def: $vgpr37 |
| ; GFX9-NEXT: ; implicit-def: $vgpr36 |
| ; GFX9-NEXT: ; implicit-def: $vgpr35 |
| ; GFX9-NEXT: ; implicit-def: $vgpr34 |
| ; GFX9-NEXT: ; implicit-def: $vgpr33 |
| ; GFX9-NEXT: ; implicit-def: $vgpr32 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr46 |
| ; GFX9-NEXT: ; implicit-def: $vgpr47 |
| ; GFX9-NEXT: ; implicit-def: $vgpr56 |
| ; GFX9-NEXT: ; implicit-def: $vgpr57 |
| ; GFX9-NEXT: ; implicit-def: $vgpr58 |
| ; GFX9-NEXT: ; implicit-def: $vgpr59 |
| ; GFX9-NEXT: ; implicit-def: $vgpr60 |
| ; GFX9-NEXT: ; implicit-def: $vgpr61 |
| ; GFX9-NEXT: ; implicit-def: $vgpr62 |
| ; GFX9-NEXT: ; implicit-def: $vgpr63 |
| ; GFX9-NEXT: ; implicit-def: $vgpr42 |
| ; GFX9-NEXT: ; implicit-def: $vgpr43 |
| ; GFX9-NEXT: ; implicit-def: $vgpr44 |
| ; GFX9-NEXT: ; implicit-def: $vgpr45 |
| ; GFX9-NEXT: .LBB23_2: ; %Flow |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB23_4 |
| ; GFX9-NEXT: ; %bb.3: ; %cmp.true |
| ; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload |
| ; GFX9-NEXT: s_mov_b32 s6, 0x5040100 |
| ; GFX9-NEXT: v_perm_b32 v0, v45, v41, s6 |
| ; GFX9-NEXT: s_movk_i32 s7, 0x200 |
| ; GFX9-NEXT: v_perm_b32 v1, v44, v40, s6 |
| ; GFX9-NEXT: v_perm_b32 v2, v43, v55, s6 |
| ; GFX9-NEXT: v_perm_b32 v3, v42, v54, s6 |
| ; GFX9-NEXT: v_perm_b32 v4, v63, v53, s6 |
| ; GFX9-NEXT: v_perm_b32 v5, v62, v52, s6 |
| ; GFX9-NEXT: v_perm_b32 v6, v61, v51, s6 |
| ; GFX9-NEXT: v_perm_b32 v7, v60, v50, s6 |
| ; GFX9-NEXT: v_perm_b32 v8, v59, v49, s6 |
| ; GFX9-NEXT: v_perm_b32 v9, v58, v48, s6 |
| ; GFX9-NEXT: v_perm_b32 v10, v57, v39, s6 |
| ; GFX9-NEXT: v_perm_b32 v11, v56, v38, s6 |
| ; GFX9-NEXT: v_perm_b32 v12, v47, v37, s6 |
| ; GFX9-NEXT: v_perm_b32 v13, v46, v36, s6 |
| ; GFX9-NEXT: v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v3, v3, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v4, v4, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v12, v12, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v13, v13, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: s_waitcnt vmcnt(3) |
| ; GFX9-NEXT: v_perm_b32 v14, v14, v35, s6 |
| ; GFX9-NEXT: s_waitcnt vmcnt(2) |
| ; GFX9-NEXT: v_perm_b32 v15, v15, v34, s6 |
| ; GFX9-NEXT: s_waitcnt vmcnt(1) |
| ; GFX9-NEXT: v_perm_b32 v16, v16, v33, s6 |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) |
| ; GFX9-NEXT: v_perm_b32 v17, v17, v32, s6 |
| ; GFX9-NEXT: v_pk_add_f16 v14, v14, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v15, v15, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v16, v16, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v17, v17, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: .LBB23_4: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v36f16_to_v9i64: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v0 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v36, 16, v3 |
| ; GFX11-NEXT: v_perm_b32 v4, v32, v4, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v0, v33, v0, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v1, v34, v1, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v2, v35, v2, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v3, v36, v3, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v5, v31, v5, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v6, v30, v6, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v7, v29, v7, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v8, v28, v8, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v9, v27, v9, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v10, v26, v10, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v11, v25, v11, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v12, v24, v12, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v13, v23, v13, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v14, v22, v14, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v15, v21, v15, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v16, v20, v16, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v17, v19, v17, 0x5040100 |
| ; GFX11-NEXT: s_mov_b32 s0, exec_lo |
| ; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v18 |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB23_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX11-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1] |
| ; GFX11-NEXT: .LBB23_2: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = fadd <36 x half> %a, splat (half 0xH0200) |
| %a2 = bitcast <36 x half> %a1 to <9 x i64> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <36 x half> %a to <9 x i64> |
| br label %end |
| |
| end: |
| %phi = phi <9 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <9 x i64> %phi |
| } |
| |
| define <36 x i16> @bitcast_v9f64_to_v36i16(<9 x double> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v9f64_to_v36i16: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v19 |
| ; GCN-NEXT: ; implicit-def: $vgpr31 |
| ; GCN-NEXT: ; implicit-def: $vgpr36 |
| ; GCN-NEXT: ; implicit-def: $vgpr28 |
| ; GCN-NEXT: ; implicit-def: $vgpr35 |
| ; GCN-NEXT: ; implicit-def: $vgpr26 |
| ; GCN-NEXT: ; implicit-def: $vgpr34 |
| ; GCN-NEXT: ; implicit-def: $vgpr24 |
| ; GCN-NEXT: ; implicit-def: $vgpr33 |
| ; GCN-NEXT: ; implicit-def: $vgpr23 |
| ; GCN-NEXT: ; implicit-def: $vgpr32 |
| ; GCN-NEXT: ; implicit-def: $vgpr22 |
| ; GCN-NEXT: ; implicit-def: $vgpr30 |
| ; GCN-NEXT: ; implicit-def: $vgpr21 |
| ; GCN-NEXT: ; implicit-def: $vgpr29 |
| ; GCN-NEXT: ; implicit-def: $vgpr20 |
| ; GCN-NEXT: ; implicit-def: $vgpr27 |
| ; GCN-NEXT: ; implicit-def: $vgpr19 |
| ; GCN-NEXT: ; implicit-def: $vgpr25 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB24_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.false |
| ; GCN-NEXT: v_alignbit_b32 v19, v18, v17, 16 |
| ; GCN-NEXT: v_alignbit_b32 v20, v16, v15, 16 |
| ; GCN-NEXT: v_alignbit_b32 v21, v14, v13, 16 |
| ; GCN-NEXT: v_alignbit_b32 v22, v12, v11, 16 |
| ; GCN-NEXT: v_alignbit_b32 v23, v10, v9, 16 |
| ; GCN-NEXT: v_alignbit_b32 v24, v8, v7, 16 |
| ; GCN-NEXT: v_alignbit_b32 v26, v6, v5, 16 |
| ; GCN-NEXT: v_alignbit_b32 v28, v4, v3, 16 |
| ; GCN-NEXT: v_alignbit_b32 v31, v2, v1, 16 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v25, 16, v18 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v27, 16, v16 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v29, 16, v14 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v30, 16, v12 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v32, 16, v10 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v33, 16, v8 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v34, 16, v6 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v35, 16, v4 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v36, 16, v2 |
| ; GCN-NEXT: .LBB24_2: ; %Flow |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB24_4 |
| ; GCN-NEXT: ; %bb.3: ; %cmp.true |
| ; GCN-NEXT: v_add_f64 v[1:2], v[1:2], 1.0 |
| ; GCN-NEXT: v_add_f64 v[3:4], v[3:4], 1.0 |
| ; GCN-NEXT: v_add_f64 v[5:6], v[5:6], 1.0 |
| ; GCN-NEXT: v_add_f64 v[7:8], v[7:8], 1.0 |
| ; GCN-NEXT: v_add_f64 v[9:10], v[9:10], 1.0 |
| ; GCN-NEXT: v_add_f64 v[11:12], v[11:12], 1.0 |
| ; GCN-NEXT: v_add_f64 v[13:14], v[13:14], 1.0 |
| ; GCN-NEXT: v_add_f64 v[15:16], v[15:16], 1.0 |
| ; GCN-NEXT: v_add_f64 v[17:18], v[17:18], 1.0 |
| ; GCN-NEXT: v_alignbit_b32 v19, v18, v17, 16 |
| ; GCN-NEXT: v_alignbit_b32 v20, v16, v15, 16 |
| ; GCN-NEXT: v_alignbit_b32 v21, v14, v13, 16 |
| ; GCN-NEXT: v_alignbit_b32 v22, v12, v11, 16 |
| ; GCN-NEXT: v_alignbit_b32 v23, v10, v9, 16 |
| ; GCN-NEXT: v_alignbit_b32 v24, v8, v7, 16 |
| ; GCN-NEXT: v_alignbit_b32 v26, v6, v5, 16 |
| ; GCN-NEXT: v_alignbit_b32 v28, v4, v3, 16 |
| ; GCN-NEXT: v_alignbit_b32 v31, v2, v1, 16 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v25, 16, v18 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v27, 16, v16 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v29, 16, v14 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v30, 16, v12 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v32, 16, v10 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v33, 16, v8 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v34, 16, v6 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v35, 16, v4 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v36, 16, v2 |
| ; GCN-NEXT: .LBB24_4: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: v_and_b32_e32 v1, 0xffff, v1 |
| ; GCN-NEXT: v_and_b32_e32 v2, 0xffff, v2 |
| ; GCN-NEXT: v_and_b32_e32 v3, 0xffff, v3 |
| ; GCN-NEXT: v_and_b32_e32 v4, 0xffff, v4 |
| ; GCN-NEXT: v_and_b32_e32 v5, 0xffff, v5 |
| ; GCN-NEXT: v_and_b32_e32 v6, 0xffff, v6 |
| ; GCN-NEXT: v_and_b32_e32 v7, 0xffff, v7 |
| ; GCN-NEXT: v_and_b32_e32 v8, 0xffff, v8 |
| ; GCN-NEXT: v_and_b32_e32 v9, 0xffff, v9 |
| ; GCN-NEXT: v_and_b32_e32 v10, 0xffff, v10 |
| ; GCN-NEXT: v_and_b32_e32 v11, 0xffff, v11 |
| ; GCN-NEXT: v_and_b32_e32 v12, 0xffff, v12 |
| ; GCN-NEXT: v_and_b32_e32 v13, 0xffff, v13 |
| ; GCN-NEXT: v_and_b32_e32 v14, 0xffff, v14 |
| ; GCN-NEXT: v_and_b32_e32 v15, 0xffff, v15 |
| ; GCN-NEXT: v_and_b32_e32 v16, 0xffff, v16 |
| ; GCN-NEXT: v_and_b32_e32 v17, 0xffff, v17 |
| ; GCN-NEXT: v_and_b32_e32 v18, 0xffff, v18 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v31, 16, v31 |
| ; GCN-NEXT: v_or_b32_e32 v1, v1, v31 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v31, 16, v36 |
| ; GCN-NEXT: v_or_b32_e32 v2, v2, v31 |
| ; GCN-NEXT: v_add_i32_e32 v31, vcc, 4, v0 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v28, 16, v28 |
| ; GCN-NEXT: v_or_b32_e32 v3, v3, v28 |
| ; GCN-NEXT: v_add_i32_e32 v28, vcc, 8, v0 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v35, 16, v35 |
| ; GCN-NEXT: v_or_b32_e32 v4, v4, v35 |
| ; GCN-NEXT: v_add_i32_e32 v35, vcc, 12, v0 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v26, 16, v26 |
| ; GCN-NEXT: v_or_b32_e32 v5, v5, v26 |
| ; GCN-NEXT: v_add_i32_e32 v26, vcc, 16, v0 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v34, 16, v34 |
| ; GCN-NEXT: v_or_b32_e32 v6, v6, v34 |
| ; GCN-NEXT: v_add_i32_e32 v34, vcc, 20, v0 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v24, 16, v24 |
| ; GCN-NEXT: v_or_b32_e32 v7, v7, v24 |
| ; GCN-NEXT: v_add_i32_e32 v24, vcc, 24, v0 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v33, 16, v33 |
| ; GCN-NEXT: v_or_b32_e32 v8, v8, v33 |
| ; GCN-NEXT: v_add_i32_e32 v33, vcc, 28, v0 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v23, 16, v23 |
| ; GCN-NEXT: v_or_b32_e32 v9, v9, v23 |
| ; GCN-NEXT: v_add_i32_e32 v23, vcc, 32, v0 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v32, 16, v32 |
| ; GCN-NEXT: v_or_b32_e32 v10, v10, v32 |
| ; GCN-NEXT: v_add_i32_e32 v32, vcc, 36, v0 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v22, 16, v22 |
| ; GCN-NEXT: v_or_b32_e32 v11, v11, v22 |
| ; GCN-NEXT: v_add_i32_e32 v22, vcc, 40, v0 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v30, 16, v30 |
| ; GCN-NEXT: v_or_b32_e32 v12, v12, v30 |
| ; GCN-NEXT: v_add_i32_e32 v30, vcc, 44, v0 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v21, 16, v21 |
| ; GCN-NEXT: v_or_b32_e32 v13, v13, v21 |
| ; GCN-NEXT: v_add_i32_e32 v21, vcc, 48, v0 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v29, 16, v29 |
| ; GCN-NEXT: v_or_b32_e32 v14, v14, v29 |
| ; GCN-NEXT: v_add_i32_e32 v29, vcc, 52, v0 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v20, 16, v20 |
| ; GCN-NEXT: v_or_b32_e32 v15, v15, v20 |
| ; GCN-NEXT: v_add_i32_e32 v20, vcc, 56, v0 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v27, 16, v27 |
| ; GCN-NEXT: v_or_b32_e32 v16, v16, v27 |
| ; GCN-NEXT: v_add_i32_e32 v27, vcc, 60, v0 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v19, 16, v19 |
| ; GCN-NEXT: v_or_b32_e32 v17, v17, v19 |
| ; GCN-NEXT: v_add_i32_e32 v19, vcc, 64, v0 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v25, 16, v25 |
| ; GCN-NEXT: v_or_b32_e32 v18, v18, v25 |
| ; GCN-NEXT: v_add_i32_e32 v25, vcc, 0x44, v0 |
| ; GCN-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v2, v31, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v3, v28, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v4, v35, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v5, v26, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v6, v34, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v7, v24, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v8, v33, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v9, v23, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v10, v32, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v11, v22, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v12, v30, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v13, v21, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v14, v29, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v15, v20, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v16, v27, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v17, v19, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v18, v25, s[0:3], 0 offen |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v9f64_to_v36i16: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: ; implicit-def: $vgpr35 |
| ; VI-NEXT: ; implicit-def: $vgpr34 |
| ; VI-NEXT: ; implicit-def: $vgpr33 |
| ; VI-NEXT: ; implicit-def: $vgpr32 |
| ; VI-NEXT: ; implicit-def: $vgpr31 |
| ; VI-NEXT: ; implicit-def: $vgpr30 |
| ; VI-NEXT: ; implicit-def: $vgpr29 |
| ; VI-NEXT: ; implicit-def: $vgpr28 |
| ; VI-NEXT: ; implicit-def: $vgpr27 |
| ; VI-NEXT: ; implicit-def: $vgpr26 |
| ; VI-NEXT: ; implicit-def: $vgpr25 |
| ; VI-NEXT: ; implicit-def: $vgpr24 |
| ; VI-NEXT: ; implicit-def: $vgpr23 |
| ; VI-NEXT: ; implicit-def: $vgpr22 |
| ; VI-NEXT: ; implicit-def: $vgpr21 |
| ; VI-NEXT: ; implicit-def: $vgpr20 |
| ; VI-NEXT: ; implicit-def: $vgpr19 |
| ; VI-NEXT: ; implicit-def: $vgpr18 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB24_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.false |
| ; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; VI-NEXT: .LBB24_2: ; %Flow |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB24_4 |
| ; VI-NEXT: ; %bb.3: ; %cmp.true |
| ; VI-NEXT: v_add_f64 v[16:17], v[16:17], 1.0 |
| ; VI-NEXT: v_add_f64 v[14:15], v[14:15], 1.0 |
| ; VI-NEXT: v_add_f64 v[12:13], v[12:13], 1.0 |
| ; VI-NEXT: v_add_f64 v[10:11], v[10:11], 1.0 |
| ; VI-NEXT: v_add_f64 v[8:9], v[8:9], 1.0 |
| ; VI-NEXT: v_add_f64 v[6:7], v[6:7], 1.0 |
| ; VI-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 |
| ; VI-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 |
| ; VI-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 |
| ; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; VI-NEXT: .LBB24_4: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 |
| ; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 |
| ; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 |
| ; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 |
| ; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 |
| ; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 |
| ; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 |
| ; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 |
| ; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 |
| ; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 |
| ; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 |
| ; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 |
| ; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 |
| ; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 |
| ; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 |
| ; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 |
| ; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 |
| ; VI-NEXT: v_or_b32_sdwa v0, v0, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v1, v1, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v2, v2, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v3, v3, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v4, v4, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v5, v5, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v6, v6, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v7, v7, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v8, v8, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v9, v9, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v10, v10, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v11, v11, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v12, v12, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v13, v13, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v14, v14, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v15, v15, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v16, v16, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v17, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v9f64_to_v36i16: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr35 |
| ; GFX9-NEXT: ; implicit-def: $vgpr34 |
| ; GFX9-NEXT: ; implicit-def: $vgpr33 |
| ; GFX9-NEXT: ; implicit-def: $vgpr32 |
| ; GFX9-NEXT: ; implicit-def: $vgpr31 |
| ; GFX9-NEXT: ; implicit-def: $vgpr30 |
| ; GFX9-NEXT: ; implicit-def: $vgpr29 |
| ; GFX9-NEXT: ; implicit-def: $vgpr28 |
| ; GFX9-NEXT: ; implicit-def: $vgpr27 |
| ; GFX9-NEXT: ; implicit-def: $vgpr26 |
| ; GFX9-NEXT: ; implicit-def: $vgpr25 |
| ; GFX9-NEXT: ; implicit-def: $vgpr24 |
| ; GFX9-NEXT: ; implicit-def: $vgpr23 |
| ; GFX9-NEXT: ; implicit-def: $vgpr22 |
| ; GFX9-NEXT: ; implicit-def: $vgpr21 |
| ; GFX9-NEXT: ; implicit-def: $vgpr20 |
| ; GFX9-NEXT: ; implicit-def: $vgpr19 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB24_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.false |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX9-NEXT: .LBB24_2: ; %Flow |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB24_4 |
| ; GFX9-NEXT: ; %bb.3: ; %cmp.true |
| ; GFX9-NEXT: v_add_f64 v[16:17], v[16:17], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[14:15], v[14:15], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[12:13], v[12:13], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[10:11], v[10:11], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[8:9], v[8:9], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[6:7], v[6:7], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX9-NEXT: .LBB24_4: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: s_mov_b32 s4, 0x5040100 |
| ; GFX9-NEXT: v_perm_b32 v0, v35, v0, s4 |
| ; GFX9-NEXT: v_perm_b32 v1, v34, v1, s4 |
| ; GFX9-NEXT: v_perm_b32 v2, v33, v2, s4 |
| ; GFX9-NEXT: v_perm_b32 v3, v32, v3, s4 |
| ; GFX9-NEXT: v_perm_b32 v4, v31, v4, s4 |
| ; GFX9-NEXT: v_perm_b32 v5, v30, v5, s4 |
| ; GFX9-NEXT: v_perm_b32 v6, v29, v6, s4 |
| ; GFX9-NEXT: v_perm_b32 v7, v28, v7, s4 |
| ; GFX9-NEXT: v_perm_b32 v8, v27, v8, s4 |
| ; GFX9-NEXT: v_perm_b32 v9, v26, v9, s4 |
| ; GFX9-NEXT: v_perm_b32 v10, v25, v10, s4 |
| ; GFX9-NEXT: v_perm_b32 v11, v24, v11, s4 |
| ; GFX9-NEXT: v_perm_b32 v12, v23, v12, s4 |
| ; GFX9-NEXT: v_perm_b32 v13, v22, v13, s4 |
| ; GFX9-NEXT: v_perm_b32 v14, v21, v14, s4 |
| ; GFX9-NEXT: v_perm_b32 v15, v20, v15, s4 |
| ; GFX9-NEXT: v_perm_b32 v16, v19, v16, s4 |
| ; GFX9-NEXT: v_perm_b32 v17, v18, v17, s4 |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v9f64_to_v36i16: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v18 |
| ; GFX11-NEXT: ; implicit-def: $vgpr35 |
| ; GFX11-NEXT: ; implicit-def: $vgpr34 |
| ; GFX11-NEXT: ; implicit-def: $vgpr33 |
| ; GFX11-NEXT: ; implicit-def: $vgpr32 |
| ; GFX11-NEXT: ; implicit-def: $vgpr31 |
| ; GFX11-NEXT: ; implicit-def: $vgpr30 |
| ; GFX11-NEXT: ; implicit-def: $vgpr29 |
| ; GFX11-NEXT: ; implicit-def: $vgpr28 |
| ; GFX11-NEXT: ; implicit-def: $vgpr27 |
| ; GFX11-NEXT: ; implicit-def: $vgpr26 |
| ; GFX11-NEXT: ; implicit-def: $vgpr25 |
| ; GFX11-NEXT: ; implicit-def: $vgpr24 |
| ; GFX11-NEXT: ; implicit-def: $vgpr23 |
| ; GFX11-NEXT: ; implicit-def: $vgpr22 |
| ; GFX11-NEXT: ; implicit-def: $vgpr21 |
| ; GFX11-NEXT: ; implicit-def: $vgpr20 |
| ; GFX11-NEXT: ; implicit-def: $vgpr19 |
| ; GFX11-NEXT: ; implicit-def: $vgpr18 |
| ; GFX11-NEXT: s_and_saveexec_b32 s0, vcc_lo |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB24_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.false |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX11-NEXT: .LBB24_2: ; %Flow |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB24_4 |
| ; GFX11-NEXT: ; %bb.3: ; %cmp.true |
| ; GFX11-NEXT: v_add_f64 v[16:17], v[16:17], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[14:15], v[14:15], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[12:13], v[12:13], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[10:11], v[10:11], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[8:9], v[8:9], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[6:7], v[6:7], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX11-NEXT: .LBB24_4: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) |
| ; GFX11-NEXT: v_perm_b32 v0, v35, v0, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v1, v34, v1, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v2, v33, v2, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v3, v32, v3, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v4, v31, v4, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v5, v30, v5, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v6, v29, v6, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v7, v28, v7, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v8, v27, v8, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v9, v26, v9, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v10, v25, v10, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v11, v24, v11, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v12, v23, v12, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v13, v22, v13, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v14, v21, v14, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v15, v20, v15, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v16, v19, v16, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v17, v18, v17, 0x5040100 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = fadd <9 x double> %a, splat (double 1.000000e+00) |
| %a2 = bitcast <9 x double> %a1 to <36 x i16> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <9 x double> %a to <36 x i16> |
| br label %end |
| |
| end: |
| %phi = phi <36 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <36 x i16> %phi |
| } |
| |
| define <9 x double> @bitcast_v36i16_to_v9f64(<36 x i16> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v36i16_to_v9f64: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_mov_b32_e32 v34, v26 |
| ; GCN-NEXT: v_mov_b32_e32 v35, v24 |
| ; GCN-NEXT: v_mov_b32_e32 v36, v22 |
| ; GCN-NEXT: v_mov_b32_e32 v37, v20 |
| ; GCN-NEXT: v_mov_b32_e32 v38, v18 |
| ; GCN-NEXT: v_mov_b32_e32 v39, v16 |
| ; GCN-NEXT: v_mov_b32_e32 v48, v14 |
| ; GCN-NEXT: v_mov_b32_e32 v49, v12 |
| ; GCN-NEXT: v_mov_b32_e32 v50, v10 |
| ; GCN-NEXT: v_mov_b32_e32 v51, v8 |
| ; GCN-NEXT: v_mov_b32_e32 v52, v6 |
| ; GCN-NEXT: v_mov_b32_e32 v53, v4 |
| ; GCN-NEXT: v_mov_b32_e32 v54, v2 |
| ; GCN-NEXT: v_mov_b32_e32 v55, v0 |
| ; GCN-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:16 |
| ; GCN-NEXT: s_waitcnt expcnt(3) |
| ; GCN-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:12 |
| ; GCN-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:8 |
| ; GCN-NEXT: s_waitcnt expcnt(2) |
| ; GCN-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:4 |
| ; GCN-NEXT: buffer_load_dword v4, off, s[0:3], s32 |
| ; GCN-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:20 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v40, 16, v1 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v41, 16, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v33, 16, v5 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v32, 16, v7 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v9 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v11 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_lshlrev_b32_e32 v42, 16, v13 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v43, 16, v15 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v44, 16, v17 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v45, 16, v19 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v46, 16, v21 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v47, 16, v23 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v56, 16, v25 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v57, 16, v27 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v58, 16, v29 |
| ; GCN-NEXT: s_waitcnt vmcnt(2) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v59, 16, v4 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v60, 16, v2 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v61, 16, v0 |
| ; GCN-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB25_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.false |
| ; GCN-NEXT: v_and_b32_e32 v0, 0xffff, v55 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_and_b32_e32 v1, 0xffff, v54 |
| ; GCN-NEXT: v_or_b32_e32 v0, v0, v40 |
| ; GCN-NEXT: v_or_b32_e32 v1, v1, v41 |
| ; GCN-NEXT: v_and_b32_e32 v2, 0xffff, v53 |
| ; GCN-NEXT: v_or_b32_e32 v2, v2, v33 |
| ; GCN-NEXT: v_and_b32_e32 v3, 0xffff, v52 |
| ; GCN-NEXT: v_or_b32_e32 v3, v3, v32 |
| ; GCN-NEXT: v_and_b32_e32 v4, 0xffff, v51 |
| ; GCN-NEXT: v_and_b32_e32 v5, 0xffff, v50 |
| ; GCN-NEXT: v_and_b32_e32 v6, 0xffff, v49 |
| ; GCN-NEXT: v_and_b32_e32 v7, 0xffff, v48 |
| ; GCN-NEXT: v_and_b32_e32 v8, 0xffff, v39 |
| ; GCN-NEXT: v_and_b32_e32 v9, 0xffff, v38 |
| ; GCN-NEXT: v_and_b32_e32 v10, 0xffff, v37 |
| ; GCN-NEXT: v_and_b32_e32 v11, 0xffff, v36 |
| ; GCN-NEXT: v_and_b32_e32 v12, 0xffff, v35 |
| ; GCN-NEXT: v_and_b32_e32 v13, 0xffff, v34 |
| ; GCN-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_and_b32_e32 v14, 0xffff, v14 |
| ; GCN-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_and_b32_e32 v15, 0xffff, v15 |
| ; GCN-NEXT: v_and_b32_e32 v16, 0xffff, v63 |
| ; GCN-NEXT: v_and_b32_e32 v17, 0xffff, v62 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v4, v4, v18 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v5, v5, v18 |
| ; GCN-NEXT: v_or_b32_e32 v6, v6, v42 |
| ; GCN-NEXT: v_or_b32_e32 v7, v7, v43 |
| ; GCN-NEXT: v_or_b32_e32 v8, v8, v44 |
| ; GCN-NEXT: v_or_b32_e32 v9, v9, v45 |
| ; GCN-NEXT: v_or_b32_e32 v10, v10, v46 |
| ; GCN-NEXT: v_or_b32_e32 v11, v11, v47 |
| ; GCN-NEXT: v_or_b32_e32 v12, v12, v56 |
| ; GCN-NEXT: v_or_b32_e32 v13, v13, v57 |
| ; GCN-NEXT: v_or_b32_e32 v14, v14, v58 |
| ; GCN-NEXT: v_or_b32_e32 v15, v15, v59 |
| ; GCN-NEXT: v_or_b32_e32 v16, v16, v60 |
| ; GCN-NEXT: v_or_b32_e32 v17, v17, v61 |
| ; GCN-NEXT: ; implicit-def: $vgpr55 |
| ; GCN-NEXT: ; implicit-def: $vgpr54 |
| ; GCN-NEXT: ; implicit-def: $vgpr53 |
| ; GCN-NEXT: ; implicit-def: $vgpr52 |
| ; GCN-NEXT: ; implicit-def: $vgpr51 |
| ; GCN-NEXT: ; implicit-def: $vgpr50 |
| ; GCN-NEXT: ; implicit-def: $vgpr49 |
| ; GCN-NEXT: ; implicit-def: $vgpr48 |
| ; GCN-NEXT: ; implicit-def: $vgpr39 |
| ; GCN-NEXT: ; implicit-def: $vgpr38 |
| ; GCN-NEXT: ; implicit-def: $vgpr37 |
| ; GCN-NEXT: ; implicit-def: $vgpr36 |
| ; GCN-NEXT: ; implicit-def: $vgpr35 |
| ; GCN-NEXT: ; implicit-def: $vgpr34 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr63 |
| ; GCN-NEXT: ; implicit-def: $vgpr62 |
| ; GCN-NEXT: ; implicit-def: $vgpr40 |
| ; GCN-NEXT: ; implicit-def: $vgpr41 |
| ; GCN-NEXT: ; implicit-def: $vgpr33 |
| ; GCN-NEXT: ; implicit-def: $vgpr32 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr42 |
| ; GCN-NEXT: ; implicit-def: $vgpr43 |
| ; GCN-NEXT: ; implicit-def: $vgpr44 |
| ; GCN-NEXT: ; implicit-def: $vgpr45 |
| ; GCN-NEXT: ; implicit-def: $vgpr46 |
| ; GCN-NEXT: ; implicit-def: $vgpr47 |
| ; GCN-NEXT: ; implicit-def: $vgpr56 |
| ; GCN-NEXT: ; implicit-def: $vgpr57 |
| ; GCN-NEXT: ; implicit-def: $vgpr58 |
| ; GCN-NEXT: ; implicit-def: $vgpr59 |
| ; GCN-NEXT: ; implicit-def: $vgpr60 |
| ; GCN-NEXT: ; implicit-def: $vgpr61 |
| ; GCN-NEXT: .LBB25_2: ; %Flow |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB25_4 |
| ; GCN-NEXT: ; %bb.3: ; %cmp.true |
| ; GCN-NEXT: v_add_i32_e32 v0, vcc, 3, v55 |
| ; GCN-NEXT: s_mov_b32 s6, 0x30000 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_add_i32_e32 v1, vcc, 3, v54 |
| ; GCN-NEXT: v_add_i32_e32 v2, vcc, 3, v53 |
| ; GCN-NEXT: v_add_i32_e32 v3, vcc, 3, v52 |
| ; GCN-NEXT: v_add_i32_e32 v4, vcc, 3, v51 |
| ; GCN-NEXT: v_add_i32_e32 v5, vcc, 3, v50 |
| ; GCN-NEXT: v_add_i32_e32 v6, vcc, 3, v49 |
| ; GCN-NEXT: v_add_i32_e32 v7, vcc, 3, v48 |
| ; GCN-NEXT: v_add_i32_e32 v8, vcc, 3, v39 |
| ; GCN-NEXT: v_add_i32_e32 v9, vcc, 3, v38 |
| ; GCN-NEXT: v_add_i32_e32 v10, vcc, 3, v37 |
| ; GCN-NEXT: v_add_i32_e32 v11, vcc, 3, v36 |
| ; GCN-NEXT: v_add_i32_e32 v12, vcc, 3, v35 |
| ; GCN-NEXT: v_add_i32_e32 v13, vcc, 3, v34 |
| ; GCN-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_add_i32_e32 v14, vcc, 3, v14 |
| ; GCN-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_add_i32_e32 v15, vcc, 3, v15 |
| ; GCN-NEXT: v_add_i32_e32 v16, vcc, 3, v63 |
| ; GCN-NEXT: v_add_i32_e32 v17, vcc, 3, v62 |
| ; GCN-NEXT: v_and_b32_e32 v0, 0xffff, v0 |
| ; GCN-NEXT: v_and_b32_e32 v1, 0xffff, v1 |
| ; GCN-NEXT: v_and_b32_e32 v2, 0xffff, v2 |
| ; GCN-NEXT: v_and_b32_e32 v3, 0xffff, v3 |
| ; GCN-NEXT: v_and_b32_e32 v4, 0xffff, v4 |
| ; GCN-NEXT: v_and_b32_e32 v5, 0xffff, v5 |
| ; GCN-NEXT: v_and_b32_e32 v6, 0xffff, v6 |
| ; GCN-NEXT: v_and_b32_e32 v7, 0xffff, v7 |
| ; GCN-NEXT: v_and_b32_e32 v8, 0xffff, v8 |
| ; GCN-NEXT: v_and_b32_e32 v9, 0xffff, v9 |
| ; GCN-NEXT: v_and_b32_e32 v10, 0xffff, v10 |
| ; GCN-NEXT: v_and_b32_e32 v11, 0xffff, v11 |
| ; GCN-NEXT: v_and_b32_e32 v12, 0xffff, v12 |
| ; GCN-NEXT: v_and_b32_e32 v13, 0xffff, v13 |
| ; GCN-NEXT: v_and_b32_e32 v14, 0xffff, v14 |
| ; GCN-NEXT: v_and_b32_e32 v15, 0xffff, v15 |
| ; GCN-NEXT: v_and_b32_e32 v16, 0xffff, v16 |
| ; GCN-NEXT: v_and_b32_e32 v17, 0xffff, v17 |
| ; GCN-NEXT: v_or_b32_e32 v0, v40, v0 |
| ; GCN-NEXT: v_or_b32_e32 v1, v41, v1 |
| ; GCN-NEXT: v_or_b32_e32 v2, v33, v2 |
| ; GCN-NEXT: v_or_b32_e32 v3, v32, v3 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v4, v18, v4 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v5, v18, v5 |
| ; GCN-NEXT: v_or_b32_e32 v6, v42, v6 |
| ; GCN-NEXT: v_or_b32_e32 v7, v43, v7 |
| ; GCN-NEXT: v_or_b32_e32 v8, v44, v8 |
| ; GCN-NEXT: v_or_b32_e32 v9, v45, v9 |
| ; GCN-NEXT: v_or_b32_e32 v10, v46, v10 |
| ; GCN-NEXT: v_or_b32_e32 v11, v47, v11 |
| ; GCN-NEXT: v_or_b32_e32 v12, v56, v12 |
| ; GCN-NEXT: v_or_b32_e32 v13, v57, v13 |
| ; GCN-NEXT: v_or_b32_e32 v14, v58, v14 |
| ; GCN-NEXT: v_or_b32_e32 v15, v59, v15 |
| ; GCN-NEXT: v_or_b32_e32 v16, v60, v16 |
| ; GCN-NEXT: v_or_b32_e32 v17, v61, v17 |
| ; GCN-NEXT: v_add_i32_e32 v0, vcc, 0x30000, v0 |
| ; GCN-NEXT: v_add_i32_e32 v1, vcc, s6, v1 |
| ; GCN-NEXT: v_add_i32_e32 v2, vcc, s6, v2 |
| ; GCN-NEXT: v_add_i32_e32 v3, vcc, s6, v3 |
| ; GCN-NEXT: v_add_i32_e32 v4, vcc, s6, v4 |
| ; GCN-NEXT: v_add_i32_e32 v5, vcc, s6, v5 |
| ; GCN-NEXT: v_add_i32_e32 v6, vcc, s6, v6 |
| ; GCN-NEXT: v_add_i32_e32 v7, vcc, s6, v7 |
| ; GCN-NEXT: v_add_i32_e32 v8, vcc, s6, v8 |
| ; GCN-NEXT: v_add_i32_e32 v9, vcc, s6, v9 |
| ; GCN-NEXT: v_add_i32_e32 v10, vcc, s6, v10 |
| ; GCN-NEXT: v_add_i32_e32 v11, vcc, s6, v11 |
| ; GCN-NEXT: v_add_i32_e32 v12, vcc, s6, v12 |
| ; GCN-NEXT: v_add_i32_e32 v13, vcc, s6, v13 |
| ; GCN-NEXT: v_add_i32_e32 v14, vcc, s6, v14 |
| ; GCN-NEXT: v_add_i32_e32 v15, vcc, s6, v15 |
| ; GCN-NEXT: v_add_i32_e32 v16, vcc, s6, v16 |
| ; GCN-NEXT: v_add_i32_e32 v17, vcc, s6, v17 |
| ; GCN-NEXT: .LBB25_4: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v36i16_to_v9f64: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill |
| ; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 ; 4-byte Folded Spill |
| ; VI-NEXT: v_mov_b32_e32 v32, v17 |
| ; VI-NEXT: v_mov_b32_e32 v33, v16 |
| ; VI-NEXT: v_mov_b32_e32 v34, v15 |
| ; VI-NEXT: v_mov_b32_e32 v35, v14 |
| ; VI-NEXT: v_mov_b32_e32 v36, v13 |
| ; VI-NEXT: v_mov_b32_e32 v37, v12 |
| ; VI-NEXT: v_mov_b32_e32 v38, v11 |
| ; VI-NEXT: v_mov_b32_e32 v39, v10 |
| ; VI-NEXT: v_mov_b32_e32 v48, v9 |
| ; VI-NEXT: v_mov_b32_e32 v49, v8 |
| ; VI-NEXT: v_mov_b32_e32 v50, v7 |
| ; VI-NEXT: v_mov_b32_e32 v51, v6 |
| ; VI-NEXT: v_mov_b32_e32 v52, v5 |
| ; VI-NEXT: v_mov_b32_e32 v53, v4 |
| ; VI-NEXT: v_mov_b32_e32 v54, v3 |
| ; VI-NEXT: v_mov_b32_e32 v55, v2 |
| ; VI-NEXT: v_mov_b32_e32 v40, v1 |
| ; VI-NEXT: v_mov_b32_e32 v41, v0 |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB25_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.false |
| ; VI-NEXT: v_mov_b32_e32 v17, 16 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v0, v17, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v1, v17, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v2, v17, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v3, v17, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v4, v17, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v5, v17, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v6, v17, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v7, v17, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v8, v17, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v9, v17, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v10, v17, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v11, v17, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v12, v17, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v13, v17, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v14, v17, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v15, v17, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v16, v17, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v17, v17, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_or_b32_sdwa v0, v41, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v1, v40, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v2, v55, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v3, v54, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v4, v53, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v5, v52, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v6, v51, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v7, v50, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v8, v49, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v9, v48, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v10, v39, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v11, v38, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v12, v37, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v13, v36, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v14, v35, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v15, v34, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v16, v33, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v17, v32, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: ; implicit-def: $vgpr41 |
| ; VI-NEXT: ; implicit-def: $vgpr40 |
| ; VI-NEXT: ; implicit-def: $vgpr55 |
| ; VI-NEXT: ; implicit-def: $vgpr54 |
| ; VI-NEXT: ; implicit-def: $vgpr53 |
| ; VI-NEXT: ; implicit-def: $vgpr52 |
| ; VI-NEXT: ; implicit-def: $vgpr51 |
| ; VI-NEXT: ; implicit-def: $vgpr50 |
| ; VI-NEXT: ; implicit-def: $vgpr49 |
| ; VI-NEXT: ; implicit-def: $vgpr48 |
| ; VI-NEXT: ; implicit-def: $vgpr39 |
| ; VI-NEXT: ; implicit-def: $vgpr38 |
| ; VI-NEXT: ; implicit-def: $vgpr37 |
| ; VI-NEXT: ; implicit-def: $vgpr36 |
| ; VI-NEXT: ; implicit-def: $vgpr35 |
| ; VI-NEXT: ; implicit-def: $vgpr34 |
| ; VI-NEXT: ; implicit-def: $vgpr33 |
| ; VI-NEXT: ; implicit-def: $vgpr32 |
| ; VI-NEXT: .LBB25_2: ; %Flow |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB25_4 |
| ; VI-NEXT: ; %bb.3: ; %cmp.true |
| ; VI-NEXT: v_mov_b32_e32 v17, 3 |
| ; VI-NEXT: v_add_u16_e32 v0, 3, v41 |
| ; VI-NEXT: v_add_u16_sdwa v1, v41, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v0, v0, v1 |
| ; VI-NEXT: v_add_u16_e32 v1, 3, v40 |
| ; VI-NEXT: v_add_u16_sdwa v2, v40, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v1, v1, v2 |
| ; VI-NEXT: v_add_u16_e32 v2, 3, v55 |
| ; VI-NEXT: v_add_u16_sdwa v3, v55, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v2, v2, v3 |
| ; VI-NEXT: v_add_u16_e32 v3, 3, v54 |
| ; VI-NEXT: v_add_u16_sdwa v4, v54, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v3, v3, v4 |
| ; VI-NEXT: v_add_u16_e32 v4, 3, v53 |
| ; VI-NEXT: v_add_u16_sdwa v5, v53, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v4, v4, v5 |
| ; VI-NEXT: v_add_u16_e32 v5, 3, v52 |
| ; VI-NEXT: v_add_u16_sdwa v6, v52, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v5, v5, v6 |
| ; VI-NEXT: v_add_u16_e32 v6, 3, v51 |
| ; VI-NEXT: v_add_u16_sdwa v7, v51, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v6, v6, v7 |
| ; VI-NEXT: v_add_u16_e32 v7, 3, v50 |
| ; VI-NEXT: v_add_u16_sdwa v8, v50, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v7, v7, v8 |
| ; VI-NEXT: v_add_u16_e32 v8, 3, v49 |
| ; VI-NEXT: v_add_u16_sdwa v9, v49, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v8, v8, v9 |
| ; VI-NEXT: v_add_u16_e32 v9, 3, v48 |
| ; VI-NEXT: v_add_u16_sdwa v10, v48, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v9, v9, v10 |
| ; VI-NEXT: v_add_u16_e32 v10, 3, v39 |
| ; VI-NEXT: v_add_u16_sdwa v11, v39, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v10, v10, v11 |
| ; VI-NEXT: v_add_u16_e32 v11, 3, v38 |
| ; VI-NEXT: v_add_u16_sdwa v12, v38, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v11, v11, v12 |
| ; VI-NEXT: v_add_u16_e32 v12, 3, v37 |
| ; VI-NEXT: v_add_u16_sdwa v13, v37, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v12, v12, v13 |
| ; VI-NEXT: v_add_u16_e32 v13, 3, v36 |
| ; VI-NEXT: v_add_u16_sdwa v14, v36, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v13, v13, v14 |
| ; VI-NEXT: v_add_u16_e32 v14, 3, v35 |
| ; VI-NEXT: v_add_u16_sdwa v15, v35, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v14, v14, v15 |
| ; VI-NEXT: v_add_u16_e32 v15, 3, v34 |
| ; VI-NEXT: v_add_u16_sdwa v16, v34, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v15, v15, v16 |
| ; VI-NEXT: v_add_u16_e32 v16, 3, v33 |
| ; VI-NEXT: v_add_u16_sdwa v18, v33, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v16, v16, v18 |
| ; VI-NEXT: v_add_u16_e32 v18, 3, v32 |
| ; VI-NEXT: v_add_u16_sdwa v17, v32, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_e32 v17, v18, v17 |
| ; VI-NEXT: .LBB25_4: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 ; 4-byte Folded Reload |
| ; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload |
| ; VI-NEXT: s_waitcnt vmcnt(0) |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v36i16_to_v9f64: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_mov_b32_e32 v32, v17 |
| ; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_mov_b32_e32 v33, v16 |
| ; GFX9-NEXT: v_mov_b32_e32 v41, v0 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v32 |
| ; GFX9-NEXT: v_mov_b32_e32 v34, v15 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33 |
| ; GFX9-NEXT: v_mov_b32_e32 v35, v14 |
| ; GFX9-NEXT: v_mov_b32_e32 v36, v13 |
| ; GFX9-NEXT: v_mov_b32_e32 v37, v12 |
| ; GFX9-NEXT: v_mov_b32_e32 v38, v11 |
| ; GFX9-NEXT: v_mov_b32_e32 v39, v10 |
| ; GFX9-NEXT: v_mov_b32_e32 v48, v9 |
| ; GFX9-NEXT: v_mov_b32_e32 v49, v8 |
| ; GFX9-NEXT: v_mov_b32_e32 v50, v7 |
| ; GFX9-NEXT: v_mov_b32_e32 v51, v6 |
| ; GFX9-NEXT: v_mov_b32_e32 v52, v5 |
| ; GFX9-NEXT: v_mov_b32_e32 v53, v4 |
| ; GFX9-NEXT: v_mov_b32_e32 v54, v3 |
| ; GFX9-NEXT: v_mov_b32_e32 v55, v2 |
| ; GFX9-NEXT: v_mov_b32_e32 v40, v1 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v36 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v37 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v38 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v39 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v48 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v49 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v50 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v51 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v52 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v53 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v54 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v55 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v40 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v41 |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill |
| ; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB25_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.false |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: s_mov_b32 s6, 0x5040100 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v35 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v34 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v33 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v32 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: v_perm_b32 v0, v45, v41, s6 |
| ; GFX9-NEXT: v_perm_b32 v1, v44, v40, s6 |
| ; GFX9-NEXT: v_perm_b32 v2, v43, v55, s6 |
| ; GFX9-NEXT: v_perm_b32 v3, v42, v54, s6 |
| ; GFX9-NEXT: v_perm_b32 v4, v63, v53, s6 |
| ; GFX9-NEXT: v_perm_b32 v5, v62, v52, s6 |
| ; GFX9-NEXT: v_perm_b32 v6, v61, v51, s6 |
| ; GFX9-NEXT: v_perm_b32 v7, v60, v50, s6 |
| ; GFX9-NEXT: v_perm_b32 v8, v59, v49, s6 |
| ; GFX9-NEXT: v_perm_b32 v9, v58, v48, s6 |
| ; GFX9-NEXT: v_perm_b32 v10, v57, v39, s6 |
| ; GFX9-NEXT: v_perm_b32 v11, v56, v38, s6 |
| ; GFX9-NEXT: v_perm_b32 v12, v47, v37, s6 |
| ; GFX9-NEXT: v_perm_b32 v13, v46, v36, s6 |
| ; GFX9-NEXT: v_perm_b32 v14, v14, v35, s6 |
| ; GFX9-NEXT: v_perm_b32 v15, v15, v34, s6 |
| ; GFX9-NEXT: v_perm_b32 v16, v16, v33, s6 |
| ; GFX9-NEXT: v_perm_b32 v17, v17, v32, s6 |
| ; GFX9-NEXT: ; implicit-def: $vgpr41 |
| ; GFX9-NEXT: ; implicit-def: $vgpr40 |
| ; GFX9-NEXT: ; implicit-def: $vgpr55 |
| ; GFX9-NEXT: ; implicit-def: $vgpr54 |
| ; GFX9-NEXT: ; implicit-def: $vgpr53 |
| ; GFX9-NEXT: ; implicit-def: $vgpr52 |
| ; GFX9-NEXT: ; implicit-def: $vgpr51 |
| ; GFX9-NEXT: ; implicit-def: $vgpr50 |
| ; GFX9-NEXT: ; implicit-def: $vgpr49 |
| ; GFX9-NEXT: ; implicit-def: $vgpr48 |
| ; GFX9-NEXT: ; implicit-def: $vgpr39 |
| ; GFX9-NEXT: ; implicit-def: $vgpr38 |
| ; GFX9-NEXT: ; implicit-def: $vgpr37 |
| ; GFX9-NEXT: ; implicit-def: $vgpr36 |
| ; GFX9-NEXT: ; implicit-def: $vgpr35 |
| ; GFX9-NEXT: ; implicit-def: $vgpr34 |
| ; GFX9-NEXT: ; implicit-def: $vgpr33 |
| ; GFX9-NEXT: ; implicit-def: $vgpr32 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr46 |
| ; GFX9-NEXT: ; implicit-def: $vgpr47 |
| ; GFX9-NEXT: ; implicit-def: $vgpr56 |
| ; GFX9-NEXT: ; implicit-def: $vgpr57 |
| ; GFX9-NEXT: ; implicit-def: $vgpr58 |
| ; GFX9-NEXT: ; implicit-def: $vgpr59 |
| ; GFX9-NEXT: ; implicit-def: $vgpr60 |
| ; GFX9-NEXT: ; implicit-def: $vgpr61 |
| ; GFX9-NEXT: ; implicit-def: $vgpr62 |
| ; GFX9-NEXT: ; implicit-def: $vgpr63 |
| ; GFX9-NEXT: ; implicit-def: $vgpr42 |
| ; GFX9-NEXT: ; implicit-def: $vgpr43 |
| ; GFX9-NEXT: ; implicit-def: $vgpr44 |
| ; GFX9-NEXT: ; implicit-def: $vgpr45 |
| ; GFX9-NEXT: .LBB25_2: ; %Flow |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB25_4 |
| ; GFX9-NEXT: ; %bb.3: ; %cmp.true |
| ; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload |
| ; GFX9-NEXT: s_mov_b32 s6, 0x5040100 |
| ; GFX9-NEXT: v_perm_b32 v0, v45, v41, s6 |
| ; GFX9-NEXT: v_perm_b32 v1, v44, v40, s6 |
| ; GFX9-NEXT: v_perm_b32 v2, v43, v55, s6 |
| ; GFX9-NEXT: v_perm_b32 v3, v42, v54, s6 |
| ; GFX9-NEXT: v_perm_b32 v4, v63, v53, s6 |
| ; GFX9-NEXT: v_perm_b32 v5, v62, v52, s6 |
| ; GFX9-NEXT: v_perm_b32 v6, v61, v51, s6 |
| ; GFX9-NEXT: v_perm_b32 v7, v60, v50, s6 |
| ; GFX9-NEXT: v_perm_b32 v8, v59, v49, s6 |
| ; GFX9-NEXT: v_perm_b32 v9, v58, v48, s6 |
| ; GFX9-NEXT: v_perm_b32 v10, v57, v39, s6 |
| ; GFX9-NEXT: v_perm_b32 v11, v56, v38, s6 |
| ; GFX9-NEXT: v_perm_b32 v12, v47, v37, s6 |
| ; GFX9-NEXT: v_perm_b32 v13, v46, v36, s6 |
| ; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: s_waitcnt vmcnt(3) |
| ; GFX9-NEXT: v_perm_b32 v14, v14, v35, s6 |
| ; GFX9-NEXT: s_waitcnt vmcnt(2) |
| ; GFX9-NEXT: v_perm_b32 v15, v15, v34, s6 |
| ; GFX9-NEXT: s_waitcnt vmcnt(1) |
| ; GFX9-NEXT: v_perm_b32 v16, v16, v33, s6 |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) |
| ; GFX9-NEXT: v_perm_b32 v17, v17, v32, s6 |
| ; GFX9-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: .LBB25_4: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v36i16_to_v9f64: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v0 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v36, 16, v3 |
| ; GFX11-NEXT: v_perm_b32 v4, v32, v4, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v0, v33, v0, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v1, v34, v1, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v2, v35, v2, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v3, v36, v3, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v5, v31, v5, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v6, v30, v6, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v7, v29, v7, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v8, v28, v8, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v9, v27, v9, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v10, v26, v10, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v11, v25, v11, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v12, v24, v12, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v13, v23, v13, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v14, v22, v14, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v15, v21, v15, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v16, v20, v16, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v17, v19, v17, 0x5040100 |
| ; GFX11-NEXT: s_mov_b32 s0, exec_lo |
| ; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v18 |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB25_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX11-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: .LBB25_2: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = add <36 x i16> %a, splat (i16 3) |
| %a2 = bitcast <36 x i16> %a1 to <9 x double> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <36 x i16> %a to <9 x double> |
| br label %end |
| |
| end: |
| %phi = phi <9 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <9 x double> %phi |
| } |
| |
| define <36 x half> @bitcast_v9f64_to_v36f16(<9 x double> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v9f64_to_v36f16: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v46, off, s[0:3], s32 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v19 |
| ; GCN-NEXT: ; implicit-def: $vgpr42 |
| ; GCN-NEXT: ; implicit-def: $vgpr46 |
| ; GCN-NEXT: ; implicit-def: $vgpr53 |
| ; GCN-NEXT: ; implicit-def: $vgpr45 |
| ; GCN-NEXT: ; implicit-def: $vgpr51 |
| ; GCN-NEXT: ; implicit-def: $vgpr44 |
| ; GCN-NEXT: ; implicit-def: $vgpr49 |
| ; GCN-NEXT: ; implicit-def: $vgpr43 |
| ; GCN-NEXT: ; implicit-def: $vgpr39 |
| ; GCN-NEXT: ; implicit-def: $vgpr41 |
| ; GCN-NEXT: ; implicit-def: $vgpr37 |
| ; GCN-NEXT: ; implicit-def: $vgpr40 |
| ; GCN-NEXT: ; implicit-def: $vgpr35 |
| ; GCN-NEXT: ; implicit-def: $vgpr55 |
| ; GCN-NEXT: ; implicit-def: $vgpr33 |
| ; GCN-NEXT: ; implicit-def: $vgpr54 |
| ; GCN-NEXT: ; implicit-def: $vgpr31 |
| ; GCN-NEXT: ; implicit-def: $vgpr52 |
| ; GCN-NEXT: ; implicit-def: $vgpr29 |
| ; GCN-NEXT: ; implicit-def: $vgpr50 |
| ; GCN-NEXT: ; implicit-def: $vgpr27 |
| ; GCN-NEXT: ; implicit-def: $vgpr48 |
| ; GCN-NEXT: ; implicit-def: $vgpr25 |
| ; GCN-NEXT: ; implicit-def: $vgpr38 |
| ; GCN-NEXT: ; implicit-def: $vgpr24 |
| ; GCN-NEXT: ; implicit-def: $vgpr36 |
| ; GCN-NEXT: ; implicit-def: $vgpr23 |
| ; GCN-NEXT: ; implicit-def: $vgpr34 |
| ; GCN-NEXT: ; implicit-def: $vgpr22 |
| ; GCN-NEXT: ; implicit-def: $vgpr32 |
| ; GCN-NEXT: ; implicit-def: $vgpr21 |
| ; GCN-NEXT: ; implicit-def: $vgpr30 |
| ; GCN-NEXT: ; implicit-def: $vgpr20 |
| ; GCN-NEXT: ; implicit-def: $vgpr28 |
| ; GCN-NEXT: ; implicit-def: $vgpr19 |
| ; GCN-NEXT: ; implicit-def: $vgpr26 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB26_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.false |
| ; GCN-NEXT: v_lshrrev_b32_e32 v26, 16, v18 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v28, 16, v17 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v30, 16, v16 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v32, 16, v15 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v34, 16, v14 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v36, 16, v13 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v38, 16, v12 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v48, 16, v11 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v50, 16, v10 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v52, 16, v9 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v54, 16, v8 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v55, 16, v7 |
| ; GCN-NEXT: s_waitcnt expcnt(6) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v40, 16, v6 |
| ; GCN-NEXT: s_waitcnt expcnt(5) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v41, 16, v5 |
| ; GCN-NEXT: s_waitcnt expcnt(4) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v42, 16, v4 |
| ; GCN-NEXT: s_waitcnt expcnt(2) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v44, 16, v3 |
| ; GCN-NEXT: s_waitcnt expcnt(1) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v45, 16, v2 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v46, 16, v1 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v19, v18 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v20, v17 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v21, v16 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v22, v15 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v23, v14 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v24, v13 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v25, v12 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v27, v11 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v29, v10 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v31, v9 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v33, v8 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v35, v7 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v37, v6 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v39, v5 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v49, v4 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v51, v3 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v53, v2 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v26, v26 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v28, v28 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v30, v30 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v32, v32 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v34, v34 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v36, v36 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v38, v38 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v48, v48 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v50, v50 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v52, v52 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v54, v54 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v55, v55 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v40, v40 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v41, v41 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v43, v42 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v44, v44 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v45, v45 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v46, v46 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v42, v1 |
| ; GCN-NEXT: ; implicit-def: $vgpr1 |
| ; GCN-NEXT: ; implicit-def: $vgpr3 |
| ; GCN-NEXT: ; implicit-def: $vgpr5 |
| ; GCN-NEXT: ; implicit-def: $vgpr7 |
| ; GCN-NEXT: ; implicit-def: $vgpr9 |
| ; GCN-NEXT: ; implicit-def: $vgpr11 |
| ; GCN-NEXT: ; implicit-def: $vgpr13 |
| ; GCN-NEXT: ; implicit-def: $vgpr15 |
| ; GCN-NEXT: ; implicit-def: $vgpr17 |
| ; GCN-NEXT: .LBB26_2: ; %Flow |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB26_4 |
| ; GCN-NEXT: ; %bb.3: ; %cmp.true |
| ; GCN-NEXT: v_add_f64 v[1:2], v[1:2], 1.0 |
| ; GCN-NEXT: v_add_f64 v[3:4], v[3:4], 1.0 |
| ; GCN-NEXT: v_add_f64 v[5:6], v[5:6], 1.0 |
| ; GCN-NEXT: v_add_f64 v[7:8], v[7:8], 1.0 |
| ; GCN-NEXT: v_add_f64 v[9:10], v[9:10], 1.0 |
| ; GCN-NEXT: v_add_f64 v[11:12], v[11:12], 1.0 |
| ; GCN-NEXT: v_add_f64 v[13:14], v[13:14], 1.0 |
| ; GCN-NEXT: v_add_f64 v[15:16], v[15:16], 1.0 |
| ; GCN-NEXT: v_add_f64 v[17:18], v[17:18], 1.0 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_lshrrev_b32_e32 v46, 16, v1 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v45, 16, v2 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v44, 16, v3 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v43, 16, v4 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v41, 16, v5 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v40, 16, v6 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v55, 16, v7 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v54, 16, v8 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v52, 16, v9 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v50, 16, v10 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v48, 16, v11 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v38, 16, v12 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v36, 16, v13 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v34, 16, v14 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v32, 16, v15 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v30, 16, v16 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v28, 16, v17 |
| ; GCN-NEXT: v_lshrrev_b32_e32 v26, 16, v18 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v19, v18 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v20, v17 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v21, v16 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v22, v15 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v23, v14 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v24, v13 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v25, v12 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v27, v11 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v29, v10 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v31, v9 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v33, v8 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v35, v7 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v37, v6 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v39, v5 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v49, v4 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v51, v3 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v53, v2 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v42, v1 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v26, v26 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v28, v28 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v30, v30 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v32, v32 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v34, v34 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v36, v36 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v38, v38 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v48, v48 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v50, v50 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v52, v52 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v54, v54 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v55, v55 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v40, v40 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v41, v41 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v43, v43 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v44, v44 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v45, v45 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v46, v46 |
| ; GCN-NEXT: .LBB26_4: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v3, v46 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v4, v42 |
| ; GCN-NEXT: v_add_i32_e32 v1, vcc, 4, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v5, v45 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v6, v53 |
| ; GCN-NEXT: v_add_i32_e32 v2, vcc, 8, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v7, v44 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v8, v51 |
| ; GCN-NEXT: v_add_i32_e32 v9, vcc, 12, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v10, v43 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v11, v49 |
| ; GCN-NEXT: v_add_i32_e32 v12, vcc, 16, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v13, v41 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v14, v39 |
| ; GCN-NEXT: v_add_i32_e32 v15, vcc, 20, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v16, v40 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v17, v37 |
| ; GCN-NEXT: v_add_i32_e32 v18, vcc, 24, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v37, v55 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v35, v35 |
| ; GCN-NEXT: v_add_i32_e32 v39, vcc, 28, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v49, v54 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v33, v33 |
| ; GCN-NEXT: v_add_i32_e32 v51, vcc, 32, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v52, v52 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v31, v31 |
| ; GCN-NEXT: v_add_i32_e32 v53, vcc, 36, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v50, v50 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v29, v29 |
| ; GCN-NEXT: v_add_i32_e32 v54, vcc, 40, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v48, v48 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v27, v27 |
| ; GCN-NEXT: v_add_i32_e32 v55, vcc, 44, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v38, v38 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v25, v25 |
| ; GCN-NEXT: s_waitcnt expcnt(6) |
| ; GCN-NEXT: v_add_i32_e32 v40, vcc, 48, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v36, v36 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v24, v24 |
| ; GCN-NEXT: s_waitcnt expcnt(5) |
| ; GCN-NEXT: v_add_i32_e32 v41, vcc, 52, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v34, v34 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v23, v23 |
| ; GCN-NEXT: s_waitcnt expcnt(4) |
| ; GCN-NEXT: v_add_i32_e32 v42, vcc, 56, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v32, v32 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v22, v22 |
| ; GCN-NEXT: s_waitcnt expcnt(3) |
| ; GCN-NEXT: v_add_i32_e32 v43, vcc, 60, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v30, v30 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v21, v21 |
| ; GCN-NEXT: s_waitcnt expcnt(2) |
| ; GCN-NEXT: v_add_i32_e32 v44, vcc, 64, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v28, v28 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v20, v20 |
| ; GCN-NEXT: s_waitcnt expcnt(1) |
| ; GCN-NEXT: v_add_i32_e32 v45, vcc, 0x44, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v26, v26 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v19, v19 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v3, 16, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v5, 16, v5 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v7, 16, v7 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v10, 16, v10 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v13, 16, v13 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v16, 16, v16 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v37, 16, v37 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v49, 16, v49 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v52, 16, v52 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v50, 16, v50 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v48, 16, v48 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v38, 16, v38 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v36, 16, v36 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v34, 16, v34 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v32, 16, v32 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v30, 16, v30 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v28, 16, v28 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v26, 16, v26 |
| ; GCN-NEXT: v_or_b32_e32 v3, v4, v3 |
| ; GCN-NEXT: v_or_b32_e32 v4, v6, v5 |
| ; GCN-NEXT: v_or_b32_e32 v5, v8, v7 |
| ; GCN-NEXT: v_or_b32_e32 v6, v11, v10 |
| ; GCN-NEXT: v_or_b32_e32 v7, v14, v13 |
| ; GCN-NEXT: v_or_b32_e32 v8, v17, v16 |
| ; GCN-NEXT: v_or_b32_e32 v10, v35, v37 |
| ; GCN-NEXT: v_or_b32_e32 v11, v33, v49 |
| ; GCN-NEXT: v_or_b32_e32 v13, v31, v52 |
| ; GCN-NEXT: v_or_b32_e32 v14, v29, v50 |
| ; GCN-NEXT: v_or_b32_e32 v16, v27, v48 |
| ; GCN-NEXT: v_or_b32_e32 v17, v25, v38 |
| ; GCN-NEXT: v_or_b32_e32 v24, v24, v36 |
| ; GCN-NEXT: v_or_b32_e32 v23, v23, v34 |
| ; GCN-NEXT: v_or_b32_e32 v22, v22, v32 |
| ; GCN-NEXT: v_or_b32_e32 v21, v21, v30 |
| ; GCN-NEXT: v_or_b32_e32 v20, v20, v28 |
| ; GCN-NEXT: v_or_b32_e32 v19, v19, v26 |
| ; GCN-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v4, v1, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v5, v2, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v7, v12, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v8, v15, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v10, v18, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v11, v39, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v13, v51, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v14, v53, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v16, v54, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v17, v55, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v24, v40, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v23, v41, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v22, v42, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v21, v43, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v20, v44, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v19, v45, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_load_dword v46, off, s[0:3], s32 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v9f64_to_v36f16: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: ; implicit-def: $vgpr35 |
| ; VI-NEXT: ; implicit-def: $vgpr34 |
| ; VI-NEXT: ; implicit-def: $vgpr33 |
| ; VI-NEXT: ; implicit-def: $vgpr32 |
| ; VI-NEXT: ; implicit-def: $vgpr31 |
| ; VI-NEXT: ; implicit-def: $vgpr30 |
| ; VI-NEXT: ; implicit-def: $vgpr29 |
| ; VI-NEXT: ; implicit-def: $vgpr28 |
| ; VI-NEXT: ; implicit-def: $vgpr27 |
| ; VI-NEXT: ; implicit-def: $vgpr26 |
| ; VI-NEXT: ; implicit-def: $vgpr25 |
| ; VI-NEXT: ; implicit-def: $vgpr24 |
| ; VI-NEXT: ; implicit-def: $vgpr23 |
| ; VI-NEXT: ; implicit-def: $vgpr22 |
| ; VI-NEXT: ; implicit-def: $vgpr21 |
| ; VI-NEXT: ; implicit-def: $vgpr20 |
| ; VI-NEXT: ; implicit-def: $vgpr19 |
| ; VI-NEXT: ; implicit-def: $vgpr18 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB26_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.false |
| ; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; VI-NEXT: .LBB26_2: ; %Flow |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB26_4 |
| ; VI-NEXT: ; %bb.3: ; %cmp.true |
| ; VI-NEXT: v_add_f64 v[16:17], v[16:17], 1.0 |
| ; VI-NEXT: v_add_f64 v[14:15], v[14:15], 1.0 |
| ; VI-NEXT: v_add_f64 v[12:13], v[12:13], 1.0 |
| ; VI-NEXT: v_add_f64 v[10:11], v[10:11], 1.0 |
| ; VI-NEXT: v_add_f64 v[8:9], v[8:9], 1.0 |
| ; VI-NEXT: v_add_f64 v[6:7], v[6:7], 1.0 |
| ; VI-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 |
| ; VI-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 |
| ; VI-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 |
| ; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; VI-NEXT: .LBB26_4: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 |
| ; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 |
| ; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 |
| ; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 |
| ; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31 |
| ; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30 |
| ; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29 |
| ; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28 |
| ; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27 |
| ; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26 |
| ; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25 |
| ; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24 |
| ; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23 |
| ; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22 |
| ; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21 |
| ; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20 |
| ; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19 |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 |
| ; VI-NEXT: v_or_b32_sdwa v0, v0, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v1, v1, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v2, v2, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v3, v3, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v4, v4, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v5, v5, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v6, v6, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v7, v7, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v8, v8, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v9, v9, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v10, v10, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v11, v11, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v12, v12, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v13, v13, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v14, v14, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v15, v15, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v16, v16, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v17, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v9f64_to_v36f16: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr35 |
| ; GFX9-NEXT: ; implicit-def: $vgpr34 |
| ; GFX9-NEXT: ; implicit-def: $vgpr33 |
| ; GFX9-NEXT: ; implicit-def: $vgpr32 |
| ; GFX9-NEXT: ; implicit-def: $vgpr31 |
| ; GFX9-NEXT: ; implicit-def: $vgpr30 |
| ; GFX9-NEXT: ; implicit-def: $vgpr29 |
| ; GFX9-NEXT: ; implicit-def: $vgpr28 |
| ; GFX9-NEXT: ; implicit-def: $vgpr27 |
| ; GFX9-NEXT: ; implicit-def: $vgpr26 |
| ; GFX9-NEXT: ; implicit-def: $vgpr25 |
| ; GFX9-NEXT: ; implicit-def: $vgpr24 |
| ; GFX9-NEXT: ; implicit-def: $vgpr23 |
| ; GFX9-NEXT: ; implicit-def: $vgpr22 |
| ; GFX9-NEXT: ; implicit-def: $vgpr21 |
| ; GFX9-NEXT: ; implicit-def: $vgpr20 |
| ; GFX9-NEXT: ; implicit-def: $vgpr19 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB26_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.false |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX9-NEXT: .LBB26_2: ; %Flow |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB26_4 |
| ; GFX9-NEXT: ; %bb.3: ; %cmp.true |
| ; GFX9-NEXT: v_add_f64 v[16:17], v[16:17], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[14:15], v[14:15], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[12:13], v[12:13], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[10:11], v[10:11], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[8:9], v[8:9], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[6:7], v[6:7], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 |
| ; GFX9-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX9-NEXT: .LBB26_4: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: s_mov_b32 s4, 0x5040100 |
| ; GFX9-NEXT: v_perm_b32 v0, v35, v0, s4 |
| ; GFX9-NEXT: v_perm_b32 v1, v34, v1, s4 |
| ; GFX9-NEXT: v_perm_b32 v2, v33, v2, s4 |
| ; GFX9-NEXT: v_perm_b32 v3, v32, v3, s4 |
| ; GFX9-NEXT: v_perm_b32 v4, v31, v4, s4 |
| ; GFX9-NEXT: v_perm_b32 v5, v30, v5, s4 |
| ; GFX9-NEXT: v_perm_b32 v6, v29, v6, s4 |
| ; GFX9-NEXT: v_perm_b32 v7, v28, v7, s4 |
| ; GFX9-NEXT: v_perm_b32 v8, v27, v8, s4 |
| ; GFX9-NEXT: v_perm_b32 v9, v26, v9, s4 |
| ; GFX9-NEXT: v_perm_b32 v10, v25, v10, s4 |
| ; GFX9-NEXT: v_perm_b32 v11, v24, v11, s4 |
| ; GFX9-NEXT: v_perm_b32 v12, v23, v12, s4 |
| ; GFX9-NEXT: v_perm_b32 v13, v22, v13, s4 |
| ; GFX9-NEXT: v_perm_b32 v14, v21, v14, s4 |
| ; GFX9-NEXT: v_perm_b32 v15, v20, v15, s4 |
| ; GFX9-NEXT: v_perm_b32 v16, v19, v16, s4 |
| ; GFX9-NEXT: v_perm_b32 v17, v18, v17, s4 |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v9f64_to_v36f16: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v18 |
| ; GFX11-NEXT: ; implicit-def: $vgpr35 |
| ; GFX11-NEXT: ; implicit-def: $vgpr34 |
| ; GFX11-NEXT: ; implicit-def: $vgpr33 |
| ; GFX11-NEXT: ; implicit-def: $vgpr32 |
| ; GFX11-NEXT: ; implicit-def: $vgpr31 |
| ; GFX11-NEXT: ; implicit-def: $vgpr30 |
| ; GFX11-NEXT: ; implicit-def: $vgpr29 |
| ; GFX11-NEXT: ; implicit-def: $vgpr28 |
| ; GFX11-NEXT: ; implicit-def: $vgpr27 |
| ; GFX11-NEXT: ; implicit-def: $vgpr26 |
| ; GFX11-NEXT: ; implicit-def: $vgpr25 |
| ; GFX11-NEXT: ; implicit-def: $vgpr24 |
| ; GFX11-NEXT: ; implicit-def: $vgpr23 |
| ; GFX11-NEXT: ; implicit-def: $vgpr22 |
| ; GFX11-NEXT: ; implicit-def: $vgpr21 |
| ; GFX11-NEXT: ; implicit-def: $vgpr20 |
| ; GFX11-NEXT: ; implicit-def: $vgpr19 |
| ; GFX11-NEXT: ; implicit-def: $vgpr18 |
| ; GFX11-NEXT: s_and_saveexec_b32 s0, vcc_lo |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB26_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.false |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX11-NEXT: .LBB26_2: ; %Flow |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB26_4 |
| ; GFX11-NEXT: ; %bb.3: ; %cmp.true |
| ; GFX11-NEXT: v_add_f64 v[16:17], v[16:17], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[14:15], v[14:15], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[12:13], v[12:13], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[10:11], v[10:11], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[8:9], v[8:9], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[6:7], v[6:7], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[4:5], v[4:5], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[2:3], v[2:3], 1.0 |
| ; GFX11-NEXT: v_add_f64 v[0:1], v[0:1], 1.0 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v18, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; GFX11-NEXT: .LBB26_4: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) |
| ; GFX11-NEXT: v_perm_b32 v0, v35, v0, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v1, v34, v1, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v2, v33, v2, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v3, v32, v3, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v4, v31, v4, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v5, v30, v5, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v6, v29, v6, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v7, v28, v7, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v8, v27, v8, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v9, v26, v9, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v10, v25, v10, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v11, v24, v11, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v12, v23, v12, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v13, v22, v13, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v14, v21, v14, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v15, v20, v15, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v16, v19, v16, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v17, v18, v17, 0x5040100 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = fadd <9 x double> %a, splat (double 1.000000e+00) |
| %a2 = bitcast <9 x double> %a1 to <36 x half> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <9 x double> %a to <36 x half> |
| br label %end |
| |
| end: |
| %phi = phi <36 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <36 x half> %phi |
| } |
| |
| define <9 x double> @bitcast_v36f16_to_v9f64(<36 x half> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v36f16_to_v9f64: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:16 |
| ; GCN-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:12 |
| ; GCN-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:8 |
| ; GCN-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:4 |
| ; GCN-NEXT: buffer_load_dword v49, off, s[0:3], s32 |
| ; GCN-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:20 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v35, v1 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v34, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v33, v3 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v32, v2 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v63, v5 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v62, v4 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v61, v7 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v60, v6 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v59, v9 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v46, v8 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v58, v11 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v44, v10 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v57, v13 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v42, v12 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v56, v15 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v40, v14 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v47, v17 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v54, v16 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v45, v19 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v52, v18 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v43, v21 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v51, v20 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v41, v23 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v48, v22 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v55, v25 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v0, v24 |
| ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v53, v27 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v0, v26 |
| ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v50, v29 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v0, v28 |
| ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v0, v30 |
| ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill |
| ; GCN-NEXT: s_waitcnt vmcnt(4) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v39 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v49, v49 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v38, v38 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v37, v37 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v39, v31 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v36, v36 |
| ; GCN-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB27_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.false |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_lshlrev_b32_e32 v0, 16, v35 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v33 |
| ; GCN-NEXT: v_or_b32_e32 v0, v34, v0 |
| ; GCN-NEXT: v_or_b32_e32 v1, v32, v1 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v2, 16, v63 |
| ; GCN-NEXT: v_or_b32_e32 v2, v62, v2 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v3, 16, v61 |
| ; GCN-NEXT: v_or_b32_e32 v3, v60, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v4, 16, v59 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v5, 16, v58 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v6, 16, v57 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v7, 16, v56 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v8, 16, v47 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v9, 16, v45 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v10, 16, v43 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v11, 16, v41 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v12, 16, v55 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v13, 16, v53 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v14, 16, v50 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v15, 16, v49 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v16, 16, v38 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v17, 16, v39 |
| ; GCN-NEXT: v_or_b32_e32 v4, v46, v4 |
| ; GCN-NEXT: v_or_b32_e32 v5, v44, v5 |
| ; GCN-NEXT: v_or_b32_e32 v6, v42, v6 |
| ; GCN-NEXT: v_or_b32_e32 v7, v40, v7 |
| ; GCN-NEXT: v_or_b32_e32 v8, v54, v8 |
| ; GCN-NEXT: v_or_b32_e32 v9, v52, v9 |
| ; GCN-NEXT: v_or_b32_e32 v10, v51, v10 |
| ; GCN-NEXT: v_or_b32_e32 v11, v48, v11 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v12, v18, v12 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v13, v18, v13 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v14, v18, v14 |
| ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_or_b32_e32 v15, v18, v15 |
| ; GCN-NEXT: v_or_b32_e32 v16, v37, v16 |
| ; GCN-NEXT: v_or_b32_e32 v17, v36, v17 |
| ; GCN-NEXT: ; implicit-def: $vgpr35 |
| ; GCN-NEXT: ; implicit-def: $vgpr34 |
| ; GCN-NEXT: ; implicit-def: $vgpr33 |
| ; GCN-NEXT: ; implicit-def: $vgpr32 |
| ; GCN-NEXT: ; implicit-def: $vgpr63 |
| ; GCN-NEXT: ; implicit-def: $vgpr62 |
| ; GCN-NEXT: ; implicit-def: $vgpr61 |
| ; GCN-NEXT: ; implicit-def: $vgpr60 |
| ; GCN-NEXT: ; implicit-def: $vgpr59 |
| ; GCN-NEXT: ; implicit-def: $vgpr46 |
| ; GCN-NEXT: ; implicit-def: $vgpr58 |
| ; GCN-NEXT: ; implicit-def: $vgpr44 |
| ; GCN-NEXT: ; implicit-def: $vgpr57 |
| ; GCN-NEXT: ; implicit-def: $vgpr42 |
| ; GCN-NEXT: ; implicit-def: $vgpr56 |
| ; GCN-NEXT: ; implicit-def: $vgpr40 |
| ; GCN-NEXT: ; implicit-def: $vgpr47 |
| ; GCN-NEXT: ; implicit-def: $vgpr54 |
| ; GCN-NEXT: ; implicit-def: $vgpr45 |
| ; GCN-NEXT: ; implicit-def: $vgpr52 |
| ; GCN-NEXT: ; implicit-def: $vgpr43 |
| ; GCN-NEXT: ; implicit-def: $vgpr51 |
| ; GCN-NEXT: ; implicit-def: $vgpr41 |
| ; GCN-NEXT: ; implicit-def: $vgpr48 |
| ; GCN-NEXT: ; implicit-def: $vgpr55 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr53 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr50 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr49 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; kill: killed $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr38 |
| ; GCN-NEXT: ; implicit-def: $vgpr37 |
| ; GCN-NEXT: ; implicit-def: $vgpr39 |
| ; GCN-NEXT: ; implicit-def: $vgpr36 |
| ; GCN-NEXT: .LBB27_2: ; %Flow |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB27_4 |
| ; GCN-NEXT: ; %bb.3: ; %cmp.true |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v0, v35 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v1, v34 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v2, v33 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v3, v32 |
| ; GCN-NEXT: v_add_f32_e32 v0, 0x38000000, v0 |
| ; GCN-NEXT: v_add_f32_e32 v1, 0x38000000, v1 |
| ; GCN-NEXT: v_add_f32_e32 v2, 0x38000000, v2 |
| ; GCN-NEXT: v_add_f32_e32 v3, 0x38000000, v3 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v0, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v1, v1 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v2, v2 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v3, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v0, 16, v0 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v2, 16, v2 |
| ; GCN-NEXT: v_or_b32_e32 v0, v1, v0 |
| ; GCN-NEXT: v_or_b32_e32 v1, v3, v2 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v2, v63 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v3, v62 |
| ; GCN-NEXT: v_add_f32_e32 v2, 0x38000000, v2 |
| ; GCN-NEXT: v_add_f32_e32 v3, 0x38000000, v3 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v2, v2 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v3, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v2, 16, v2 |
| ; GCN-NEXT: v_or_b32_e32 v2, v3, v2 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v3, v61 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v4, v60 |
| ; GCN-NEXT: v_add_f32_e32 v3, 0x38000000, v3 |
| ; GCN-NEXT: v_add_f32_e32 v4, 0x38000000, v4 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v3, v3 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v4, v4 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v3, 16, v3 |
| ; GCN-NEXT: v_or_b32_e32 v3, v4, v3 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v4, v59 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v5, v46 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v6, v58 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v7, v44 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v8, v57 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v9, v42 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v10, v56 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v11, v40 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v12, v47 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v13, v54 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v14, v45 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v15, v52 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v16, v43 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v17, v51 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v18, v41 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v19, v48 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v20, v55 |
| ; GCN-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v21, v21 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v22, v53 |
| ; GCN-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v23, v23 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v24, v50 |
| ; GCN-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v25, v25 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v26, v49 |
| ; GCN-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v27, v27 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v28, v38 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v29, v37 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v30, v39 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v31, v36 |
| ; GCN-NEXT: v_add_f32_e32 v4, 0x38000000, v4 |
| ; GCN-NEXT: v_add_f32_e32 v5, 0x38000000, v5 |
| ; GCN-NEXT: v_add_f32_e32 v6, 0x38000000, v6 |
| ; GCN-NEXT: v_add_f32_e32 v7, 0x38000000, v7 |
| ; GCN-NEXT: v_add_f32_e32 v8, 0x38000000, v8 |
| ; GCN-NEXT: v_add_f32_e32 v9, 0x38000000, v9 |
| ; GCN-NEXT: v_add_f32_e32 v10, 0x38000000, v10 |
| ; GCN-NEXT: v_add_f32_e32 v11, 0x38000000, v11 |
| ; GCN-NEXT: v_add_f32_e32 v12, 0x38000000, v12 |
| ; GCN-NEXT: v_add_f32_e32 v13, 0x38000000, v13 |
| ; GCN-NEXT: v_add_f32_e32 v14, 0x38000000, v14 |
| ; GCN-NEXT: v_add_f32_e32 v15, 0x38000000, v15 |
| ; GCN-NEXT: v_add_f32_e32 v16, 0x38000000, v16 |
| ; GCN-NEXT: v_add_f32_e32 v17, 0x38000000, v17 |
| ; GCN-NEXT: v_add_f32_e32 v18, 0x38000000, v18 |
| ; GCN-NEXT: v_add_f32_e32 v19, 0x38000000, v19 |
| ; GCN-NEXT: v_add_f32_e32 v20, 0x38000000, v20 |
| ; GCN-NEXT: v_add_f32_e32 v21, 0x38000000, v21 |
| ; GCN-NEXT: v_add_f32_e32 v22, 0x38000000, v22 |
| ; GCN-NEXT: v_add_f32_e32 v23, 0x38000000, v23 |
| ; GCN-NEXT: v_add_f32_e32 v24, 0x38000000, v24 |
| ; GCN-NEXT: v_add_f32_e32 v25, 0x38000000, v25 |
| ; GCN-NEXT: v_add_f32_e32 v26, 0x38000000, v26 |
| ; GCN-NEXT: v_add_f32_e32 v27, 0x38000000, v27 |
| ; GCN-NEXT: v_add_f32_e32 v28, 0x38000000, v28 |
| ; GCN-NEXT: v_add_f32_e32 v29, 0x38000000, v29 |
| ; GCN-NEXT: v_add_f32_e32 v30, 0x38000000, v30 |
| ; GCN-NEXT: v_add_f32_e32 v31, 0x38000000, v31 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v4, v4 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v5, v5 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v6, v6 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v7, v7 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v8, v8 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v9, v9 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v10, v10 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v11, v11 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v12, v12 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v13, v13 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v14, v14 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v15, v15 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v16, v16 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v17, v17 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v18, v18 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v19, v19 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v20, v20 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v21, v21 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v22, v22 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v23, v23 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v24, v24 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v25, v25 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v26, v26 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v27, v27 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v28, v28 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v29, v29 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v30, v30 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v31, v31 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v4, 16, v4 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v6, 16, v6 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v8, 16, v8 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v10, 16, v10 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v12, 16, v12 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v14, 16, v14 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v16, 16, v16 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v18, 16, v18 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v20, 16, v20 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v22, 16, v22 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v24, 16, v24 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v26, 16, v26 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v28, 16, v28 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v30, 16, v30 |
| ; GCN-NEXT: v_or_b32_e32 v4, v5, v4 |
| ; GCN-NEXT: v_or_b32_e32 v5, v7, v6 |
| ; GCN-NEXT: v_or_b32_e32 v6, v9, v8 |
| ; GCN-NEXT: v_or_b32_e32 v7, v11, v10 |
| ; GCN-NEXT: v_or_b32_e32 v8, v13, v12 |
| ; GCN-NEXT: v_or_b32_e32 v9, v15, v14 |
| ; GCN-NEXT: v_or_b32_e32 v10, v17, v16 |
| ; GCN-NEXT: v_or_b32_e32 v11, v19, v18 |
| ; GCN-NEXT: v_or_b32_e32 v12, v21, v20 |
| ; GCN-NEXT: v_or_b32_e32 v13, v23, v22 |
| ; GCN-NEXT: v_or_b32_e32 v14, v25, v24 |
| ; GCN-NEXT: v_or_b32_e32 v15, v27, v26 |
| ; GCN-NEXT: v_or_b32_e32 v16, v29, v28 |
| ; GCN-NEXT: v_or_b32_e32 v17, v31, v30 |
| ; GCN-NEXT: .LBB27_4: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v36f16_to_v9f64: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill |
| ; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 ; 4-byte Folded Spill |
| ; VI-NEXT: v_mov_b32_e32 v32, v17 |
| ; VI-NEXT: v_mov_b32_e32 v33, v16 |
| ; VI-NEXT: v_mov_b32_e32 v34, v15 |
| ; VI-NEXT: v_mov_b32_e32 v35, v14 |
| ; VI-NEXT: v_mov_b32_e32 v36, v13 |
| ; VI-NEXT: v_mov_b32_e32 v37, v12 |
| ; VI-NEXT: v_mov_b32_e32 v38, v11 |
| ; VI-NEXT: v_mov_b32_e32 v39, v10 |
| ; VI-NEXT: v_mov_b32_e32 v48, v9 |
| ; VI-NEXT: v_mov_b32_e32 v49, v8 |
| ; VI-NEXT: v_mov_b32_e32 v50, v7 |
| ; VI-NEXT: v_mov_b32_e32 v51, v6 |
| ; VI-NEXT: v_mov_b32_e32 v52, v5 |
| ; VI-NEXT: v_mov_b32_e32 v53, v4 |
| ; VI-NEXT: v_mov_b32_e32 v54, v3 |
| ; VI-NEXT: v_mov_b32_e32 v55, v2 |
| ; VI-NEXT: v_mov_b32_e32 v40, v1 |
| ; VI-NEXT: v_mov_b32_e32 v41, v0 |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB27_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.false |
| ; VI-NEXT: v_mov_b32_e32 v17, 16 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v0, v17, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v1, v17, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v2, v17, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v3, v17, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v4, v17, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v5, v17, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v6, v17, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v7, v17, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v8, v17, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v9, v17, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v10, v17, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v11, v17, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v12, v17, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v13, v17, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v14, v17, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v15, v17, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v16, v17, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_lshlrev_b32_sdwa v17, v17, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 |
| ; VI-NEXT: v_or_b32_sdwa v0, v41, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v1, v40, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v2, v55, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v3, v54, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v4, v53, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v5, v52, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v6, v51, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v7, v50, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v8, v49, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v9, v48, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v10, v39, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v11, v38, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v12, v37, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v13, v36, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v14, v35, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v15, v34, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v16, v33, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v17, v32, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: ; implicit-def: $vgpr41 |
| ; VI-NEXT: ; implicit-def: $vgpr40 |
| ; VI-NEXT: ; implicit-def: $vgpr55 |
| ; VI-NEXT: ; implicit-def: $vgpr54 |
| ; VI-NEXT: ; implicit-def: $vgpr53 |
| ; VI-NEXT: ; implicit-def: $vgpr52 |
| ; VI-NEXT: ; implicit-def: $vgpr51 |
| ; VI-NEXT: ; implicit-def: $vgpr50 |
| ; VI-NEXT: ; implicit-def: $vgpr49 |
| ; VI-NEXT: ; implicit-def: $vgpr48 |
| ; VI-NEXT: ; implicit-def: $vgpr39 |
| ; VI-NEXT: ; implicit-def: $vgpr38 |
| ; VI-NEXT: ; implicit-def: $vgpr37 |
| ; VI-NEXT: ; implicit-def: $vgpr36 |
| ; VI-NEXT: ; implicit-def: $vgpr35 |
| ; VI-NEXT: ; implicit-def: $vgpr34 |
| ; VI-NEXT: ; implicit-def: $vgpr33 |
| ; VI-NEXT: ; implicit-def: $vgpr32 |
| ; VI-NEXT: .LBB27_2: ; %Flow |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB27_4 |
| ; VI-NEXT: ; %bb.3: ; %cmp.true |
| ; VI-NEXT: v_mov_b32_e32 v17, 0x200 |
| ; VI-NEXT: v_add_f16_sdwa v0, v41, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v1, 0x200, v41 |
| ; VI-NEXT: v_or_b32_e32 v0, v1, v0 |
| ; VI-NEXT: v_add_f16_sdwa v1, v40, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v2, 0x200, v40 |
| ; VI-NEXT: v_or_b32_e32 v1, v2, v1 |
| ; VI-NEXT: v_add_f16_sdwa v2, v55, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v3, 0x200, v55 |
| ; VI-NEXT: v_or_b32_e32 v2, v3, v2 |
| ; VI-NEXT: v_add_f16_sdwa v3, v54, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v4, 0x200, v54 |
| ; VI-NEXT: v_or_b32_e32 v3, v4, v3 |
| ; VI-NEXT: v_add_f16_sdwa v4, v53, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v5, 0x200, v53 |
| ; VI-NEXT: v_or_b32_e32 v4, v5, v4 |
| ; VI-NEXT: v_add_f16_sdwa v5, v52, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v6, 0x200, v52 |
| ; VI-NEXT: v_or_b32_e32 v5, v6, v5 |
| ; VI-NEXT: v_add_f16_sdwa v6, v51, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v7, 0x200, v51 |
| ; VI-NEXT: v_or_b32_e32 v6, v7, v6 |
| ; VI-NEXT: v_add_f16_sdwa v7, v50, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v8, 0x200, v50 |
| ; VI-NEXT: v_or_b32_e32 v7, v8, v7 |
| ; VI-NEXT: v_add_f16_sdwa v8, v49, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v9, 0x200, v49 |
| ; VI-NEXT: v_or_b32_e32 v8, v9, v8 |
| ; VI-NEXT: v_add_f16_sdwa v9, v48, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v10, 0x200, v48 |
| ; VI-NEXT: v_or_b32_e32 v9, v10, v9 |
| ; VI-NEXT: v_add_f16_sdwa v10, v39, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v11, 0x200, v39 |
| ; VI-NEXT: v_or_b32_e32 v10, v11, v10 |
| ; VI-NEXT: v_add_f16_sdwa v11, v38, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v12, 0x200, v38 |
| ; VI-NEXT: v_or_b32_e32 v11, v12, v11 |
| ; VI-NEXT: v_add_f16_sdwa v12, v37, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v13, 0x200, v37 |
| ; VI-NEXT: v_or_b32_e32 v12, v13, v12 |
| ; VI-NEXT: v_add_f16_sdwa v13, v36, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v14, 0x200, v36 |
| ; VI-NEXT: v_or_b32_e32 v13, v14, v13 |
| ; VI-NEXT: v_add_f16_sdwa v14, v35, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v15, 0x200, v35 |
| ; VI-NEXT: v_or_b32_e32 v14, v15, v14 |
| ; VI-NEXT: v_add_f16_sdwa v15, v34, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v16, 0x200, v34 |
| ; VI-NEXT: v_or_b32_e32 v15, v16, v15 |
| ; VI-NEXT: v_add_f16_sdwa v16, v33, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v18, 0x200, v33 |
| ; VI-NEXT: v_or_b32_e32 v16, v18, v16 |
| ; VI-NEXT: v_add_f16_sdwa v17, v32, v17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD |
| ; VI-NEXT: v_add_f16_e32 v18, 0x200, v32 |
| ; VI-NEXT: v_or_b32_e32 v17, v18, v17 |
| ; VI-NEXT: .LBB27_4: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 ; 4-byte Folded Reload |
| ; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload |
| ; VI-NEXT: s_waitcnt vmcnt(0) |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v36f16_to_v9f64: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_mov_b32_e32 v32, v17 |
| ; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill |
| ; GFX9-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_mov_b32_e32 v33, v16 |
| ; GFX9-NEXT: v_mov_b32_e32 v41, v0 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v32 |
| ; GFX9-NEXT: v_mov_b32_e32 v34, v15 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v33 |
| ; GFX9-NEXT: v_mov_b32_e32 v35, v14 |
| ; GFX9-NEXT: v_mov_b32_e32 v36, v13 |
| ; GFX9-NEXT: v_mov_b32_e32 v37, v12 |
| ; GFX9-NEXT: v_mov_b32_e32 v38, v11 |
| ; GFX9-NEXT: v_mov_b32_e32 v39, v10 |
| ; GFX9-NEXT: v_mov_b32_e32 v48, v9 |
| ; GFX9-NEXT: v_mov_b32_e32 v49, v8 |
| ; GFX9-NEXT: v_mov_b32_e32 v50, v7 |
| ; GFX9-NEXT: v_mov_b32_e32 v51, v6 |
| ; GFX9-NEXT: v_mov_b32_e32 v52, v5 |
| ; GFX9-NEXT: v_mov_b32_e32 v53, v4 |
| ; GFX9-NEXT: v_mov_b32_e32 v54, v3 |
| ; GFX9-NEXT: v_mov_b32_e32 v55, v2 |
| ; GFX9-NEXT: v_mov_b32_e32 v40, v1 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v34 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v35 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v46, 16, v36 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v47, 16, v37 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v56, 16, v38 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v57, 16, v39 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v58, 16, v48 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v59, 16, v49 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v60, 16, v50 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v61, 16, v51 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v62, 16, v52 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v63, 16, v53 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v42, 16, v54 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v43, 16, v55 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v44, 16, v40 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v45, 16, v41 |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill |
| ; GFX9-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB27_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.false |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: s_mov_b32 s6, 0x5040100 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v14, 16, v35 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v15, 16, v34 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v16, 16, v33 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v17, 16, v32 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: v_perm_b32 v0, v45, v41, s6 |
| ; GFX9-NEXT: v_perm_b32 v1, v44, v40, s6 |
| ; GFX9-NEXT: v_perm_b32 v2, v43, v55, s6 |
| ; GFX9-NEXT: v_perm_b32 v3, v42, v54, s6 |
| ; GFX9-NEXT: v_perm_b32 v4, v63, v53, s6 |
| ; GFX9-NEXT: v_perm_b32 v5, v62, v52, s6 |
| ; GFX9-NEXT: v_perm_b32 v6, v61, v51, s6 |
| ; GFX9-NEXT: v_perm_b32 v7, v60, v50, s6 |
| ; GFX9-NEXT: v_perm_b32 v8, v59, v49, s6 |
| ; GFX9-NEXT: v_perm_b32 v9, v58, v48, s6 |
| ; GFX9-NEXT: v_perm_b32 v10, v57, v39, s6 |
| ; GFX9-NEXT: v_perm_b32 v11, v56, v38, s6 |
| ; GFX9-NEXT: v_perm_b32 v12, v47, v37, s6 |
| ; GFX9-NEXT: v_perm_b32 v13, v46, v36, s6 |
| ; GFX9-NEXT: v_perm_b32 v14, v14, v35, s6 |
| ; GFX9-NEXT: v_perm_b32 v15, v15, v34, s6 |
| ; GFX9-NEXT: v_perm_b32 v16, v16, v33, s6 |
| ; GFX9-NEXT: v_perm_b32 v17, v17, v32, s6 |
| ; GFX9-NEXT: ; implicit-def: $vgpr41 |
| ; GFX9-NEXT: ; implicit-def: $vgpr40 |
| ; GFX9-NEXT: ; implicit-def: $vgpr55 |
| ; GFX9-NEXT: ; implicit-def: $vgpr54 |
| ; GFX9-NEXT: ; implicit-def: $vgpr53 |
| ; GFX9-NEXT: ; implicit-def: $vgpr52 |
| ; GFX9-NEXT: ; implicit-def: $vgpr51 |
| ; GFX9-NEXT: ; implicit-def: $vgpr50 |
| ; GFX9-NEXT: ; implicit-def: $vgpr49 |
| ; GFX9-NEXT: ; implicit-def: $vgpr48 |
| ; GFX9-NEXT: ; implicit-def: $vgpr39 |
| ; GFX9-NEXT: ; implicit-def: $vgpr38 |
| ; GFX9-NEXT: ; implicit-def: $vgpr37 |
| ; GFX9-NEXT: ; implicit-def: $vgpr36 |
| ; GFX9-NEXT: ; implicit-def: $vgpr35 |
| ; GFX9-NEXT: ; implicit-def: $vgpr34 |
| ; GFX9-NEXT: ; implicit-def: $vgpr33 |
| ; GFX9-NEXT: ; implicit-def: $vgpr32 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr18 |
| ; GFX9-NEXT: ; kill: killed $vgpr18 |
| ; GFX9-NEXT: ; implicit-def: $vgpr46 |
| ; GFX9-NEXT: ; implicit-def: $vgpr47 |
| ; GFX9-NEXT: ; implicit-def: $vgpr56 |
| ; GFX9-NEXT: ; implicit-def: $vgpr57 |
| ; GFX9-NEXT: ; implicit-def: $vgpr58 |
| ; GFX9-NEXT: ; implicit-def: $vgpr59 |
| ; GFX9-NEXT: ; implicit-def: $vgpr60 |
| ; GFX9-NEXT: ; implicit-def: $vgpr61 |
| ; GFX9-NEXT: ; implicit-def: $vgpr62 |
| ; GFX9-NEXT: ; implicit-def: $vgpr63 |
| ; GFX9-NEXT: ; implicit-def: $vgpr42 |
| ; GFX9-NEXT: ; implicit-def: $vgpr43 |
| ; GFX9-NEXT: ; implicit-def: $vgpr44 |
| ; GFX9-NEXT: ; implicit-def: $vgpr45 |
| ; GFX9-NEXT: .LBB27_2: ; %Flow |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB27_4 |
| ; GFX9-NEXT: ; %bb.3: ; %cmp.true |
| ; GFX9-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload |
| ; GFX9-NEXT: s_mov_b32 s6, 0x5040100 |
| ; GFX9-NEXT: v_perm_b32 v0, v45, v41, s6 |
| ; GFX9-NEXT: s_movk_i32 s7, 0x200 |
| ; GFX9-NEXT: v_perm_b32 v1, v44, v40, s6 |
| ; GFX9-NEXT: v_perm_b32 v2, v43, v55, s6 |
| ; GFX9-NEXT: v_perm_b32 v3, v42, v54, s6 |
| ; GFX9-NEXT: v_perm_b32 v4, v63, v53, s6 |
| ; GFX9-NEXT: v_perm_b32 v5, v62, v52, s6 |
| ; GFX9-NEXT: v_perm_b32 v6, v61, v51, s6 |
| ; GFX9-NEXT: v_perm_b32 v7, v60, v50, s6 |
| ; GFX9-NEXT: v_perm_b32 v8, v59, v49, s6 |
| ; GFX9-NEXT: v_perm_b32 v9, v58, v48, s6 |
| ; GFX9-NEXT: v_perm_b32 v10, v57, v39, s6 |
| ; GFX9-NEXT: v_perm_b32 v11, v56, v38, s6 |
| ; GFX9-NEXT: v_perm_b32 v12, v47, v37, s6 |
| ; GFX9-NEXT: v_perm_b32 v13, v46, v36, s6 |
| ; GFX9-NEXT: v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v3, v3, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v4, v4, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v12, v12, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v13, v13, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: s_waitcnt vmcnt(3) |
| ; GFX9-NEXT: v_perm_b32 v14, v14, v35, s6 |
| ; GFX9-NEXT: s_waitcnt vmcnt(2) |
| ; GFX9-NEXT: v_perm_b32 v15, v15, v34, s6 |
| ; GFX9-NEXT: s_waitcnt vmcnt(1) |
| ; GFX9-NEXT: v_perm_b32 v16, v16, v33, s6 |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) |
| ; GFX9-NEXT: v_perm_b32 v17, v17, v32, s6 |
| ; GFX9-NEXT: v_pk_add_f16 v14, v14, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v15, v15, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v16, v16, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v17, v17, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: .LBB27_4: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload |
| ; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v36f16_to_v9f64: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v0 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v36, 16, v3 |
| ; GFX11-NEXT: v_perm_b32 v4, v32, v4, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v0, v33, v0, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v1, v34, v1, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v2, v35, v2, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v3, v36, v3, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v5, v31, v5, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v6, v30, v6, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v7, v29, v7, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v8, v28, v8, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v9, v27, v9, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v10, v26, v10, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v11, v25, v11, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v12, v24, v12, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v13, v23, v13, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v14, v22, v14, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v15, v21, v15, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v16, v20, v16, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v17, v19, v17, 0x5040100 |
| ; GFX11-NEXT: s_mov_b32 s0, exec_lo |
| ; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v18 |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB27_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX11-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1] |
| ; GFX11-NEXT: .LBB27_2: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = fadd <36 x half> %a, splat (half 0xH0200) |
| %a2 = bitcast <36 x half> %a1 to <9 x double> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <36 x half> %a to <9 x double> |
| br label %end |
| |
| end: |
| %phi = phi <9 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <9 x double> %phi |
| } |
| |
| define <36 x half> @bitcast_v36i16_to_v36f16(<36 x i16> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v36i16_to_v36f16: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:24 |
| ; GCN-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:20 |
| ; GCN-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:16 |
| ; GCN-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:12 |
| ; GCN-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:8 |
| ; GCN-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:4 |
| ; GCN-NEXT: buffer_load_dword v34, off, s[0:3], s32 |
| ; GCN-NEXT: s_waitcnt vmcnt(6) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31 |
| ; GCN-NEXT: ; implicit-def: $vgpr31 |
| ; GCN-NEXT: ; kill: killed $vgpr31 |
| ; GCN-NEXT: ; implicit-def: $vgpr41 |
| ; GCN-NEXT: ; implicit-def: $vgpr31 |
| ; GCN-NEXT: ; kill: killed $vgpr31 |
| ; GCN-NEXT: ; implicit-def: $vgpr42 |
| ; GCN-NEXT: ; implicit-def: $vgpr31 |
| ; GCN-NEXT: ; kill: killed $vgpr31 |
| ; GCN-NEXT: ; implicit-def: $vgpr43 |
| ; GCN-NEXT: ; implicit-def: $vgpr31 |
| ; GCN-NEXT: ; kill: killed $vgpr31 |
| ; GCN-NEXT: ; implicit-def: $vgpr44 |
| ; GCN-NEXT: ; implicit-def: $vgpr31 |
| ; GCN-NEXT: ; kill: killed $vgpr31 |
| ; GCN-NEXT: ; implicit-def: $vgpr45 |
| ; GCN-NEXT: ; implicit-def: $vgpr31 |
| ; GCN-NEXT: ; kill: killed $vgpr31 |
| ; GCN-NEXT: ; implicit-def: $vgpr46 |
| ; GCN-NEXT: ; implicit-def: $vgpr31 |
| ; GCN-NEXT: ; kill: killed $vgpr31 |
| ; GCN-NEXT: ; implicit-def: $vgpr47 |
| ; GCN-NEXT: ; implicit-def: $vgpr31 |
| ; GCN-NEXT: ; kill: killed $vgpr31 |
| ; GCN-NEXT: ; implicit-def: $vgpr56 |
| ; GCN-NEXT: ; implicit-def: $vgpr31 |
| ; GCN-NEXT: ; kill: killed $vgpr31 |
| ; GCN-NEXT: ; implicit-def: $vgpr57 |
| ; GCN-NEXT: ; implicit-def: $vgpr48 |
| ; GCN-NEXT: ; implicit-def: $vgpr58 |
| ; GCN-NEXT: ; implicit-def: $vgpr49 |
| ; GCN-NEXT: ; implicit-def: $vgpr59 |
| ; GCN-NEXT: ; implicit-def: $vgpr50 |
| ; GCN-NEXT: ; implicit-def: $vgpr60 |
| ; GCN-NEXT: ; implicit-def: $vgpr51 |
| ; GCN-NEXT: ; implicit-def: $vgpr61 |
| ; GCN-NEXT: ; implicit-def: $vgpr52 |
| ; GCN-NEXT: ; implicit-def: $vgpr62 |
| ; GCN-NEXT: ; implicit-def: $vgpr53 |
| ; GCN-NEXT: ; implicit-def: $vgpr63 |
| ; GCN-NEXT: ; implicit-def: $vgpr54 |
| ; GCN-NEXT: ; implicit-def: $vgpr31 |
| ; GCN-NEXT: ; implicit-def: $vgpr55 |
| ; GCN-NEXT: ; implicit-def: $vgpr32 |
| ; GCN-NEXT: ; implicit-def: $vgpr40 |
| ; GCN-NEXT: ; implicit-def: $vgpr33 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB28_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.false |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v1, v1 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v41, v2 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v1, v3 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v42, v4 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v1, v5 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v43, v6 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v1, v7 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v44, v8 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v1, v9 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v45, v10 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v1, v11 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v46, v12 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v1, v13 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v47, v14 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v1, v15 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v56, v16 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v1, v17 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v57, v18 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v48, v19 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v58, v20 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v49, v21 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v59, v22 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v50, v23 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v60, v24 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v51, v25 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v61, v26 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v52, v27 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v62, v28 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v53, v29 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v63, v30 |
| ; GCN-NEXT: s_waitcnt vmcnt(9) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v54, v34 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v31, v35 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v55, v36 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v32, v37 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v40, v38 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v33, v39 |
| ; GCN-NEXT: ; implicit-def: $vgpr1 |
| ; GCN-NEXT: ; implicit-def: $vgpr2 |
| ; GCN-NEXT: ; implicit-def: $vgpr3 |
| ; GCN-NEXT: ; implicit-def: $vgpr4 |
| ; GCN-NEXT: ; implicit-def: $vgpr5 |
| ; GCN-NEXT: ; implicit-def: $vgpr6 |
| ; GCN-NEXT: ; implicit-def: $vgpr7 |
| ; GCN-NEXT: ; implicit-def: $vgpr8 |
| ; GCN-NEXT: ; implicit-def: $vgpr9 |
| ; GCN-NEXT: ; implicit-def: $vgpr10 |
| ; GCN-NEXT: ; implicit-def: $vgpr11 |
| ; GCN-NEXT: ; implicit-def: $vgpr12 |
| ; GCN-NEXT: ; implicit-def: $vgpr13 |
| ; GCN-NEXT: ; implicit-def: $vgpr14 |
| ; GCN-NEXT: ; implicit-def: $vgpr15 |
| ; GCN-NEXT: ; implicit-def: $vgpr16 |
| ; GCN-NEXT: ; implicit-def: $vgpr17 |
| ; GCN-NEXT: ; implicit-def: $vgpr18 |
| ; GCN-NEXT: ; implicit-def: $vgpr19 |
| ; GCN-NEXT: ; implicit-def: $vgpr20 |
| ; GCN-NEXT: ; implicit-def: $vgpr21 |
| ; GCN-NEXT: ; implicit-def: $vgpr22 |
| ; GCN-NEXT: ; implicit-def: $vgpr23 |
| ; GCN-NEXT: ; implicit-def: $vgpr24 |
| ; GCN-NEXT: ; implicit-def: $vgpr25 |
| ; GCN-NEXT: ; implicit-def: $vgpr26 |
| ; GCN-NEXT: ; implicit-def: $vgpr27 |
| ; GCN-NEXT: ; implicit-def: $vgpr28 |
| ; GCN-NEXT: ; implicit-def: $vgpr29 |
| ; GCN-NEXT: ; implicit-def: $vgpr30 |
| ; GCN-NEXT: ; implicit-def: $vgpr34 |
| ; GCN-NEXT: ; implicit-def: $vgpr35 |
| ; GCN-NEXT: ; implicit-def: $vgpr36 |
| ; GCN-NEXT: ; implicit-def: $vgpr37 |
| ; GCN-NEXT: ; implicit-def: $vgpr38 |
| ; GCN-NEXT: ; implicit-def: $vgpr39 |
| ; GCN-NEXT: .LBB28_2: ; %Flow |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB28_4 |
| ; GCN-NEXT: ; %bb.3: ; %cmp.true |
| ; GCN-NEXT: s_waitcnt vmcnt(5) |
| ; GCN-NEXT: v_add_i32_e32 v33, vcc, 3, v39 |
| ; GCN-NEXT: s_waitcnt vmcnt(4) |
| ; GCN-NEXT: v_add_i32_e32 v38, vcc, 3, v38 |
| ; GCN-NEXT: s_waitcnt vmcnt(3) |
| ; GCN-NEXT: v_add_i32_e32 v32, vcc, 3, v37 |
| ; GCN-NEXT: s_waitcnt vmcnt(2) |
| ; GCN-NEXT: v_add_i32_e32 v36, vcc, 3, v36 |
| ; GCN-NEXT: s_waitcnt vmcnt(1) |
| ; GCN-NEXT: v_add_i32_e32 v31, vcc, 3, v35 |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_add_i32_e32 v34, vcc, 3, v34 |
| ; GCN-NEXT: v_add_i32_e32 v30, vcc, 3, v30 |
| ; GCN-NEXT: v_add_i32_e32 v29, vcc, 3, v29 |
| ; GCN-NEXT: v_add_i32_e32 v28, vcc, 3, v28 |
| ; GCN-NEXT: v_add_i32_e32 v27, vcc, 3, v27 |
| ; GCN-NEXT: v_add_i32_e32 v26, vcc, 3, v26 |
| ; GCN-NEXT: v_add_i32_e32 v25, vcc, 3, v25 |
| ; GCN-NEXT: v_add_i32_e32 v24, vcc, 3, v24 |
| ; GCN-NEXT: v_add_i32_e32 v23, vcc, 3, v23 |
| ; GCN-NEXT: v_add_i32_e32 v22, vcc, 3, v22 |
| ; GCN-NEXT: v_add_i32_e32 v21, vcc, 3, v21 |
| ; GCN-NEXT: v_add_i32_e32 v20, vcc, 3, v20 |
| ; GCN-NEXT: v_add_i32_e32 v19, vcc, 3, v19 |
| ; GCN-NEXT: v_add_i32_e32 v18, vcc, 3, v18 |
| ; GCN-NEXT: v_add_i32_e32 v17, vcc, 3, v17 |
| ; GCN-NEXT: v_add_i32_e32 v16, vcc, 3, v16 |
| ; GCN-NEXT: v_add_i32_e32 v15, vcc, 3, v15 |
| ; GCN-NEXT: v_add_i32_e32 v14, vcc, 3, v14 |
| ; GCN-NEXT: v_add_i32_e32 v13, vcc, 3, v13 |
| ; GCN-NEXT: v_add_i32_e32 v12, vcc, 3, v12 |
| ; GCN-NEXT: v_add_i32_e32 v11, vcc, 3, v11 |
| ; GCN-NEXT: v_add_i32_e32 v10, vcc, 3, v10 |
| ; GCN-NEXT: v_add_i32_e32 v9, vcc, 3, v9 |
| ; GCN-NEXT: v_add_i32_e32 v8, vcc, 3, v8 |
| ; GCN-NEXT: v_add_i32_e32 v7, vcc, 3, v7 |
| ; GCN-NEXT: v_add_i32_e32 v6, vcc, 3, v6 |
| ; GCN-NEXT: v_add_i32_e32 v5, vcc, 3, v5 |
| ; GCN-NEXT: v_add_i32_e32 v4, vcc, 3, v4 |
| ; GCN-NEXT: v_add_i32_e32 v3, vcc, 3, v3 |
| ; GCN-NEXT: v_add_i32_e32 v2, vcc, 3, v2 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_add_i32_e32 v1, vcc, 3, v1 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v1, v1 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v41, v2 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v1, v3 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v42, v4 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v1, v5 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v43, v6 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v1, v7 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v44, v8 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v1, v9 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v45, v10 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v1, v11 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v46, v12 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v1, v13 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v47, v14 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v1, v15 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v56, v16 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v1, v17 |
| ; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v57, v18 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v48, v19 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v58, v20 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v49, v21 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v59, v22 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v50, v23 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v60, v24 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v51, v25 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v61, v26 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v52, v27 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v62, v28 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v53, v29 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v63, v30 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v54, v34 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v31, v31 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v55, v36 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v32, v32 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v40, v38 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v33, v33 |
| ; GCN-NEXT: .LBB28_4: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v3, v41 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v4, v1 |
| ; GCN-NEXT: v_add_i32_e32 v1, vcc, 4, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v5, v42 |
| ; GCN-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v6, v2 |
| ; GCN-NEXT: v_add_i32_e32 v2, vcc, 8, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v7, v43 |
| ; GCN-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v8, v8 |
| ; GCN-NEXT: v_add_i32_e32 v9, vcc, 12, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v10, v44 |
| ; GCN-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v11, v11 |
| ; GCN-NEXT: v_add_i32_e32 v12, vcc, 16, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v13, v45 |
| ; GCN-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v14, v14 |
| ; GCN-NEXT: v_add_i32_e32 v15, vcc, 20, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v16, v46 |
| ; GCN-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v17, v17 |
| ; GCN-NEXT: v_add_i32_e32 v18, vcc, 24, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v19, v47 |
| ; GCN-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v20, v20 |
| ; GCN-NEXT: v_add_i32_e32 v21, vcc, 28, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v22, v56 |
| ; GCN-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v23, v23 |
| ; GCN-NEXT: v_add_i32_e32 v24, vcc, 32, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v25, v57 |
| ; GCN-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v26, v26 |
| ; GCN-NEXT: v_add_i32_e32 v27, vcc, 36, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v28, v58 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v29, v48 |
| ; GCN-NEXT: v_add_i32_e32 v30, vcc, 40, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v34, v59 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v35, v49 |
| ; GCN-NEXT: v_add_i32_e32 v36, vcc, 44, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v37, v60 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v38, v50 |
| ; GCN-NEXT: v_add_i32_e32 v39, vcc, 48, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v48, v61 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v49, v51 |
| ; GCN-NEXT: v_add_i32_e32 v50, vcc, 52, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v51, v62 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v52, v52 |
| ; GCN-NEXT: v_add_i32_e32 v41, vcc, 56, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v42, v63 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v53, v53 |
| ; GCN-NEXT: v_add_i32_e32 v43, vcc, 60, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v31, v31 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v54, v54 |
| ; GCN-NEXT: v_add_i32_e32 v44, vcc, 64, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v32, v32 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v55, v55 |
| ; GCN-NEXT: v_add_i32_e32 v45, vcc, 0x44, v0 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v33, v33 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v40, v40 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v3, 16, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v5, 16, v5 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v7, 16, v7 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v10, 16, v10 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v13, 16, v13 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v16, 16, v16 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v19, 16, v19 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v22, 16, v22 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v25, 16, v25 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v28, 16, v28 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v34, 16, v34 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v37, 16, v37 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v48, 16, v48 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v51, 16, v51 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v42, 16, v42 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v31, 16, v31 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v32, 16, v32 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v33, 16, v33 |
| ; GCN-NEXT: v_or_b32_e32 v3, v4, v3 |
| ; GCN-NEXT: v_or_b32_e32 v4, v6, v5 |
| ; GCN-NEXT: v_or_b32_e32 v5, v8, v7 |
| ; GCN-NEXT: v_or_b32_e32 v6, v11, v10 |
| ; GCN-NEXT: v_or_b32_e32 v7, v14, v13 |
| ; GCN-NEXT: v_or_b32_e32 v8, v17, v16 |
| ; GCN-NEXT: v_or_b32_e32 v10, v20, v19 |
| ; GCN-NEXT: v_or_b32_e32 v11, v23, v22 |
| ; GCN-NEXT: v_or_b32_e32 v13, v26, v25 |
| ; GCN-NEXT: v_or_b32_e32 v14, v29, v28 |
| ; GCN-NEXT: v_or_b32_e32 v16, v35, v34 |
| ; GCN-NEXT: v_or_b32_e32 v17, v38, v37 |
| ; GCN-NEXT: v_or_b32_e32 v19, v49, v48 |
| ; GCN-NEXT: v_or_b32_e32 v20, v52, v51 |
| ; GCN-NEXT: v_or_b32_e32 v22, v53, v42 |
| ; GCN-NEXT: v_or_b32_e32 v23, v54, v31 |
| ; GCN-NEXT: v_or_b32_e32 v25, v55, v32 |
| ; GCN-NEXT: v_or_b32_e32 v26, v40, v33 |
| ; GCN-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v4, v1, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v5, v2, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v7, v12, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v8, v15, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v10, v18, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v11, v21, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v13, v24, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v14, v27, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v16, v30, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v17, v36, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v19, v39, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v20, v50, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v22, v41, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v23, v43, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v25, v44, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v26, v45, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v36i16_to_v36f16: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v17 |
| ; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v16 |
| ; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v15 |
| ; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v14 |
| ; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v13 |
| ; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v12 |
| ; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v11 |
| ; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v10 |
| ; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v9 |
| ; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v8 |
| ; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v7 |
| ; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v6 |
| ; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v5 |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v4 |
| ; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB28_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.true |
| ; VI-NEXT: v_add_u16_e32 v0, 3, v0 |
| ; VI-NEXT: v_add_u16_e32 v35, 3, v35 |
| ; VI-NEXT: v_add_u16_e32 v1, 3, v1 |
| ; VI-NEXT: v_add_u16_e32 v34, 3, v34 |
| ; VI-NEXT: v_add_u16_e32 v2, 3, v2 |
| ; VI-NEXT: v_add_u16_e32 v33, 3, v33 |
| ; VI-NEXT: v_add_u16_e32 v3, 3, v3 |
| ; VI-NEXT: v_add_u16_e32 v32, 3, v32 |
| ; VI-NEXT: v_add_u16_e32 v4, 3, v4 |
| ; VI-NEXT: v_add_u16_e32 v18, 3, v18 |
| ; VI-NEXT: v_add_u16_e32 v5, 3, v5 |
| ; VI-NEXT: v_add_u16_e32 v31, 3, v31 |
| ; VI-NEXT: v_add_u16_e32 v6, 3, v6 |
| ; VI-NEXT: v_add_u16_e32 v30, 3, v30 |
| ; VI-NEXT: v_add_u16_e32 v7, 3, v7 |
| ; VI-NEXT: v_add_u16_e32 v29, 3, v29 |
| ; VI-NEXT: v_add_u16_e32 v8, 3, v8 |
| ; VI-NEXT: v_add_u16_e32 v28, 3, v28 |
| ; VI-NEXT: v_add_u16_e32 v9, 3, v9 |
| ; VI-NEXT: v_add_u16_e32 v27, 3, v27 |
| ; VI-NEXT: v_add_u16_e32 v10, 3, v10 |
| ; VI-NEXT: v_add_u16_e32 v26, 3, v26 |
| ; VI-NEXT: v_add_u16_e32 v11, 3, v11 |
| ; VI-NEXT: v_add_u16_e32 v25, 3, v25 |
| ; VI-NEXT: v_add_u16_e32 v12, 3, v12 |
| ; VI-NEXT: v_add_u16_e32 v24, 3, v24 |
| ; VI-NEXT: v_add_u16_e32 v13, 3, v13 |
| ; VI-NEXT: v_add_u16_e32 v23, 3, v23 |
| ; VI-NEXT: v_add_u16_e32 v14, 3, v14 |
| ; VI-NEXT: v_add_u16_e32 v22, 3, v22 |
| ; VI-NEXT: v_add_u16_e32 v15, 3, v15 |
| ; VI-NEXT: v_add_u16_e32 v21, 3, v21 |
| ; VI-NEXT: v_add_u16_e32 v16, 3, v16 |
| ; VI-NEXT: v_add_u16_e32 v20, 3, v20 |
| ; VI-NEXT: v_add_u16_e32 v17, 3, v17 |
| ; VI-NEXT: v_add_u16_e32 v19, 3, v19 |
| ; VI-NEXT: .LBB28_2: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 |
| ; VI-NEXT: v_or_b32_sdwa v4, v4, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v31 |
| ; VI-NEXT: v_or_b32_sdwa v5, v5, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v30 |
| ; VI-NEXT: v_or_b32_sdwa v6, v6, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v29 |
| ; VI-NEXT: v_or_b32_sdwa v7, v7, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v28 |
| ; VI-NEXT: v_or_b32_sdwa v8, v8, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v27 |
| ; VI-NEXT: v_or_b32_sdwa v9, v9, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v26 |
| ; VI-NEXT: v_or_b32_sdwa v10, v10, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v25 |
| ; VI-NEXT: v_or_b32_sdwa v11, v11, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v24 |
| ; VI-NEXT: v_or_b32_sdwa v12, v12, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v23 |
| ; VI-NEXT: v_or_b32_sdwa v13, v13, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v22 |
| ; VI-NEXT: v_or_b32_sdwa v14, v14, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v21 |
| ; VI-NEXT: v_or_b32_sdwa v15, v15, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v20 |
| ; VI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 |
| ; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 |
| ; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 |
| ; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 |
| ; VI-NEXT: v_or_b32_sdwa v16, v16, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v19 |
| ; VI-NEXT: v_or_b32_sdwa v0, v0, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v1, v1, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v2, v2, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v3, v3, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v17, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v36i16_to_v36f16: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v17 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v16 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v14 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v13 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v12 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v11 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v10 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v9 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v8 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v7 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v6 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v5 |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v4 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v3 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v2 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v1 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v0 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB28_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX9-NEXT: s_mov_b32 s6, 0x5040100 |
| ; GFX9-NEXT: v_perm_b32 v17, v35, v17, s6 |
| ; GFX9-NEXT: v_perm_b32 v16, v34, v16, s6 |
| ; GFX9-NEXT: v_perm_b32 v15, v33, v15, s6 |
| ; GFX9-NEXT: v_perm_b32 v14, v32, v14, s6 |
| ; GFX9-NEXT: v_perm_b32 v13, v31, v13, s6 |
| ; GFX9-NEXT: v_perm_b32 v12, v30, v12, s6 |
| ; GFX9-NEXT: v_perm_b32 v11, v29, v11, s6 |
| ; GFX9-NEXT: v_perm_b32 v10, v28, v10, s6 |
| ; GFX9-NEXT: v_perm_b32 v9, v27, v9, s6 |
| ; GFX9-NEXT: v_perm_b32 v8, v26, v8, s6 |
| ; GFX9-NEXT: v_perm_b32 v7, v25, v7, s6 |
| ; GFX9-NEXT: v_perm_b32 v6, v24, v6, s6 |
| ; GFX9-NEXT: v_perm_b32 v5, v22, v5, s6 |
| ; GFX9-NEXT: v_perm_b32 v4, v23, v4, s6 |
| ; GFX9-NEXT: v_perm_b32 v3, v21, v3, s6 |
| ; GFX9-NEXT: v_perm_b32 v2, v20, v2, s6 |
| ; GFX9-NEXT: v_perm_b32 v1, v19, v1, s6 |
| ; GFX9-NEXT: v_perm_b32 v0, v18, v0, s6 |
| ; GFX9-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v0 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v1 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v2 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v3 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v4 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v5 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v6 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v7 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v8 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v9 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v10 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v11 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v12 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v13 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v14 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v16 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v17 |
| ; GFX9-NEXT: .LBB28_2: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: s_mov_b32 s4, 0x5040100 |
| ; GFX9-NEXT: v_perm_b32 v0, v18, v0, s4 |
| ; GFX9-NEXT: v_perm_b32 v1, v19, v1, s4 |
| ; GFX9-NEXT: v_perm_b32 v2, v20, v2, s4 |
| ; GFX9-NEXT: v_perm_b32 v3, v21, v3, s4 |
| ; GFX9-NEXT: v_perm_b32 v4, v23, v4, s4 |
| ; GFX9-NEXT: v_perm_b32 v5, v22, v5, s4 |
| ; GFX9-NEXT: v_perm_b32 v6, v24, v6, s4 |
| ; GFX9-NEXT: v_perm_b32 v7, v25, v7, s4 |
| ; GFX9-NEXT: v_perm_b32 v8, v26, v8, s4 |
| ; GFX9-NEXT: v_perm_b32 v9, v27, v9, s4 |
| ; GFX9-NEXT: v_perm_b32 v10, v28, v10, s4 |
| ; GFX9-NEXT: v_perm_b32 v11, v29, v11, s4 |
| ; GFX9-NEXT: v_perm_b32 v12, v30, v12, s4 |
| ; GFX9-NEXT: v_perm_b32 v13, v31, v13, s4 |
| ; GFX9-NEXT: v_perm_b32 v14, v32, v14, s4 |
| ; GFX9-NEXT: v_perm_b32 v15, v33, v15, s4 |
| ; GFX9-NEXT: v_perm_b32 v16, v34, v16, s4 |
| ; GFX9-NEXT: v_perm_b32 v17, v35, v17, s4 |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v36i16_to_v36f16: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v36, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v3 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v0 |
| ; GFX11-NEXT: s_mov_b32 s0, exec_lo |
| ; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v18 |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB28_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX11-NEXT: v_perm_b32 v17, v36, v17, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v16, v35, v16, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v15, v34, v15, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v14, v33, v14, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v13, v32, v13, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v12, v31, v12, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v11, v30, v11, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v10, v29, v10, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v9, v28, v9, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v8, v27, v8, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v7, v26, v7, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v6, v25, v6, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v5, v24, v5, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v0, v19, v0, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v1, v20, v1, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v2, v21, v2, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v3, v22, v3, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v4, v23, v4, 0x5040100 |
| ; GFX11-NEXT: v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0] |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v0 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v3 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v36, 16, v17 |
| ; GFX11-NEXT: .LBB28_2: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: v_perm_b32 v0, v19, v0, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v1, v20, v1, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v2, v21, v2, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v3, v22, v3, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v4, v23, v4, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v5, v24, v5, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v6, v25, v6, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v7, v26, v7, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v8, v27, v8, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v9, v28, v9, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v10, v29, v10, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v11, v30, v11, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v12, v31, v12, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v13, v32, v13, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v14, v33, v14, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v15, v34, v15, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v16, v35, v16, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v17, v36, v17, 0x5040100 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = add <36 x i16> %a, splat (i16 3) |
| %a2 = bitcast <36 x i16> %a1 to <36 x half> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <36 x i16> %a to <36 x half> |
| br label %end |
| |
| end: |
| %phi = phi <36 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <36 x half> %phi |
| } |
| |
| define <36 x i16> @bitcast_v36f16_to_v36i16(<36 x half> %a, i32 %b) { |
| ; GCN-LABEL: bitcast_v36f16_to_v36i16: |
| ; GCN: ; %bb.0: |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill |
| ; GCN-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:24 |
| ; GCN-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:16 |
| ; GCN-NEXT: s_waitcnt expcnt(4) |
| ; GCN-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:12 |
| ; GCN-NEXT: s_waitcnt expcnt(3) |
| ; GCN-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:8 |
| ; GCN-NEXT: s_waitcnt expcnt(2) |
| ; GCN-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:4 |
| ; GCN-NEXT: s_waitcnt expcnt(1) |
| ; GCN-NEXT: buffer_load_dword v43, off, s[0:3], s32 |
| ; GCN-NEXT: s_waitcnt expcnt(0) |
| ; GCN-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:20 |
| ; GCN-NEXT: s_waitcnt vmcnt(6) |
| ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v52, v1 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v54, v2 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v35, v3 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v36, v4 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v50, v5 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v53, v6 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v33, v7 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v34, v8 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v48, v9 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v51, v10 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v31, v11 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v32, v12 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v38, v13 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v49, v14 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v11, v15 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v12, v16 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v37, v17 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v39, v18 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v9, v19 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v10, v20 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v18, v21 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v20, v22 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v7, v23 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v8, v24 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v16, v25 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v19, v26 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v5, v27 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v6, v28 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v14, v29 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v17, v30 |
| ; GCN-NEXT: s_waitcnt vmcnt(1) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v3, v43 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v4, v42 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v13, v41 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v15, v40 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v1, v55 |
| ; GCN-NEXT: s_waitcnt vmcnt(0) |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v2, v44 |
| ; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GCN-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GCN-NEXT: s_cbranch_execz .LBB29_2 |
| ; GCN-NEXT: ; %bb.1: ; %cmp.true |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v2, v2 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v1, v1 |
| ; GCN-NEXT: v_add_f32_e32 v2, 0x38000000, v2 |
| ; GCN-NEXT: v_add_f32_e32 v1, 0x38000000, v1 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v2, v2 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v1, v1 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v21, 16, v2 |
| ; GCN-NEXT: v_or_b32_e32 v1, v1, v21 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v4, v4 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v3, v3 |
| ; GCN-NEXT: v_add_f32_e32 v4, 0x38000000, v4 |
| ; GCN-NEXT: v_add_f32_e32 v3, 0x38000000, v3 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v4, v4 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v3, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v21, 16, v4 |
| ; GCN-NEXT: v_or_b32_e32 v3, v3, v21 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v6, v6 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v5, v5 |
| ; GCN-NEXT: v_add_f32_e32 v6, 0x38000000, v6 |
| ; GCN-NEXT: v_add_f32_e32 v5, 0x38000000, v5 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v6, v6 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v5, v5 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v21, 16, v6 |
| ; GCN-NEXT: v_or_b32_e32 v5, v5, v21 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v8, v8 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v7, v7 |
| ; GCN-NEXT: v_add_f32_e32 v8, 0x38000000, v8 |
| ; GCN-NEXT: v_add_f32_e32 v7, 0x38000000, v7 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v8, v8 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v7, v7 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v21, 16, v8 |
| ; GCN-NEXT: v_or_b32_e32 v7, v7, v21 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v10, v10 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v9, v9 |
| ; GCN-NEXT: v_add_f32_e32 v10, 0x38000000, v10 |
| ; GCN-NEXT: v_add_f32_e32 v9, 0x38000000, v9 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v10, v10 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v9, v9 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v21, 16, v10 |
| ; GCN-NEXT: v_or_b32_e32 v9, v9, v21 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v12, v12 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v11, v11 |
| ; GCN-NEXT: v_add_f32_e32 v12, 0x38000000, v12 |
| ; GCN-NEXT: v_add_f32_e32 v11, 0x38000000, v11 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v12, v12 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v11, v11 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v21, 16, v12 |
| ; GCN-NEXT: v_or_b32_e32 v11, v11, v21 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v21, v32 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v22, v31 |
| ; GCN-NEXT: v_add_f32_e32 v21, 0x38000000, v21 |
| ; GCN-NEXT: v_add_f32_e32 v22, 0x38000000, v22 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v32, v21 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v21, v22 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v22, 16, v32 |
| ; GCN-NEXT: v_or_b32_e32 v31, v21, v22 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v21, v34 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v22, v33 |
| ; GCN-NEXT: v_add_f32_e32 v21, 0x38000000, v21 |
| ; GCN-NEXT: v_add_f32_e32 v22, 0x38000000, v22 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v34, v21 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v21, v22 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v22, 16, v34 |
| ; GCN-NEXT: v_or_b32_e32 v33, v21, v22 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v21, v36 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v22, v35 |
| ; GCN-NEXT: v_add_f32_e32 v21, 0x38000000, v21 |
| ; GCN-NEXT: v_add_f32_e32 v22, 0x38000000, v22 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v36, v21 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v21, v22 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v22, 16, v36 |
| ; GCN-NEXT: v_or_b32_e32 v35, v21, v22 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v21, v54 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v22, v52 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v23, v53 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v24, v50 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v25, v51 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v26, v48 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v27, v49 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v28, v38 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v29, v39 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v30, v37 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v20, v20 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v18, v18 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v19, v19 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v16, v16 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v17, v17 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v14, v14 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v15, v15 |
| ; GCN-NEXT: v_cvt_f32_f16_e32 v13, v13 |
| ; GCN-NEXT: v_add_f32_e32 v21, 0x38000000, v21 |
| ; GCN-NEXT: v_add_f32_e32 v22, 0x38000000, v22 |
| ; GCN-NEXT: v_add_f32_e32 v23, 0x38000000, v23 |
| ; GCN-NEXT: v_add_f32_e32 v24, 0x38000000, v24 |
| ; GCN-NEXT: v_add_f32_e32 v25, 0x38000000, v25 |
| ; GCN-NEXT: v_add_f32_e32 v26, 0x38000000, v26 |
| ; GCN-NEXT: v_add_f32_e32 v27, 0x38000000, v27 |
| ; GCN-NEXT: v_add_f32_e32 v28, 0x38000000, v28 |
| ; GCN-NEXT: v_add_f32_e32 v29, 0x38000000, v29 |
| ; GCN-NEXT: v_add_f32_e32 v30, 0x38000000, v30 |
| ; GCN-NEXT: v_add_f32_e32 v20, 0x38000000, v20 |
| ; GCN-NEXT: v_add_f32_e32 v18, 0x38000000, v18 |
| ; GCN-NEXT: v_add_f32_e32 v19, 0x38000000, v19 |
| ; GCN-NEXT: v_add_f32_e32 v16, 0x38000000, v16 |
| ; GCN-NEXT: v_add_f32_e32 v17, 0x38000000, v17 |
| ; GCN-NEXT: v_add_f32_e32 v14, 0x38000000, v14 |
| ; GCN-NEXT: v_add_f32_e32 v15, 0x38000000, v15 |
| ; GCN-NEXT: v_add_f32_e32 v13, 0x38000000, v13 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v21, v21 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v22, v22 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v23, v23 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v24, v24 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v25, v25 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v26, v26 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v27, v27 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v28, v28 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v29, v29 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v30, v30 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v20, v20 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v18, v18 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v19, v19 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v16, v16 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v17, v17 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v14, v14 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v15, v15 |
| ; GCN-NEXT: v_cvt_f16_f32_e32 v13, v13 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v21, 16, v21 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v23, 16, v23 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v25, 16, v25 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v27, 16, v27 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v29, 16, v29 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v20, 16, v20 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v19, 16, v19 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v17, 16, v17 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v15, 16, v15 |
| ; GCN-NEXT: v_or_b32_e32 v52, v22, v21 |
| ; GCN-NEXT: v_or_b32_e32 v50, v24, v23 |
| ; GCN-NEXT: v_or_b32_e32 v48, v26, v25 |
| ; GCN-NEXT: v_or_b32_e32 v38, v28, v27 |
| ; GCN-NEXT: v_or_b32_e32 v37, v30, v29 |
| ; GCN-NEXT: v_or_b32_e32 v18, v18, v20 |
| ; GCN-NEXT: v_or_b32_e32 v16, v16, v19 |
| ; GCN-NEXT: v_or_b32_e32 v14, v14, v17 |
| ; GCN-NEXT: v_or_b32_e32 v13, v13, v15 |
| ; GCN-NEXT: v_alignbit_b32 v54, v35, v21, 16 |
| ; GCN-NEXT: v_alignbit_b32 v53, v33, v23, 16 |
| ; GCN-NEXT: v_alignbit_b32 v51, v31, v25, 16 |
| ; GCN-NEXT: v_alignbit_b32 v49, v11, v27, 16 |
| ; GCN-NEXT: v_alignbit_b32 v39, v9, v29, 16 |
| ; GCN-NEXT: v_alignbit_b32 v20, v7, v20, 16 |
| ; GCN-NEXT: v_alignbit_b32 v19, v5, v19, 16 |
| ; GCN-NEXT: v_alignbit_b32 v17, v3, v17, 16 |
| ; GCN-NEXT: v_alignbit_b32 v15, v1, v15, 16 |
| ; GCN-NEXT: .LBB29_2: ; %end |
| ; GCN-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GCN-NEXT: v_and_b32_e32 v21, 0xffff, v52 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v22, 16, v54 |
| ; GCN-NEXT: v_or_b32_e32 v21, v21, v22 |
| ; GCN-NEXT: v_and_b32_e32 v22, 0xffff, v35 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v23, 16, v36 |
| ; GCN-NEXT: v_or_b32_e32 v22, v22, v23 |
| ; GCN-NEXT: v_add_i32_e32 v23, vcc, 4, v0 |
| ; GCN-NEXT: v_and_b32_e32 v24, 0xffff, v50 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v25, 16, v53 |
| ; GCN-NEXT: v_or_b32_e32 v24, v24, v25 |
| ; GCN-NEXT: v_add_i32_e32 v25, vcc, 8, v0 |
| ; GCN-NEXT: v_and_b32_e32 v26, 0xffff, v33 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v27, 16, v34 |
| ; GCN-NEXT: v_or_b32_e32 v26, v26, v27 |
| ; GCN-NEXT: v_add_i32_e32 v27, vcc, 12, v0 |
| ; GCN-NEXT: v_and_b32_e32 v28, 0xffff, v48 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v29, 16, v51 |
| ; GCN-NEXT: v_or_b32_e32 v28, v28, v29 |
| ; GCN-NEXT: v_add_i32_e32 v29, vcc, 16, v0 |
| ; GCN-NEXT: v_and_b32_e32 v30, 0xffff, v31 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v31, 16, v32 |
| ; GCN-NEXT: v_or_b32_e32 v30, v30, v31 |
| ; GCN-NEXT: v_add_i32_e32 v31, vcc, 20, v0 |
| ; GCN-NEXT: v_and_b32_e32 v32, 0xffff, v38 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v33, 16, v49 |
| ; GCN-NEXT: v_or_b32_e32 v32, v32, v33 |
| ; GCN-NEXT: v_add_i32_e32 v33, vcc, 24, v0 |
| ; GCN-NEXT: v_and_b32_e32 v11, 0xffff, v11 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v12, 16, v12 |
| ; GCN-NEXT: v_or_b32_e32 v11, v11, v12 |
| ; GCN-NEXT: v_add_i32_e32 v12, vcc, 28, v0 |
| ; GCN-NEXT: v_and_b32_e32 v34, 0xffff, v37 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v35, 16, v39 |
| ; GCN-NEXT: v_or_b32_e32 v34, v34, v35 |
| ; GCN-NEXT: v_add_i32_e32 v35, vcc, 32, v0 |
| ; GCN-NEXT: v_and_b32_e32 v9, 0xffff, v9 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v10, 16, v10 |
| ; GCN-NEXT: v_or_b32_e32 v9, v9, v10 |
| ; GCN-NEXT: v_add_i32_e32 v10, vcc, 36, v0 |
| ; GCN-NEXT: v_and_b32_e32 v18, 0xffff, v18 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v20, 16, v20 |
| ; GCN-NEXT: v_or_b32_e32 v18, v18, v20 |
| ; GCN-NEXT: v_add_i32_e32 v20, vcc, 40, v0 |
| ; GCN-NEXT: v_and_b32_e32 v7, 0xffff, v7 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v8, 16, v8 |
| ; GCN-NEXT: v_or_b32_e32 v7, v7, v8 |
| ; GCN-NEXT: v_add_i32_e32 v8, vcc, 44, v0 |
| ; GCN-NEXT: v_and_b32_e32 v16, 0xffff, v16 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v19, 16, v19 |
| ; GCN-NEXT: v_or_b32_e32 v16, v16, v19 |
| ; GCN-NEXT: v_add_i32_e32 v19, vcc, 48, v0 |
| ; GCN-NEXT: v_and_b32_e32 v5, 0xffff, v5 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v6, 16, v6 |
| ; GCN-NEXT: v_or_b32_e32 v5, v5, v6 |
| ; GCN-NEXT: v_add_i32_e32 v6, vcc, 52, v0 |
| ; GCN-NEXT: v_and_b32_e32 v14, 0xffff, v14 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v17, 16, v17 |
| ; GCN-NEXT: v_or_b32_e32 v14, v14, v17 |
| ; GCN-NEXT: v_add_i32_e32 v17, vcc, 56, v0 |
| ; GCN-NEXT: v_and_b32_e32 v3, 0xffff, v3 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v4, 16, v4 |
| ; GCN-NEXT: v_or_b32_e32 v3, v3, v4 |
| ; GCN-NEXT: v_add_i32_e32 v4, vcc, 60, v0 |
| ; GCN-NEXT: v_and_b32_e32 v13, 0xffff, v13 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v15, 16, v15 |
| ; GCN-NEXT: v_or_b32_e32 v13, v13, v15 |
| ; GCN-NEXT: v_add_i32_e32 v15, vcc, 64, v0 |
| ; GCN-NEXT: v_and_b32_e32 v1, 0xffff, v1 |
| ; GCN-NEXT: v_lshlrev_b32_e32 v2, 16, v2 |
| ; GCN-NEXT: v_or_b32_e32 v1, v1, v2 |
| ; GCN-NEXT: v_add_i32_e32 v2, vcc, 0x44, v0 |
| ; GCN-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v22, v23, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v24, v25, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v26, v27, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v28, v29, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v30, v31, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v32, v33, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v11, v12, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v34, v35, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v9, v10, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v18, v20, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v7, v8, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v16, v19, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v5, v6, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v14, v17, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v13, v15, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen |
| ; GCN-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload |
| ; GCN-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload |
| ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) |
| ; GCN-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; VI-LABEL: bitcast_v36f16_to_v36i16: |
| ; VI: ; %bb.0: |
| ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v17 |
| ; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v16 |
| ; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v15 |
| ; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v14 |
| ; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v13 |
| ; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v12 |
| ; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v11 |
| ; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v10 |
| ; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v9 |
| ; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v8 |
| ; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v7 |
| ; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v6 |
| ; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v5 |
| ; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v4 |
| ; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v3 |
| ; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2 |
| ; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v1 |
| ; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v0 |
| ; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; VI-NEXT: s_cbranch_execz .LBB29_2 |
| ; VI-NEXT: ; %bb.1: ; %cmp.true |
| ; VI-NEXT: v_add_f16_e32 v0, 0x200, v0 |
| ; VI-NEXT: v_add_f16_e32 v35, 0x200, v35 |
| ; VI-NEXT: v_add_f16_e32 v1, 0x200, v1 |
| ; VI-NEXT: v_add_f16_e32 v34, 0x200, v34 |
| ; VI-NEXT: v_add_f16_e32 v2, 0x200, v2 |
| ; VI-NEXT: v_add_f16_e32 v33, 0x200, v33 |
| ; VI-NEXT: v_add_f16_e32 v3, 0x200, v3 |
| ; VI-NEXT: v_add_f16_e32 v32, 0x200, v32 |
| ; VI-NEXT: v_add_f16_e32 v4, 0x200, v4 |
| ; VI-NEXT: v_add_f16_e32 v18, 0x200, v18 |
| ; VI-NEXT: v_add_f16_e32 v5, 0x200, v5 |
| ; VI-NEXT: v_add_f16_e32 v31, 0x200, v31 |
| ; VI-NEXT: v_add_f16_e32 v6, 0x200, v6 |
| ; VI-NEXT: v_add_f16_e32 v30, 0x200, v30 |
| ; VI-NEXT: v_add_f16_e32 v7, 0x200, v7 |
| ; VI-NEXT: v_add_f16_e32 v29, 0x200, v29 |
| ; VI-NEXT: v_add_f16_e32 v8, 0x200, v8 |
| ; VI-NEXT: v_add_f16_e32 v28, 0x200, v28 |
| ; VI-NEXT: v_add_f16_e32 v9, 0x200, v9 |
| ; VI-NEXT: v_add_f16_e32 v27, 0x200, v27 |
| ; VI-NEXT: v_add_f16_e32 v10, 0x200, v10 |
| ; VI-NEXT: v_add_f16_e32 v26, 0x200, v26 |
| ; VI-NEXT: v_add_f16_e32 v11, 0x200, v11 |
| ; VI-NEXT: v_add_f16_e32 v25, 0x200, v25 |
| ; VI-NEXT: v_add_f16_e32 v12, 0x200, v12 |
| ; VI-NEXT: v_add_f16_e32 v24, 0x200, v24 |
| ; VI-NEXT: v_add_f16_e32 v13, 0x200, v13 |
| ; VI-NEXT: v_add_f16_e32 v23, 0x200, v23 |
| ; VI-NEXT: v_add_f16_e32 v14, 0x200, v14 |
| ; VI-NEXT: v_add_f16_e32 v22, 0x200, v22 |
| ; VI-NEXT: v_add_f16_e32 v15, 0x200, v15 |
| ; VI-NEXT: v_add_f16_e32 v21, 0x200, v21 |
| ; VI-NEXT: v_add_f16_e32 v16, 0x200, v16 |
| ; VI-NEXT: v_add_f16_e32 v20, 0x200, v20 |
| ; VI-NEXT: v_add_f16_e32 v17, 0x200, v17 |
| ; VI-NEXT: v_add_f16_e32 v19, 0x200, v19 |
| ; VI-NEXT: .LBB29_2: ; %end |
| ; VI-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18 |
| ; VI-NEXT: v_or_b32_sdwa v4, v4, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v31 |
| ; VI-NEXT: v_or_b32_sdwa v5, v5, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v30 |
| ; VI-NEXT: v_or_b32_sdwa v6, v6, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v29 |
| ; VI-NEXT: v_or_b32_sdwa v7, v7, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v28 |
| ; VI-NEXT: v_or_b32_sdwa v8, v8, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v27 |
| ; VI-NEXT: v_or_b32_sdwa v9, v9, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v26 |
| ; VI-NEXT: v_or_b32_sdwa v10, v10, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v25 |
| ; VI-NEXT: v_or_b32_sdwa v11, v11, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v24 |
| ; VI-NEXT: v_or_b32_sdwa v12, v12, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v23 |
| ; VI-NEXT: v_or_b32_sdwa v13, v13, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v22 |
| ; VI-NEXT: v_or_b32_sdwa v14, v14, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v21 |
| ; VI-NEXT: v_or_b32_sdwa v15, v15, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v20 |
| ; VI-NEXT: v_lshlrev_b32_e32 v35, 16, v35 |
| ; VI-NEXT: v_lshlrev_b32_e32 v34, 16, v34 |
| ; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v33 |
| ; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v32 |
| ; VI-NEXT: v_or_b32_sdwa v16, v16, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v19 |
| ; VI-NEXT: v_or_b32_sdwa v0, v0, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v1, v1, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v2, v2, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v3, v3, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: v_or_b32_sdwa v17, v17, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD |
| ; VI-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX9-LABEL: bitcast_v36f16_to_v36i16: |
| ; GFX9: ; %bb.0: |
| ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v17 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v16 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v14 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v13 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v12 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v11 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v10 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v9 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v8 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v7 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v6 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v5 |
| ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v18 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v4 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v3 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v2 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v1 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v0 |
| ; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc |
| ; GFX9-NEXT: s_xor_b64 s[4:5], exec, s[4:5] |
| ; GFX9-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] |
| ; GFX9-NEXT: s_cbranch_execz .LBB29_2 |
| ; GFX9-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX9-NEXT: s_mov_b32 s6, 0x5040100 |
| ; GFX9-NEXT: v_perm_b32 v17, v35, v17, s6 |
| ; GFX9-NEXT: v_perm_b32 v16, v34, v16, s6 |
| ; GFX9-NEXT: v_perm_b32 v15, v33, v15, s6 |
| ; GFX9-NEXT: v_perm_b32 v14, v32, v14, s6 |
| ; GFX9-NEXT: v_perm_b32 v13, v31, v13, s6 |
| ; GFX9-NEXT: v_perm_b32 v12, v30, v12, s6 |
| ; GFX9-NEXT: v_perm_b32 v11, v29, v11, s6 |
| ; GFX9-NEXT: v_perm_b32 v10, v28, v10, s6 |
| ; GFX9-NEXT: v_perm_b32 v9, v27, v9, s6 |
| ; GFX9-NEXT: v_perm_b32 v8, v26, v8, s6 |
| ; GFX9-NEXT: v_perm_b32 v7, v25, v7, s6 |
| ; GFX9-NEXT: s_movk_i32 s7, 0x200 |
| ; GFX9-NEXT: v_perm_b32 v6, v24, v6, s6 |
| ; GFX9-NEXT: v_perm_b32 v5, v22, v5, s6 |
| ; GFX9-NEXT: v_perm_b32 v4, v23, v4, s6 |
| ; GFX9-NEXT: v_perm_b32 v3, v21, v3, s6 |
| ; GFX9-NEXT: v_perm_b32 v2, v20, v2, s6 |
| ; GFX9-NEXT: v_perm_b32 v1, v19, v1, s6 |
| ; GFX9-NEXT: v_perm_b32 v0, v18, v0, s6 |
| ; GFX9-NEXT: v_pk_add_f16 v17, v17, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v16, v16, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v15, v15, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v14, v14, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v13, v13, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v12, v12, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v4, v4, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v3, v3, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0] |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v18, 16, v0 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v19, 16, v1 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v20, 16, v2 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v21, 16, v3 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v23, 16, v4 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v22, 16, v5 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v24, 16, v6 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v25, 16, v7 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v26, 16, v8 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v27, 16, v9 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v28, 16, v10 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v29, 16, v11 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v30, 16, v12 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v31, 16, v13 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v32, 16, v14 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v33, 16, v15 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v34, 16, v16 |
| ; GFX9-NEXT: v_lshrrev_b32_e32 v35, 16, v17 |
| ; GFX9-NEXT: .LBB29_2: ; %end |
| ; GFX9-NEXT: s_or_b64 exec, exec, s[4:5] |
| ; GFX9-NEXT: s_mov_b32 s4, 0x5040100 |
| ; GFX9-NEXT: v_perm_b32 v0, v18, v0, s4 |
| ; GFX9-NEXT: v_perm_b32 v1, v19, v1, s4 |
| ; GFX9-NEXT: v_perm_b32 v2, v20, v2, s4 |
| ; GFX9-NEXT: v_perm_b32 v3, v21, v3, s4 |
| ; GFX9-NEXT: v_perm_b32 v4, v23, v4, s4 |
| ; GFX9-NEXT: v_perm_b32 v5, v22, v5, s4 |
| ; GFX9-NEXT: v_perm_b32 v6, v24, v6, s4 |
| ; GFX9-NEXT: v_perm_b32 v7, v25, v7, s4 |
| ; GFX9-NEXT: v_perm_b32 v8, v26, v8, s4 |
| ; GFX9-NEXT: v_perm_b32 v9, v27, v9, s4 |
| ; GFX9-NEXT: v_perm_b32 v10, v28, v10, s4 |
| ; GFX9-NEXT: v_perm_b32 v11, v29, v11, s4 |
| ; GFX9-NEXT: v_perm_b32 v12, v30, v12, s4 |
| ; GFX9-NEXT: v_perm_b32 v13, v31, v13, s4 |
| ; GFX9-NEXT: v_perm_b32 v14, v32, v14, s4 |
| ; GFX9-NEXT: v_perm_b32 v15, v33, v15, s4 |
| ; GFX9-NEXT: v_perm_b32 v16, v34, v16, s4 |
| ; GFX9-NEXT: v_perm_b32 v17, v35, v17, s4 |
| ; GFX9-NEXT: s_setpc_b64 s[30:31] |
| ; |
| ; GFX11-LABEL: bitcast_v36f16_to_v36i16: |
| ; GFX11: ; %bb.0: |
| ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v36, 16, v17 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v3 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v0 |
| ; GFX11-NEXT: s_mov_b32 s0, exec_lo |
| ; GFX11-NEXT: v_cmpx_ne_u32_e32 0, v18 |
| ; GFX11-NEXT: s_xor_b32 s0, exec_lo, s0 |
| ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) |
| ; GFX11-NEXT: s_and_not1_saveexec_b32 s0, s0 |
| ; GFX11-NEXT: s_cbranch_execz .LBB29_2 |
| ; GFX11-NEXT: ; %bb.1: ; %cmp.true |
| ; GFX11-NEXT: v_perm_b32 v17, v36, v17, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v16, v35, v16, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v15, v34, v15, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v14, v33, v14, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v13, v32, v13, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v12, v31, v12, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v11, v30, v11, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v10, v29, v10, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v9, v28, v9, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v8, v27, v8, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v7, v26, v7, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v6, v25, v6, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v5, v24, v5, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v0, v19, v0, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v1, v20, v1, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v2, v21, v2, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v3, v22, v3, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v4, v23, v4, 0x5040100 |
| ; GFX11-NEXT: v_pk_add_f16 v17, 0x200, v17 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v16, 0x200, v16 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v15, 0x200, v15 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v14, 0x200, v14 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v13, 0x200, v13 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v12, 0x200, v12 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v11, 0x200, v11 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v10, 0x200, v10 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v9, 0x200, v9 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v8, 0x200, v8 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v7, 0x200, v7 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v6, 0x200, v6 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v5, 0x200, v5 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v0, 0x200, v0 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v1, 0x200, v1 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v2, 0x200, v2 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v3, 0x200, v3 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_pk_add_f16 v4, 0x200, v4 op_sel_hi:[0,1] |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v19, 16, v0 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v20, 16, v1 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v21, 16, v2 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v22, 16, v3 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v23, 16, v4 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v24, 16, v5 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v25, 16, v6 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v26, 16, v7 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v27, 16, v8 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v28, 16, v9 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v29, 16, v10 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v30, 16, v11 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v31, 16, v12 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v32, 16, v13 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v33, 16, v14 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v34, 16, v15 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v35, 16, v16 |
| ; GFX11-NEXT: v_lshrrev_b32_e32 v36, 16, v17 |
| ; GFX11-NEXT: .LBB29_2: ; %end |
| ; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s0 |
| ; GFX11-NEXT: v_perm_b32 v0, v19, v0, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v1, v20, v1, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v2, v21, v2, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v3, v22, v3, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v4, v23, v4, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v5, v24, v5, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v6, v25, v6, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v7, v26, v7, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v8, v27, v8, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v9, v28, v9, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v10, v29, v10, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v11, v30, v11, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v12, v31, v12, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v13, v32, v13, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v14, v33, v14, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v15, v34, v15, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v16, v35, v16, 0x5040100 |
| ; GFX11-NEXT: v_perm_b32 v17, v36, v17, 0x5040100 |
| ; GFX11-NEXT: s_setpc_b64 s[30:31] |
| %cmp = icmp eq i32 %b, 0 |
| br i1 %cmp, label %cmp.true, label %cmp.false |
| |
| cmp.true: |
| %a1 = fadd <36 x half> %a, splat (half 0xH0200) |
| %a2 = bitcast <36 x half> %a1 to <36 x i16> |
| br label %end |
| |
| cmp.false: |
| %a3 = bitcast <36 x half> %a to <36 x i16> |
| br label %end |
| |
| end: |
| %phi = phi <36 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ] |
| ret <36 x i16> %phi |
| } |