llvm/test/CodeGen/AMDGPU/hard-clauses-gfx1250.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -verify-machineinstrs -run-pass si-insert-hard-clauses %s -o - | FileCheck %s -check-prefixes=GFX12
# RUN: llc -mtriple=amdgcn -mcpu=gfx1250 -run-pass si-insert-hard-clauses %s -o - | FileCheck %s -check-prefixes=GFX12

---
name: flat_prefetch_flat_load
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0_vgpr1
    ; GFX12-LABEL: name: flat_prefetch_flat_load
    ; GFX12: liveins: $vgpr0_vgpr1
    ; GFX12-NEXT: {{  $}}
    ; GFX12-NEXT: FLAT_PREFETCH_B8 $vgpr0_vgpr1, 0, 0, implicit $exec, implicit $flat_scr
    ; GFX12-NEXT: $vgpr3 = FLAT_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec, implicit $flat_scr
    FLAT_PREFETCH_B8 $vgpr0_vgpr1, 0, 0, implicit $exec, implicit $flat_scr
    $vgpr3 = FLAT_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec, implicit $flat_scr
...

---
name: global_prefetch_flat_load
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0_vgpr1
    ; GFX12-LABEL: name: global_prefetch_flat_load
    ; GFX12: liveins: $vgpr0_vgpr1
    ; GFX12-NEXT: {{  $}}
    ; GFX12-NEXT: GLOBAL_PREFETCH_B8 $vgpr0_vgpr1, 0, 0, implicit $exec
    ; GFX12-NEXT: $vgpr3 = FLAT_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec, implicit $flat_scr
    GLOBAL_PREFETCH_B8 $vgpr0_vgpr1, 0, 0, implicit $exec
    $vgpr3 = FLAT_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec, implicit $flat_scr
...