Merge 98165.

llvm-svn: 104830

llvm-gcc-4.2/gcc/config/arm/arm.h

diff --git a/llvm-gcc-4.2/gcc/config/arm/arm.h b/llvm-gcc-4.2/gcc/config/arm/arm.h
index 39cee4f..d817435 100644
--- a/llvm-gcc-4.2/gcc/config/arm/arm.h
+++ b/llvm-gcc-4.2/gcc/config/arm/arm.h
@@ -3548,6 +3548,16 @@
                                     DESTTY, OPS)                              \
         TargetIntrinsicLower(EXP, BUILTIN_CODE, DESTLOC, RESULT, DESTTY, OPS);
 
+/* LLVM_GET_REG_NAME - The registers known to llvm as "r10", "r11", and "r12"
+   may have different names in GCC.  Register "r12" is called "ip", and on
+   non-Darwin OSs, "r10" is "sl" and "r11" is "fp".  Translate those names,
+   and use the default register names for everything else.  */
+#define LLVM_GET_REG_NAME(REG_NAME, REG_NUM) \
+  ((REG_NUM) == 10 ? "r10" \
+   : (REG_NUM) == 11 ? "r11" \
+   : (REG_NUM) == 12 ? "r12" \
+   : reg_names[REG_NUM])
+
 #endif /* ENABLE_LLVM */
 /* LLVM LOCAL end */
 

llvm-gcc-4.2/gcc/config/i386/i386.h

diff --git a/llvm-gcc-4.2/gcc/config/i386/i386.h b/llvm-gcc-4.2/gcc/config/i386/i386.h
index 43b86e9..15caca6 100644
--- a/llvm-gcc-4.2/gcc/config/i386/i386.h
+++ b/llvm-gcc-4.2/gcc/config/i386/i386.h
@@ -3923,11 +3923,12 @@
                                     DESTTY, OPS)                              \
         TargetIntrinsicLower(EXP, BUILTIN_CODE, DESTLOC, RESULT, DESTTY, OPS);
 
-/* When extracting a register name for a constraint, use the string extracted
-   from the magic symbol built for that register, rather than reg_names.
-   The latter maps both AH and AL to the same thing, which means we can't
-   distinguish them. */
-#define LLVM_DO_NOT_USE_REG_NAMES
+/* LLVM_GET_REG_NAME - When extracting a register name for a constraint, use
+   the string extracted from the magic symbol built for that register, rather
+   than reg_names.  The latter maps both AH and AL to the same thing, which
+   means we can't distinguish them. */
+#define LLVM_GET_REG_NAME(REG_NAME, REG_NUM) \
+  ((REG_NAME) + (*(REG_NAME) == '%' ? 1 : 0))
 
 /* Propagate code model setting to backend */
 #define LLVM_SET_MACHINE_OPTIONS(argvec)	   \

llvm-gcc-4.2/gcc/llvm-convert.cpp

diff --git a/llvm-gcc-4.2/gcc/llvm-convert.cpp b/llvm-gcc-4.2/gcc/llvm-convert.cpp
index 0fc332d..d06c98f 100644
--- a/llvm-gcc-4.2/gcc/llvm-convert.cpp
+++ b/llvm-gcc-4.2/gcc/llvm-convert.cpp
@@ -3995,6 +3995,11 @@
 //               ... Inline Assembly and Register Variables ...
 //===----------------------------------------------------------------------===//
 
+// LLVM_GET_REG_NAME - Default to use GCC's register names.  Targets may
+// override this to use different names for some registers.
+#ifndef LLVM_GET_REG_NAME
+#define LLVM_GET_REG_NAME(REG_NAME, REG_NUM) reg_names[REG_NUM]
+#endif
 
 /// Reads from register variables are handled by emitting an inline asm node
 /// that copies the value out of the specified register.
@@ -4012,7 +4017,9 @@
   // Turn this into a 'tmp = call Ty asm "", "={reg}"()'.
   FunctionType *FTy = FunctionType::get(Ty, std::vector<const Type*>(),false);
 
-  const char *Name = reg_names[decode_reg_name(extractRegisterName(decl))];
+  const char *Name = extractRegisterName(decl);
+  int RegNum = decode_reg_name(Name);
+  Name = LLVM_GET_REG_NAME(Name, RegNum);
 
   InlineAsm *IA = InlineAsm::get(FTy, "", "={"+std::string(Name)+"}", false);
   CallInst *Call = Builder.CreateCall(IA);
@@ -4032,7 +4039,9 @@
   ArgTys.push_back(ConvertType(TREE_TYPE(decl)));
   FunctionType *FTy = FunctionType::get(Type::getVoidTy(Context), ArgTys, false);
 
-  const char *Name = reg_names[decode_reg_name(extractRegisterName(decl))];
+  const char *Name = extractRegisterName(decl);
+  int RegNum = decode_reg_name(Name);
+  Name = LLVM_GET_REG_NAME(Name, RegNum);
 
   InlineAsm *IA = InlineAsm::get(FTy, "", "{"+std::string(Name)+"}", true);
   CallInst *Call = Builder.CreateCall(IA, RHS);
@@ -4403,23 +4412,6 @@
     free((char *)ReplacementStrings[i]);
 }
 
-// When extracting a register name from a DECL_HARD_REGISTER variable,
-// we normally want to look up RegNum in reg_names.  This works on most
-// targets, where ADDITIONAL_REGISTER_NAMES are true synonyms.  It does not
-// work on x86, where ADDITIONAL_REGISTER_NAMES are overlapping subregisters;
-// in particular AH and AL can't be distinguished if we go through reg_names.
-static const char* getConstraintRegNameFromGccTables(const char *RegName,
-                                                     unsigned int RegNum) {
-#ifdef LLVM_DO_NOT_USE_REG_NAMES
-  (void)RegNum;
-  if (*RegName == '%')
-    RegName++;
-  return RegName;
-#else
-  return reg_names[RegNum];
-#endif
-}
-
 Value *TreeToLLVM::EmitASM_EXPR(tree exp) {
   unsigned NumInputs = list_length(ASM_INPUTS(exp));
   unsigned NumOutputs = list_length(ASM_OUTPUTS(exp));
@@ -4538,7 +4530,7 @@
       const char* RegName = extractRegisterName(Operand);
       int RegNum = decode_reg_name(RegName);
       if (RegNum >= 0) {
-        RegName = getConstraintRegNameFromGccTables(RegName, RegNum);
+        RegName = LLVM_GET_REG_NAME(RegName, RegNum);
         unsigned RegNameLen = strlen(RegName);
         char *NewConstraint = (char*)alloca(RegNameLen+4);
         NewConstraint[0] = '=';
@@ -4705,7 +4697,7 @@
       const char *RegName = extractRegisterName(Val);
       int RegNum = decode_reg_name(RegName);
       if (RegNum >= 0) {
-        RegName = getConstraintRegNameFromGccTables(RegName, RegNum);
+        RegName = LLVM_GET_REG_NAME(RegName, RegNum);
         ConstraintStr += '{';
         ConstraintStr += RegName;
         ConstraintStr += '}';
@@ -4748,7 +4740,7 @@
       ConstraintStr += ",~{memory}";
       break;
     default:     // Normal register name.
-      RegName = getConstraintRegNameFromGccTables(RegName, RegCode);
+      RegName = LLVM_GET_REG_NAME(RegName, RegCode);
       ConstraintStr += ",~{";
       ConstraintStr += RegName;
       ConstraintStr += "}";