# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass si-shrink-instructions -o - %s | FileCheck -check-prefix=GCN %s
...
# GCN-LABEL: name: fold_imm_non_ssa{{$}}
# GCN: %0 = V_MOV_B32_e32 123, implicit %exec
# GCN: %2 = V_ADD_I32_e32 456, %0, implicit-def %vcc, implicit %exec

name: fold_imm_non_ssa
tracksRegLiveness: true
registers:
  - { id: 0, class: vgpr_32 }
  - { id: 1, class: vgpr_32 }
  - { id: 2, class: vgpr_32 }
  - { id: 3, class: sreg_64 }
body:             |
  bb.0:
    %0 = COPY undef %0
    %0 = V_MOV_B32_e32 123, implicit %exec
    %1 = V_MOV_B32_e32 456, implicit %exec
    %2, %vcc = V_ADD_I32_e64 %0, %1, implicit %exec
    S_ENDPGM

...
# GCN-LABEL: name: fold_partially_defined_superreg{{$}}
# GCN: %1 = V_MOV_B32_e32 456, implicit %exec
# GCN: %2 = V_ADD_I32_e32 123, %1, implicit-def %vcc, implicit %exec
name: fold_partially_defined_superreg
tracksRegLiveness: true
registers:
  - { id: 0, class: vgpr_32 }
  - { id: 1, class: vgpr_32 }
  - { id: 2, class: vgpr_32 }
  - { id: 3, class: vreg_64 }
body:             |
  bb.0:
    undef %3.sub0 = V_MOV_B32_e32 123, implicit %exec, implicit-def %3
    %1 = V_MOV_B32_e32 456, implicit %exec
    %2, %vcc = V_ADD_I32_e64 %3.sub0, %1, implicit %exec
    S_ENDPGM

...