| //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// |
| // |
| // The LLVM Compiler Infrastructure |
| // |
| // This file is distributed under the University of Illinois Open Source |
| // License. See LICENSE.TXT for details. |
| // |
| //===----------------------------------------------------------------------===// |
| // |
| // This implements the SelectionDAG class. |
| // |
| //===----------------------------------------------------------------------===// |
| |
| #include "llvm/CodeGen/SelectionDAG.h" |
| #include "SDNodeOrdering.h" |
| #include "SDNodeDbgValue.h" |
| #include "llvm/Constants.h" |
| #include "llvm/Analysis/DebugInfo.h" |
| #include "llvm/Analysis/ValueTracking.h" |
| #include "llvm/Function.h" |
| #include "llvm/GlobalAlias.h" |
| #include "llvm/GlobalVariable.h" |
| #include "llvm/Intrinsics.h" |
| #include "llvm/DerivedTypes.h" |
| #include "llvm/Assembly/Writer.h" |
| #include "llvm/CallingConv.h" |
| #include "llvm/CodeGen/MachineBasicBlock.h" |
| #include "llvm/CodeGen/MachineConstantPool.h" |
| #include "llvm/CodeGen/MachineFrameInfo.h" |
| #include "llvm/CodeGen/MachineModuleInfo.h" |
| #include "llvm/Target/TargetRegisterInfo.h" |
| #include "llvm/Target/TargetData.h" |
| #include "llvm/Target/TargetLowering.h" |
| #include "llvm/Target/TargetSelectionDAGInfo.h" |
| #include "llvm/Target/TargetOptions.h" |
| #include "llvm/Target/TargetInstrInfo.h" |
| #include "llvm/Target/TargetIntrinsicInfo.h" |
| #include "llvm/Target/TargetMachine.h" |
| #include "llvm/Support/CommandLine.h" |
| #include "llvm/Support/Debug.h" |
| #include "llvm/Support/ErrorHandling.h" |
| #include "llvm/Support/ManagedStatic.h" |
| #include "llvm/Support/MathExtras.h" |
| #include "llvm/Support/raw_ostream.h" |
| #include "llvm/Support/Mutex.h" |
| #include "llvm/ADT/SetVector.h" |
| #include "llvm/ADT/SmallPtrSet.h" |
| #include "llvm/ADT/SmallSet.h" |
| #include "llvm/ADT/SmallVector.h" |
| #include "llvm/ADT/StringExtras.h" |
| #include <algorithm> |
| #include <cmath> |
| using namespace llvm; |
| |
| /// makeVTList - Return an instance of the SDVTList struct initialized with the |
| /// specified members. |
| static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { |
| SDVTList Res = {VTs, NumVTs}; |
| return Res; |
| } |
| |
| static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { |
| switch (VT.getSimpleVT().SimpleTy) { |
| default: llvm_unreachable("Unknown FP format"); |
| case MVT::f16: return &APFloat::IEEEhalf; |
| case MVT::f32: return &APFloat::IEEEsingle; |
| case MVT::f64: return &APFloat::IEEEdouble; |
| case MVT::f80: return &APFloat::x87DoubleExtended; |
| case MVT::f128: return &APFloat::IEEEquad; |
| case MVT::ppcf128: return &APFloat::PPCDoubleDouble; |
| } |
| } |
| |
| SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} |
| |
| //===----------------------------------------------------------------------===// |
| // ConstantFPSDNode Class |
| //===----------------------------------------------------------------------===// |
| |
| /// isExactlyValue - We don't rely on operator== working on double values, as |
| /// it returns true for things that are clearly not equal, like -0.0 and 0.0. |
| /// As such, this method can be used to do an exact bit-for-bit comparison of |
| /// two floating point values. |
| bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { |
| return getValueAPF().bitwiseIsEqual(V); |
| } |
| |
| bool ConstantFPSDNode::isValueValidForType(EVT VT, |
| const APFloat& Val) { |
| assert(VT.isFloatingPoint() && "Can only convert between FP types"); |
| |
| // PPC long double cannot be converted to any other type. |
| if (VT == MVT::ppcf128 || |
| &Val.getSemantics() == &APFloat::PPCDoubleDouble) |
| return false; |
| |
| // convert modifies in place, so make a copy. |
| APFloat Val2 = APFloat(Val); |
| bool losesInfo; |
| (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, |
| &losesInfo); |
| return !losesInfo; |
| } |
| |
| //===----------------------------------------------------------------------===// |
| // ISD Namespace |
| //===----------------------------------------------------------------------===// |
| |
| /// isBuildVectorAllOnes - Return true if the specified node is a |
| /// BUILD_VECTOR where all of the elements are ~0 or undef. |
| bool ISD::isBuildVectorAllOnes(const SDNode *N) { |
| // Look through a bit convert. |
| if (N->getOpcode() == ISD::BITCAST) |
| N = N->getOperand(0).getNode(); |
| |
| if (N->getOpcode() != ISD::BUILD_VECTOR) return false; |
| |
| unsigned i = 0, e = N->getNumOperands(); |
| |
| // Skip over all of the undef values. |
| while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) |
| ++i; |
| |
| // Do not accept an all-undef vector. |
| if (i == e) return false; |
| |
| // Do not accept build_vectors that aren't all constants or which have non-~0 |
| // elements. We have to be a bit careful here, as the type of the constant |
| // may not be the same as the type of the vector elements due to type |
| // legalization (the elements are promoted to a legal type for the target and |
| // a vector of a type may be legal when the base element type is not). |
| // We only want to check enough bits to cover the vector elements, because |
| // we care if the resultant vector is all ones, not whether the individual |
| // constants are. |
| SDValue NotZero = N->getOperand(i); |
| unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits(); |
| if (isa<ConstantSDNode>(NotZero)) { |
| if (cast<ConstantSDNode>(NotZero)->getAPIntValue().countTrailingOnes() < |
| EltSize) |
| return false; |
| } else if (isa<ConstantFPSDNode>(NotZero)) { |
| if (cast<ConstantFPSDNode>(NotZero)->getValueAPF() |
| .bitcastToAPInt().countTrailingOnes() < EltSize) |
| return false; |
| } else |
| return false; |
| |
| // Okay, we have at least one ~0 value, check to see if the rest match or are |
| // undefs. Even with the above element type twiddling, this should be OK, as |
| // the same type legalization should have applied to all the elements. |
| for (++i; i != e; ++i) |
| if (N->getOperand(i) != NotZero && |
| N->getOperand(i).getOpcode() != ISD::UNDEF) |
| return false; |
| return true; |
| } |
| |
| |
| /// isBuildVectorAllZeros - Return true if the specified node is a |
| /// BUILD_VECTOR where all of the elements are 0 or undef. |
| bool ISD::isBuildVectorAllZeros(const SDNode *N) { |
| // Look through a bit convert. |
| if (N->getOpcode() == ISD::BITCAST) |
| N = N->getOperand(0).getNode(); |
| |
| if (N->getOpcode() != ISD::BUILD_VECTOR) return false; |
| |
| unsigned i = 0, e = N->getNumOperands(); |
| |
| // Skip over all of the undef values. |
| while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) |
| ++i; |
| |
| // Do not accept an all-undef vector. |
| if (i == e) return false; |
| |
| // Do not accept build_vectors that aren't all constants or which have non-0 |
| // elements. |
| SDValue Zero = N->getOperand(i); |
| if (isa<ConstantSDNode>(Zero)) { |
| if (!cast<ConstantSDNode>(Zero)->isNullValue()) |
| return false; |
| } else if (isa<ConstantFPSDNode>(Zero)) { |
| if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) |
| return false; |
| } else |
| return false; |
| |
| // Okay, we have at least one 0 value, check to see if the rest match or are |
| // undefs. |
| for (++i; i != e; ++i) |
| if (N->getOperand(i) != Zero && |
| N->getOperand(i).getOpcode() != ISD::UNDEF) |
| return false; |
| return true; |
| } |
| |
| /// isScalarToVector - Return true if the specified node is a |
| /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low |
| /// element is not an undef. |
| bool ISD::isScalarToVector(const SDNode *N) { |
| if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) |
| return true; |
| |
| if (N->getOpcode() != ISD::BUILD_VECTOR) |
| return false; |
| if (N->getOperand(0).getOpcode() == ISD::UNDEF) |
| return false; |
| unsigned NumElems = N->getNumOperands(); |
| if (NumElems == 1) |
| return false; |
| for (unsigned i = 1; i < NumElems; ++i) { |
| SDValue V = N->getOperand(i); |
| if (V.getOpcode() != ISD::UNDEF) |
| return false; |
| } |
| return true; |
| } |
| |
| /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) |
| /// when given the operation for (X op Y). |
| ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { |
| // To perform this operation, we just need to swap the L and G bits of the |
| // operation. |
| unsigned OldL = (Operation >> 2) & 1; |
| unsigned OldG = (Operation >> 1) & 1; |
| return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits |
| (OldL << 1) | // New G bit |
| (OldG << 2)); // New L bit. |
| } |
| |
| /// getSetCCInverse - Return the operation corresponding to !(X op Y), where |
| /// 'op' is a valid SetCC operation. |
| ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { |
| unsigned Operation = Op; |
| if (isInteger) |
| Operation ^= 7; // Flip L, G, E bits, but not U. |
| else |
| Operation ^= 15; // Flip all of the condition bits. |
| |
| if (Operation > ISD::SETTRUE2) |
| Operation &= ~8; // Don't let N and U bits get set. |
| |
| return ISD::CondCode(Operation); |
| } |
| |
| |
| /// isSignedOp - For an integer comparison, return 1 if the comparison is a |
| /// signed operation and 2 if the result is an unsigned comparison. Return zero |
| /// if the operation does not depend on the sign of the input (setne and seteq). |
| static int isSignedOp(ISD::CondCode Opcode) { |
| switch (Opcode) { |
| default: llvm_unreachable("Illegal integer setcc operation!"); |
| case ISD::SETEQ: |
| case ISD::SETNE: return 0; |
| case ISD::SETLT: |
| case ISD::SETLE: |
| case ISD::SETGT: |
| case ISD::SETGE: return 1; |
| case ISD::SETULT: |
| case ISD::SETULE: |
| case ISD::SETUGT: |
| case ISD::SETUGE: return 2; |
| } |
| } |
| |
| /// getSetCCOrOperation - Return the result of a logical OR between different |
| /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function |
| /// returns SETCC_INVALID if it is not possible to represent the resultant |
| /// comparison. |
| ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, |
| bool isInteger) { |
| if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) |
| // Cannot fold a signed integer setcc with an unsigned integer setcc. |
| return ISD::SETCC_INVALID; |
| |
| unsigned Op = Op1 | Op2; // Combine all of the condition bits. |
| |
| // If the N and U bits get set then the resultant comparison DOES suddenly |
| // care about orderedness, and is true when ordered. |
| if (Op > ISD::SETTRUE2) |
| Op &= ~16; // Clear the U bit if the N bit is set. |
| |
| // Canonicalize illegal integer setcc's. |
| if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT |
| Op = ISD::SETNE; |
| |
| return ISD::CondCode(Op); |
| } |
| |
| /// getSetCCAndOperation - Return the result of a logical AND between different |
| /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This |
| /// function returns zero if it is not possible to represent the resultant |
| /// comparison. |
| ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, |
| bool isInteger) { |
| if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) |
| // Cannot fold a signed setcc with an unsigned setcc. |
| return ISD::SETCC_INVALID; |
| |
| // Combine all of the condition bits. |
| ISD::CondCode Result = ISD::CondCode(Op1 & Op2); |
| |
| // Canonicalize illegal integer setcc's. |
| if (isInteger) { |
| switch (Result) { |
| default: break; |
| case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT |
| case ISD::SETOEQ: // SETEQ & SETU[LG]E |
| case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE |
| case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE |
| case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE |
| } |
| } |
| |
| return Result; |
| } |
| |
| //===----------------------------------------------------------------------===// |
| // SDNode Profile Support |
| //===----------------------------------------------------------------------===// |
| |
| /// AddNodeIDOpcode - Add the node opcode to the NodeID data. |
| /// |
| static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { |
| ID.AddInteger(OpC); |
| } |
| |
| /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them |
| /// solely with their pointer. |
| static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { |
| ID.AddPointer(VTList.VTs); |
| } |
| |
| /// AddNodeIDOperands - Various routines for adding operands to the NodeID data. |
| /// |
| static void AddNodeIDOperands(FoldingSetNodeID &ID, |
| const SDValue *Ops, unsigned NumOps) { |
| for (; NumOps; --NumOps, ++Ops) { |
| ID.AddPointer(Ops->getNode()); |
| ID.AddInteger(Ops->getResNo()); |
| } |
| } |
| |
| /// AddNodeIDOperands - Various routines for adding operands to the NodeID data. |
| /// |
| static void AddNodeIDOperands(FoldingSetNodeID &ID, |
| const SDUse *Ops, unsigned NumOps) { |
| for (; NumOps; --NumOps, ++Ops) { |
| ID.AddPointer(Ops->getNode()); |
| ID.AddInteger(Ops->getResNo()); |
| } |
| } |
| |
| static void AddNodeIDNode(FoldingSetNodeID &ID, |
| unsigned short OpC, SDVTList VTList, |
| const SDValue *OpList, unsigned N) { |
| AddNodeIDOpcode(ID, OpC); |
| AddNodeIDValueTypes(ID, VTList); |
| AddNodeIDOperands(ID, OpList, N); |
| } |
| |
| /// AddNodeIDCustom - If this is an SDNode with special info, add this info to |
| /// the NodeID data. |
| static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { |
| switch (N->getOpcode()) { |
| case ISD::TargetExternalSymbol: |
| case ISD::ExternalSymbol: |
| llvm_unreachable("Should only be used on nodes with operands"); |
| default: break; // Normal nodes don't need extra info. |
| case ISD::TargetConstant: |
| case ISD::Constant: |
| ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); |
| break; |
| case ISD::TargetConstantFP: |
| case ISD::ConstantFP: { |
| ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); |
| break; |
| } |
| case ISD::TargetGlobalAddress: |
| case ISD::GlobalAddress: |
| case ISD::TargetGlobalTLSAddress: |
| case ISD::GlobalTLSAddress: { |
| const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); |
| ID.AddPointer(GA->getGlobal()); |
| ID.AddInteger(GA->getOffset()); |
| ID.AddInteger(GA->getTargetFlags()); |
| break; |
| } |
| case ISD::BasicBlock: |
| ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); |
| break; |
| case ISD::Register: |
| ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); |
| break; |
| case ISD::RegisterMask: |
| ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask()); |
| break; |
| case ISD::SRCVALUE: |
| ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); |
| break; |
| case ISD::FrameIndex: |
| case ISD::TargetFrameIndex: |
| ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); |
| break; |
| case ISD::JumpTable: |
| case ISD::TargetJumpTable: |
| ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); |
| ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); |
| break; |
| case ISD::ConstantPool: |
| case ISD::TargetConstantPool: { |
| const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); |
| ID.AddInteger(CP->getAlignment()); |
| ID.AddInteger(CP->getOffset()); |
| if (CP->isMachineConstantPoolEntry()) |
| CP->getMachineCPVal()->addSelectionDAGCSEId(ID); |
| else |
| ID.AddPointer(CP->getConstVal()); |
| ID.AddInteger(CP->getTargetFlags()); |
| break; |
| } |
| case ISD::LOAD: { |
| const LoadSDNode *LD = cast<LoadSDNode>(N); |
| ID.AddInteger(LD->getMemoryVT().getRawBits()); |
| ID.AddInteger(LD->getRawSubclassData()); |
| break; |
| } |
| case ISD::STORE: { |
| const StoreSDNode *ST = cast<StoreSDNode>(N); |
| ID.AddInteger(ST->getMemoryVT().getRawBits()); |
| ID.AddInteger(ST->getRawSubclassData()); |
| break; |
| } |
| case ISD::ATOMIC_CMP_SWAP: |
| case ISD::ATOMIC_SWAP: |
| case ISD::ATOMIC_LOAD_ADD: |
| case ISD::ATOMIC_LOAD_SUB: |
| case ISD::ATOMIC_LOAD_AND: |
| case ISD::ATOMIC_LOAD_OR: |
| case ISD::ATOMIC_LOAD_XOR: |
| case ISD::ATOMIC_LOAD_NAND: |
| case ISD::ATOMIC_LOAD_MIN: |
| case ISD::ATOMIC_LOAD_MAX: |
| case ISD::ATOMIC_LOAD_UMIN: |
| case ISD::ATOMIC_LOAD_UMAX: |
| case ISD::ATOMIC_LOAD: |
| case ISD::ATOMIC_STORE: { |
| const AtomicSDNode *AT = cast<AtomicSDNode>(N); |
| ID.AddInteger(AT->getMemoryVT().getRawBits()); |
| ID.AddInteger(AT->getRawSubclassData()); |
| break; |
| } |
| case ISD::VECTOR_SHUFFLE: { |
| const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); |
| for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); |
| i != e; ++i) |
| ID.AddInteger(SVN->getMaskElt(i)); |
| break; |
| } |
| case ISD::TargetBlockAddress: |
| case ISD::BlockAddress: { |
| ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); |
| ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); |
| break; |
| } |
| } // end switch (N->getOpcode()) |
| } |
| |
| /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID |
| /// data. |
| static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { |
| AddNodeIDOpcode(ID, N->getOpcode()); |
| // Add the return value info. |
| AddNodeIDValueTypes(ID, N->getVTList()); |
| // Add the operand info. |
| AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); |
| |
| // Handle SDNode leafs with special info. |
| AddNodeIDCustom(ID, N); |
| } |
| |
| /// encodeMemSDNodeFlags - Generic routine for computing a value for use in |
| /// the CSE map that carries volatility, temporalness, indexing mode, and |
| /// extension/truncation information. |
| /// |
| static inline unsigned |
| encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, |
| bool isNonTemporal, bool isInvariant) { |
| assert((ConvType & 3) == ConvType && |
| "ConvType may not require more than 2 bits!"); |
| assert((AM & 7) == AM && |
| "AM may not require more than 3 bits!"); |
| return ConvType | |
| (AM << 2) | |
| (isVolatile << 5) | |
| (isNonTemporal << 6) | |
| (isInvariant << 7); |
| } |
| |
| //===----------------------------------------------------------------------===// |
| // SelectionDAG Class |
| //===----------------------------------------------------------------------===// |
| |
| /// doNotCSE - Return true if CSE should not be performed for this node. |
| static bool doNotCSE(SDNode *N) { |
| if (N->getValueType(0) == MVT::Glue) |
| return true; // Never CSE anything that produces a flag. |
| |
| switch (N->getOpcode()) { |
| default: break; |
| case ISD::HANDLENODE: |
| case ISD::EH_LABEL: |
| return true; // Never CSE these nodes. |
| } |
| |
| // Check that remaining values produced are not flags. |
| for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) |
| if (N->getValueType(i) == MVT::Glue) |
| return true; // Never CSE anything that produces a flag. |
| |
| return false; |
| } |
| |
| /// RemoveDeadNodes - This method deletes all unreachable nodes in the |
| /// SelectionDAG. |
| void SelectionDAG::RemoveDeadNodes() { |
| // Create a dummy node (which is not added to allnodes), that adds a reference |
| // to the root node, preventing it from being deleted. |
| HandleSDNode Dummy(getRoot()); |
| |
| SmallVector<SDNode*, 128> DeadNodes; |
| |
| // Add all obviously-dead nodes to the DeadNodes worklist. |
| for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) |
| if (I->use_empty()) |
| DeadNodes.push_back(I); |
| |
| RemoveDeadNodes(DeadNodes); |
| |
| // If the root changed (e.g. it was a dead load, update the root). |
| setRoot(Dummy.getValue()); |
| } |
| |
| /// RemoveDeadNodes - This method deletes the unreachable nodes in the |
| /// given list, and any nodes that become unreachable as a result. |
| void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, |
| DAGUpdateListener *UpdateListener) { |
| |
| // Process the worklist, deleting the nodes and adding their uses to the |
| // worklist. |
| while (!DeadNodes.empty()) { |
| SDNode *N = DeadNodes.pop_back_val(); |
| |
| if (UpdateListener) |
| UpdateListener->NodeDeleted(N, 0); |
| |
| // Take the node out of the appropriate CSE map. |
| RemoveNodeFromCSEMaps(N); |
| |
| // Next, brutally remove the operand list. This is safe to do, as there are |
| // no cycles in the graph. |
| for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { |
| SDUse &Use = *I++; |
| SDNode *Operand = Use.getNode(); |
| Use.set(SDValue()); |
| |
| // Now that we removed this operand, see if there are no uses of it left. |
| if (Operand->use_empty()) |
| DeadNodes.push_back(Operand); |
| } |
| |
| DeallocateNode(N); |
| } |
| } |
| |
| void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ |
| SmallVector<SDNode*, 16> DeadNodes(1, N); |
| |
| // Create a dummy node that adds a reference to the root node, preventing |
| // it from being deleted. (This matters if the root is an operand of the |
| // dead node.) |
| HandleSDNode Dummy(getRoot()); |
| |
| RemoveDeadNodes(DeadNodes, UpdateListener); |
| } |
| |
| void SelectionDAG::DeleteNode(SDNode *N) { |
| // First take this out of the appropriate CSE map. |
| RemoveNodeFromCSEMaps(N); |
| |
| // Finally, remove uses due to operands of this node, remove from the |
| // AllNodes list, and delete the node. |
| DeleteNodeNotInCSEMaps(N); |
| } |
| |
| void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { |
| assert(N != AllNodes.begin() && "Cannot delete the entry node!"); |
| assert(N->use_empty() && "Cannot delete a node that is not dead!"); |
| |
| // Drop all of the operands and decrement used node's use counts. |
| N->DropOperands(); |
| |
| DeallocateNode(N); |
| } |
| |
| void SelectionDAG::DeallocateNode(SDNode *N) { |
| if (N->OperandsNeedDelete) |
| delete[] N->OperandList; |
| |
| // Set the opcode to DELETED_NODE to help catch bugs when node |
| // memory is reallocated. |
| N->NodeType = ISD::DELETED_NODE; |
| |
| NodeAllocator.Deallocate(AllNodes.remove(N)); |
| |
| // Remove the ordering of this node. |
| Ordering->remove(N); |
| |
| // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. |
| ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N); |
| for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) |
| DbgVals[i]->setIsInvalidated(); |
| } |
| |
| /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that |
| /// correspond to it. This is useful when we're about to delete or repurpose |
| /// the node. We don't want future request for structurally identical nodes |
| /// to return N anymore. |
| bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { |
| bool Erased = false; |
| switch (N->getOpcode()) { |
| case ISD::HANDLENODE: return false; // noop. |
| case ISD::CONDCODE: |
| assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && |
| "Cond code doesn't exist!"); |
| Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; |
| CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; |
| break; |
| case ISD::ExternalSymbol: |
| Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); |
| break; |
| case ISD::TargetExternalSymbol: { |
| ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); |
| Erased = TargetExternalSymbols.erase( |
| std::pair<std::string,unsigned char>(ESN->getSymbol(), |
| ESN->getTargetFlags())); |
| break; |
| } |
| case ISD::VALUETYPE: { |
| EVT VT = cast<VTSDNode>(N)->getVT(); |
| if (VT.isExtended()) { |
| Erased = ExtendedValueTypeNodes.erase(VT); |
| } else { |
| Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; |
| ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; |
| } |
| break; |
| } |
| default: |
| // Remove it from the CSE Map. |
| assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!"); |
| assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!"); |
| Erased = CSEMap.RemoveNode(N); |
| break; |
| } |
| #ifndef NDEBUG |
| // Verify that the node was actually in one of the CSE maps, unless it has a |
| // flag result (which cannot be CSE'd) or is one of the special cases that are |
| // not subject to CSE. |
| if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue && |
| !N->isMachineOpcode() && !doNotCSE(N)) { |
| N->dump(this); |
| dbgs() << "\n"; |
| llvm_unreachable("Node is not in map!"); |
| } |
| #endif |
| return Erased; |
| } |
| |
| /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE |
| /// maps and modified in place. Add it back to the CSE maps, unless an identical |
| /// node already exists, in which case transfer all its users to the existing |
| /// node. This transfer can potentially trigger recursive merging. |
| /// |
| void |
| SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, |
| DAGUpdateListener *UpdateListener) { |
| // For node types that aren't CSE'd, just act as if no identical node |
| // already exists. |
| if (!doNotCSE(N)) { |
| SDNode *Existing = CSEMap.GetOrInsertNode(N); |
| if (Existing != N) { |
| // If there was already an existing matching node, use ReplaceAllUsesWith |
| // to replace the dead one with the existing one. This can cause |
| // recursive merging of other unrelated nodes down the line. |
| ReplaceAllUsesWith(N, Existing, UpdateListener); |
| |
| // N is now dead. Inform the listener if it exists and delete it. |
| if (UpdateListener) |
| UpdateListener->NodeDeleted(N, Existing); |
| DeleteNodeNotInCSEMaps(N); |
| return; |
| } |
| } |
| |
| // If the node doesn't already exist, we updated it. Inform a listener if |
| // it exists. |
| if (UpdateListener) |
| UpdateListener->NodeUpdated(N); |
| } |
| |
| /// FindModifiedNodeSlot - Find a slot for the specified node if its operands |
| /// were replaced with those specified. If this node is never memoized, |
| /// return null, otherwise return a pointer to the slot it would take. If a |
| /// node already exists with these operands, the slot will be non-null. |
| SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, |
| void *&InsertPos) { |
| if (doNotCSE(N)) |
| return 0; |
| |
| SDValue Ops[] = { Op }; |
| FoldingSetNodeID ID; |
| AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); |
| AddNodeIDCustom(ID, N); |
| SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); |
| return Node; |
| } |
| |
| /// FindModifiedNodeSlot - Find a slot for the specified node if its operands |
| /// were replaced with those specified. If this node is never memoized, |
| /// return null, otherwise return a pointer to the slot it would take. If a |
| /// node already exists with these operands, the slot will be non-null. |
| SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, |
| SDValue Op1, SDValue Op2, |
| void *&InsertPos) { |
| if (doNotCSE(N)) |
| return 0; |
| |
| SDValue Ops[] = { Op1, Op2 }; |
| FoldingSetNodeID ID; |
| AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); |
| AddNodeIDCustom(ID, N); |
| SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); |
| return Node; |
| } |
| |
| |
| /// FindModifiedNodeSlot - Find a slot for the specified node if its operands |
| /// were replaced with those specified. If this node is never memoized, |
| /// return null, otherwise return a pointer to the slot it would take. If a |
| /// node already exists with these operands, the slot will be non-null. |
| SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, |
| const SDValue *Ops,unsigned NumOps, |
| void *&InsertPos) { |
| if (doNotCSE(N)) |
| return 0; |
| |
| FoldingSetNodeID ID; |
| AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); |
| AddNodeIDCustom(ID, N); |
| SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); |
| return Node; |
| } |
| |
| #ifndef NDEBUG |
| /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid. |
| static void VerifyNodeCommon(SDNode *N) { |
| switch (N->getOpcode()) { |
| default: |
| break; |
| case ISD::BUILD_PAIR: { |
| EVT VT = N->getValueType(0); |
| assert(N->getNumValues() == 1 && "Too many results!"); |
| assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && |
| "Wrong return type!"); |
| assert(N->getNumOperands() == 2 && "Wrong number of operands!"); |
| assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && |
| "Mismatched operand types!"); |
| assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && |
| "Wrong operand type!"); |
| assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && |
| "Wrong return type size"); |
| break; |
| } |
| case ISD::BUILD_VECTOR: { |
| assert(N->getNumValues() == 1 && "Too many results!"); |
| assert(N->getValueType(0).isVector() && "Wrong return type!"); |
| assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && |
| "Wrong number of operands!"); |
| EVT EltVT = N->getValueType(0).getVectorElementType(); |
| for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { |
| assert((I->getValueType() == EltVT || |
| (EltVT.isInteger() && I->getValueType().isInteger() && |
| EltVT.bitsLE(I->getValueType()))) && |
| "Wrong operand type!"); |
| assert(I->getValueType() == N->getOperand(0).getValueType() && |
| "Operands must all have the same type"); |
| } |
| break; |
| } |
| } |
| } |
| |
| /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid. |
| static void VerifySDNode(SDNode *N) { |
| // The SDNode allocators cannot be used to allocate nodes with fields that are |
| // not present in an SDNode! |
| assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); |
| assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!"); |
| assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!"); |
| assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!"); |
| assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!"); |
| assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!"); |
| assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!"); |
| assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!"); |
| assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!"); |
| assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!"); |
| assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!"); |
| assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!"); |
| assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!"); |
| assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!"); |
| assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!"); |
| assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!"); |
| assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!"); |
| assert(!isa<VTSDNode>(N) && "Bad VTSDNode!"); |
| assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!"); |
| |
| VerifyNodeCommon(N); |
| } |
| |
| /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is |
| /// invalid. |
| static void VerifyMachineNode(SDNode *N) { |
| // The MachineNode allocators cannot be used to allocate nodes with fields |
| // that are not present in a MachineNode! |
| // Currently there are no such nodes. |
| |
| VerifyNodeCommon(N); |
| } |
| #endif // NDEBUG |
| |
| /// getEVTAlignment - Compute the default alignment value for the |
| /// given type. |
| /// |
| unsigned SelectionDAG::getEVTAlignment(EVT VT) const { |
| Type *Ty = VT == MVT::iPTR ? |
| PointerType::get(Type::getInt8Ty(*getContext()), 0) : |
| VT.getTypeForEVT(*getContext()); |
| |
| return TLI.getTargetData()->getABITypeAlignment(Ty); |
| } |
| |
| // EntryNode could meaningfully have debug info if we can find it... |
| SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL) |
| : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), |
| OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), |
| Root(getEntryNode()), Ordering(0) { |
| AllNodes.push_back(&EntryNode); |
| Ordering = new SDNodeOrdering(); |
| DbgInfo = new SDDbgInfo(); |
| } |
| |
| void SelectionDAG::init(MachineFunction &mf) { |
| MF = &mf; |
| Context = &mf.getFunction()->getContext(); |
| } |
| |
| SelectionDAG::~SelectionDAG() { |
| allnodes_clear(); |
| delete Ordering; |
| delete DbgInfo; |
| } |
| |
| void SelectionDAG::allnodes_clear() { |
| assert(&*AllNodes.begin() == &EntryNode); |
| AllNodes.remove(AllNodes.begin()); |
| while (!AllNodes.empty()) |
| DeallocateNode(AllNodes.begin()); |
| } |
| |
| void SelectionDAG::clear() { |
| allnodes_clear(); |
| OperandAllocator.Reset(); |
| CSEMap.clear(); |
| |
| ExtendedValueTypeNodes.clear(); |
| ExternalSymbols.clear(); |
| TargetExternalSymbols.clear(); |
| std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), |
| static_cast<CondCodeSDNode*>(0)); |
| std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), |
| static_cast<SDNode*>(0)); |
| |
| EntryNode.UseList = 0; |
| AllNodes.push_back(&EntryNode); |
| Root = getEntryNode(); |
| Ordering->clear(); |
| DbgInfo->clear(); |
| } |
| |
| SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { |
| return VT.bitsGT(Op.getValueType()) ? |
| getNode(ISD::ANY_EXTEND, DL, VT, Op) : |
| getNode(ISD::TRUNCATE, DL, VT, Op); |
| } |
| |
| SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { |
| return VT.bitsGT(Op.getValueType()) ? |
| getNode(ISD::SIGN_EXTEND, DL, VT, Op) : |
| getNode(ISD::TRUNCATE, DL, VT, Op); |
| } |
| |
| SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { |
| return VT.bitsGT(Op.getValueType()) ? |
| getNode(ISD::ZERO_EXTEND, DL, VT, Op) : |
| getNode(ISD::TRUNCATE, DL, VT, Op); |
| } |
| |
| SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { |
| assert(!VT.isVector() && |
| "getZeroExtendInReg should use the vector element type instead of " |
| "the vector type!"); |
| if (Op.getValueType() == VT) return Op; |
| unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); |
| APInt Imm = APInt::getLowBitsSet(BitWidth, |
| VT.getSizeInBits()); |
| return getNode(ISD::AND, DL, Op.getValueType(), Op, |
| getConstant(Imm, Op.getValueType())); |
| } |
| |
| /// getNOT - Create a bitwise NOT operation as (XOR Val, -1). |
| /// |
| SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { |
| EVT EltVT = VT.getScalarType(); |
| SDValue NegOne = |
| getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); |
| return getNode(ISD::XOR, DL, VT, Val, NegOne); |
| } |
| |
| SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { |
| EVT EltVT = VT.getScalarType(); |
| assert((EltVT.getSizeInBits() >= 64 || |
| (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && |
| "getConstant with a uint64_t value that doesn't fit in the type!"); |
| return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); |
| } |
| |
| SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { |
| return getConstant(*ConstantInt::get(*Context, Val), VT, isT); |
| } |
| |
| SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { |
| assert(VT.isInteger() && "Cannot create FP integer constant!"); |
| |
| EVT EltVT = VT.getScalarType(); |
| const ConstantInt *Elt = &Val; |
| |
| // In some cases the vector type is legal but the element type is illegal and |
| // needs to be promoted, for example v8i8 on ARM. In this case, promote the |
| // inserted value (the type does not need to match the vector element type). |
| // Any extra bits introduced will be truncated away. |
| if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) == |
| TargetLowering::TypePromoteInteger) { |
| EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT); |
| APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits()); |
| Elt = ConstantInt::get(*getContext(), NewVal); |
| } |
| |
| assert(Elt->getBitWidth() == EltVT.getSizeInBits() && |
| "APInt size does not match type size!"); |
| unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; |
| FoldingSetNodeID ID; |
| AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); |
| ID.AddPointer(Elt); |
| void *IP = 0; |
| SDNode *N = NULL; |
| if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) |
| if (!VT.isVector()) |
| return SDValue(N, 0); |
| |
| if (!N) { |
| N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT); |
| CSEMap.InsertNode(N, IP); |
| AllNodes.push_back(N); |
| } |
| |
| SDValue Result(N, 0); |
| if (VT.isVector()) { |
| SmallVector<SDValue, 8> Ops; |
| Ops.assign(VT.getVectorNumElements(), Result); |
| Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); |
| } |
| return Result; |
| } |
| |
| SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { |
| return getConstant(Val, TLI.getPointerTy(), isTarget); |
| } |
| |
| |
| SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { |
| return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); |
| } |
| |
| SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ |
| assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); |
| |
| EVT EltVT = VT.getScalarType(); |
| |
| // Do the map lookup using the actual bit pattern for the floating point |
| // value, so that we don't have problems with 0.0 comparing equal to -0.0, and |
| // we don't have issues with SNANs. |
| unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; |
| FoldingSetNodeID ID; |
| AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); |
| ID.AddPointer(&V); |
| void *IP = 0; |
| SDNode *N = NULL; |
| if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) |
| if (!VT.isVector()) |
| return SDValue(N, 0); |
| |
| if (!N) { |
| N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); |
| CSEMap.InsertNode(N, IP); |
| AllNodes.push_back(N); |
| } |
| |
| SDValue Result(N, 0); |
| if (VT.isVector()) { |
| SmallVector<SDValue, 8> Ops; |
| Ops.assign(VT.getVectorNumElements(), Result); |
| // FIXME DebugLoc info might be appropriate here |
| Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); |
| } |
| return Result; |
| } |
| |
| SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { |
| EVT EltVT = VT.getScalarType(); |
| if (EltVT==MVT::f32) |
| return getConstantFP(APFloat((float)Val), VT, isTarget); |
| else if (EltVT==MVT::f64) |
| return getConstantFP(APFloat(Val), VT, isTarget); |
| else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::f16) { |
| bool ignored; |
| APFloat apf = APFloat(Val); |
| apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, |
| &ignored); |
| return getConstantFP(apf, VT, isTarget); |
| } else |
| llvm_unreachable("Unsupported type in getConstantFP"); |
| } |
| |
| SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL, |
| EVT VT, int64_t Offset, |
| bool isTargetGA, |
| unsigned char TargetFlags) { |
| assert((TargetFlags == 0 || isTargetGA) && |
| "Cannot set target flags on target-independent globals"); |
| |
| // Truncate (with sign-extension) the offset value to the pointer size. |
| EVT PTy = TLI.getPointerTy(); |
| unsigned BitWidth = PTy.getSizeInBits(); |
| if (BitWidth < 64) |
| Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); |
| |
| const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); |
| if (!GVar) { |
| // If GV is an alias then use the aliasee for determining thread-localness. |
| if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) |
| GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); |
| } |
| |
| unsigned Opc; |
| if (GVar && GVar->isThreadLocal()) |
| Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; |
| else |
| Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; |
| |
| FoldingSetNodeID ID; |
| AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); |
| ID.AddPointer(GV); |
| ID.AddInteger(Offset); |
| ID.AddInteger(TargetFlags); |
| void *IP = 0; |
| if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) |
| return SDValue(E, 0); |
| |
| SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT, |
| Offset, TargetFlags); |
| CSEMap.InsertNode(N, IP); |
| AllNodes.push_back(N); |
| return SDValue(N, 0); |
| } |
| |
| SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { |
| unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; |
| FoldingSetNodeID ID; |
| AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); |
| ID.AddInteger(FI); |
| void *IP = 0; |
| if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) |
| return SDValue(E, 0); |
| |
| SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); |
| CSEMap.InsertNode(N, IP); |
| AllNodes.push_back(N); |
| return SDValue(N, 0); |
| } |
| |
| SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, |
| unsigned char TargetFlags) { |
| assert((TargetFlags == 0 || isTarget) && |
| "Cannot set target flags on target-independent jump tables"); |
| unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; |
| FoldingSetNodeID ID; |
| AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); |
| ID.AddInteger(JTI); |
| ID.AddInteger(TargetFlags); |
| void *IP = 0; |
| if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) |
| return SDValue(E, 0); |
| |
| SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, |
| TargetFlags); |
| CSEMap.InsertNode(N, IP); |
| AllNodes.push_back(N); |
| return SDValue(N, 0); |
| } |
| |
| SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, |
| unsigned Alignment, int Offset, |
| bool isTarget, |
| unsigned char TargetFlags) { |
| assert((TargetFlags == 0 || isTarget) && |
| "Cannot set target flags on target-independent globals"); |
| if (Alignment == 0) |
| Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); |
| unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; |
| FoldingSetNodeID ID; |
| AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); |
| ID.AddInteger(Alignment); |
| ID.AddInteger(Offset); |
| ID.AddPointer(C); |
| ID.AddInteger(TargetFlags); |
| void *IP = 0; |
| if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) |
| return SDValue(E, 0); |
| |
| SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, |
| Alignment, TargetFlags); |
| CSEMap.InsertNode(N, IP); |
| AllNodes.push_back(N); |
| return SDValue(N, 0); |
| } |
| |
| |
| SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, |
| unsigned Alignment, int Offset, |
| bool isTarget, |
| unsigned char TargetFlags) { |
| assert((TargetFlags == 0 || isTarget) && |
| "Cannot set target flags on target-independent globals"); |
| if (Alignment == 0) |
| Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); |
| unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; |
| FoldingSetNodeID ID; |
| AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); |
| ID.AddInteger(Alignment); |
| ID.AddInteger(Offset); |
| C->addSelectionDAGCSEId(ID); |
| ID.AddInteger(TargetFlags); |
| void *IP = 0; |
| if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) |
| return SDValue(E, 0); |
| |
| SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, |
| Alignment, TargetFlags); |
| CSEMap.InsertNode(N, IP); |
| AllNodes.push_back(N); |
| return SDValue(N, 0); |
| } |
| |
| SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { |
| FoldingSetNodeID ID; |
| AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); |
| ID.AddPointer(MBB); |
| void *IP = 0; |
| if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) |
| return SDValue(E, 0); |
| |
| SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); |
| CSEMap.InsertNode(N, IP); |
| AllNodes.push_back(N); |
| return SDValue(N, 0); |
| } |
| |
| SDValue SelectionDAG::getValueType(EVT VT) { |
| if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= |
| ValueTypeNodes.size()) |
| ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); |
| |
| SDNode *&N = VT.isExtended() ? |
| ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; |
| |
| if (N) return SDValue(N, 0); |
| N = new (NodeAllocator) VTSDNode(VT); |
| AllNodes.push_back(N); |
| return SDValue(N, 0); |
| } |
| |
| SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { |
| SDNode *&N = ExternalSymbols[Sym]; |
| if (N) return SDValue(N, 0); |
| N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); |
| AllNodes.push_back(N); |
| return SDValue(N, 0); |
| } |
| |
| SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, |
| unsigned char TargetFlags) { |
| SDNode *&N = |
| TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, |
| TargetFlags)]; |
| if (N) return SDValue(N, 0); |
| N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); |
| AllNodes.push_back(N); |
| return SDValue(N, 0); |
| } |
| |
| SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { |
| if ((unsigned)Cond >= CondCodeNodes.size()) |
| CondCodeNodes.resize(Cond+1); |
| |
| if (CondCodeNodes[Cond] == 0) { |
| CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); |
| CondCodeNodes[Cond] = N; |
| AllNodes.push_back(N); |
| } |
| |
| return SDValue(CondCodeNodes[Cond], 0); |
| } |
| |
| // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in |
| // the shuffle mask M that point at N1 to point at N2, and indices that point |
| // N2 to point at N1. |
| static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { |
| std::swap(N1, N2); |
| int NElts = M.size(); |
| for (int i = 0; i != NElts; ++i) { |
| if (M[i] >= NElts) |
| M[i] -= NElts; |
| else if (M[i] >= 0) |
| M[i] += NElts; |
| } |
| } |
| |
| SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, |
| SDValue N2, const int *Mask) { |
| assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); |
| assert(VT.isVector() && N1.getValueType().isVector() && |
| "Vector Shuffle VTs must be a vectors"); |
| assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() |
| && "Vector Shuffle VTs must have same element type"); |
| |
| // Canonicalize shuffle undef, undef -> undef |
| if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) |
| return getUNDEF(VT); |
| |
| // Validate that all indices in Mask are within the range of the elements |
| // input to the shuffle. |
| unsigned NElts = VT.getVectorNumElements(); |
| SmallVector<int, 8> MaskVec; |
| for (unsigned i = 0; i != NElts; ++i) { |
| assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); |
| MaskVec.push_back(Mask[i]); |
| } |
| |
| // Canonicalize shuffle v, v -> v, undef |
| if (N1 == N2) { |
| N2 = getUNDEF(VT); |
| for (unsigned i = 0; i != NElts; ++i) |
| if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; |
| } |
| |
| // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. |
| if (N1.getOpcode() == ISD::UNDEF) |
| commuteShuffle(N1, N2, MaskVec); |
| |
| // Canonicalize all index into lhs, -> shuffle lhs, undef |
| // Canonicalize all index into rhs, -> shuffle rhs, undef |
| bool AllLHS = true, AllRHS = true; |
| bool N2Undef = N2.getOpcode() == ISD::UNDEF; |
| for (unsigned i = 0; i != NElts; ++i) { |
| if (MaskVec[i] >= (int)NElts) { |
| if (N2Undef) |
| MaskVec[i] = -1; |
| else |
| AllLHS = false; |
| } else if (MaskVec[i] >= 0) { |
| AllRHS = false; |
| } |
| } |
| if (AllLHS && AllRHS) |
| return getUNDEF(VT); |
| if (AllLHS && !N2Undef) |
| N2 = getUNDEF(VT); |
| if (AllRHS) { |
| N1 = getUNDEF(VT); |
| commuteShuffle(N1, N2, MaskVec); |
| } |
| |
| // If Identity shuffle, or all shuffle in to undef, return that node. |
| bool AllUndef = true; |
| bool Identity = true; |
| for (unsigned i = 0; i != NElts; ++i) { |
| if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; |
| if (MaskVec[i] >= 0) AllUndef = false; |
| } |
| if (Identity && NElts == N1.getValueType().getVectorNumElements()) |
| return N1; |
| if (AllUndef) |
| return getUNDEF(VT); |
| |
| FoldingSetNodeID ID; |
| SDValue Ops[2] = { N1, N2 }; |
| AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); |
| for (unsigned i = 0; i != NElts; ++i) |
| ID.AddInteger(MaskVec[i]); |
| |
| void* IP = 0; |
| if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) |
| return SDValue(E, 0); |
| |
| // Allocate the mask array for the node out of the BumpPtrAllocator, since |
| // SDNode doesn't have access to it. This memory will be "leaked" when |
| // the node is deallocated, but recovered when the NodeAllocator is released. |
| int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); |
| memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); |
| |
| ShuffleVectorSDNode *N = |
| new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); |
| CSEMap.InsertNode(N, IP); |
| AllNodes.push_back(N); |
| return SDValue(N, 0); |
| } |
| |
| SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, |
| SDValue Val, SDValue DTy, |
| SDValue STy, SDValue Rnd, SDValue Sat, |
| ISD::CvtCode Code) { |
| // If the src and dest types are the same and the conversion is between |
| // integer types of the same sign or two floats, no conversion is necessary. |
| if (DTy == STy && |
| (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) |
| return Val; |
| |
| FoldingSetNodeID ID; |
| SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; |
| AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); |
| void* IP = 0; |
| if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) |
| return SDValue(E, 0); |
| |
| CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, |
| Code); |
| CSEMap.InsertNode(N, IP); |
| AllNodes.push_back(N); |
| return SDValue(N, 0); |
| } |
| |
| SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { |
| FoldingSetNodeID ID; |
| AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); |
| ID.AddInteger(RegNo); |
| void *IP = 0; |
| if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) |
| return SDValue(E, 0); |
| |
| SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); |
| CSEMap.InsertNode(N, IP); |
| AllNodes.push_back(N); |
| return SDValue(N, 0); |
| } |
| |
| SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) { |
| FoldingSetNodeID ID; |
| AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0); |
| ID.AddPointer(RegMask); |
| void *IP = 0; |
| if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) |
| return SDValue(E, 0); |
| |
| SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask); |
| CSEMap.InsertNode(N, IP); |
| AllNodes.push_back(N); |
| return SDValue(N, 0); |
| } |
| |
| SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { |
| FoldingSetNodeID ID; |
| SDValue Ops[] = { Root }; |
| AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); |
| ID.AddPointer(Label); |
| void *IP = 0; |
| if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) |
| return SDValue(E, 0); |
| |
| SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); |
| CSEMap.InsertNode(N, IP); |
| AllNodes.push_back(N); |
| return SDValue(N, 0); |
| } |
| |
| |
| SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, |
| bool isTarget, |
| unsigned char TargetFlags) { |
| unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; |
| |
| FoldingSetNodeID ID; |
| AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); |
| ID.AddPointer(BA); |
| ID.AddInteger(TargetFlags); |
| void *IP = 0; |
| if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) |
| return SDValue(E, 0); |
| |
| SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); |
| CSEMap.InsertNode(N, IP); |
| AllNodes.push_back(N); |
| return SDValue(N, 0); |
| } |
| |
| SDValue SelectionDAG::getSrcValue(const Value *V) { |
| assert((!V || V->getType()->isPointerTy()) && |
| "SrcValue is not a pointer?"); |
| |
| FoldingSetNodeID ID; |
| AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); |
| ID.AddPointer(V); |
| |
| void *IP = 0; |
| if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) |
| return SDValue(E, 0); |
| |
| SDNode *N = new (NodeAllocator) SrcValueSDNode(V); |
| CSEMap.InsertNode(N, IP); |
| AllNodes.push_back(N); |
| return SDValue(N, 0); |
| } |
| |
| /// getMDNode - Return an MDNodeSDNode which holds an MDNode. |
| SDValue SelectionDAG::getMDNode(const MDNode *MD) { |
| FoldingSetNodeID ID; |
| AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); |
| ID.AddPointer(MD); |
| |
| void *IP = 0; |
| if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) |
| return SDValue(E, 0); |
| |
| SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); |
| CSEMap.InsertNode(N, IP); |
| AllNodes.push_back(N); |
| return SDValue(N, 0); |
| } |
| |
| |
| /// getShiftAmountOperand - Return the specified value casted to |
| /// the target's desired shift amount type. |
| SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) { |
| EVT OpTy = Op.getValueType(); |
| MVT ShTy = TLI.getShiftAmountTy(LHSTy); |
| if (OpTy == ShTy || OpTy.isVector()) return Op; |
| |
| ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; |
| return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); |
| } |
| |
| /// CreateStackTemporary - Create a stack temporary, suitable for holding the |
| /// specified value type. |
| SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { |
| MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); |
| unsigned ByteSize = VT.getStoreSize(); |
| Type *Ty = VT.getTypeForEVT(*getContext()); |
| unsigned StackAlign = |
| std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); |
| |
| int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); |
| return getFrameIndex(FrameIdx, TLI.getPointerTy()); |
| } |
| |
| /// CreateStackTemporary - Create a stack temporary suitable for holding |
| /// either of the specified value types. |
| SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { |
| unsigned Bytes = std::max(VT1.getStoreSizeInBits(), |
| VT2.getStoreSizeInBits())/8; |
| Type *Ty1 = VT1.getTypeForEVT(*getContext()); |
| Type *Ty2 = VT2.getTypeForEVT(*getContext()); |
| const TargetData *TD = TLI.getTargetData(); |
| unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), |
| TD->getPrefTypeAlignment(Ty2)); |
| |
| MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); |
| int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); |
| return getFrameIndex(FrameIdx, TLI.getPointerTy()); |
| } |
| |
| SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, |
| SDValue N2, ISD::CondCode Cond, DebugLoc dl) { |
| // These setcc operations always fold. |
| switch (Cond) { |
| default: break; |
| case ISD::SETFALSE: |
| case ISD::SETFALSE2: return getConstant(0, VT); |
| case ISD::SETTRUE: |
| case ISD::SETTRUE2: return getConstant(1, VT); |
| |
| case ISD::SETOEQ: |
| case ISD::SETOGT: |
| case ISD::SETOGE: |
| case ISD::SETOLT: |
| case ISD::SETOLE: |
| case ISD::SETONE: |
| case ISD::SETO: |
| case ISD::SETUO: |
| case ISD::SETUEQ: |
| case ISD::SETUNE: |
| assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); |
| break; |
| } |
| |
| if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { |
| const APInt &C2 = N2C->getAPIntValue(); |
| if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { |
| const APInt &C1 = N1C->getAPIntValue(); |
| |
| switch (Cond) { |
| default: llvm_unreachable("Unknown integer setcc!"); |
| case ISD::SETEQ: return getConstant(C1 == C2, VT); |
| case ISD::SETNE: return getConstant(C1 != C2, VT); |
| case ISD::SETULT: return getConstant(C1.ult(C2), VT); |
| case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); |
| case ISD::SETULE: return getConstant(C1.ule(C2), VT); |
| case ISD::SETUGE: return getConstant(C1.uge(C2), VT); |
| case ISD::SETLT: return getConstant(C1.slt(C2), VT); |
| case ISD::SETGT: return getConstant(C1.sgt(C2), VT); |
| case ISD::SETLE: return getConstant(C1.sle(C2), VT); |
| case ISD::SETGE: return getConstant(C1.sge(C2), VT); |
| } |
| } |
| } |
| if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { |
| if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { |
| // No compile time operations on this type yet. |
| if (N1C->getValueType(0) == MVT::ppcf128) |
| return SDValue(); |
| |
| APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); |
| switch (Cond) { |
| default: break; |
| case ISD::SETEQ: if (R==APFloat::cmpUnordered) |
| return getUNDEF(VT); |
| // fall through |
| case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); |
| case ISD::SETNE: if (R==APFloat::cmpUnordered) |
| return getUNDEF(VT); |
| // fall through |
| case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || |
| R==APFloat::cmpLessThan, VT); |
| case ISD::SETLT: if (R==APFloat::cmpUnordered) |
| return getUNDEF(VT); |
| // fall through |
| case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); |
| case ISD::SETGT: if (R==APFloat::cmpUnordered) |
| return getUNDEF(VT); |
| // fall through |
| case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); |
| case ISD::SETLE: if (R==APFloat::cmpUnordered) |
| return getUNDEF(VT); |
| // fall through |
| case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || |
| R==APFloat::cmpEqual, VT); |
| case ISD::SETGE: if (R==APFloat::cmpUnordered) |
| return getUNDEF(VT); |
| // fall through |
| case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || |
| R==APFloat::cmpEqual, VT); |
| case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); |
| case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); |
| case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || |
| R==APFloat::cmpEqual, VT); |
| case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); |
| case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || |
| R==APFloat::cmpLessThan, VT); |
| case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || |
| R==APFloat::cmpUnordered, VT); |
| case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); |
| case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); |
| } |
| } else { |
| // Ensure that the constant occurs on the RHS. |
| return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); |
| } |
| } |
| |
| // Could not fold it. |
| return SDValue(); |
| } |
| |
| /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We |
| /// use this predicate to simplify operations downstream. |
| bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { |
| // This predicate is not safe for vector operations. |
| if (Op.getValueType().isVector()) |
| return false; |
| |
| unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); |
| return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); |
| } |
| |
| /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use |
| /// this predicate to simplify operations downstream. Mask is known to be zero |
| /// for bits that V cannot have. |
| bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, |
| unsigned Depth) const { |
| APInt KnownZero, KnownOne; |
| ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); |
| assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); |
| return (KnownZero & Mask) == Mask; |
| } |
| |
| /// ComputeMaskedBits - Determine which of the bits specified in Mask are |
| /// known to be either zero or one and return them in the KnownZero/KnownOne |
| /// bitsets. This code only analyzes bits in Mask, in order to short-circuit |
| /// processing. |
| void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero, |
| APInt &KnownOne, unsigned Depth) const { |
| unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); |
| |
| KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. |
| if (Depth == 6) |
| return; // Limit search depth. |
| |
| APInt KnownZero2, KnownOne2; |
| |
| switch (Op.getOpcode()) { |
| case ISD::Constant: |
| // We know all of the bits for a constant! |
| KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue(); |
| KnownZero = ~KnownOne; |
| return; |
| case ISD::AND: |
| // If either the LHS or the RHS are Zero, the result is zero. |
| ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); |
| ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); |
| assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); |
| assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); |
| |
| // Output known-1 bits are only known if set in both the LHS & RHS. |
| KnownOne &= KnownOne2; |
| // Output known-0 are known to be clear if zero in either the LHS | RHS. |
| KnownZero |= KnownZero2; |
| return; |
| case ISD::OR: |
| ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); |
| ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); |
| assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); |
| assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); |
| |
| // Output known-0 bits are only known if clear in both the LHS & RHS. |
| KnownZero &= KnownZero2; |
| // Output known-1 are known to be set if set in either the LHS | RHS. |
| KnownOne |= KnownOne2; |
| return; |
| case ISD::XOR: { |
| ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); |
| ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); |
| assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); |
| assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); |
| |
| // Output known-0 bits are known if clear or set in both the LHS & RHS. |
| APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); |
| // Output known-1 are known to be set if set in only one of the LHS, RHS. |
| KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); |
| KnownZero = KnownZeroOut; |
| return; |
| } |
| case ISD::MUL: { |
| ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); |
| ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); |
| assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); |
| assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); |
| |
| // If low bits are zero in either operand, output low known-0 bits. |
| // Also compute a conserative estimate for high known-0 bits. |
| // More trickiness is possible, but this is sufficient for the |
| // interesting case of alignment computation. |
| KnownOne.clearAllBits(); |
| unsigned TrailZ = KnownZero.countTrailingOnes() + |
| KnownZero2.countTrailingOnes(); |
| unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + |
| KnownZero2.countLeadingOnes(), |
| BitWidth) - BitWidth; |
| |
| TrailZ = std::min(TrailZ, BitWidth); |
| LeadZ = std::min(LeadZ, BitWidth); |
| KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | |
| APInt::getHighBitsSet(BitWidth, LeadZ); |
| return; |
| } |
| case ISD::UDIV: { |
| // For the purposes of computing leading zeros we can conservatively |
| // treat a udiv as a logical right shift by the power of 2 known to |
| // be less than the denominator. |
| ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); |
| unsigned LeadZ = KnownZero2.countLeadingOnes(); |
| |
| KnownOne2.clearAllBits(); |
| KnownZero2.clearAllBits(); |
| ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); |
| unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); |
| if (RHSUnknownLeadingOnes != BitWidth) |
| LeadZ = std::min(BitWidth, |
| LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); |
| |
| KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ); |
| return; |
| } |
| case ISD::SELECT: |
| ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1); |
| ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); |
| assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); |
| assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); |
| |
| // Only known if known in both the LHS and RHS. |
| KnownOne &= KnownOne2; |
| KnownZero &= KnownZero2; |
| return; |
| case ISD::SELECT_CC: |
| ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1); |
| ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1); |
| assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); |
| assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); |
| |
| // Only known if known in both the LHS and RHS. |
| KnownOne &= KnownOne2; |
| KnownZero &= KnownZero2; |
| return; |
| case ISD::SADDO: |
| case ISD::UADDO: |
| case ISD::SSUBO: |
| case ISD::USUBO: |
| case ISD::SMULO: |
| case ISD::UMULO: |
| if (Op.getResNo() != 1) |
| return; |
| // The boolean result conforms to getBooleanContents. Fall through. |
| case ISD::SETCC: |
| // If we know the result of a setcc has the top bits zero, use this info. |
| if (TLI.getBooleanContents(Op.getValueType().isVector()) == |
| TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1) |
| KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); |
| return; |
| case ISD::SHL: |
| // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 |
| if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { |
| unsigned ShAmt = SA->getZExtValue(); |
| |
| // If the shift count is an invalid immediate, don't do anything. |
| if (ShAmt >= BitWidth) |
| return; |
| |
| ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); |
| assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); |
| KnownZero <<= ShAmt; |
| KnownOne <<= ShAmt; |
| // low bits known zero. |
| KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); |
| } |
| return; |
| case ISD::SRL: |
| // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 |
| if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { |
| unsigned ShAmt = SA->getZExtValue(); |
| |
| // If the shift count is an invalid immediate, don't do anything. |
| if (ShAmt >= BitWidth) |
| return; |
| |
| ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); |
| assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); |
| KnownZero = KnownZero.lshr(ShAmt); |
| KnownOne = KnownOne.lshr(ShAmt); |
| |
| APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); |
| KnownZero |= HighBits; // High bits known zero. |
| } |
| return; |
| case ISD::SRA: |
| if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { |
| unsigned ShAmt = SA->getZExtValue(); |
| |
| // If the shift count is an invalid immediate, don't do anything. |
| if (ShAmt >= BitWidth) |
| return; |
| |
| // If any of the demanded bits are produced by the sign extension, we also |
| // demand the input sign bit. |
| APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); |
| |
| ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); |
| assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); |
| KnownZero = KnownZero.lshr(ShAmt); |
| KnownOne = KnownOne.lshr(ShAmt); |
| |
| // Handle the sign bits. |
| APInt SignBit = APInt::getSignBit(BitWidth); |
| SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. |
| |
| if (KnownZero.intersects(SignBit)) { |
| KnownZero |= HighBits; // New bits are known zero. |
| } else if (KnownOne.intersects(SignBit)) { |
| KnownOne |= HighBits; // New bits are known one. |
| } |
| } |
| return; |
| case ISD::SIGN_EXTEND_INREG: { |
| EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); |
| unsigned EBits = EVT.getScalarType().getSizeInBits(); |
| |
| // Sign extension. Compute the demanded bits in the result that are not |
| // present in the input. |
| APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits); |
| |
| APInt InSignBit = APInt::getSignBit(EBits); |
| APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits); |
| |
| // If the sign extended bits are demanded, we know that the sign |
| // bit is demanded. |
| InSignBit = InSignBit.zext(BitWidth); |
| if (NewBits.getBoolValue()) |
| InputDemandedBits |= InSignBit; |
| |
| ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); |
| KnownOne &= InputDemandedBits; |
| KnownZero &= InputDemandedBits; |
| assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); |
| |
| // If the sign bit of the input is known set or clear, then we know the |
| // top bits of the result. |
| if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear |
| KnownZero |= NewBits; |
| KnownOne &= ~NewBits; |
| } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set |
| KnownOne |= NewBits; |
| KnownZero &= ~NewBits; |
| } else { // Input sign bit unknown |
| KnownZero &= ~NewBits; |
| KnownOne &= ~NewBits; |
| } |
| return; |
| } |
| case ISD::CTTZ: |
| case ISD::CTTZ_ZERO_UNDEF: |
| case ISD::CTLZ: |
| case ISD::CTLZ_ZERO_UNDEF: |
| case ISD::CTPOP: { |
| unsigned LowBits = Log2_32(BitWidth)+1; |
| KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); |
| KnownOne.clearAllBits(); |
| return; |
| } |
| case ISD::LOAD: { |
| LoadSDNode *LD = cast<LoadSDNode>(Op); |
| if (ISD::isZEXTLoad(Op.getNode())) { |
| EVT VT = LD->getMemoryVT(); |
| unsigned MemBits = VT.getScalarType().getSizeInBits(); |
| KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits); |
| } else if (const MDNode *Ranges = LD->getRanges()) { |
| computeMaskedBitsLoad(*Ranges, KnownZero); |
| } |
| return; |
| } |
| case ISD::ZERO_EXTEND: { |
| EVT InVT = Op.getOperand(0).getValueType(); |
| unsigned InBits = InVT.getScalarType().getSizeInBits(); |
| APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); |
| KnownZero = KnownZero.trunc(InBits); |
| KnownOne = KnownOne.trunc(InBits); |
| ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); |
| KnownZero = KnownZero.zext(BitWidth); |
| KnownOne = KnownOne.zext(BitWidth); |
| KnownZero |= NewBits; |
| return; |
| } |
| case ISD::SIGN_EXTEND: { |
| EVT InVT = Op.getOperand(0).getValueType(); |
| unsigned InBits = InVT.getScalarType().getSizeInBits(); |
| APInt InSignBit = APInt::getSignBit(InBits); |
| APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); |
| |
| KnownZero = KnownZero.trunc(InBits); |
| KnownOne = KnownOne.trunc(InBits); |
| ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); |
| |
| // Note if the sign bit is known to be zero or one. |
| bool SignBitKnownZero = KnownZero.isNegative(); |
| bool SignBitKnownOne = KnownOne.isNegative(); |
| assert(!(SignBitKnownZero && SignBitKnownOne) && |
| "Sign bit can't be known to be both zero and one!"); |
| |
| KnownZero = KnownZero.zext(BitWidth); |
| KnownOne = KnownOne.zext(BitWidth); |
| |
| // If the sign bit is known zero or one, the top bits match. |
| if (SignBitKnownZero) |
| KnownZero |= NewBits; |
| else if (SignBitKnownOne) |
| KnownOne |= NewBits; |
| return; |
| } |
| case ISD::ANY_EXTEND: { |
| EVT InVT = Op.getOperand(0).getValueType(); |
| unsigned InBits = InVT.getScalarType().getSizeInBits(); |
| KnownZero = KnownZero.trunc(InBits); |
| KnownOne = KnownOne.trunc(InBits); |
| ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); |
| KnownZero = KnownZero.zext(BitWidth); |
| KnownOne = KnownOne.zext(BitWidth); |
| return; |
| } |
| case ISD::TRUNCATE: { |
| EVT InVT = Op.getOperand(0).getValueType(); |
| unsigned InBits = InVT.getScalarType().getSizeInBits(); |
| KnownZero = KnownZero.zext(InBits); |
| KnownOne = KnownOne.zext(InBits); |
| ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); |
| assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); |
| KnownZero = KnownZero.trunc(BitWidth); |
| KnownOne = KnownOne.trunc(BitWidth); |
| break; |
| } |
| case ISD::AssertZext: { |
| EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); |
| APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); |
| ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); |
| KnownZero |= (~InMask); |
| return; |
| } |
| case ISD::FGETSIGN: |
| // All bits are zero except the low bit. |
| KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); |
| return; |
| |
| case ISD::SUB: { |
| if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { |
| // We know that the top bits of C-X are clear if X contains less bits |
| // than C (i.e. no wrap-around can happen). For example, 20-X is |
| // positive if we can prove that X is >= 0 and < 16. |
| if (CLHS->getAPIntValue().isNonNegative()) { |
| unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); |
| // NLZ can't be BitWidth with no sign bit |
| APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); |
| ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); |
| |
| // If all of the MaskV bits are known to be zero, then we know the |
| // output top bits are zero, because we now know that the output is |
| // from [0-C]. |
| if ((KnownZero2 & MaskV) == MaskV) { |
| unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); |
| // Top bits known zero. |
| KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2); |
| } |
| } |
| } |
| } |
| // fall through |
| case ISD::ADD: |
| case ISD::ADDE: { |
| // Output known-0 bits are known if clear or set in both the low clear bits |
| // common to both LHS & RHS. For example, 8+(X<<3) is known to have the |
| // low 3 bits clear. |
| ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); |
| assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); |
| unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); |
| |
| ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); |
| assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); |
| KnownZeroOut = std::min(KnownZeroOut, |
| KnownZero2.countTrailingOnes()); |
| |
| if (Op.getOpcode() == ISD::ADD) { |
| KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); |
| return; |
| } |
| |
| // With ADDE, a carry bit may be added in, so we can only use this |
| // information if we know (at least) that the low two bits are clear. We |
| // then return to the caller that the low bit is unknown but that other bits |
| // are known zero. |
| if (KnownZeroOut >= 2) // ADDE |
| KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut); |
| return; |
| } |
| case ISD::SREM: |
| if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { |
| const APInt &RA = Rem->getAPIntValue().abs(); |
| if (RA.isPowerOf2()) { |
| APInt LowBits = RA - 1; |
| APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); |
| ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1); |
| |
| // The low bits of the first operand are unchanged by the srem. |
| KnownZero = KnownZero2 & LowBits; |
| KnownOne = KnownOne2 & LowBits; |
| |
| // If the first operand is non-negative or has all low bits zero, then |
| // the upper bits are all zero. |
| if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) |
| KnownZero |= ~LowBits; |
| |
| // If the first operand is negative and not all low bits are zero, then |
| // the upper bits are all one. |
| if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) |
| KnownOne |= ~LowBits; |
| assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); |
| } |
| } |
| return; |
| case ISD::UREM: { |
| if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { |
| const APInt &RA = Rem->getAPIntValue(); |
| if (RA.isPowerOf2()) { |
| APInt LowBits = (RA - 1); |
| KnownZero |= ~LowBits; |
| ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1); |
| assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); |
| break; |
| } |
| } |
| |
| // Since the result is less than or equal to either operand, any leading |
| // zero bits in either operand must also exist in the result. |
| ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); |
| ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); |
| |
| uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), |
| KnownZero2.countLeadingOnes()); |
| KnownOne.clearAllBits(); |
| KnownZero = APInt::getHighBitsSet(BitWidth, Leaders); |
| return; |
| } |
| case ISD::FrameIndex: |
| case ISD::TargetFrameIndex: |
| if (unsigned Align = InferPtrAlignment(Op)) { |
| // The low bits are known zero if the pointer is aligned. |
| KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align)); |
| return; |
| } |
| break; |
| |
| default: |
| if (Op.getOpcode() < ISD::BUILTIN_OP_END) |
| break; |
| // Fallthrough |
| case ISD::INTRINSIC_WO_CHAIN: |
| case ISD::INTRINSIC_W_CHAIN: |
| case ISD::INTRINSIC_VOID: |
| // Allow the target to implement this method for its nodes. |
| TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth); |
| return; |
| } |
| } |
| |
| /// ComputeNumSignBits - Return the number of times the sign bit of the |
| /// register is replicated into the other bits. We know that at least 1 bit |
| /// is always equal to the sign bit (itself), but other cases can give us |
| /// information. For example, immediately after an "SRA X, 2", we know that |
| /// the top 3 bits are all equal to each other, so we return 3. |
| unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ |
| EVT VT = Op.getValueType(); |
| assert(VT.isInteger() && "Invalid VT!"); |
| unsigned VTBits = VT.getScalarType().getSizeInBits(); |
| unsigned Tmp, Tmp2; |
| unsigned FirstAnswer = 1; |
| |
| if (Depth == 6) |
| return 1; // Limit search depth. |
| |
| switch (Op.getOpcode()) { |
| default: break; |
| case ISD::AssertSext: |
| Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); |
| return VTBits-Tmp+1; |
| case ISD::AssertZext: |
| Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); |
| return VTBits-Tmp; |
| |
| case ISD::Constant: { |
| const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); |
| return Val.getNumSignBits(); |
| } |
| |
| case ISD::SIGN_EXTEND: |
| Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); |
| return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; |
| |
| case ISD::SIGN_EXTEND_INREG: |
| // Max of the input and what this extends. |
| Tmp = |
| cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); |
| Tmp = VTBits-Tmp+1; |
| |
| Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); |
| return std::max(Tmp, Tmp2); |
| |
| case ISD::SRA: |
| Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); |
| // SRA X, C -> adds C sign bits. |
| if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { |
| Tmp += C->getZExtValue(); |
| if (Tmp > VTBits) Tmp = VTBits; |
| } |
| return Tmp; |
| case ISD::SHL: |
| if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { |
| // shl destroys sign bits. |
| Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); |
| if (C->getZExtValue() >= VTBits || // Bad shift. |
| C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. |
| return Tmp - C->getZExtValue(); |
| } |
| break; |
| case ISD::AND: |
| case ISD::OR: |
| case ISD::XOR: // NOT is handled here. |
| // Logical binary ops preserve the number of sign bits at the worst. |
| Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); |
| if (Tmp != 1) { |
| Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); |
| FirstAnswer = std::min(Tmp, Tmp2); |
| // We computed what we know about the sign bits as our first |
| // answer. Now proceed to the generic code that uses |
| // ComputeMaskedBits, and pick whichever answer is better. |
| } |
| break; |
| |
| case ISD::SELECT: |
| Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); |
| if (Tmp == 1) return 1; // Early out. |
| Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); |
| return std::min(Tmp, Tmp2); |
| |
| case ISD::SADDO: |
| case ISD::UADDO: |
| case ISD::SSUBO: |
| case ISD::USUBO: |
| case ISD::SMULO: |
| case ISD::UMULO: |
| if (Op.getResNo() != 1) |
| break; |
| // The boolean result conforms to getBooleanContents. Fall through. |
| case ISD::SETCC: |
| // If setcc returns 0/-1, all bits are sign bits. |
| if (TLI.getBooleanContents(Op.getValueType().isVector()) == |
| TargetLowering::ZeroOrNegativeOneBooleanContent) |
| return VTBits; |
| break; |
| case ISD::ROTL: |
| case ISD::ROTR: |
| if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { |
| unsigned RotAmt = C->getZExtValue() & (VTBits-1); |
| |
| // Handle rotate right by N like a rotate left by 32-N. |
| if (Op.getOpcode() == ISD::ROTR) |
| RotAmt = (VTBits-RotAmt) & (VTBits-1); |
| |
| // If we aren't rotating out all of the known-in sign bits, return the |
| // number that are left. This handles rotl(sext(x), 1) for example. |
| Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); |
| if (Tmp > RotAmt+1) return Tmp-RotAmt; |
| } |
| break; |
| case ISD::ADD: |
| // Add can have at most one carry bit. Thus we know that the output |
| // is, at worst, one more bit than the inputs. |
| Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); |
| if (Tmp == 1) return 1; // Early out. |
| |
| // Special case decrementing a value (ADD X, -1): |
| if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) |
| if (CRHS->isAllOnesValue()) { |
| APInt KnownZero, KnownOne; |
| ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); |
| |
| // If the input is known to be 0 or 1, the output is 0/-1, which is all |
| // sign bits set. |
| if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) |
| return VTBits; |
| |
| // If we are subtracting one from a positive number, there is no carry |
| // out of the result. |
| if (KnownZero.isNegative()) |
| return Tmp; |
| } |
| |
| Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); |
| if (Tmp2 == 1) return 1; |
| return std::min(Tmp, Tmp2)-1; |
| |
| case ISD::SUB: |
| Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); |
| if (Tmp2 == 1) return 1; |
| |
| // Handle NEG. |
| if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) |
| if (CLHS->isNullValue()) { |
| APInt KnownZero, KnownOne; |
| ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); |
| // If the input is known to be 0 or 1, the output is 0/-1, which is all |
| // sign bits set. |
| if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) |
| return VTBits; |
| |
| // If the input is known to be positive (the sign bit is known clear), |
| // the output of the NEG has the same number of sign bits as the input. |
| if (KnownZero.isNegative()) |
| return Tmp2; |
| |
| // Otherwise, we treat this like a SUB. |
| } |
| |
| // Sub can have at most one carry bit. Thus we know that the output |
| // is, at worst, one more bit than the inputs. |
| Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); |
| if (Tmp == 1) return 1; // Early out. |
| return std::min(Tmp, Tmp2)-1; |
| case ISD::TRUNCATE: |
| // FIXME: it's tricky to do anything useful for this, but it is an important |
| // case for targets like X86. |
| break; |
| } |
| |
| // Handle LOADX separately here. EXTLOAD case will fallthrough. |
| if (Op.getOpcode() == ISD::LOAD) { |
| LoadSDNode *LD = cast<LoadSDNode>(Op); |
| unsigned ExtType = LD->getExtensionType(); |
| switch (ExtType) { |
| default: break; |
| case ISD::SEXTLOAD: // '17' bits known |
| Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); |
| return VTBits-Tmp+1; |
| case ISD::ZEXTLOAD: // '16' bits known |
| Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); |
| return VTBits-Tmp; |
| } |
| } |
| |
| // Allow the target to implement this method for its nodes. |
| if (Op.getOpcode() >= ISD::BUILTIN_OP_END || |
| Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || |
| Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || |
| Op.getOpcode() == ISD::INTRINSIC_VOID) { |
| unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); |
| if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); |
| } |
| |
| // Finally, if we can prove that the top bits of the result are 0's or 1's, |
| // use this information. |
| APInt KnownZero, KnownOne; |
| ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); |
| |
| APInt Mask; |
| if (KnownZero.isNegative()) { // sign bit is 0 |
| Mask = KnownZero; |
| } else if (KnownOne.isNegative()) { // sign bit is 1; |
| Mask = KnownOne; |
| } else { |
| // Nothing known. |
| return FirstAnswer; |
| } |
| |
| // Okay, we know that the sign bit in Mask is set. Use CLZ to determine |
| // the number of identical bits in the top of the input value. |
| Mask = ~Mask; |
| Mask <<= Mask.getBitWidth()-VTBits; |
| // Return # leading zeros. We use 'min' here in case Val was zero before |
| // shifting. We don't want to return '64' as for an i32 "0". |
| return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); |
| } |
| |
| /// isBaseWithConstantOffset - Return true if the specified operand is an |
| /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an |
| /// ISD::OR with a ConstantSDNode that is guaranteed to have the same |
| /// semantics as an ADD. This handles the equivalence: |
| /// X|Cst == X+Cst iff X&Cst = 0. |
| bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const { |
| if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) || |
| !isa<ConstantSDNode>(Op.getOperand(1))) |
| return false; |
| |
| if (Op.getOpcode() == ISD::OR && |
| !MaskedValueIsZero(Op.getOperand(0), |
| cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue())) |
| return false; |
| |
| return true; |
| } |
| |
| |
| bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { |
| // If we're told that NaNs won't happen, assume they won't. |
| if (getTarget().Options.NoNaNsFPMath) |
| return true; |
| |
| // If the value is a constant, we can obviously see if it is a NaN or not. |
| if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) |