| //===- IntrinsicsX86.td - Defines X86 intrinsics -----------*- tablegen -*-===// |
| // |
| // The LLVM Compiler Infrastructure |
| // |
| // This file is distributed under the University of Illinois Open Source |
| // License. See LICENSE.TXT for details. |
| // |
| //===----------------------------------------------------------------------===// |
| // |
| // This file defines all of the X86-specific intrinsics. |
| // |
| //===----------------------------------------------------------------------===// |
| |
| |
| //===----------------------------------------------------------------------===// |
| // SSE1 |
| |
| // Arithmetic ops |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse_add_ss : GCCBuiltin<"__builtin_ia32_addss">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_sub_ss : GCCBuiltin<"__builtin_ia32_subss">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_mul_ss : GCCBuiltin<"__builtin_ia32_mulss">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_div_ss : GCCBuiltin<"__builtin_ia32_divss">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_sqrt_ss : GCCBuiltin<"__builtin_ia32_sqrtss">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty], |
| [IntrNoMem]>; |
| def int_x86_sse_sqrt_ps : GCCBuiltin<"__builtin_ia32_sqrtps">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty], |
| [IntrNoMem]>; |
| def int_x86_sse_rcp_ss : GCCBuiltin<"__builtin_ia32_rcpss">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty], |
| [IntrNoMem]>; |
| def int_x86_sse_rcp_ps : GCCBuiltin<"__builtin_ia32_rcpps">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty], |
| [IntrNoMem]>; |
| def int_x86_sse_rsqrt_ss : GCCBuiltin<"__builtin_ia32_rsqrtss">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty], |
| [IntrNoMem]>; |
| def int_x86_sse_rsqrt_ps : GCCBuiltin<"__builtin_ia32_rsqrtps">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty], |
| [IntrNoMem]>; |
| def int_x86_sse_min_ss : GCCBuiltin<"__builtin_ia32_minss">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_min_ps : GCCBuiltin<"__builtin_ia32_minps">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_max_ss : GCCBuiltin<"__builtin_ia32_maxss">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_max_ps : GCCBuiltin<"__builtin_ia32_maxps">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty], [IntrNoMem]>; |
| } |
| |
| // Comparison ops |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse_cmp_ss : |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>; |
| def int_x86_sse_cmp_ps : |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>; |
| def int_x86_sse_comieq_ss : GCCBuiltin<"__builtin_ia32_comieq">, |
| Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_comilt_ss : GCCBuiltin<"__builtin_ia32_comilt">, |
| Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_comile_ss : GCCBuiltin<"__builtin_ia32_comile">, |
| Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_comigt_ss : GCCBuiltin<"__builtin_ia32_comigt">, |
| Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_comige_ss : GCCBuiltin<"__builtin_ia32_comige">, |
| Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_comineq_ss : GCCBuiltin<"__builtin_ia32_comineq">, |
| Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_ucomieq_ss : GCCBuiltin<"__builtin_ia32_ucomieq">, |
| Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_ucomilt_ss : GCCBuiltin<"__builtin_ia32_ucomilt">, |
| Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_ucomile_ss : GCCBuiltin<"__builtin_ia32_ucomile">, |
| Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_ucomigt_ss : GCCBuiltin<"__builtin_ia32_ucomigt">, |
| Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_ucomige_ss : GCCBuiltin<"__builtin_ia32_ucomige">, |
| Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_ucomineq_ss : GCCBuiltin<"__builtin_ia32_ucomineq">, |
| Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty], [IntrNoMem]>; |
| } |
| |
| |
| // Conversion ops |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse_cvtss2si : GCCBuiltin<"__builtin_ia32_cvtss2si">, |
| Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_cvtss2si64 : GCCBuiltin<"__builtin_ia32_cvtss2si64">, |
| Intrinsic<[llvm_i64_ty], [llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_cvttss2si : GCCBuiltin<"__builtin_ia32_cvttss2si">, |
| Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_cvttss2si64 : GCCBuiltin<"__builtin_ia32_cvttss2si64">, |
| Intrinsic<[llvm_i64_ty], [llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_cvtsi2ss : GCCBuiltin<"__builtin_ia32_cvtsi2ss">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| def int_x86_sse_cvtsi642ss : GCCBuiltin<"__builtin_ia32_cvtsi642ss">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, |
| llvm_i64_ty], [IntrNoMem]>; |
| def int_x86_sse_cvtps2pi : GCCBuiltin<"__builtin_ia32_cvtps2pi">, |
| Intrinsic<[llvm_v2i32_ty], [llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_cvttps2pi: GCCBuiltin<"__builtin_ia32_cvttps2pi">, |
| Intrinsic<[llvm_v2i32_ty], [llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_cvtpi2ps : GCCBuiltin<"__builtin_ia32_cvtpi2ps">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, |
| llvm_v2i32_ty], [IntrNoMem]>; |
| } |
| |
| // SIMD load ops |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse_loadu_ps : GCCBuiltin<"__builtin_ia32_loadups">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_ptr_ty], [IntrReadMem]>; |
| } |
| |
| // SIMD store ops |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse_storeu_ps : GCCBuiltin<"__builtin_ia32_storeups">, |
| Intrinsic<[llvm_void_ty], [llvm_ptr_ty, |
| llvm_v4f32_ty], [IntrWriteMem]>; |
| } |
| |
| // Cacheability support ops |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse_movnt_ps : GCCBuiltin<"__builtin_ia32_movntps">, |
| Intrinsic<[llvm_void_ty], [llvm_ptr_ty, |
| llvm_v4f32_ty], [IntrWriteMem]>; |
| def int_x86_sse_sfence : GCCBuiltin<"__builtin_ia32_sfence">, |
| Intrinsic<[llvm_void_ty], [], [IntrWriteMem]>; |
| } |
| |
| // Control register. |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse_stmxcsr : |
| Intrinsic<[llvm_void_ty], [llvm_ptr_ty], [IntrWriteMem]>; |
| def int_x86_sse_ldmxcsr : |
| Intrinsic<[llvm_void_ty], [llvm_ptr_ty], [IntrWriteMem]>; |
| } |
| |
| // Misc. |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse_movmsk_ps : GCCBuiltin<"__builtin_ia32_movmskps">, |
| Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty], [IntrNoMem]>; |
| } |
| |
| //===----------------------------------------------------------------------===// |
| // SSE2 |
| |
| // FP arithmetic ops |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse2_add_sd : GCCBuiltin<"__builtin_ia32_addsd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_sub_sd : GCCBuiltin<"__builtin_ia32_subsd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_mul_sd : GCCBuiltin<"__builtin_ia32_mulsd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_div_sd : GCCBuiltin<"__builtin_ia32_divsd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_sqrt_sd : GCCBuiltin<"__builtin_ia32_sqrtsd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty], |
| [IntrNoMem]>; |
| def int_x86_sse2_sqrt_pd : GCCBuiltin<"__builtin_ia32_sqrtpd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty], |
| [IntrNoMem]>; |
| def int_x86_sse2_min_sd : GCCBuiltin<"__builtin_ia32_minsd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_min_pd : GCCBuiltin<"__builtin_ia32_minpd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_max_sd : GCCBuiltin<"__builtin_ia32_maxsd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_max_pd : GCCBuiltin<"__builtin_ia32_maxpd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty], [IntrNoMem]>; |
| } |
| |
| // FP comparison ops |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse2_cmp_sd : |
| Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>; |
| def int_x86_sse2_cmp_pd : |
| Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>; |
| def int_x86_sse2_comieq_sd : GCCBuiltin<"__builtin_ia32_comisdeq">, |
| Intrinsic<[llvm_i32_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_comilt_sd : GCCBuiltin<"__builtin_ia32_comisdlt">, |
| Intrinsic<[llvm_i32_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_comile_sd : GCCBuiltin<"__builtin_ia32_comisdle">, |
| Intrinsic<[llvm_i32_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_comigt_sd : GCCBuiltin<"__builtin_ia32_comisdgt">, |
| Intrinsic<[llvm_i32_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_comige_sd : GCCBuiltin<"__builtin_ia32_comisdge">, |
| Intrinsic<[llvm_i32_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_comineq_sd : GCCBuiltin<"__builtin_ia32_comisdneq">, |
| Intrinsic<[llvm_i32_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_ucomieq_sd : GCCBuiltin<"__builtin_ia32_ucomisdeq">, |
| Intrinsic<[llvm_i32_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_ucomilt_sd : GCCBuiltin<"__builtin_ia32_ucomisdlt">, |
| Intrinsic<[llvm_i32_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_ucomile_sd : GCCBuiltin<"__builtin_ia32_ucomisdle">, |
| Intrinsic<[llvm_i32_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_ucomigt_sd : GCCBuiltin<"__builtin_ia32_ucomisdgt">, |
| Intrinsic<[llvm_i32_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_ucomige_sd : GCCBuiltin<"__builtin_ia32_ucomisdge">, |
| Intrinsic<[llvm_i32_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_ucomineq_sd : GCCBuiltin<"__builtin_ia32_ucomisdneq">, |
| Intrinsic<[llvm_i32_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty], [IntrNoMem]>; |
| } |
| |
| // Integer arithmetic ops. |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse2_padds_b : GCCBuiltin<"__builtin_ia32_paddsb128">, |
| Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, |
| llvm_v16i8_ty], [IntrNoMem, Commutative]>; |
| def int_x86_sse2_padds_w : GCCBuiltin<"__builtin_ia32_paddsw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_v8i16_ty], [IntrNoMem, Commutative]>; |
| def int_x86_sse2_paddus_b : GCCBuiltin<"__builtin_ia32_paddusb128">, |
| Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, |
| llvm_v16i8_ty], [IntrNoMem, Commutative]>; |
| def int_x86_sse2_paddus_w : GCCBuiltin<"__builtin_ia32_paddusw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_v8i16_ty], [IntrNoMem, Commutative]>; |
| def int_x86_sse2_psubs_b : GCCBuiltin<"__builtin_ia32_psubsb128">, |
| Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, |
| llvm_v16i8_ty], [IntrNoMem]>; |
| def int_x86_sse2_psubs_w : GCCBuiltin<"__builtin_ia32_psubsw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_v8i16_ty], [IntrNoMem]>; |
| def int_x86_sse2_psubus_b : GCCBuiltin<"__builtin_ia32_psubusb128">, |
| Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, |
| llvm_v16i8_ty], [IntrNoMem]>; |
| def int_x86_sse2_psubus_w : GCCBuiltin<"__builtin_ia32_psubusw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_v8i16_ty], [IntrNoMem]>; |
| def int_x86_sse2_pmulhu_w : GCCBuiltin<"__builtin_ia32_pmulhuw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_v8i16_ty], [IntrNoMem, Commutative]>; |
| def int_x86_sse2_pmulh_w : GCCBuiltin<"__builtin_ia32_pmulhw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_v8i16_ty], [IntrNoMem, Commutative]>; |
| def int_x86_sse2_pmulu_dq : GCCBuiltin<"__builtin_ia32_pmuludq128">, |
| Intrinsic<[llvm_v2i64_ty], [llvm_v4i32_ty, |
| llvm_v4i32_ty], [IntrNoMem, Commutative]>; |
| def int_x86_sse2_pmadd_wd : GCCBuiltin<"__builtin_ia32_pmaddwd128">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, |
| llvm_v8i16_ty], [IntrNoMem, Commutative]>; |
| def int_x86_sse2_pavg_b : GCCBuiltin<"__builtin_ia32_pavgb128">, |
| Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, |
| llvm_v16i8_ty], [IntrNoMem, Commutative]>; |
| def int_x86_sse2_pavg_w : GCCBuiltin<"__builtin_ia32_pavgw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_v8i16_ty], [IntrNoMem, Commutative]>; |
| def int_x86_sse2_pmaxu_b : GCCBuiltin<"__builtin_ia32_pmaxub128">, |
| Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, |
| llvm_v16i8_ty], [IntrNoMem, Commutative]>; |
| def int_x86_sse2_pmaxs_w : GCCBuiltin<"__builtin_ia32_pmaxsw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_v8i16_ty], [IntrNoMem, Commutative]>; |
| def int_x86_sse2_pminu_b : GCCBuiltin<"__builtin_ia32_pminub128">, |
| Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, |
| llvm_v16i8_ty], [IntrNoMem, Commutative]>; |
| def int_x86_sse2_pmins_w : GCCBuiltin<"__builtin_ia32_pminsw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_v8i16_ty], [IntrNoMem, Commutative]>; |
| def int_x86_sse2_psad_bw : GCCBuiltin<"__builtin_ia32_psadbw128">, |
| Intrinsic<[llvm_v2i64_ty], [llvm_v16i8_ty, |
| llvm_v16i8_ty], [IntrNoMem, Commutative]>; |
| } |
| |
| // Integer shift ops. |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse2_psll_w : GCCBuiltin<"__builtin_ia32_psllw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_v8i16_ty], [IntrNoMem]>; |
| def int_x86_sse2_psll_d : GCCBuiltin<"__builtin_ia32_pslld128">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, |
| llvm_v4i32_ty], [IntrNoMem]>; |
| def int_x86_sse2_psll_q : GCCBuiltin<"__builtin_ia32_psllq128">, |
| Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, |
| llvm_v2i64_ty], [IntrNoMem]>; |
| def int_x86_sse2_psrl_w : GCCBuiltin<"__builtin_ia32_psrlw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_v8i16_ty], [IntrNoMem]>; |
| def int_x86_sse2_psrl_d : GCCBuiltin<"__builtin_ia32_psrld128">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, |
| llvm_v4i32_ty], [IntrNoMem]>; |
| def int_x86_sse2_psrl_q : GCCBuiltin<"__builtin_ia32_psrlq128">, |
| Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, |
| llvm_v2i64_ty], [IntrNoMem]>; |
| def int_x86_sse2_psra_w : GCCBuiltin<"__builtin_ia32_psraw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_v8i16_ty], [IntrNoMem]>; |
| def int_x86_sse2_psra_d : GCCBuiltin<"__builtin_ia32_psrad128">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, |
| llvm_v4i32_ty], [IntrNoMem]>; |
| |
| def int_x86_sse2_pslli_w : GCCBuiltin<"__builtin_ia32_psllwi128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| def int_x86_sse2_pslli_d : GCCBuiltin<"__builtin_ia32_pslldi128">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| def int_x86_sse2_pslli_q : GCCBuiltin<"__builtin_ia32_psllqi128">, |
| Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| def int_x86_sse2_psrli_w : GCCBuiltin<"__builtin_ia32_psrlwi128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| def int_x86_sse2_psrli_d : GCCBuiltin<"__builtin_ia32_psrldi128">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| def int_x86_sse2_psrli_q : GCCBuiltin<"__builtin_ia32_psrlqi128">, |
| Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| def int_x86_sse2_psrai_w : GCCBuiltin<"__builtin_ia32_psrawi128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| def int_x86_sse2_psrai_d : GCCBuiltin<"__builtin_ia32_psradi128">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| |
| def int_x86_sse2_psll_dq : GCCBuiltin<"__builtin_ia32_pslldqi128">, |
| Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| def int_x86_sse2_psrl_dq : GCCBuiltin<"__builtin_ia32_psrldqi128">, |
| Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| def int_x86_sse2_psll_dq_bs : GCCBuiltin<"__builtin_ia32_pslldqi128_byteshift">, |
| Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| def int_x86_sse2_psrl_dq_bs : GCCBuiltin<"__builtin_ia32_psrldqi128_byteshift">, |
| Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| } |
| |
| // Integer comparison ops |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse2_pcmpeq_b : GCCBuiltin<"__builtin_ia32_pcmpeqb128">, |
| Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, |
| llvm_v16i8_ty], [IntrNoMem]>; |
| def int_x86_sse2_pcmpeq_w : GCCBuiltin<"__builtin_ia32_pcmpeqw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_v8i16_ty], [IntrNoMem]>; |
| def int_x86_sse2_pcmpeq_d : GCCBuiltin<"__builtin_ia32_pcmpeqd128">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, |
| llvm_v4i32_ty], [IntrNoMem]>; |
| def int_x86_sse2_pcmpgt_b : GCCBuiltin<"__builtin_ia32_pcmpgtb128">, |
| Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, |
| llvm_v16i8_ty], [IntrNoMem]>; |
| def int_x86_sse2_pcmpgt_w : GCCBuiltin<"__builtin_ia32_pcmpgtw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_v8i16_ty], [IntrNoMem]>; |
| def int_x86_sse2_pcmpgt_d : GCCBuiltin<"__builtin_ia32_pcmpgtd128">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, |
| llvm_v4i32_ty], [IntrNoMem]>; |
| } |
| |
| // Conversion ops |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse2_cvtdq2pd : GCCBuiltin<"__builtin_ia32_cvtdq2pd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_v4i32_ty], [IntrNoMem]>; |
| def int_x86_sse2_cvtdq2ps : GCCBuiltin<"__builtin_ia32_cvtdq2ps">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4i32_ty], [IntrNoMem]>; |
| def int_x86_sse2_cvtpd2dq : GCCBuiltin<"__builtin_ia32_cvtpd2dq">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_cvttpd2dq : GCCBuiltin<"__builtin_ia32_cvttpd2dq">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_cvtpd2ps : GCCBuiltin<"__builtin_ia32_cvtpd2ps">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_cvtps2dq : GCCBuiltin<"__builtin_ia32_cvtps2dq">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse2_cvttps2dq : GCCBuiltin<"__builtin_ia32_cvttps2dq">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse2_cvtps2pd : GCCBuiltin<"__builtin_ia32_cvtps2pd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse2_cvtsd2si : GCCBuiltin<"__builtin_ia32_cvtsd2si">, |
| Intrinsic<[llvm_i32_ty], [llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_cvtsd2si64 : GCCBuiltin<"__builtin_ia32_cvtsd2si64">, |
| Intrinsic<[llvm_i64_ty], [llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_cvttsd2si : GCCBuiltin<"__builtin_ia32_cvttsd2si">, |
| Intrinsic<[llvm_i32_ty], [llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_cvttsd2si64 : GCCBuiltin<"__builtin_ia32_cvttsd2si64">, |
| Intrinsic<[llvm_i64_ty], [llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_cvtsi2sd : GCCBuiltin<"__builtin_ia32_cvtsi2sd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| def int_x86_sse2_cvtsi642sd : GCCBuiltin<"__builtin_ia32_cvtsi642sd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, |
| llvm_i64_ty], [IntrNoMem]>; |
| def int_x86_sse2_cvtsd2ss : GCCBuiltin<"__builtin_ia32_cvtsd2ss">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, |
| llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_cvtss2sd : GCCBuiltin<"__builtin_ia32_cvtss2sd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, |
| llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse_cvtpd2pi : GCCBuiltin<"__builtin_ia32_cvtpd2pi">, |
| Intrinsic<[llvm_v2i32_ty], [llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse_cvttpd2pi: GCCBuiltin<"__builtin_ia32_cvttpd2pi">, |
| Intrinsic<[llvm_v2i32_ty], [llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse_cvtpi2pd : GCCBuiltin<"__builtin_ia32_cvtpi2pd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_v2i32_ty], [IntrNoMem]>; |
| } |
| |
| // SIMD load ops |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse2_loadu_pd : GCCBuiltin<"__builtin_ia32_loadupd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_ptr_ty], [IntrReadMem]>; |
| def int_x86_sse2_loadu_dq : GCCBuiltin<"__builtin_ia32_loaddqu">, |
| Intrinsic<[llvm_v16i8_ty], [llvm_ptr_ty], [IntrReadMem]>; |
| } |
| |
| // SIMD store ops |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse2_storeu_pd : GCCBuiltin<"__builtin_ia32_storeupd">, |
| Intrinsic<[llvm_void_ty], [llvm_ptr_ty, |
| llvm_v2f64_ty], [IntrWriteMem]>; |
| def int_x86_sse2_storeu_dq : GCCBuiltin<"__builtin_ia32_storedqu">, |
| Intrinsic<[llvm_void_ty], [llvm_ptr_ty, |
| llvm_v16i8_ty], [IntrWriteMem]>; |
| def int_x86_sse2_storel_dq : GCCBuiltin<"__builtin_ia32_storelv4si">, |
| Intrinsic<[llvm_void_ty], [llvm_ptr_ty, |
| llvm_v4i32_ty], [IntrWriteMem]>; |
| } |
| |
| // Cacheability support ops |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse2_movnt_dq : GCCBuiltin<"__builtin_ia32_movntdq">, |
| Intrinsic<[llvm_void_ty], [llvm_ptr_ty, |
| llvm_v2i64_ty], [IntrWriteMem]>; |
| def int_x86_sse2_movnt_pd : GCCBuiltin<"__builtin_ia32_movntpd">, |
| Intrinsic<[llvm_void_ty], [llvm_ptr_ty, |
| llvm_v2f64_ty], [IntrWriteMem]>; |
| def int_x86_sse2_movnt_i : GCCBuiltin<"__builtin_ia32_movnti">, |
| Intrinsic<[llvm_void_ty], [llvm_ptr_ty, |
| llvm_i32_ty], [IntrWriteMem]>; |
| } |
| |
| // Misc. |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse2_packsswb_128 : GCCBuiltin<"__builtin_ia32_packsswb128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_v8i16_ty], [IntrNoMem]>; |
| def int_x86_sse2_packssdw_128 : GCCBuiltin<"__builtin_ia32_packssdw128">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, |
| llvm_v4i32_ty], [IntrNoMem]>; |
| def int_x86_sse2_packuswb_128 : GCCBuiltin<"__builtin_ia32_packuswb128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_v8i16_ty], [IntrNoMem]>; |
| def int_x86_sse2_movmsk_pd : GCCBuiltin<"__builtin_ia32_movmskpd">, |
| Intrinsic<[llvm_i32_ty], [llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse2_pmovmskb_128 : GCCBuiltin<"__builtin_ia32_pmovmskb128">, |
| Intrinsic<[llvm_i32_ty], [llvm_v16i8_ty], [IntrNoMem]>; |
| def int_x86_sse2_maskmov_dqu : GCCBuiltin<"__builtin_ia32_maskmovdqu">, |
| Intrinsic<[llvm_void_ty], [llvm_v16i8_ty, |
| llvm_v16i8_ty, llvm_ptr_ty], [IntrWriteMem]>; |
| def int_x86_sse2_clflush : GCCBuiltin<"__builtin_ia32_clflush">, |
| Intrinsic<[llvm_void_ty], [llvm_ptr_ty], [IntrWriteMem]>; |
| def int_x86_sse2_lfence : GCCBuiltin<"__builtin_ia32_lfence">, |
| Intrinsic<[llvm_void_ty], [], [IntrWriteMem]>; |
| def int_x86_sse2_mfence : GCCBuiltin<"__builtin_ia32_mfence">, |
| Intrinsic<[llvm_void_ty], [], [IntrWriteMem]>; |
| } |
| |
| //===----------------------------------------------------------------------===// |
| // SSE3 |
| |
| // Addition / subtraction ops. |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse3_addsub_ps : GCCBuiltin<"__builtin_ia32_addsubps">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse3_addsub_pd : GCCBuiltin<"__builtin_ia32_addsubpd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty], [IntrNoMem]>; |
| } |
| |
| // Horizontal ops. |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse3_hadd_ps : GCCBuiltin<"__builtin_ia32_haddps">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse3_hadd_pd : GCCBuiltin<"__builtin_ia32_haddpd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty], [IntrNoMem]>; |
| def int_x86_sse3_hsub_ps : GCCBuiltin<"__builtin_ia32_hsubps">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, |
| llvm_v4f32_ty], [IntrNoMem]>; |
| def int_x86_sse3_hsub_pd : GCCBuiltin<"__builtin_ia32_hsubpd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, |
| llvm_v2f64_ty], [IntrNoMem]>; |
| } |
| |
| // Specialized unaligned load. |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse3_ldu_dq : GCCBuiltin<"__builtin_ia32_lddqu">, |
| Intrinsic<[llvm_v16i8_ty], [llvm_ptr_ty], [IntrReadMem]>; |
| } |
| |
| // Thread synchronization ops. |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse3_monitor : GCCBuiltin<"__builtin_ia32_monitor">, |
| Intrinsic<[llvm_void_ty], [llvm_ptr_ty, |
| llvm_i32_ty, llvm_i32_ty], [IntrWriteMem]>; |
| def int_x86_sse3_mwait : GCCBuiltin<"__builtin_ia32_mwait">, |
| Intrinsic<[llvm_void_ty], [llvm_i32_ty, |
| llvm_i32_ty], [IntrWriteMem]>; |
| } |
| |
| //===----------------------------------------------------------------------===// |
| // SSSE3 |
| |
| // Horizontal arithmetic ops |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_ssse3_phadd_w : GCCBuiltin<"__builtin_ia32_phaddw">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, |
| llvm_v4i16_ty], [IntrNoMem]>; |
| def int_x86_ssse3_phadd_w_128 : GCCBuiltin<"__builtin_ia32_phaddw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_v8i16_ty], [IntrNoMem]>; |
| |
| def int_x86_ssse3_phadd_d : GCCBuiltin<"__builtin_ia32_phaddd">, |
| Intrinsic<[llvm_v2i32_ty], [llvm_v2i32_ty, |
| llvm_v2i32_ty], [IntrNoMem]>; |
| def int_x86_ssse3_phadd_d_128 : GCCBuiltin<"__builtin_ia32_phaddd128">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, |
| llvm_v4i32_ty], [IntrNoMem]>; |
| |
| def int_x86_ssse3_phadd_sw : GCCBuiltin<"__builtin_ia32_phaddsw">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, |
| llvm_v4i16_ty], [IntrNoMem]>; |
| def int_x86_ssse3_phadd_sw_128 : GCCBuiltin<"__builtin_ia32_phaddsw128">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, |
| llvm_v4i32_ty], [IntrNoMem]>; |
| |
| def int_x86_ssse3_phsub_w : GCCBuiltin<"__builtin_ia32_phsubw">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, |
| llvm_v4i16_ty], [IntrNoMem]>; |
| def int_x86_ssse3_phsub_w_128 : GCCBuiltin<"__builtin_ia32_phsubw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_v8i16_ty], [IntrNoMem]>; |
| |
| def int_x86_ssse3_phsub_d : GCCBuiltin<"__builtin_ia32_phsubd">, |
| Intrinsic<[llvm_v2i32_ty], [llvm_v2i32_ty, |
| llvm_v2i32_ty], [IntrNoMem]>; |
| def int_x86_ssse3_phsub_d_128 : GCCBuiltin<"__builtin_ia32_phsubd128">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, |
| llvm_v4i32_ty], [IntrNoMem]>; |
| |
| def int_x86_ssse3_phsub_sw : GCCBuiltin<"__builtin_ia32_phsubsw">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, |
| llvm_v4i16_ty], [IntrNoMem]>; |
| def int_x86_ssse3_phsub_sw_128 : GCCBuiltin<"__builtin_ia32_phsubsw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_v8i16_ty], [IntrNoMem]>; |
| |
| def int_x86_ssse3_pmadd_ub_sw : GCCBuiltin<"__builtin_ia32_pmaddubsw">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, |
| llvm_v4i16_ty], [IntrNoMem]>; |
| def int_x86_ssse3_pmadd_ub_sw_128 : GCCBuiltin<"__builtin_ia32_pmaddubsw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_v8i16_ty], [IntrNoMem]>; |
| } |
| |
| // Packed multiply high with round and scale |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_ssse3_pmul_hr_sw : GCCBuiltin<"__builtin_ia32_pmulhrsw">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, |
| llvm_v4i16_ty], [IntrNoMem, Commutative]>; |
| def int_x86_ssse3_pmul_hr_sw_128 : GCCBuiltin<"__builtin_ia32_pmulhrsw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_v8i16_ty], [IntrNoMem, Commutative]>; |
| } |
| |
| // Shuffle ops |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_ssse3_pshuf_b : GCCBuiltin<"__builtin_ia32_pshufb">, |
| Intrinsic<[llvm_v8i8_ty], [llvm_v8i8_ty, |
| llvm_v8i8_ty], [IntrNoMem]>; |
| def int_x86_ssse3_pshuf_b_128 : GCCBuiltin<"__builtin_ia32_pshufb128">, |
| Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, |
| llvm_v16i8_ty], [IntrNoMem]>; |
| } |
| |
| // Sign ops |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_ssse3_psign_b : GCCBuiltin<"__builtin_ia32_psignb">, |
| Intrinsic<[llvm_v8i8_ty], [llvm_v8i8_ty, |
| llvm_v8i8_ty], [IntrNoMem]>; |
| def int_x86_ssse3_psign_b_128 : GCCBuiltin<"__builtin_ia32_psignb128">, |
| Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, |
| llvm_v16i8_ty], [IntrNoMem]>; |
| |
| def int_x86_ssse3_psign_w : GCCBuiltin<"__builtin_ia32_psignw">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, |
| llvm_v4i16_ty], [IntrNoMem]>; |
| def int_x86_ssse3_psign_w_128 : GCCBuiltin<"__builtin_ia32_psignw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, |
| llvm_v8i16_ty], [IntrNoMem]>; |
| |
| def int_x86_ssse3_psign_d : GCCBuiltin<"__builtin_ia32_psignd">, |
| Intrinsic<[llvm_v2i32_ty], [llvm_v2i32_ty, |
| llvm_v2i32_ty], [IntrNoMem]>; |
| def int_x86_ssse3_psign_d_128 : GCCBuiltin<"__builtin_ia32_psignd128">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, |
| llvm_v4i32_ty], [IntrNoMem]>; |
| } |
| |
| // Absolute value ops |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_ssse3_pabs_b : GCCBuiltin<"__builtin_ia32_pabsb">, |
| Intrinsic<[llvm_v8i8_ty], [llvm_v8i8_ty], [IntrNoMem]>; |
| def int_x86_ssse3_pabs_b_128 : GCCBuiltin<"__builtin_ia32_pabsb128">, |
| Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty], [IntrNoMem]>; |
| |
| def int_x86_ssse3_pabs_w : GCCBuiltin<"__builtin_ia32_pabsw">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty], [IntrNoMem]>; |
| def int_x86_ssse3_pabs_w_128 : GCCBuiltin<"__builtin_ia32_pabsw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty], [IntrNoMem]>; |
| |
| def int_x86_ssse3_pabs_d : GCCBuiltin<"__builtin_ia32_pabsd">, |
| Intrinsic<[llvm_v2i32_ty], [llvm_v2i32_ty], [IntrNoMem]>; |
| def int_x86_ssse3_pabs_d_128 : GCCBuiltin<"__builtin_ia32_pabsd128">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty], [IntrNoMem]>; |
| } |
| |
| // Align ops |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_ssse3_palign_r : GCCBuiltin<"__builtin_ia32_palignr">, |
| Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, |
| llvm_v1i64_ty, llvm_i16_ty], [IntrNoMem]>; |
| def int_x86_ssse3_palign_r_128 : GCCBuiltin<"__builtin_ia32_palignr128">, |
| Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, |
| llvm_v2i64_ty, llvm_i32_ty], [IntrNoMem]>; |
| } |
| |
| //===----------------------------------------------------------------------===// |
| // SSE4.1 |
| |
| // FP rounding ops |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse41_round_ss : GCCBuiltin<"__builtin_ia32_roundss">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| def int_x86_sse41_round_ps : GCCBuiltin<"__builtin_ia32_roundps">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| def int_x86_sse41_round_sd : GCCBuiltin<"__builtin_ia32_roundsd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| def int_x86_sse41_round_pd : GCCBuiltin<"__builtin_ia32_roundpd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| } |
| |
| // Vector sign and zero extend |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse41_pmovsxbd : GCCBuiltin<"__builtin_ia32_pmovsxbd128">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v16i8_ty], |
| [IntrNoMem]>; |
| def int_x86_sse41_pmovsxbq : GCCBuiltin<"__builtin_ia32_pmovsxbq128">, |
| Intrinsic<[llvm_v2i64_ty], [llvm_v16i8_ty], |
| [IntrNoMem]>; |
| def int_x86_sse41_pmovsxbw : GCCBuiltin<"__builtin_ia32_pmovsxbw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v16i8_ty], |
| [IntrNoMem]>; |
| def int_x86_sse41_pmovsxdq : GCCBuiltin<"__builtin_ia32_pmovsxdq128">, |
| Intrinsic<[llvm_v2i64_ty], [llvm_v4i32_ty], |
| [IntrNoMem]>; |
| def int_x86_sse41_pmovsxwd : GCCBuiltin<"__builtin_ia32_pmovsxwd128">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty], |
| [IntrNoMem]>; |
| def int_x86_sse41_pmovsxwq : GCCBuiltin<"__builtin_ia32_pmovsxwq128">, |
| Intrinsic<[llvm_v2i64_ty], [llvm_v8i16_ty], |
| [IntrNoMem]>; |
| def int_x86_sse41_pmovzxbd : GCCBuiltin<"__builtin_ia32_pmovzxbd128">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v16i8_ty], |
| [IntrNoMem]>; |
| def int_x86_sse41_pmovzxbq : GCCBuiltin<"__builtin_ia32_pmovzxbq128">, |
| Intrinsic<[llvm_v2i64_ty], [llvm_v16i8_ty], |
| [IntrNoMem]>; |
| def int_x86_sse41_pmovzxbw : GCCBuiltin<"__builtin_ia32_pmovzxbw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v16i8_ty], |
| [IntrNoMem]>; |
| def int_x86_sse41_pmovzxdq : GCCBuiltin<"__builtin_ia32_pmovzxdq128">, |
| Intrinsic<[llvm_v2i64_ty], [llvm_v4i32_ty], |
| [IntrNoMem]>; |
| def int_x86_sse41_pmovzxwd : GCCBuiltin<"__builtin_ia32_pmovzxwd128">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty], |
| [IntrNoMem]>; |
| def int_x86_sse41_pmovzxwq : GCCBuiltin<"__builtin_ia32_pmovzxwq128">, |
| Intrinsic<[llvm_v2i64_ty], [llvm_v8i16_ty], |
| [IntrNoMem]>; |
| } |
| |
| // Vector min element |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse41_phminposuw : GCCBuiltin<"__builtin_ia32_phminposuw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty], |
| [IntrNoMem]>; |
| } |
| |
| // Vector compare, min, max |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse41_pcmpeqq : GCCBuiltin<"__builtin_ia32_pcmpeqq">, |
| Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty], |
| [IntrNoMem, Commutative]>; |
| def int_x86_sse42_pcmpgtq : GCCBuiltin<"__builtin_ia32_pcmpgtq">, |
| Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty], |
| [IntrNoMem]>; |
| def int_x86_sse41_pmaxsb : GCCBuiltin<"__builtin_ia32_pmaxsb128">, |
| Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty], |
| [IntrNoMem, Commutative]>; |
| def int_x86_sse41_pmaxsd : GCCBuiltin<"__builtin_ia32_pmaxsd128">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty], |
| [IntrNoMem, Commutative]>; |
| def int_x86_sse41_pmaxud : GCCBuiltin<"__builtin_ia32_pmaxud128">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty], |
| [IntrNoMem, Commutative]>; |
| def int_x86_sse41_pmaxuw : GCCBuiltin<"__builtin_ia32_pmaxuw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty], |
| [IntrNoMem, Commutative]>; |
| def int_x86_sse41_pminsb : GCCBuiltin<"__builtin_ia32_pminsb128">, |
| Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty], |
| [IntrNoMem, Commutative]>; |
| def int_x86_sse41_pminsd : GCCBuiltin<"__builtin_ia32_pminsd128">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty], |
| [IntrNoMem, Commutative]>; |
| def int_x86_sse41_pminud : GCCBuiltin<"__builtin_ia32_pminud128">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty], |
| [IntrNoMem, Commutative]>; |
| def int_x86_sse41_pminuw : GCCBuiltin<"__builtin_ia32_pminuw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty], |
| [IntrNoMem, Commutative]>; |
| } |
| |
| // Vector pack |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse41_packusdw : GCCBuiltin<"__builtin_ia32_packusdw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v4i32_ty, llvm_v4i32_ty], |
| [IntrNoMem]>; |
| } |
| |
| // Vector multiply |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse41_pmuldq : GCCBuiltin<"__builtin_ia32_pmuldq128">, |
| Intrinsic<[llvm_v2i64_ty], [llvm_v4i32_ty, llvm_v4i32_ty], |
| [IntrNoMem, Commutative]>; |
| def int_x86_sse41_pmulld : GCCBuiltin<"__builtin_ia32_pmulld128">, |
| Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty], |
| [IntrNoMem, Commutative]>; |
| } |
| |
| // Vector extract |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse41_pextrb : |
| Intrinsic<[llvm_i32_ty], [llvm_v16i8_ty, llvm_i32_ty], |
| [IntrNoMem]>; |
| def int_x86_sse41_pextrd : |
| Intrinsic<[llvm_i32_ty], [llvm_v4i32_ty, llvm_i32_ty], |
| [IntrNoMem]>; |
| def int_x86_sse41_pextrq : |
| Intrinsic<[llvm_i64_ty], [llvm_v2i64_ty, llvm_i32_ty], |
| [IntrNoMem]>; |
| def int_x86_sse41_extractps : GCCBuiltin<"__builtin_ia32_extractps128">, |
| Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty, llvm_i32_ty], |
| [IntrNoMem]>; |
| } |
| |
| // Vector insert |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse41_insertps : GCCBuiltin<"__builtin_ia32_insertps128">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty,llvm_i32_ty], |
| [IntrNoMem]>; |
| } |
| |
| // Vector blend |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse41_pblendvb : GCCBuiltin<"__builtin_ia32_pblendvb128">, |
| Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty,llvm_v16i8_ty], |
| [IntrNoMem]>; |
| def int_x86_sse41_pblendw : GCCBuiltin<"__builtin_ia32_pblendw128">, |
| Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty, llvm_i32_ty], |
| [IntrNoMem]>; |
| def int_x86_sse41_blendpd : GCCBuiltin<"__builtin_ia32_blendpd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty, llvm_i32_ty], |
| [IntrNoMem]>; |
| def int_x86_sse41_blendps : GCCBuiltin<"__builtin_ia32_blendps">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty, llvm_i32_ty], |
| [IntrNoMem]>; |
| def int_x86_sse41_blendvpd : GCCBuiltin<"__builtin_ia32_blendvpd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty,llvm_v2f64_ty], |
| [IntrNoMem]>; |
| def int_x86_sse41_blendvps : GCCBuiltin<"__builtin_ia32_blendvps">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty,llvm_v4f32_ty], |
| [IntrNoMem]>; |
| } |
| |
| // Vector dot product |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse41_dppd : GCCBuiltin<"__builtin_ia32_dppd">, |
| Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty,llvm_i32_ty], |
| [IntrNoMem, Commutative]>; |
| def int_x86_sse41_dpps : GCCBuiltin<"__builtin_ia32_dpps">, |
| Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty,llvm_i32_ty], |
| [IntrNoMem, Commutative]>; |
| } |
| |
| // Vector sum of absolute differences |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse41_mpsadbw : GCCBuiltin<"__builtin_ia32_mpsadbw128">, |
| Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty,llvm_i32_ty], |
| [IntrNoMem, Commutative]>; |
| } |
| |
| // Cacheability support ops |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse41_movntdqa : GCCBuiltin<"__builtin_ia32_movntdqa">, |
| Intrinsic<[llvm_v2i64_ty], [llvm_ptr_ty], [IntrReadMem]>; |
| } |
| |
| // Test instruction with bitwise comparison. |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse41_ptestz : GCCBuiltin<"__builtin_ia32_ptestz128">, |
| Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty, llvm_v4f32_ty], |
| [IntrNoMem]>; |
| def int_x86_sse41_ptestc : GCCBuiltin<"__builtin_ia32_ptestc128">, |
| Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty, llvm_v4f32_ty], |
| [IntrNoMem]>; |
| def int_x86_sse41_ptestnzc : GCCBuiltin<"__builtin_ia32_ptestnzc128">, |
| Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty, llvm_v4f32_ty], |
| [IntrNoMem]>; |
| } |
| |
| //===----------------------------------------------------------------------===// |
| // SSE4.2 |
| |
| // Miscellaneous |
| // CRC Instruction |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse42_crc32_8 : GCCBuiltin<"__builtin_ia32_crc32qi">, |
| Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i8_ty], |
| [IntrNoMem]>; |
| def int_x86_sse42_crc32_16 : GCCBuiltin<"__builtin_ia32_crc32hi">, |
| Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i16_ty], |
| [IntrNoMem]>; |
| def int_x86_sse42_crc32_32 : GCCBuiltin<"__builtin_ia32_crc32si">, |
| Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], |
| [IntrNoMem]>; |
| def int_x86_sse42_crc32_64 : GCCBuiltin<"__builtin_ia32_crc32di">, |
| Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty], |
| [IntrNoMem]>; |
| } |
| |
| // String/text processing ops. |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_sse42_pcmpistrm128 : GCCBuiltin<"__builtin_ia32_pcmpistrm128">, |
| Intrinsic<[llvm_v16i8_ty], |
| [llvm_v16i8_ty, llvm_v16i8_ty, llvm_i8_ty], |
| [IntrNoMem]>; |
| def int_x86_sse42_pcmpistri128 : GCCBuiltin<"__builtin_ia32_pcmpistri128">, |
| Intrinsic<[llvm_i32_ty], |
| [llvm_v16i8_ty, llvm_v16i8_ty, llvm_i8_ty], |
| [IntrNoMem]>; |
| def int_x86_sse42_pcmpistria128 : GCCBuiltin<"__builtin_ia32_pcmpistria128">, |
| Intrinsic<[llvm_i32_ty], |
| [llvm_v16i8_ty, llvm_v16i8_ty, llvm_i8_ty], |
| [IntrNoMem]>; |
| def int_x86_sse42_pcmpistric128 : GCCBuiltin<"__builtin_ia32_pcmpistric128">, |
| Intrinsic<[llvm_i32_ty], |
| [llvm_v16i8_ty, llvm_v16i8_ty, llvm_i8_ty], |
| [IntrNoMem]>; |
| def int_x86_sse42_pcmpistrio128 : GCCBuiltin<"__builtin_ia32_pcmpistrio128">, |
| Intrinsic<[llvm_i32_ty], |
| [llvm_v16i8_ty, llvm_v16i8_ty, llvm_i8_ty], |
| [IntrNoMem]>; |
| def int_x86_sse42_pcmpistris128 : GCCBuiltin<"__builtin_ia32_pcmpistris128">, |
| Intrinsic<[llvm_i32_ty], |
| [llvm_v16i8_ty, llvm_v16i8_ty, llvm_i8_ty], |
| [IntrNoMem]>; |
| def int_x86_sse42_pcmpistriz128 : GCCBuiltin<"__builtin_ia32_pcmpistriz128">, |
| Intrinsic<[llvm_i32_ty], |
| [llvm_v16i8_ty, llvm_v16i8_ty, llvm_i8_ty], |
| [IntrNoMem]>; |
| def int_x86_sse42_pcmpestrm128 : GCCBuiltin<"__builtin_ia32_pcmpestrm128">, |
| Intrinsic<[llvm_v16i8_ty], |
| [llvm_v16i8_ty, llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty, |
| llvm_i8_ty], |
| [IntrNoMem]>; |
| def int_x86_sse42_pcmpestri128 : GCCBuiltin<"__builtin_ia32_pcmpestri128">, |
| Intrinsic<[llvm_i32_ty], |
| [llvm_v16i8_ty, llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty, |
| llvm_i8_ty], |
| [IntrNoMem]>; |
| def int_x86_sse42_pcmpestria128 : GCCBuiltin<"__builtin_ia32_pcmpestria128">, |
| Intrinsic<[llvm_i32_ty], |
| [llvm_v16i8_ty, llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty, |
| llvm_i8_ty], |
| [IntrNoMem]>; |
| def int_x86_sse42_pcmpestric128 : GCCBuiltin<"__builtin_ia32_pcmpestric128">, |
| Intrinsic<[llvm_i32_ty], |
| [llvm_v16i8_ty, llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty, |
| llvm_i8_ty], |
| [IntrNoMem]>; |
| def int_x86_sse42_pcmpestrio128 : GCCBuiltin<"__builtin_ia32_pcmpestrio128">, |
| Intrinsic<[llvm_i32_ty], |
| [llvm_v16i8_ty, llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty, |
| llvm_i8_ty], |
| [IntrNoMem]>; |
| def int_x86_sse42_pcmpestris128 : GCCBuiltin<"__builtin_ia32_pcmpestris128">, |
| Intrinsic<[llvm_i32_ty], |
| [llvm_v16i8_ty, llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty, |
| llvm_i8_ty], |
| [IntrNoMem]>; |
| def int_x86_sse42_pcmpestriz128 : GCCBuiltin<"__builtin_ia32_pcmpestriz128">, |
| Intrinsic<[llvm_i32_ty], |
| [llvm_v16i8_ty, llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty, |
| llvm_i8_ty], |
| [IntrNoMem]>; |
| } |
| |
| //===----------------------------------------------------------------------===// |
| // MMX |
| |
| // Empty MMX state op. |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_mmx_emms : GCCBuiltin<"__builtin_ia32_emms">, |
| Intrinsic<[llvm_void_ty], [], [IntrWriteMem]>; |
| def int_x86_mmx_femms : GCCBuiltin<"__builtin_ia32_femms">, |
| Intrinsic<[llvm_void_ty], [], [IntrWriteMem]>; |
| } |
| |
| // Integer arithmetic ops. |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| // Addition |
| def int_x86_mmx_padds_b : GCCBuiltin<"__builtin_ia32_paddsb">, |
| Intrinsic<[llvm_v8i8_ty], [llvm_v8i8_ty, |
| llvm_v8i8_ty], [IntrNoMem, Commutative]>; |
| def int_x86_mmx_padds_w : GCCBuiltin<"__builtin_ia32_paddsw">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, |
| llvm_v4i16_ty], [IntrNoMem, Commutative]>; |
| |
| def int_x86_mmx_paddus_b : GCCBuiltin<"__builtin_ia32_paddusb">, |
| Intrinsic<[llvm_v8i8_ty], [llvm_v8i8_ty, |
| llvm_v8i8_ty], [IntrNoMem, Commutative]>; |
| def int_x86_mmx_paddus_w : GCCBuiltin<"__builtin_ia32_paddusw">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, |
| llvm_v4i16_ty], [IntrNoMem, Commutative]>; |
| |
| // Subtraction |
| def int_x86_mmx_psubs_b : GCCBuiltin<"__builtin_ia32_psubsb">, |
| Intrinsic<[llvm_v8i8_ty], [llvm_v8i8_ty, |
| llvm_v8i8_ty], [IntrNoMem]>; |
| def int_x86_mmx_psubs_w : GCCBuiltin<"__builtin_ia32_psubsw">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, |
| llvm_v4i16_ty], [IntrNoMem]>; |
| |
| def int_x86_mmx_psubus_b : GCCBuiltin<"__builtin_ia32_psubusb">, |
| Intrinsic<[llvm_v8i8_ty], [llvm_v8i8_ty, |
| llvm_v8i8_ty], [IntrNoMem]>; |
| def int_x86_mmx_psubus_w : GCCBuiltin<"__builtin_ia32_psubusw">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, |
| llvm_v4i16_ty], [IntrNoMem]>; |
| |
| // Multiplication |
| def int_x86_mmx_pmulh_w : GCCBuiltin<"__builtin_ia32_pmulhw">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, |
| llvm_v4i16_ty], [IntrNoMem, Commutative]>; |
| def int_x86_mmx_pmulhu_w : GCCBuiltin<"__builtin_ia32_pmulhuw">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, |
| llvm_v4i16_ty], [IntrNoMem, Commutative]>; |
| def int_x86_mmx_pmulu_dq : GCCBuiltin<"__builtin_ia32_pmuludq">, |
| Intrinsic<[llvm_v2i32_ty], [llvm_v2i32_ty, |
| llvm_v2i32_ty], [IntrNoMem, Commutative]>; |
| def int_x86_mmx_pmadd_wd : GCCBuiltin<"__builtin_ia32_pmaddwd">, |
| Intrinsic<[llvm_v2i32_ty], [llvm_v4i16_ty, |
| llvm_v4i16_ty], [IntrNoMem, Commutative]>; |
| |
| // Averages |
| def int_x86_mmx_pavg_b : GCCBuiltin<"__builtin_ia32_pavgb">, |
| Intrinsic<[llvm_v8i8_ty], [llvm_v8i8_ty, |
| llvm_v8i8_ty], [IntrNoMem, Commutative]>; |
| def int_x86_mmx_pavg_w : GCCBuiltin<"__builtin_ia32_pavgw">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, |
| llvm_v4i16_ty], [IntrNoMem, Commutative]>; |
| |
| // Maximum |
| def int_x86_mmx_pmaxu_b : GCCBuiltin<"__builtin_ia32_pmaxub">, |
| Intrinsic<[llvm_v8i8_ty], [llvm_v8i8_ty, |
| llvm_v8i8_ty], [IntrNoMem, Commutative]>; |
| def int_x86_mmx_pmaxs_w : GCCBuiltin<"__builtin_ia32_pmaxsw">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, |
| llvm_v4i16_ty], [IntrNoMem, Commutative]>; |
| |
| // Minimum |
| def int_x86_mmx_pminu_b : GCCBuiltin<"__builtin_ia32_pminub">, |
| Intrinsic<[llvm_v8i8_ty], [llvm_v8i8_ty, |
| llvm_v8i8_ty], [IntrNoMem, Commutative]>; |
| def int_x86_mmx_pmins_w : GCCBuiltin<"__builtin_ia32_pminsw">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, |
| llvm_v4i16_ty], [IntrNoMem, Commutative]>; |
| |
| // Packed sum of absolute differences |
| def int_x86_mmx_psad_bw : GCCBuiltin<"__builtin_ia32_psadbw">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v8i8_ty, |
| llvm_v8i8_ty], [IntrNoMem, Commutative]>; |
| } |
| |
| // Integer shift ops. |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| // Shift left logical |
| def int_x86_mmx_psll_w : GCCBuiltin<"__builtin_ia32_psllw">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, |
| llvm_v1i64_ty], [IntrNoMem]>; |
| def int_x86_mmx_psll_d : GCCBuiltin<"__builtin_ia32_pslld">, |
| Intrinsic<[llvm_v2i32_ty], [llvm_v2i32_ty, |
| llvm_v1i64_ty], [IntrNoMem]>; |
| def int_x86_mmx_psll_q : GCCBuiltin<"__builtin_ia32_psllq">, |
| Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, |
| llvm_v1i64_ty], [IntrNoMem]>; |
| |
| def int_x86_mmx_psrl_w : GCCBuiltin<"__builtin_ia32_psrlw">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, |
| llvm_v1i64_ty], [IntrNoMem]>; |
| def int_x86_mmx_psrl_d : GCCBuiltin<"__builtin_ia32_psrld">, |
| Intrinsic<[llvm_v2i32_ty], [llvm_v2i32_ty, |
| llvm_v1i64_ty], [IntrNoMem]>; |
| def int_x86_mmx_psrl_q : GCCBuiltin<"__builtin_ia32_psrlq">, |
| Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, |
| llvm_v1i64_ty], [IntrNoMem]>; |
| |
| def int_x86_mmx_psra_w : GCCBuiltin<"__builtin_ia32_psraw">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, |
| llvm_v1i64_ty], [IntrNoMem]>; |
| def int_x86_mmx_psra_d : GCCBuiltin<"__builtin_ia32_psrad">, |
| Intrinsic<[llvm_v2i32_ty], [llvm_v2i32_ty, |
| llvm_v1i64_ty], [IntrNoMem]>; |
| |
| def int_x86_mmx_pslli_w : GCCBuiltin<"__builtin_ia32_psllwi">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| def int_x86_mmx_pslli_d : GCCBuiltin<"__builtin_ia32_pslldi">, |
| Intrinsic<[llvm_v2i32_ty], [llvm_v2i32_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| def int_x86_mmx_pslli_q : GCCBuiltin<"__builtin_ia32_psllqi">, |
| Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| |
| def int_x86_mmx_psrli_w : GCCBuiltin<"__builtin_ia32_psrlwi">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| def int_x86_mmx_psrli_d : GCCBuiltin<"__builtin_ia32_psrldi">, |
| Intrinsic<[llvm_v2i32_ty], [llvm_v2i32_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| def int_x86_mmx_psrli_q : GCCBuiltin<"__builtin_ia32_psrlqi">, |
| Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| |
| def int_x86_mmx_psrai_w : GCCBuiltin<"__builtin_ia32_psrawi">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| def int_x86_mmx_psrai_d : GCCBuiltin<"__builtin_ia32_psradi">, |
| Intrinsic<[llvm_v2i32_ty], [llvm_v2i32_ty, |
| llvm_i32_ty], [IntrNoMem]>; |
| } |
| |
| // Pack ops. |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_mmx_packsswb : GCCBuiltin<"__builtin_ia32_packsswb">, |
| Intrinsic<[llvm_v8i8_ty], [llvm_v4i16_ty, |
| llvm_v4i16_ty], [IntrNoMem]>; |
| def int_x86_mmx_packssdw : GCCBuiltin<"__builtin_ia32_packssdw">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v2i32_ty, |
| llvm_v2i32_ty], [IntrNoMem]>; |
| def int_x86_mmx_packuswb : GCCBuiltin<"__builtin_ia32_packuswb">, |
| Intrinsic<[llvm_v8i8_ty], [llvm_v4i16_ty, |
| llvm_v4i16_ty], [IntrNoMem]>; |
| } |
| |
| // Integer comparison ops |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_mmx_pcmpeq_b : GCCBuiltin<"__builtin_ia32_pcmpeqb">, |
| Intrinsic<[llvm_v8i8_ty], [llvm_v8i8_ty, |
| llvm_v8i8_ty], [IntrNoMem]>; |
| def int_x86_mmx_pcmpeq_w : GCCBuiltin<"__builtin_ia32_pcmpeqw">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, |
| llvm_v4i16_ty], [IntrNoMem]>; |
| def int_x86_mmx_pcmpeq_d : GCCBuiltin<"__builtin_ia32_pcmpeqd">, |
| Intrinsic<[llvm_v2i32_ty], [llvm_v2i32_ty, |
| llvm_v2i32_ty], [IntrNoMem]>; |
| |
| def int_x86_mmx_pcmpgt_b : GCCBuiltin<"__builtin_ia32_pcmpgtb">, |
| Intrinsic<[llvm_v8i8_ty], [llvm_v8i8_ty, |
| llvm_v8i8_ty], [IntrNoMem]>; |
| def int_x86_mmx_pcmpgt_w : GCCBuiltin<"__builtin_ia32_pcmpgtw">, |
| Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, |
| llvm_v4i16_ty], [IntrNoMem]>; |
| def int_x86_mmx_pcmpgt_d : GCCBuiltin<"__builtin_ia32_pcmpgtd">, |
| Intrinsic<[llvm_v2i32_ty], [llvm_v2i32_ty, |
| llvm_v2i32_ty], [IntrNoMem]>; |
| } |
| |
| // Misc. |
| let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". |
| def int_x86_mmx_maskmovq : GCCBuiltin<"__builtin_ia32_maskmovq">, |
| Intrinsic<[llvm_void_ty], |
| [llvm_v8i8_ty, llvm_v8i8_ty, llvm_ptr_ty], |
| [IntrWriteMem]>; |
| |
| def int_x86_mmx_pmovmskb : GCCBuiltin<"__builtin_ia32_pmovmskb">, |
| Intrinsic<[llvm_i32_ty], [llvm_v8i8_ty], [IntrNoMem]>; |
| |
| def int_x86_mmx_movnt_dq : GCCBuiltin<"__builtin_ia32_movntq">, |
| Intrinsic<[llvm_void_ty], [llvm_ptr_ty, |
| llvm_v1i64_ty], [IntrWriteMem]>; |
| } |
